jungfrau module data, fixel moench02 for jctb and jctb server actualized for both buses

This commit is contained in:
2018-08-13 16:27:36 +02:00
parent 52b1e98726
commit 921ae01bbe
7 changed files with 172 additions and 81 deletions

View File

@@ -70,6 +70,8 @@ int N_CHANS=NCHANS;
int init_detector(int b, int checkType) {
int i;
int ret;
int ii;
if (mapCSP0()==FAIL) { printf("Could not map memory\n");
exit(1);
}
@@ -81,8 +83,18 @@ int init_detector(int b, int checkType) {
for (i=0; i<1000000; i++) {
bus_w(SET_DELAY_LSB_REG, i*100);
bus_r(FPGA_VERSION_REG);
if (i*100!=bus_r(SET_DELAY_LSB_REG))
printf("ERROR: wrote 0x%x, read 0x%x\n",i*100,bus_r(SET_DELAY_LSB_REG));
//usleep(100);
ii=0;
// usleep(100);
//usleep(100);
// ret=bus_r(SET_DELAY_LSB_REG);
ret=bus_r(SET_DELAY_LSB_REG);
while (ret!=i*100 && ii<100) {
//if (i*100!=ret)
printf("ERROR %d: wrote 0x%x, read 0x%x\n",i, i*100,ret);
ret=bus_r(SET_DELAY_LSB_REG);
}
}
printf("Finished\n");
}else