speed settings fixed in jungfrau

This commit is contained in:
maliakal_d 2021-09-27 12:24:14 +02:00
parent 4c0323dd0a
commit 920a8a6e9e
2 changed files with 40 additions and 20 deletions

View File

@ -1821,7 +1821,11 @@ int setClockDivider(enum CLKINDEX ind, int val) {
} }
LOG(logINFO, ("Setting Full Speed (40 MHz):\n")); LOG(logINFO, ("Setting Full Speed (40 MHz):\n"));
adcOfst = ADC_OFST_FULL_SPEED_VAL; adcOfst = ADC_OFST_FULL_SPEED_VAL;
sampleAdcSpeed = SAMPLE_ADC_FULL_SPEED; if (getChipVersion() == 10) {
sampleAdcSpeed = SAMPLE_ADC_FULL_SPEED_CHIP10;
} else {
sampleAdcSpeed = SAMPLE_ADC_FULL_SPEED;
}
adcPhase = ADC_PHASE_FULL_SPEED; adcPhase = ADC_PHASE_FULL_SPEED;
dbitPhase = DBIT_PHASE_FULL_SPEED; dbitPhase = DBIT_PHASE_FULL_SPEED;
config = CONFIG_FULL_SPEED_40MHZ_VAL; config = CONFIG_FULL_SPEED_40MHZ_VAL;
@ -1829,27 +1833,43 @@ int setClockDivider(enum CLKINDEX ind, int val) {
case HALF_SPEED: case HALF_SPEED:
LOG(logINFO, ("Setting Half Speed (20 MHz):\n")); LOG(logINFO, ("Setting Half Speed (20 MHz):\n"));
adcOfst = isHardwareVersion2() ? ADC_OFST_HALF_SPEED_BOARD2_VAL if (isHardwareVersion2()) {
: ADC_OFST_HALF_SPEED_VAL; adcOfst = ADC_OFST_HALF_SPEED_BOARD2_VAL;
sampleAdcSpeed = isHardwareVersion2() ? SAMPLE_ADC_HALF_SPEED_BOARD2 sampleAdcSpeed = SAMPLE_ADC_HALF_SPEED_BOARD2;
: SAMPLE_ADC_HALF_SPEED; adcPhase = ADC_PHASE_HALF_SPEED_BOARD2;
adcPhase = isHardwareVersion2() ? ADC_PHASE_HALF_SPEED_BOARD2 dbitPhase = DBIT_PHASE_HALF_SPEED_BOARD2;
: ADC_PHASE_HALF_SPEED; } else if (getChipVersion() == 10) {
dbitPhase = isHardwareVersion2() ? DBIT_PHASE_HALF_SPEED_BOARD2 adcOfst = ADC_OFST_HALF_SPEED_VAL;
: DBIT_PHASE_HALF_SPEED; sampleAdcSpeed = SAMPLE_ADC_HALF_SPEED_CHIP10;
adcPhase = ADC_PHASE_HALF_SPEED;
dbitPhase = DBIT_PHASE_HALF_SPEED;
} else {
adcOfst = ADC_OFST_HALF_SPEED_VAL;
sampleAdcSpeed = SAMPLE_ADC_HALF_SPEED;
adcPhase = ADC_PHASE_HALF_SPEED;
dbitPhase = DBIT_PHASE_HALF_SPEED;
}
config = CONFIG_HALF_SPEED_20MHZ_VAL; config = CONFIG_HALF_SPEED_20MHZ_VAL;
break; break;
case QUARTER_SPEED: case QUARTER_SPEED:
LOG(logINFO, ("Setting Half Speed (10 MHz):\n")); LOG(logINFO, ("Setting Half Speed (10 MHz):\n"));
adcOfst = isHardwareVersion2() ? ADC_OFST_QUARTER_SPEED_BOARD2_VAL if (isHardwareVersion2()) {
: ADC_OFST_QUARTER_SPEED_VAL; adcOfst = ADC_OFST_QUARTER_SPEED_BOARD2_VAL;
sampleAdcSpeed = isHardwareVersion2() ? SAMPLE_ADC_QUARTER_SPEED_BOARD2 sampleAdcSpeed = SAMPLE_ADC_QUARTER_SPEED_BOARD2;
: SAMPLE_ADC_QUARTER_SPEED; adcPhase = ADC_PHASE_QUARTER_SPEED_BOARD2;
adcPhase = isHardwareVersion2() ? ADC_PHASE_QUARTER_SPEED_BOARD2 dbitPhase = DBIT_PHASE_QUARTER_SPEED_BOARD2;
: ADC_PHASE_QUARTER_SPEED; } else if (getChipVersion() == 10) {
dbitPhase = isHardwareVersion2() ? DBIT_PHASE_QUARTER_SPEED_BOARD2 adcOfst = ADC_OFST_QUARTER_SPEED_VAL;
: DBIT_PHASE_QUARTER_SPEED; sampleAdcSpeed = SAMPLE_ADC_QUARTER_SPEED_CHIP10;
adcPhase = ADC_PHASE_QUARTER_SPEED;
dbitPhase = DBIT_PHASE_QUARTER_SPEED;
} else {
adcOfst = ADC_OFST_QUARTER_SPEED_VAL;
sampleAdcSpeed = SAMPLE_ADC_QUARTER_SPEED;
adcPhase = ADC_PHASE_QUARTER_SPEED;
dbitPhase = DBIT_PHASE_QUARTER_SPEED;
}
config = CONFIG_QUARTER_SPEED_10MHZ_VAL; config = CONFIG_QUARTER_SPEED_10MHZ_VAL;
break; break;

View File

@ -153,13 +153,13 @@ enum CLKINDEX { RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS };
SAMPLE_DGTL_SAMPLE_2_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2230 SAMPLE_DGTL_SAMPLE_2_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2230
// 2.0 pcb (chipv1.0) // 2.0 pcb (chipv1.0)
#define SAMPLE_ADC_FULL_SPEED \ #define SAMPLE_ADC_FULL_SPEED_CHIP10 \
(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + \ (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + \
SAMPLE_DGTL_SAMPLE_1_VAL + SAMPLE_DECMT_FACTOR_FULL_VAL) // 0x0100 SAMPLE_DGTL_SAMPLE_1_VAL + SAMPLE_DECMT_FACTOR_FULL_VAL) // 0x0100
#define SAMPLE_ADC_HALF_SPEED \ #define SAMPLE_ADC_HALF_SPEED_CHIP10 \
(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + \ (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + \
SAMPLE_DGTL_SAMPLE_3_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1310 SAMPLE_DGTL_SAMPLE_3_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1310
#define SAMPLE_ADC_QUARTER_SPEED \ #define SAMPLE_ADC_QUARTER_SPEED_CHIP10 \
(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_3_VAL + \ (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_3_VAL + \
SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2630 SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2630