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gotthard2, mythen3: making them clkdivider dependant and not clkfrequency, binaries not loaded yet

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maliakal_d
2020-04-28 17:04:57 +02:00
parent 337e56d9bf
commit 86b39853a3
6 changed files with 68 additions and 74 deletions
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10
slsDetectorServers/mythen3DetectorServer/slsDetectorServer_defs.h
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@ -32,11 +32,11 @@
#define DEFAULT_DELAY_AFTER_TRIGGER (0)
#define DEFAULT_HIGH_VOLTAGE (0)
#define DEFAULT_TIMING_MODE (AUTO_TIMING)
#define DEFAULT_READOUT_C0 (125000000) // rdo_clk, 125 MHz
#define DEFAULT_READOUT_C1 (125000000) // rdo_x2_clk, 125 MHz
#define DEFAULT_SYSTEM_C0 (250000000) // run_clk, 250 MHz
#define DEFAULT_SYSTEM_C1 (125000000) // chip_clk, 125 MHz
#define DEFAULT_SYSTEM_C2 (125000000) // sync_clk, 125 MHz
#define DEFAULT_READOUT_C0 (10)//(125000000) // rdo_clk, 125 MHz
#define DEFAULT_READOUT_C1 (10)//(125000000) // rdo_x2_clk, 125 MHz
#define DEFAULT_SYSTEM_C0 (5)//(250000000) // run_clk, 250 MHz
#define DEFAULT_SYSTEM_C1 (10)//(125000000) // chip_clk, 125 MHz
#define DEFAULT_SYSTEM_C2 (10)//(125000000) // sync_clk, 125 MHz
/* Firmware Definitions */