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slsDetector/slsDetectorCommand.cpp

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This commit is contained in:
Dhanya Maliakal
2016-10-20 07:31:53 +02:00
parent 13cff71faf 44a69e2aee
commit 81d96a047d
12 changed files with 132 additions and 29 deletions
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19
slsDetectorSoftware/eigerDetectorServer/FebControl.c
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@ -1676,3 +1676,22 @@ int Feb_Control_PrintCorrectedValues(){
return 1;
}
int Feb_Control_GetLeftFPGATemp(){
unsigned int temperature=0;
Feb_Interface_ReadRegister(Module_GetTopLeftAddress (&modules[1]),FEB_REG_STATUS, &temperature);
temperature = temperature >> 16;
//division done in client to send int over network
return (int)temperature;
}
int Feb_Control_GetRightFPGATemp(){
unsigned int temperature=0;
Feb_Interface_ReadRegister(Module_GetTopRightAddress (&modules[1]),FEB_REG_STATUS, &temperature);
temperature = temperature >> 16;
//division done in client to send int over network
return (int)temperature;
}

3
slsDetectorSoftware/eigerDetectorServer/FebControl.h
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@ -192,4 +192,7 @@ int Feb_Control_GetModuleNumber();
void Feb_Control_SetRateCorrectionVariable(int activate_rate_correction);
int Feb_Control_PrintCorrectedValues();
int Feb_Control_GetLeftFPGATemp();
int Feb_Control_GetRightFPGATemp();
#endif

4
slsDetectorSoftware/eigerDetectorServer/FebRegisterDefs.h
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@ -95,6 +95,7 @@
#define DAQ_STATUS_DAQ_RUNNING 0x01
#define DAQ_DATA_COLLISION_ERROR 0x02
#define DAQ_STATUS_CURRENT_M4 0x04
#define DAQ_STATUS_CURRENT_M8 0x08
#define DAQ_STATUS_CURRENT_M12 0x00 //in 12 bit mode both are cleared
@ -149,3 +150,6 @@
#define FRAME_NUM_RESET_OFFSET 0xA0
//temp so far
#define FEB_REG_STATUS 0xa

6
slsDetectorSoftware/eigerDetectorServer/slsDetectorFunctionList.c
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@ -449,6 +449,12 @@ int getADC(enum detAdcIndex ind, int imod){
case TEMP_FPGA:
retval=getBebFPGATemp()*1000;
break;
case TEMP_FPGAFEBL:
retval=Feb_Control_GetLeftFPGATemp();
break;
case TEMP_FPGAFEBR:
retval=Feb_Control_GetRightFPGATemp();
break;
case TEMP_FPGAEXT:
case TEMP_10GE:
case TEMP_DCDC:

2
slsDetectorSoftware/eigerDetectorServer/slsDetectorServer_defs.h
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@ -40,7 +40,7 @@
enum detDacIndex{SVP,VTR,VRF,VRS,SVN,VTGSTV,VCMP_LL,VCMP_LR,CAL,VCMP_RL,RXB_RB,RXB_LB,VCMP_RR,VCP,VCN,VIS,VTHRESHOLD};
enum detAdcIndex{TEMP_FPGAEXT, TEMP_10GE, TEMP_DCDC, TEMP_SODL, TEMP_SODR, TEMP_FPGA};
enum detAdcIndex{TEMP_FPGAEXT, TEMP_10GE, TEMP_DCDC, TEMP_SODL, TEMP_SODR, TEMP_FPGA, TEMP_FPGAFEBL, TEMP_FPGAFEBR};
enum detNetworkParameter{TXN_LEFT, TXN_RIGHT, TXN_FRAME,FLOWCTRL_10G};