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powerchip for mythen3

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Marie Andrae
2019-11-06 11:50:09 +01:00
parent 705ddb7f42
commit 7de9401bc7
7 changed files with 20 additions and 4 deletions
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2
slsDetectorServers/mythen3DetectorServer/RegisterDefs.h
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@ -69,6 +69,8 @@
// #define CONTROL_MMRY_RST_MSK (0x00000001 << CONTROL_MMRY_RST_OFST)
#define CONTROL_CLR_ACQSTN_FIFO_OFST (14)
#define CONTROL_CLR_ACQSTN_FIFO_MSK (0x00000001 << CONTROL_CLR_ACQSTN_FIFO_OFST)
#define CONTROL_PWR_CHIP_OFST (31)
#define CONTROL_PWR_CHIP_MSK (0x00000001 << CONTROL_PWR_CHIP_OFST)
/* Pattern IO Control 64 bit register */
#define PATTERN_IO_CTRL_LSB_REG (0x22 * REG_OFFSET + BASE_CONTROL)