tried fifo change

git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@443 951219d9-93cf-4727-9268-0efd64621fa3
This commit is contained in:
l_maliakal_d 2013-01-30 14:33:39 +00:00
parent 2176620ca4
commit 7d96d8b3af
4 changed files with 248 additions and 49 deletions

View File

@ -10,41 +10,73 @@
#include "sls_detector_defs.h" #include "sls_detector_defs.h"
#define CSP0 0xC4100000 #define CSP0 0xC4100000 //XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_BASEADDR
#define MEM_SIZE 0xFFFFFFF #define MEM_SIZE 0xFFFFFFF
#define STATUS_REG 0x0a000
#define SET_FRAMES_LSB_REG 0x10000 #define FIFO_CNTRL_REG 0x0 //PLB_LL_FIFO_REG_CTRL
#define SET_FRAMES_MSB_REG 0x11000 #define FIFO_STATUS_REG 0x1 //PLB_LL_FIFO_REG_STATUS
#define GET_FRAMES_LSB_REG 0x12000 #define FIFO_FIFO_REG 0x2 //PLB_LL_FIFO_REG_FIFO
#define GET_FRAMES_MSB_REG 0x13000
#define SET_EXPTIME_LSB_REG 0x14000
#define SET_EXPTIME_MSB_REG 0x15000
#define GET_EXPTIME_LSB_REG 0x16000
#define GET_EXPTIME_MSB_REG 0x17000
#define SET_GATES_LSB_REG 0x18000 #define FIFO_THRESHOLD_WORDS 100 //PLB_LL_FIFO_ALMOST_FULL_THRESHOLD_WORDS
#define SET_GATES_MSB_REG 0x19000
#define GET_GATES_LSB_REG 0x1a000
#define GET_GATES_MSB_REG 0x1b000
#define SET_PERIOD_LSB_REG 0x1c000
#define SET_PERIOD_MSB_REG 0x1d000
#define GET_PERIOD_LSB_REG 0x1e000
#define GET_PERIOD_MSB_REG 0x1f000
#define SET_DELAY_LSB_REG 0x20000
#define SET_DELAY_MSB_REG 0x21000
#define GET_DELAY_LSB_REG 0x22000
#define GET_DELAY_MSB_REG 0x23000
#define SET_TRAINS_LSB_REG 0x24000 /*Fifo Control Register*/
#define SET_TRAINS_MSB_REG 0x25000 #define FIFOCNTRL_RESET_MASK 0x0CE00000 //PLB_LL_FIFO_CTRL_RESET_STD
#define GET_TRAINS_LSB_REG 0x26000
#define GET_TRAINS_MSB_REG 0x27000
/*Fifo Status Register*/
#define FIFOSTATUS_SOF_BIT 0x10000000 //PLB_LL_FIFO_STATUS_LL_SOF
#define FIFOSTATUS_EOF_BIT 0x20000000 //PLB_LL_FIFO_STATUS_LL_EOF
#define FIFOSTATUS_REM_OFFSET 30 //PLB_LL_FIFO_STATUS_LL_REM_SHIFT
#define FIFOSTATUS_REM_MASK 0xC0000000 //PLB_LL_FIFO_STATUS_LL_REM
#define FIFOSTATUS_EMPTY_BIT 0x08000000 //PLB_LL_FIFO_STATUS_EMPTY
#define FIFOSTATUS_ALMOST_FULL_BIT 0x01000000 //PLB_LL_FIFO_STATUS_ALMOSTFULL
/*Fifo Fifo Register*/
#define FIFOCNTRL_SOF_BIT 0x10000000 //PLB_LL_FIFO_CTRL_LL_SOF
#define FIFOCNTRL_EOF_BIT 0x20000000 //PLB_LL_FIFO_CTRL_LL_EOF
#define FIFOCNTRL_REM_OFFSET 30 //PLB_LL_FIFO_CTRL_LL_REM_SHIFT
#define FIFOCNTRL_REM_MASK 0xC0000000 //PLB_LL_FIFO_CTRL_LL_REM
#define FIFOCNTRL_MASK 0xF0000000 //PLB_LL_FIFO_CTRL_LL_MASK
#define SET_FRAMES_LSB_REG 0x1
#define SET_FRAMES_MSB_REG 0x1
#define GET_FRAMES_LSB_REG 0x1
#define GET_FRAMES_MSB_REG 0x1
#define SET_EXPTIME_LSB_REG 0x1
#define SET_EXPTIME_MSB_REG 0x1
#define GET_EXPTIME_LSB_REG 0x1
#define GET_EXPTIME_MSB_REG 0x1
#define SET_GATES_LSB_REG 0x1
#define SET_GATES_MSB_REG 0x1
#define GET_GATES_LSB_REG 0x1
#define GET_GATES_MSB_REG 0x1
#define SET_PERIOD_LSB_REG 0x1
#define SET_PERIOD_MSB_REG 0x1
#define GET_PERIOD_LSB_REG 0x1
#define GET_PERIOD_MSB_REG 0x1
#define SET_DELAY_LSB_REG 0x1
#define SET_DELAY_MSB_REG 0x1
#define GET_DELAY_LSB_REG 0x1
#define GET_DELAY_MSB_REG 0x1
#define SET_TRAINS_LSB_REG 0x1
#define SET_TRAINS_MSB_REG 0x1
#define GET_TRAINS_LSB_REG 0x1
#define GET_TRAINS_MSB_REG 0x1

View File

@ -52,11 +52,17 @@ int dataBytes;
int init_detector(int b) { int init_detector(int b) {
#ifdef VIRTUAL #ifdef VIRTUAL
printf("This is a VIRTUAL detector\n"); printf("This is a VIRTUAL detector\n");
#endif #else
mapCSP0(); mapCSP0();
//only for control server //only for control server
if(b){ if(b){
//PLB_LL_fifo
fifoReset();
fifoTest();
//Aurora-Links
#endif
#ifdef SLS_DETECTOR_FUNCTION_LIST #ifdef SLS_DETECTOR_FUNCTION_LIST
initializeDetector(); initializeDetector();
//testFpga(); //testFpga();
@ -98,9 +104,9 @@ int64_t swap_int64(int64_t val)
int decode_function(int file_des) { int decode_function(int file_des) {
int fnum,n; int fnum,n;
int retval=FAIL; int retval=FAIL;
//#ifdef VERBOSE #ifdef VERBOSE
printf( "receive data\n"); printf( "receive data\n");
//#endif #endif
n = receiveDataOnly(file_des,&fnum,sizeof(fnum)); n = receiveDataOnly(file_des,&fnum,sizeof(fnum));
fnum=swap_int32(fnum); fnum=swap_int32(fnum);
if (n <= 0) { if (n <= 0) {

View File

@ -14,7 +14,9 @@
#include <sys/mman.h> //PROT_READ,PROT_WRITE,MAP_FILE,MAP_SHARED,MAP_FAILED #include <sys/mman.h> //PROT_READ,PROT_WRITE,MAP_FILE,MAP_SHARED,MAP_FAILED
#include <fcntl.h> //O_RDWR #include <fcntl.h> //O_RDWR
u_int32_t CSP0BASE; u_int32_t CSP0BASE;
u_int32_t fifo_control_reg;
int nModBoard; int nModBoard;
@ -85,42 +87,193 @@ int mapCSP0(void) {
printf("CSPOBASE is 0x%x \n",CSP0BASE); printf("CSPOBASE is 0x%x \n",CSP0BASE);
printf("CSPOBASE=from %08x to %x\n",CSP0BASE,CSP0BASE+MEM_SIZE); printf("CSPOBASE=from %08x to %x\n",CSP0BASE,CSP0BASE+MEM_SIZE);
fifo_control_reg = 0;
return OK; return OK;
} }
//u_int32_t bus_w(u_int32_t offset, u_int32_t data) {
u_int32_t bus_w(u_int32_t offset, u_int8_t data) {
u_int32_t bus_w(u_int32_t offset, u_int32_t data) {
__asm__ volatile ("stw %0,0(%1); eieio"::"r" (data), "b"(CSP0BASE+4*offset)); __asm__ volatile ("stw %0,0(%1); eieio"::"r" (data), "b"(CSP0BASE+4*offset));
/* volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(CSP0BASE+offset);
*ptr1=data;
*ptr1=data;*/
return OK; return OK;
} }
u_int32_t bus_r(u_int32_t offset) {//plb_ll_fifo_base+4*REG,val u_int32_t bus_r(u_int32_t offset) {
u_int32_t ptr1; u_int32_t ptr1;
__asm__ volatile ("eieio; lwz %0,0(%1)":"=r" (ptr1):"b" __asm__ volatile ("eieio; lwz %0,0(%1)":"=r" (ptr1):"b"(CSP0BASE+4*offset));
(CSP0BASE+4*offset));
return ptr1; return ptr1;
/*
volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(CSP0BASE+offset);
return *ptr1;
*/
} }
int fifoReset(){
u_int32_t mask = FIFOCNTRL_RESET_MASK;
fifo_control_reg |= mask;
printf("CTRL Register bits: 0x%08x\n",fifo_control_reg);
bus_w(FIFO_CNTRL_REG,fifo_control_reg);
bus_w(FIFO_CNTRL_REG,fifo_control_reg);
bus_w(FIFO_CNTRL_REG,fifo_control_reg);
bus_w(FIFO_CNTRL_REG,fifo_control_reg);
fifo_control_reg &= (~mask);
bus_w(FIFO_CNTRL_REG,fifo_control_reg);
return OK;
}
int fifoTest(void){
int buffer_length = 256;
int rec_buffer_length = 4096;
char cmd[] = "help";
unsigned int buffer[buffer_length];
unsigned int rec_buffer[rec_buffer_length];
unsigned int send_len;
int rec_len;
char *char_ptr;
char_ptr = (char *)buffer;
//fill the buffer with numbers for(i=0; i < BUFF_LEN; i++){char_ptr[i]=i+1;}
//sending command
strcpy(char_ptr,cmd);
send_len = strlen(cmd);
fifoSend(char_ptr,send_len);
// printf("status : 0x%08x \n",PLB_LL_fifo_get_status_vector());
usleep(10000);
do{
rec_len = fifoReceive(rec_buffer,rec_buffer_length);
if (rec_len > 0){
// printf("receive buffer 0x%08x length: %i\n",rec_buffer,len);
char_ptr = (char*) &rec_buffer[0];
char_ptr[rec_len]=0;
printf(char_ptr);
}
} while(rec_len > 0);
return OK;
}
// note: buffer must be word (4 byte) aligned, frameLength in byte
int fifoSend(void *buffer, unsigned int frameLength){
int vacancy=0;
int i;
int words_send = 0;
int last_word;
unsigned int *word_ptr;
unsigned int val,mask;
u_int32_t status;
if (frameLength < 1)
return -1;
last_word = (frameLength-1)/4;
word_ptr = (unsigned int *)buffer;
while (words_send <= last_word){
//wait for Fifo to be empty again
while (!vacancy){
status = bus_r(FIFO_STATUS_REG);
if((status & FIFOSTATUS_ALMOST_FULL_BIT) == 0)
vacancy = 1;
}
for (i=0; ((i<FIFO_THRESHOLD_WORDS) && (words_send <= last_word)); i++){
val = 0;
//announce the start of file
if (words_send == 0)
val = FIFOCNTRL_SOF_BIT;
if (words_send == last_word)
val |= (FIFOCNTRL_EOF_BIT | (( (frameLength-1)<<FIFOCNTRL_REM_OFFSET) & FIFOCNTRL_REM_MASK) );
//control reg write mask
mask = FIFOCNTRL_MASK;
fifo_control_reg &= (~mask);
fifo_control_reg |= ( mask & val);
bus_w(FIFO_CNTRL_REG,fifo_control_reg);
bus_w(FIFO_FIFO_REG,word_ptr[words_send++]);
}
}
return frameLength;
}
int fifoReceive(void *buffer, unsigned int bufflen){
static unsigned int buffer_ptr = 0;
int len;
unsigned int *word_ptr;
unsigned int status;
volatile unsigned int fifo_val;
int sof = 0;
word_ptr = (unsigned int *)buffer;
do{
status = bus_r(FIFO_STATUS_REG);
if (!(status & FIFOSTATUS_EMPTY_BIT)){
if (status & FIFOSTATUS_SOF_BIT){
if (buffer_ptr){
buffer_ptr = 0;
return -1; // buffer overflow
}
// printf(">>>> SOF\n\r");
buffer_ptr = 0;
sof = 1;
}
fifo_val = bus_r(FIFO_FIFO_REG); //read from fifo
if ((buffer_ptr > 0) || sof){
if ( (bufflen >> 2) > buffer_ptr)
word_ptr[buffer_ptr++] = fifo_val; //write to buffer
else{
buffer_ptr = 0;
return -2; // buffer overflow
}
if (status & FIFOSTATUS_EOF_BIT){
len = (buffer_ptr << 2) -3 + ( (status & FIFOSTATUS_REM_MASK)>>FIFOSTATUS_REM_OFFSET );
// printf(">>>>status=0x%08x EOF len = %d \n\r\n\r",status, len);
buffer_ptr = 0;
return len;
}
}
}
}
while(!(status & FIFOSTATUS_EMPTY_BIT));
return OK;
}

View File

@ -17,11 +17,19 @@
//memory //memory
int mapCSP0(void); int mapCSP0(void);
u_int32_t bus_w(u_int32_t offset, u_int8_t data);
//u_int32_t bus_w(u_int32_t offset, u_int32_t data); u_int32_t bus_w(u_int32_t offset, u_int32_t data);
u_int32_t bus_r(u_int32_t offset); u_int32_t bus_r(u_int32_t offset);
int fifoReset();
int fifoTest(void);
int fifoSend(void *buffer, unsigned int frame_len);
int fifoReceive(void *buffer, unsigned int bufflen);
//Acquisition Parameters //Acquisition Parameters
int64_t set64BitReg(int64_t value, int aLSB, int aMSB); int64_t set64BitReg(int64_t value, int aLSB, int aMSB);
int64_t get64BitReg(int aLSB, int aMSB); int64_t get64BitReg(int aLSB, int aMSB);