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format slsdetectorservers .c

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This commit is contained in:
maliakal_d 2020-05-05 15:30:44 +02:00
parent 671cf45fd7
commit 7d94ad51ab
43 changed files with 20315 additions and 18726 deletions
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2
cmake/clang-format.cmake
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@ -1,7 +1,7 @@
# A CMake script to find all source files and setup clang-format targets for them
# Find all source files
set(ClangFormat_CXX_FILE_EXTENSIONS ${ClangFormat_CXX_FILE_EXTENSIONS} *.cpp *.h *.cxx *.hxx *.hpp *.cc *.ipp)
set(ClangFormat_CXX_FILE_EXTENSIONS ${ClangFormat_CXX_FILE_EXTENSIONS} *.cpp *.h *.cxx *.hxx *.hpp *.cc *.ipp *.c)
file(GLOB_RECURSE ALL_SOURCE_FILES ${ClangFormat_CXX_FILE_EXTENSIONS})
# Don't include some common build folders

14
slsDetectorServers/ctbDetectorServer/RegisterDefs.h
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@ -145,12 +145,14 @@
/* Exposure Time Left 64 bit RO register */
//#define EXPTIME_LEFT_LSB_REG (0x1A << MEM_MAP_SHIFT) // Not
//used in FW #define EXPTIME_LEFT_MSB_REG (0x1B << MEM_MAP_SHIFT)
// used in FW #define EXPTIME_LEFT_MSB_REG (0x1B <<
// MEM_MAP_SHIFT)
//// Not used in FW
/* Gates Left 64 bit RO register */
//#define GATES_LEFT_LSB_REG (0x1C << MEM_MAP_SHIFT) // Not
//used in FW #define GATES_LEFT_MSB_REG (0x1D << MEM_MAP_SHIFT)
// used in FW #define GATES_LEFT_MSB_REG (0x1D <<
// MEM_MAP_SHIFT)
//// Not used in FW
/* Data In 64 bit RO register TODO */
@ -163,7 +165,8 @@
/* Frames From Start 64 bit RO register TODO */
//#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT) // Not
//used in FW #define FRAMES_FROM_START_MSB_REG (0x23 << MEM_MAP_SHIFT)
// used in FW #define FRAMES_FROM_START_MSB_REG (0x23 <<
// MEM_MAP_SHIFT)
//// Not used in FW
/* Frames From Start PG 64 bit RO register. Reset using CONTROL_CRST. TODO */
@ -335,8 +338,9 @@
//#define CONTROL_STP_FF_TST_MSK (0x00000001 <<
// CONTROL_STP_FF_TST_OFST) #define CONTROL_STRT_RDT_OFST (4)
//#define CONTROL_STRT_RDT_MSK (0x00000001 <<
//CONTROL_STRT_RDT_OFST) #define CONTROL_STP_RDT_OFST (5) #define
//CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST)
// CONTROL_STRT_RDT_OFST) #define CONTROL_STP_RDT_OFST (5)
// #define CONTROL_STP_RDT_MSK (0x00000001 <<
// CONTROL_STP_RDT_OFST)
#define CONTROL_STRT_EXPSR_OFST (6)
#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST)
//#define CONTROL_STP_EXPSR_OFST (7)

637
slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c Executable file → Normal file
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File diff suppressed because it is too large Load Diff

33
slsDetectorServers/eigerDetectorServer/9mhvserial_bf.c Executable file → Normal file
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@ -1,14 +1,14 @@
#include "ansi.h"
#include <termios.h> /* POSIX terminal control definitions */
#include <errno.h>
#include <fcntl.h> // File control definitions
#include <linux/i2c-dev.h> // I2C_SLAVE, __u8 reg
#include <stdio.h>
#include <stdlib.h> // atoi
#include <fcntl.h> // File control definitions
#include <sys/ioctl.h> // ioctl
#include <unistd.h> // read, close
#include <string.h> // memset
#include <linux/i2c-dev.h> // I2C_SLAVE, __u8 reg
#include <errno.h>
#include <sys/ioctl.h> // ioctl
#include <termios.h> /* POSIX terminal control definitions */
#include <unistd.h> // read, close
#define PORTNAME "/dev/ttyBF1"
#define GOODBYE 200
@ -18,8 +18,6 @@
//#define I2C_DEVICE_ADDRESS 0x48
#define I2C_REGISTER_ADDRESS 0x40
int i2c_open(const char *file, unsigned int addr) {
// device file
@ -37,7 +35,6 @@ int i2c_open(const char* file,unsigned int addr){
return fd;
}
int i2c_read() {
int fd = i2c_open(I2C_DEVICE_FILE, I2C_DEVICE_ADDRESS);
@ -45,7 +42,8 @@ int i2c_read(){
unsigned char buf = reg;
if (write(fd, &buf, 1) != 1) {
LOG(logERROR, ("Warning: Unable to write read request to register %d\n", reg));
LOG(logERROR,
("Warning: Unable to write read request to register %d\n", reg));
return -1;
}
// read and update value (but old value read out)
@ -62,7 +60,6 @@ int i2c_read(){
return buf;
}
int i2c_write(unsigned int value) {
__u8 val = value & 0xff;
@ -76,7 +73,8 @@ int i2c_write(unsigned int value){
buf[0] = reg;
buf[1] = val;
if (write(fd, buf, 2) != 2) {
LOG(logERROR, ("Warning: Unable to write %d to register %d\n",val, reg));
LOG(logERROR,
("Warning: Unable to write %d to register %d\n", val, reg));
return -1;
}
@ -84,10 +82,6 @@ int i2c_write(unsigned int value){
return 0;
}
int main(int argc, char *argv[]) {
int fd = open(PORTNAME, O_RDWR | O_NOCTTY | O_SYNC);
@ -113,7 +107,8 @@ int main(int argc, char* argv[]) {
LOG(logERROR, ("Warning: error form tcflush %d\n", errno));
return 0;
}
// set new options for the port, TCSANOW:changes occur immediately without waiting for data to complete
// set new options for the port, TCSANOW:changes occur immediately without
// waiting for data to complete
if (tcsetattr(fd, TCSANOW, &serial_conf) < 0) {
LOG(logERROR, ("Warning: error form tcsetattr %d\n", errno));
return 0;
@ -132,7 +127,6 @@ int main(int argc, char* argv[]) {
buffer[BUFFERSIZE - 1] = '\n';
LOG(logINFO, ("Ready...\n"));
while (ret != GOODBYE) {
memset(buffer, 0, BUFFERSIZE);
n = read(fd, buffer, BUFFERSIZE);
@ -183,7 +177,8 @@ int main(int argc, char* argv[]) {
sprintf(buffer, "%d ", ival);
n = write(fd, buffer, BUFFERSIZE);
LOG(logINFO, ("Sent %d Bytes\n", n));
}else LOG(logERROR, ("%s\n",buffer));
} else
LOG(logERROR, ("%s\n", buffer));
break;
case 'e':

652
slsDetectorServers/eigerDetectorServer/Beb.c Executable file → Normal file
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File diff suppressed because it is too large Load Diff

1379
slsDetectorServers/eigerDetectorServer/FebControl.c Executable file → Normal file
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File diff suppressed because it is too large Load Diff

3
slsDetectorServers/eigerDetectorServer/FebControl.h
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@ -136,7 +136,8 @@ unsigned int Feb_Control_GetDynamicRange();
int Feb_Control_SetReadoutSpeed(
unsigned int readout_speed); // 0 was default, 0->full,1->half,2->quarter or
// 3->super_slow
int Feb_Control_SetReadoutMode(unsigned int readout_mode); /// 0 was
int Feb_Control_SetReadoutMode(
unsigned int readout_mode); /// 0 was
/// default,0->parallel,1->non-parallel,2->
/// safe_mode
int Feb_Control_SetTriggerMode(unsigned int trigger_mode,

141
slsDetectorServers/eigerDetectorServer/FebInterface.c Executable file → Normal file
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@ -1,12 +1,10 @@
#include "FebInterface.h"
#include "LocalLinkInterface.h"
#include "xparameters.h"
#include "clogger.h"
#include "xparameters.h"
#include <unistd.h>
struct LocalLinkInterface ll_local, *ll;
unsigned int Feb_Interface_nfebs;
@ -22,7 +20,6 @@ unsigned int Feb_Interface_recv_buffer_size;
unsigned int *Feb_Interface_recv_data_raw;
unsigned int *Feb_Interface_recv_data;
void Feb_Interface_FebInterface() {
ll = &ll_local;
Feb_Interface_nfebs = 0;
@ -30,46 +27,54 @@ void Feb_Interface_FebInterface() {
Feb_Interface_send_ndata = 0;
Feb_Interface_send_buffer_size = 1026;
Feb_Interface_send_data_raw = malloc((Feb_Interface_send_buffer_size+1) * sizeof(unsigned int));
Feb_Interface_send_data_raw =
malloc((Feb_Interface_send_buffer_size + 1) * sizeof(unsigned int));
Feb_Interface_send_data = &Feb_Interface_send_data_raw[1];
Feb_Interface_recv_ndata = 0;
Feb_Interface_recv_buffer_size = 1026;
Feb_Interface_recv_data_raw = malloc((Feb_Interface_recv_buffer_size+1) * sizeof(unsigned int));
Feb_Interface_recv_data_raw =
malloc((Feb_Interface_recv_buffer_size + 1) * sizeof(unsigned int));
Feb_Interface_recv_data = &Feb_Interface_recv_data_raw[1];
Local_LocalLinkInterface1(ll,XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT_BASEADDR);
Local_LocalLinkInterface1(
ll, XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT_BASEADDR);
}
void Feb_Interface_SendCompleteList(unsigned int n, unsigned int *list) {
unsigned int i;
if (Feb_Interface_feb_numb) free(Feb_Interface_feb_numb);
if (Feb_Interface_feb_numb)
free(Feb_Interface_feb_numb);
Feb_Interface_nfebs = n;
Feb_Interface_feb_numb = malloc(n * sizeof(unsigned int));
for(i=0;i<n;i++) Feb_Interface_feb_numb[i] = list[i];
for (i = 0; i < n; i++)
Feb_Interface_feb_numb[i] = list[i];
}
int Feb_Interface_WriteTo(unsigned int ch) {
if (ch>0xfff) return 0;
if (ch > 0xfff)
return 0;
LOG(logDEBUG1, ("FIW ch %d\n", ch));
Feb_Interface_send_data_raw[0] = 0x8fff0000;
if (Local_Write(ll,4,Feb_Interface_send_data_raw)!=4) return 0;
if (Local_Write(ll, 4, Feb_Interface_send_data_raw) != 4)
return 0;
Feb_Interface_send_data_raw[0] = 0x90000000 | (ch << 16);
if (Local_Write(ll,4,Feb_Interface_send_data_raw)!=4) return 0;
if (Local_Write(ll, 4, Feb_Interface_send_data_raw) != 4)
return 0;
Feb_Interface_send_data_raw[0] = 0xc0000000;
return ((Feb_Interface_send_ndata+1)*4==Local_Write(ll,(Feb_Interface_send_ndata+1)*4,Feb_Interface_send_data_raw));
return ((Feb_Interface_send_ndata + 1) * 4 ==
Local_Write(ll, (Feb_Interface_send_ndata + 1) * 4,
Feb_Interface_send_data_raw));
}
int Feb_Interface_ReadFrom(unsigned int ch, unsigned int ntrys) {
unsigned int t;
if (ch>=0xfff) return 0;
if (ch >= 0xfff)
return 0;
Feb_Interface_recv_data_raw[0] = 0xa0000000 | (ch << 16);
Local_Write(ll, 4, Feb_Interface_recv_data_raw);
@ -77,7 +82,10 @@ int Feb_Interface_ReadFrom(unsigned int ch, unsigned int ntrys) {
Feb_Interface_recv_ndata = -1;
for (t = 0; t < ntrys; t++) {
if ((Feb_Interface_recv_ndata=Local_Read(ll,Feb_Interface_recv_buffer_size*4,Feb_Interface_recv_data_raw)/4)>0) {
if ((Feb_Interface_recv_ndata =
Local_Read(ll, Feb_Interface_recv_buffer_size * 4,
Feb_Interface_recv_data_raw) /
4) > 0) {
Feb_Interface_recv_ndata--;
break;
}
@ -87,80 +95,110 @@ int Feb_Interface_ReadFrom(unsigned int ch, unsigned int ntrys) {
return (Feb_Interface_recv_ndata >= 0);
}
int Feb_Interface_SetByteOrder() {
Feb_Interface_send_data_raw[0] = 0x8fff0000;
if (Local_Write(ll,4,Feb_Interface_send_data_raw)!=4) return 0;
if (Local_Write(ll, 4, Feb_Interface_send_data_raw) != 4)
return 0;
Feb_Interface_send_ndata = 2;
Feb_Interface_send_data[0] = 0;
Feb_Interface_send_data[1] = 0;
unsigned int i;
unsigned int dst = 0xff;
for(i=0;i<Feb_Interface_nfebs;i++) dst = (dst | Feb_Interface_feb_numb[i]);
for (i = 0; i < Feb_Interface_nfebs; i++)
dst = (dst | Feb_Interface_feb_numb[i]);
int passed = Feb_Interface_WriteTo(dst);
return passed;
}
int Feb_Interface_ReadRegister(unsigned int sub_num, unsigned int reg_num,unsigned int* value_read) {
int Feb_Interface_ReadRegister(unsigned int sub_num, unsigned int reg_num,
unsigned int *value_read) {
return Feb_Interface_ReadRegisters(sub_num, 1, &reg_num, value_read);
}
int Feb_Interface_ReadRegisters(unsigned int sub_num, unsigned int nreads, unsigned int* reg_nums,unsigned int* values_read) {
int Feb_Interface_ReadRegisters(unsigned int sub_num, unsigned int nreads,
unsigned int *reg_nums,
unsigned int *values_read) {
// here cout<<"Reading Register ...."<<endl;
unsigned int i;
nreads &= 0x3ff;
if (!nreads||nreads>Feb_Interface_send_buffer_size-2) return 0;
if (!nreads || nreads > Feb_Interface_send_buffer_size - 2)
return 0;
Feb_Interface_send_ndata = nreads + 2;
Feb_Interface_send_data[0] = 0x20000000 | nreads << 14;
for(i=0;i<nreads;i++) Feb_Interface_send_data[i+1]=reg_nums[i];
for (i = 0; i < nreads; i++)
Feb_Interface_send_data[i + 1] = reg_nums[i];
Feb_Interface_send_data[nreads + 1] = 0;
if (!Feb_Interface_WriteTo(sub_num)||!Feb_Interface_ReadFrom(sub_num,20)||Feb_Interface_recv_ndata!=(int)(nreads+2)) return 0;
if (!Feb_Interface_WriteTo(sub_num) ||
!Feb_Interface_ReadFrom(sub_num, 20) ||
Feb_Interface_recv_ndata != (int)(nreads + 2))
return 0;
for(i=0;i<nreads;i++) values_read[i] = Feb_Interface_recv_data[i+1];
for (i = 0; i < nreads; i++)
values_read[i] = Feb_Interface_recv_data[i + 1];
return 1;
}
int Feb_Interface_WriteRegister(unsigned int sub_num, unsigned int reg_num,unsigned int value, int wait_on, unsigned int wait_on_address) {
return Feb_Interface_WriteRegisters(sub_num,1,&reg_num,&value,&wait_on,&wait_on_address);
int Feb_Interface_WriteRegister(unsigned int sub_num, unsigned int reg_num,
unsigned int value, int wait_on,
unsigned int wait_on_address) {
return Feb_Interface_WriteRegisters(sub_num, 1, &reg_num, &value, &wait_on,
&wait_on_address);
}
int Feb_Interface_WriteRegisters(unsigned int sub_num, unsigned int nwrites, unsigned int* reg_nums, unsigned int* values, int* wait_ons, unsigned int* wait_on_addresses) {
int Feb_Interface_WriteRegisters(unsigned int sub_num, unsigned int nwrites,
unsigned int *reg_nums, unsigned int *values,
int *wait_ons,
unsigned int *wait_on_addresses) {
unsigned int i;
nwrites &= 0x3ff; // 10 bits
if (!nwrites||2*nwrites>Feb_Interface_send_buffer_size-2) return 0;
if (!nwrites || 2 * nwrites > Feb_Interface_send_buffer_size - 2)
return 0;
//cout<<"Write register : "<<this<<" "<<s_num<<" "<<nwrites<<" "<<reg_nums<<" "<<values<<" "<<wait_ons<<" "<<wait_on_addresses<<endl;
// cout<<"Write register : "<<this<<" "<<s_num<<" "<<nwrites<<"
// "<<reg_nums<<" "<<values<<" "<<wait_ons<<" "<<wait_on_addresses<<endl;
Feb_Interface_send_ndata = 2 * nwrites + 2;
Feb_Interface_send_data[0] = 0x80000000 | nwrites << 14;
Feb_Interface_send_data[2 * nwrites + 1] = 0;
for(i=0;i<nwrites;i++) Feb_Interface_send_data[2*i+1] = 0x3fff&reg_nums[i];
for(i=0;i<nwrites;i++) Feb_Interface_send_data[2*i+2] = values[i];
for (i = 0; i < nwrites; i++)
Feb_Interface_send_data[2 * i + 1] = 0x3fff & reg_nums[i];
for (i = 0; i < nwrites; i++)
Feb_Interface_send_data[2 * i + 2] = values[i];
// wait on busy data(28), address of busy flag data(27 downto 14)
if (wait_ons&&wait_on_addresses) for(i=0;i<nwrites;i++) Feb_Interface_send_data[2*i+1] |= (wait_ons[i]<<28 | (0x3fff&wait_on_addresses[i])<<14);
if (wait_ons && wait_on_addresses)
for (i = 0; i < nwrites; i++)
Feb_Interface_send_data[2 * i + 1] |=
(wait_ons[i] << 28 | (0x3fff & wait_on_addresses[i]) << 14);
if (!Feb_Interface_WriteTo(sub_num)) return 0;
if (!Feb_Interface_WriteTo(sub_num))
return 0;
return 1;
}
int Feb_Interface_WriteMemoryInLoops(unsigned int sub_num, unsigned int mem_num, unsigned int start_address, unsigned int nwrites, unsigned int *values) {
int Feb_Interface_WriteMemoryInLoops(unsigned int sub_num, unsigned int mem_num,
unsigned int start_address,
unsigned int nwrites,
unsigned int *values) {
unsigned int max_single_packet_size = 352;
int passed = 1;
unsigned int n_to_send = max_single_packet_size;
unsigned int ndata_sent = 0;
unsigned int ndata_countdown = nwrites;
while (ndata_countdown > 0) {
n_to_send = ndata_countdown<max_single_packet_size ? ndata_countdown:max_single_packet_size;
if (!Feb_Interface_WriteMemory(sub_num,mem_num,start_address,n_to_send,&(values[ndata_sent]))) {passed=0; break;}
n_to_send = ndata_countdown < max_single_packet_size
? ndata_countdown
: max_single_packet_size;
if (!Feb_Interface_WriteMemory(sub_num, mem_num, start_address,
n_to_send, &(values[ndata_sent]))) {
passed = 0;
break;
}
ndata_countdown -= n_to_send;
ndata_sent += n_to_send;
start_address += n_to_send;
@ -169,7 +207,9 @@ int Feb_Interface_WriteMemoryInLoops(unsigned int sub_num, unsigned int mem_num,
return passed;
}
int Feb_Interface_WriteMemory(unsigned int sub_num, unsigned int mem_num, unsigned int start_address, unsigned int nwrites, unsigned int *values) {
int Feb_Interface_WriteMemory(unsigned int sub_num, unsigned int mem_num,
unsigned int start_address, unsigned int nwrites,
unsigned int *values) {
// -1 means write to all
unsigned int i;
mem_num &= 0x3f;
@ -181,15 +221,16 @@ int Feb_Interface_WriteMemory(unsigned int sub_num, unsigned int mem_num, unsign
} //*d-1026
Feb_Interface_send_ndata = nwrites + 2; //*d-1026
Feb_Interface_send_data[0] = 0xc0000000 | mem_num << 24 | nwrites << 14 | start_address; //cmd -> write to memory, nwrites, mem number, start address
Feb_Interface_send_data[0] =
0xc0000000 | mem_num << 24 | nwrites << 14 |
start_address; // cmd -> write to memory, nwrites, mem number, start
// address
Feb_Interface_send_data[nwrites + 1] = 0;
for(i=0;i<nwrites;i++) Feb_Interface_send_data[i+1] = values[i];
for (i = 0; i < nwrites; i++)
Feb_Interface_send_data[i + 1] = values[i];
if (!Feb_Interface_WriteTo(sub_num)) return 0;
if (!Feb_Interface_WriteTo(sub_num))
return 0;
return 1;
}

30
slsDetectorServers/eigerDetectorServer/HardwareIO.c Executable file → Normal file
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@ -1,49 +1,42 @@
#include "HardwareIO.h"
xfs_u8 HWIO_xfs_in8(xfs_u32 InAddress)
{
xfs_u8 HWIO_xfs_in8(xfs_u32 InAddress) {
/* read the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on
*/
xfs_u8 IoContents;
__asm__ volatile ("eieio; lbz %0,0(%1)":"=r" (IoContents):"b"
(InAddress));
__asm__ volatile("eieio; lbz %0,0(%1)" : "=r"(IoContents) : "b"(InAddress));
return IoContents;
}
/*****************************************************************************/
xfs_u16 HWIO_xfs_in16(xfs_u32 InAddress)
{
xfs_u16 HWIO_xfs_in16(xfs_u32 InAddress) {
/* read the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on
*/
xfs_u16 IoContents;
__asm__ volatile ("eieio; lhz %0,0(%1)":"=r" (IoContents):"b"
(InAddress));
__asm__ volatile("eieio; lhz %0,0(%1)" : "=r"(IoContents) : "b"(InAddress));
return IoContents;
}
/*****************************************************************************/
xfs_u32 HWIO_xfs_in32(xfs_u32 InAddress)
{
xfs_u32 HWIO_xfs_in32(xfs_u32 InAddress) {
/* read the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on
*/
xfs_u32 IoContents;
__asm__ volatile ("eieio; lwz %0,0(%1)":"=r" (IoContents):"b"
(InAddress));
__asm__ volatile("eieio; lwz %0,0(%1)" : "=r"(IoContents) : "b"(InAddress));
return IoContents;
}
/*****************************************************************************/
void HWIO_xfs_out8(xfs_u32 OutAddress, xfs_u8 Value)
{
void HWIO_xfs_out8(xfs_u32 OutAddress, xfs_u8 Value) {
/* write the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on
*/
@ -52,8 +45,7 @@ void HWIO_xfs_out8(xfs_u32 OutAddress, xfs_u8 Value)
}
/*****************************************************************************/
void HWIO_xfs_out16(xfs_u32 OutAddress, xfs_u16 Value)
{
void HWIO_xfs_out16(xfs_u32 OutAddress, xfs_u16 Value) {
/* write the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on
*/
@ -63,14 +55,10 @@ void HWIO_xfs_out16(xfs_u32 OutAddress, xfs_u16 Value)
/*****************************************************************************/
void HWIO_xfs_out32(xfs_u32 OutAddress, xfs_u32 Value)
{
void HWIO_xfs_out32(xfs_u32 OutAddress, xfs_u32 Value) {
/* write the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on
*/
__asm__ volatile("stw %0,0(%1); eieio" ::"r"(Value), "b"(OutAddress));
}

132
slsDetectorServers/eigerDetectorServer/LocalLinkInterface.c Executable file → Normal file
View File

@ -2,28 +2,28 @@
#include "HardwareMMappingDefs.h"
#include "clogger.h"
#include <unistd.h>
#include <sys/mman.h>
#include <fcntl.h>
#include <sys/mman.h>
#include <unistd.h>
void Local_LocalLinkInterface1(struct LocalLinkInterface* ll,unsigned int ll_fifo_badr) {
void Local_LocalLinkInterface1(struct LocalLinkInterface *ll,
unsigned int ll_fifo_badr) {
LOG(logDEBUG1, ("Initialize PLB LL FIFOs\n"));
ll->ll_fifo_base = 0;
ll->ll_fifo_ctrl_reg = 0;
if (Local_Init(ll, ll_fifo_badr)) {
Local_Reset(ll);
LOG(logDEBUG1, ("\tFIFO Status : 0x%08x\n\n\n", Local_StatusVector(ll)));
} else LOG(logERROR, ("\tCould not map LocalLink : 0x%08x\n\n\n", ll_fifo_badr));
LOG(logDEBUG1,
("\tFIFO Status : 0x%08x\n\n\n", Local_StatusVector(ll)));
} else
LOG(logERROR,
("\tCould not map LocalLink : 0x%08x\n\n\n", ll_fifo_badr));
}
void Local_LocalLinkInterface(struct LocalLinkInterface *ll) {
LOG(logDEBUG1, ("Initializing new memory\n"));
}
int Local_Init(struct LocalLinkInterface *ll, unsigned int ll_fifo_badr) {
int fd;
void *plb_ll_fifo_ptr;
@ -33,7 +33,8 @@ int Local_Init(struct LocalLinkInterface* ll,unsigned int ll_fifo_badr) {
return 0;
}
plb_ll_fifo_ptr = mmap(0, getpagesize(), PROT_READ | PROT_WRITE, MAP_FILE | MAP_SHARED, fd, ll_fifo_badr);
plb_ll_fifo_ptr = mmap(0, getpagesize(), PROT_READ | PROT_WRITE,
MAP_FILE | MAP_SHARED, fd, ll_fifo_badr);
close(fd);
if (plb_ll_fifo_ptr == MAP_FAILED) {
@ -47,8 +48,6 @@ int Local_Init(struct LocalLinkInterface* ll,unsigned int ll_fifo_badr) {
return 1;
}
int Local_Reset(struct LocalLinkInterface *ll) {
return Local_Reset1(ll, PLB_LL_FIFO_CTRL_RESET_STD);
}
@ -57,24 +56,28 @@ int Local_Reset1(struct LocalLinkInterface* ll,unsigned int rst_mask) {
ll->ll_fifo_ctrl_reg |= rst_mask;
LOG(logDEBUG1, ("\tCTRL Register bits: 0x%08x\n", ll->ll_fifo_ctrl_reg));
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL,
ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL,
ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL,
ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL,
ll->ll_fifo_ctrl_reg);
ll->ll_fifo_ctrl_reg &= (~rst_mask);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL,
ll->ll_fifo_ctrl_reg);
return 1;
}
unsigned int Local_StatusVector(struct LocalLinkInterface *ll) {
return HWIO_xfs_in32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_STATUS);
}
int Local_Write(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer) {
int Local_Write(struct LocalLinkInterface *ll, unsigned int buffer_len,
void *buffer) {
// note: buffer must be word (4 byte) aligned
// frame_len in byte
int vacancy = 0;
@ -85,48 +88,55 @@ int Local_Write(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buf
unsigned int fifo_ctrl;
xfs_u32 status;
if (buffer_len < 1) return -1;
if (buffer_len < 1)
return -1;
last_word = (buffer_len - 1) / 4;
word_ptr = (unsigned int *)buffer;
LOG(logDEBUG1, ("LL Write - Len: %2d - If: %X - Data: ",buffer_len, ll->ll_fifo_base));
LOG(logDEBUG1, ("LL Write - Len: %2d - If: %X - Data: ", buffer_len,
ll->ll_fifo_base));
for (i = 0; i < buffer_len / 4; i++)
LOG(logDEBUG1, ("%.8X ", *(((unsigned *)buffer) + i)));
while (words_send <= last_word)
{
while (words_send <= last_word) {
while (!vacancy) // wait for Fifo to be empty again
{
status = HWIO_xfs_in32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_STATUS);
if ((status & PLB_LL_FIFO_STATUS_ALMOSTFULL) == 0) vacancy = 1;
status =
HWIO_xfs_in32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_STATUS);
if ((status & PLB_LL_FIFO_STATUS_ALMOSTFULL) == 0)
vacancy = 1;
if (vacancy == 0) {
LOG(logERROR, ("Fifo full!\n"));
}
}
// Just to know: #define PLB_LL_FIFO_ALMOST_FULL_THRESHOLD_WORDS 100
for (i=0; ((i<PLB_LL_FIFO_ALMOST_FULL_THRESHOLD_WORDS) && (words_send <= last_word)); i++)
{
for (i = 0; ((i < PLB_LL_FIFO_ALMOST_FULL_THRESHOLD_WORDS) &&
(words_send <= last_word));
i++) {
fifo_ctrl = 0;
if (words_send == 0)
{
fifo_ctrl = PLB_LL_FIFO_CTRL_LL_SOF;//announce the start of file
if (words_send == 0) {
fifo_ctrl =
PLB_LL_FIFO_CTRL_LL_SOF; // announce the start of file
}
if (words_send == last_word)
{
fifo_ctrl |= (PLB_LL_FIFO_CTRL_LL_EOF | (( (buffer_len-1)<<PLB_LL_FIFO_CTRL_LL_REM_SHIFT) & PLB_LL_FIFO_CTRL_LL_REM) );
if (words_send == last_word) {
fifo_ctrl |=
(PLB_LL_FIFO_CTRL_LL_EOF |
(((buffer_len - 1) << PLB_LL_FIFO_CTRL_LL_REM_SHIFT) &
PLB_LL_FIFO_CTRL_LL_REM));
}
Local_ctrl_reg_write_mask(ll, PLB_LL_FIFO_CTRL_LL_MASK, fifo_ctrl);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_FIFO,word_ptr[words_send++]);
HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_FIFO,
word_ptr[words_send++]);
}
}
return buffer_len;
}
int Local_Read(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer) {
int Local_Read(struct LocalLinkInterface *ll, unsigned int buffer_len,
void *buffer) {
static unsigned int buffer_ptr = 0;
// note: buffer must be word (4 byte) aligned
// frame_len in byte
@ -139,16 +149,12 @@ int Local_Read(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buff
LOG(logDEBUG1, ("LL Read - If: %X - Data: ", ll->ll_fifo_base));
word_ptr = (unsigned int *)buffer;
do
{
do {
status = HWIO_xfs_in32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_STATUS);
if (!(status & PLB_LL_FIFO_STATUS_EMPTY))
{
if (status & PLB_LL_FIFO_STATUS_LL_SOF)
{
if (buffer_ptr)
{
if (!(status & PLB_LL_FIFO_STATUS_EMPTY)) {
if (status & PLB_LL_FIFO_STATUS_LL_SOF) {
if (buffer_ptr) {
buffer_ptr = 0;
return -1; // buffer overflow
}
@ -156,52 +162,49 @@ int Local_Read(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buff
sof = 1;
}
fifo_val = HWIO_xfs_in32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_FIFO); //read from fifo
fifo_val = HWIO_xfs_in32(
ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_FIFO); // read from fifo
if ((buffer_ptr > 0) || sof)
{
if ( (buffer_len >> 2) > buffer_ptr)
{
if ((buffer_ptr > 0) || sof) {
if ((buffer_len >> 2) > buffer_ptr) {
LOG(logDEBUG1, ("%.8X ", fifo_val));
word_ptr[buffer_ptr++] = fifo_val; // write to buffer
}
else
{
} else {
buffer_ptr = 0;
return -2; // buffer overflow
}
if (status & PLB_LL_FIFO_STATUS_LL_EOF)
{
len = (buffer_ptr << 2) -3 + ( (status & PLB_LL_FIFO_STATUS_LL_REM)>>PLB_LL_FIFO_STATUS_LL_REM_SHIFT );
if (status & PLB_LL_FIFO_STATUS_LL_EOF) {
len = (buffer_ptr << 2) - 3 +
((status & PLB_LL_FIFO_STATUS_LL_REM) >>
PLB_LL_FIFO_STATUS_LL_REM_SHIFT);
LOG(logDEBUG1, ("Len: %d\n", len));
buffer_ptr = 0;
return len;
}
}
}
}
while(!(status & PLB_LL_FIFO_STATUS_EMPTY));
} while (!(status & PLB_LL_FIFO_STATUS_EMPTY));
return 0;
}
int Local_ctrl_reg_write_mask(struct LocalLinkInterface* ll,unsigned int mask, unsigned int val) {
int Local_ctrl_reg_write_mask(struct LocalLinkInterface *ll, unsigned int mask,
unsigned int val) {
ll->ll_fifo_ctrl_reg &= (~mask);
ll->ll_fifo_ctrl_reg |= (mask & val);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL,
ll->ll_fifo_ctrl_reg);
return 1;
}
int Local_Test(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer) {
int Local_Test(struct LocalLinkInterface *ll, unsigned int buffer_len,
void *buffer) {
int len;
unsigned int rec_buff_len = 4096;
unsigned int rec_buffer[4097];
Local_Write(ll, buffer_len, buffer);
usleep(10000);
@ -217,4 +220,3 @@ int Local_Test(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buff
return 1;
}

495
slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c Executable file → Normal file
View File

File diff suppressed because it is too large Load Diff

522
slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c
View File

File diff suppressed because it is too large Load Diff

383
slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c Executable file → Normal file
View File

@ -1,7 +1,7 @@
#include "slsDetectorFunctionList.h"
#include "versionAPI.h"
#include "clogger.h"
#include "RegisterDefs.h"
#include "clogger.h"
#include "versionAPI.h"
#include "LTC2620.h" // dacs
#ifdef VIRTUAL
@ -10,8 +10,8 @@
#endif
#include "string.h"
#include <unistd.h> // usleep
#include <netinet/in.h>
#include <unistd.h> // usleep
#ifdef VIRTUAL
#include <pthread.h>
#include <time.h>
@ -61,9 +61,7 @@ int slaveadcphase = 0;
int rsttosw1delay = 2;
int startacqdelay = 1;
int isInitCheckDone() {
return initCheckDone;
}
int isInitCheckDone() { return initCheckDone; }
int getInitResult(char **mess) {
*mess = initErrorMessage;
@ -93,9 +91,10 @@ void basictests() {
}
// does check only if flag is 0 (by default), set by command line
if (((checkType() == FAIL) || (testFpga() == FAIL) || (testBus() == FAIL))) {
strcpy(initErrorMessage,
"Could not pass basic tests of FPGA and bus. Dangerous to continue.\n");
if (((checkType() == FAIL) || (testFpga() == FAIL) ||
(testBus() == FAIL))) {
strcpy(initErrorMessage, "Could not pass basic tests of FPGA and bus. "
"Dangerous to continue.\n");
LOG(logERROR, ("%s\n\n", initErrorMessage));
initError = FAIL;
return;
@ -108,7 +107,8 @@ void basictests() {
int64_t swversion = getServerVersion();
int64_t client_sw_apiversion = getClientServerAPIVersion();
LOG(logINFOBLUE, ("************ Gotthard Server *********************\n"
LOG(logINFOBLUE,
("************ Gotthard Server *********************\n"
"Board Revision : 0x%x\n"
"Detector IP Addr : 0x%x\n"
@ -120,13 +120,10 @@ void basictests() {
"********************************************************\n",
boardrev,
ipadd,
(long long unsigned int)macadd,
ipadd, (long long unsigned int)macadd,
(long long int)fwversion,
(long long int)swversion,
(long long int)client_sw_apiversion
));
(long long int)fwversion, (long long int)swversion,
(long long int)client_sw_apiversion));
LOG(logINFO, ("Basic Tests - success\n"));
#endif
@ -136,9 +133,11 @@ int checkType() {
#ifdef VIRTUAL
return OK;
#endif
u_int32_t type = ((bus_r(BOARD_REVISION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST);
u_int32_t type =
((bus_r(BOARD_REVISION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST);
if (type == DETECTOR_TYPE_MOENCH_VAL) {
LOG(logERROR, ("This is not a Gotthard firmware (read %d, expected ?)\n", type));
LOG(logERROR,
("This is not a Gotthard firmware (read %d, expected ?)\n", type));
return FAIL;
}
return OK;
@ -156,7 +155,9 @@ int testFpga() {
if (val == FIX_PATT_VAL) {
LOG(logINFO, ("Fixed pattern: successful match (0x%08x)\n", val));
} else {
LOG(logERROR, ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL));
LOG(logERROR,
("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n",
val, FIX_PATT_VAL));
ret = FAIL;
}
@ -207,7 +208,8 @@ int testFpga() {
}
bus_w(addr, 0);
if (ret == OK) {
LOG(logINFO, ("Successfully tested FPGA Dummy Register %d times\n", times));
LOG(logINFO,
("Successfully tested FPGA Dummy Register %d times\n", times));
}
}
@ -231,8 +233,8 @@ int testBus() {
bus_w(addr, val);
readval = bus_r(addr);
if (readval != val) {
LOG(logERROR, ("Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n",
i, val, readval));
LOG(logERROR, ("Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", i,
val, readval));
ret = FAIL;
}
}
@ -245,7 +247,6 @@ int testBus() {
return ret;
}
void setTestImageMode(int ival) {
uint32_t addr = MULTI_PURPOSE_REG;
if (ival >= 0) {
@ -265,13 +266,9 @@ int getTestImageMode() {
/* Ids */
uint64_t getServerVersion() {
return APIGOTTHARD;
}
uint64_t getServerVersion() { return APIGOTTHARD; }
uint64_t getClientServerAPIVersion() {
return APIGOTTHARD;
}
uint64_t getClientServerAPIVersion() { return APIGOTTHARD; }
u_int64_t getFirmwareVersion() {
#ifdef VIRTUAL
@ -293,7 +290,8 @@ u_int64_t getDetectorMAC() {
#else
char output[255], mac[255] = "";
u_int64_t res = 0;
FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r");
FILE *sysFile =
popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r");
fgets(output, sizeof(output), sysFile);
pclose(sysFile);
// getting rid of ":"
@ -316,7 +314,9 @@ u_int32_t getDetectorIP(){
u_int32_t res = 0;
// execute and get address
char output[255];
FILE* sysFile = popen("ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", "r");
FILE *sysFile = popen(
"ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2",
"r");
fgets(output, sizeof(output), sysFile);
pclose(sysFile);
@ -338,10 +338,10 @@ u_int32_t getBoardRevision() {
#ifdef VIRTUAL
return 0;
#endif
return ((bus_r(BOARD_REVISION_REG) & BOARD_REVISION_MSK) >> BOARD_REVISION_OFST);
return ((bus_r(BOARD_REVISION_REG) & BOARD_REVISION_MSK) >>
BOARD_REVISION_OFST);
}
/* initialization */
void initControlServer() {
@ -353,7 +353,8 @@ void initControlServer(){
void initStopServer() {
if (mapCSP0() == FAIL) {
LOG(logERROR, ("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n"));
LOG(logERROR,
("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n"));
exit(EXIT_FAILURE);
}
#ifdef VIRTUAL
@ -364,7 +365,6 @@ void initStopServer() {
#endif
}
/* set up detector */
void setupDetector() {
@ -385,17 +385,24 @@ void setupDetector() {
// adc
if (getBoardRevision() == 1) {
AD9252_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_OFST);
AD9252_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK,
ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK,
ADC_SPI_SRL_DT_OTPT_OFST);
AD9252_Disable();
AD9252_Configure();
} else {
AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_OFST);
AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK,
ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK,
ADC_SPI_SRL_DT_OTPT_OFST);
AD9257_Disable();
AD9257_Configure();
}
// dac
LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK, SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_OFST, NDAC, DAC_MIN_MV, DAC_MAX_MV);
LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK,
SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK,
SPI_DAC_SRL_DGTL_OTPT_OFST, NDAC, DAC_MIN_MV,
DAC_MAX_MV);
LTC2620_Disable();
LTC2620_Configure();
setDefaultDacs();
@ -424,7 +431,6 @@ void setupDetector() {
setExpTime(DEFAULT_EXPTIME);
setPeriod(DEFAULT_PERIOD);
setDelayAfterTrigger(DEFAULT_DELAY);
}
int setDefaultDacs() {
@ -449,7 +455,6 @@ uint32_t writeRegister16And32(uint32_t offset, uint32_t data) {
return writeRegister16(offset, data);
} else
return writeRegister(offset, data);
}
uint32_t readRegister16And32(uint32_t offset) {
@ -470,11 +475,14 @@ void setPhaseShiftOnce() {
// first time detector has switched on
if (!val) {
detectorFirstServer = 1;
LOG(logINFO, ("Implementing the first phase shift of %d\n", phaseShift));
LOG(logINFO,
("Implementing the first phase shift of %d\n", phaseShift));
int times = 0;
for (times = 1; times < phaseShift; ++times) {
bus_w(addr,(INT_RSTN_MSK | ENT_RSTN_MSK | SW1_MSK | PHS_STP_MSK)); //0x1821
bus_w(addr,(INT_RSTN_MSK | ENT_RSTN_MSK | (SW1_MSK &~ PHS_STP_MSK))); //0x1820
bus_w(addr, (INT_RSTN_MSK | ENT_RSTN_MSK | SW1_MSK |
PHS_STP_MSK)); // 0x1821
bus_w(addr, (INT_RSTN_MSK | ENT_RSTN_MSK |
(SW1_MSK & ~PHS_STP_MSK))); // 0x1820
}
LOG(logDEBUG1, ("Multipurpose reg: 0x%x\n", val));
} else
@ -506,8 +514,9 @@ void setADCSyncRegister() {
u_int32_t addr = ADC_SYNC_REG;
// 0x88(no roi), 0x1b(roi) (MSB)
u_int32_t tokenDelay = ((adcConfigured == -1) ?
ADC_SYNC_ENET_DELAY_NO_ROI_VAL : ADC_SYNC_ENET_DELAY_ROI_VAL);
u_int32_t tokenDelay =
((adcConfigured == -1) ? ADC_SYNC_ENET_DELAY_NO_ROI_VAL
: ADC_SYNC_ENET_DELAY_ROI_VAL);
// 0x88032214(no roi), 0x1b032214(with roi)
u_int32_t val = (ADC_SYNC_TKN_VAL | tokenDelay);
@ -521,12 +530,13 @@ void setDAQRegister() {
u_int32_t addr = DAQ_REG;
// 0x1f16(board rev 1) 0x1f0f(board rev 2)
u_int32_t tokenTiming = ((getBoardRevision() == 1) ?
DAQ_TKN_TMNG_BRD_RVSN_1_VAL : DAQ_TKN_TMNG_BRD_RVSN_2_VAL);
u_int32_t tokenTiming =
((getBoardRevision() == 1) ? DAQ_TKN_TMNG_BRD_RVSN_1_VAL
: DAQ_TKN_TMNG_BRD_RVSN_2_VAL);
// 0x13f(no roi), 0x7f(roi)
u_int32_t packetLength = ((adcConfigured == -1) ?
DAQ_PCKT_LNGTH_NO_ROI_VAL : DAQ_PCKT_LNGTH_ROI_VAL);
u_int32_t packetLength = ((adcConfigured == -1) ? DAQ_PCKT_LNGTH_NO_ROI_VAL
: DAQ_PCKT_LNGTH_ROI_VAL);
// MSB: packetLength LSB: tokenTiming
u_int32_t val = (tokenTiming | packetLength);
@ -540,13 +550,16 @@ void setChipOfInterestRegister(int adc) {
u_int32_t addr = CHIP_OF_INTRST_REG;
// 0x1f(no roi), 0xXX(roi)
u_int32_t adcSelect = ((adcConfigured == -1) ?
CHIP_OF_INTRST_ADC_SEL_MSK :
(((1 << adc) << CHIP_OF_INTRST_ADC_SEL_OFST) & CHIP_OF_INTRST_ADC_SEL_MSK));
u_int32_t adcSelect =
((adcConfigured == -1) ? CHIP_OF_INTRST_ADC_SEL_MSK
: (((1 << adc) << CHIP_OF_INTRST_ADC_SEL_OFST) &
CHIP_OF_INTRST_ADC_SEL_MSK));
// 0x0500(no roi), 0x0100(roi)
u_int32_t numChannels = (adcConfigured == -1) ? (NCHIP * NCHAN) : (NCHIPS_PER_ADC * NCHAN);
numChannels = ((numChannels << CHIP_OF_INTRST_NUM_CHNNLS_OFST) & CHIP_OF_INTRST_NUM_CHNNLS_MSK);
u_int32_t numChannels =
(adcConfigured == -1) ? (NCHIP * NCHAN) : (NCHIPS_PER_ADC * NCHAN);
numChannels = ((numChannels << CHIP_OF_INTRST_NUM_CHNNLS_OFST) &
CHIP_OF_INTRST_NUM_CHNNLS_MSK);
// 0x500001f(no roi), 0x10000xx(roi) MSB:num channels, LSB: selected ADC
u_int32_t val = (numChannels | adcSelect);
@ -564,8 +577,10 @@ void setROIADC(int adc) {
cleanFifos(); // clean fifos
setChipOfInterestRegister(adc); // num channels & select adc
ipPacketSize = ((adcConfigured == -1) ? IP_PACKET_SIZE_NO_ROI : IP_PACKET_SIZE_ROI);
udpPacketSize = ((adcConfigured == -1) ? UDP_PACKETSIZE_NO_ROI : UDP_PACKETSIZE_ROI);
ipPacketSize =
((adcConfigured == -1) ? IP_PACKET_SIZE_NO_ROI : IP_PACKET_SIZE_ROI);
udpPacketSize =
((adcConfigured == -1) ? UDP_PACKETSIZE_NO_ROI : UDP_PACKETSIZE_ROI);
}
void setGbitReadout() {
@ -615,14 +630,17 @@ int readConfigFile() {
masterflags = NO_MASTER;
LOG(logINFOBLUE, ("\tNo Master\n"));
} else {
LOG(logERROR, ("\tCould not scan masterflags %s value from config file\n", value));
LOG(logERROR,
("\tCould not scan masterflags %s value from config file\n",
value));
scan = FAIL;
break;
}
// not first server since detector power on
if (!detectorFirstServer) {
LOG(logINFOBLUE, ("\tServer has been started up before. Ignoring rest of config file\n"));
LOG(logINFOBLUE, ("\tServer has been started up before. "
"Ignoring rest of config file\n"));
fclose(fd);
return FAIL;
}
@ -633,7 +651,9 @@ int readConfigFile() {
// convert value to int
int ival = 0;
if (sscanf(value, "%d", &ival) <= 0) {
LOG(logERROR, ("\tCould not scan parameter %s value %s from config file\n", key, value));
LOG(logERROR, ("\tCould not scan parameter %s value %s from "
"config file\n",
key, value));
scan = FAIL;
break;
}
@ -653,7 +673,8 @@ int readConfigFile() {
else if (!strcasecmp(key, "startacqdelay"))
startacqdelay = ival;
else {
LOG(logERROR, ("\tCould not scan parameter %s from config file\n", key));
LOG(logERROR,
("\tCould not scan parameter %s from config file\n", key));
scan = FAIL;
break;
}
@ -663,21 +684,16 @@ int readConfigFile() {
if (scan == FAIL)
exit(EXIT_FAILURE);
LOG(logINFOBLUE, (
"\tmasterdefaultdelay:%d\n"
LOG(logINFOBLUE,
("\tmasterdefaultdelay:%d\n"
"\tpatternphase:%d\n"
"\tadcphase:%d\n"
"\tslavepatternphase:%d\n"
"\tslaveadcphase:%d\n"
"\trsttosw1delay:%d\n"
"\tstartacqdelay:%d\n",
masterdefaultdelay,
patternphase,
adcphase,
slavepatternphase,
slaveadcphase,
rsttosw1delay,
startacqdelay));
masterdefaultdelay, patternphase, adcphase, slavepatternphase,
slaveadcphase, rsttosw1delay, startacqdelay));
return OK;
}
@ -694,7 +710,8 @@ void setMasterSlaveConfiguration() {
setDelayAfterTrigger(0);
// Set pattern phase for the master module
u_int32_t val = (bus_r(MULTI_PURPOSE_REG) & (~(PLL_CLK_SL_MSK))); // unset mask
u_int32_t val =
(bus_r(MULTI_PURPOSE_REG) & (~(PLL_CLK_SL_MSK))); // unset mask
bus_w(MULTI_PURPOSE_REG, val | PLL_CLK_SL_MSTR_VAL);
setPhaseShift(patternphase);
@ -715,26 +732,26 @@ void setMasterSlaveConfiguration() {
// Set start acq delay
val = (bus_r(MULTI_PURPOSE_REG) & (~(STRT_ACQ_DLY_MSK))); // unset mask
val = val | ((startacqdelay << STRT_ACQ_DLY_OFST) & STRT_ACQ_DLY_MSK); // set val
val = val | ((startacqdelay << STRT_ACQ_DLY_OFST) &
STRT_ACQ_DLY_MSK); // set val
bus_w(MULTI_PURPOSE_REG, val);
LOG(logDEBUG1, ("\tMultipurpose reg: 0x%x\n", val));
}
// all configuration - Set RST to SW1 delay
u_int32_t val = (bus_r(MULTI_PURPOSE_REG) & (~(RST_TO_SW1_DLY_MSK))); // unset mask
val = val | ((rsttosw1delay << RST_TO_SW1_DLY_OFST) & RST_TO_SW1_DLY_MSK); // set val
u_int32_t val =
(bus_r(MULTI_PURPOSE_REG) & (~(RST_TO_SW1_DLY_MSK))); // unset mask
val = val | ((rsttosw1delay << RST_TO_SW1_DLY_OFST) &
RST_TO_SW1_DLY_MSK); // set val
bus_w(MULTI_PURPOSE_REG, val);
LOG(logDEBUG1, ("\tMultipurpose reg: 0x%x\n", val));
LOG(logINFO, ("\tMaster Slave Configuration has been set up\n"));
}
/* set parameters - dr, roi */
int setDynamicRange(int dr){
return DYNAMIC_RANGE;
}
int setDynamicRange(int dr) { return DYNAMIC_RANGE; }
int setROI(ROI arg) {
@ -747,7 +764,8 @@ int setROI(ROI arg) {
LOG(logINFO, ("Setting ROI:(%d, %d)\n", arg.xmin, arg.xmax));
// validation
// xmin divisible by 256 and less than 1280
if (((arg.xmin % NCHAN_PER_ADC) != 0) || (arg.xmin >= (NCHAN * NCHIP))) {
if (((arg.xmin % NCHAN_PER_ADC) != 0) ||
(arg.xmin >= (NCHAN * NCHIP))) {
LOG(logERROR, ("Could not set roi. xmin is invalid\n"));
return FAIL;
}
@ -761,8 +779,8 @@ int setROI(ROI arg) {
adc = arg.xmin / NCHAN_PER_ADC;
}
LOG(logINFO, ("\tAdc to be configured: %d\n", adc));
LOG(logINFO, ("\tROI to be configured: (%d, %d)\n",
(adc == -1) ? 0 : (rois.xmin),
LOG(logINFO,
("\tROI to be configured: (%d, %d)\n", (adc == -1) ? 0 : (rois.xmin),
(adc == -1) ? (NCHIP * NCHAN - 1) : (rois.xmax)));
// set adc of interest
@ -782,7 +800,6 @@ ROI getROI() {
return rois;
}
/* parameters - timer */
void setNumFrames(int64_t val) {
if (val > 0) {
@ -825,7 +842,8 @@ int setExpTime(int64_t val) {
}
int64_t getExpTime() {
return get64BitReg(SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG) / (1E-9 * CLK_FREQ);
return get64BitReg(SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG) /
(1E-9 * CLK_FREQ);
}
int setPeriod(int64_t val) {
@ -847,12 +865,14 @@ int setPeriod(int64_t val) {
}
int64_t getPeriod() {
return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/ (1E-9 * CLK_FREQ);
return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG) /
(1E-9 * CLK_FREQ);
}
int setDelayAfterTrigger(int64_t val) {
if (val < 0) {
LOG(logERROR, ("Invalid delay after trigger: %lld ns\n", (long long int)val));
LOG(logERROR,
("Invalid delay after trigger: %lld ns\n", (long long int)val));
return FAIL;
}
LOG(logINFO, ("Setting delay after trigger %lld ns\n", (long long int)val));
@ -860,7 +880,10 @@ int setDelayAfterTrigger(int64_t val) {
val += masterdefaultdelay;
LOG(logINFO, ("\tActual Delay (master): %lld\n", (long long int)val));
}
val = (val * 1E-9 * CLK_FREQ) + 0.5; //because of the master delay of 62 ns (not really double of clkfreq), losing precision and 0 delay becomes -31ns, so adding +0.5. Also adding +0.5 for more tolerance for gotthard1.
val = (val * 1E-9 * CLK_FREQ) +
0.5; // because of the master delay of 62 ns (not really double of
// clkfreq), losing precision and 0 delay becomes -31ns, so adding
// +0.5. Also adding +0.5 for more tolerance for gotthard1.
set64BitReg(val, SET_DELAY_LSB_REG, SET_DELAY_MSB_REG);
// validate for tolerance
@ -874,9 +897,11 @@ int setDelayAfterTrigger(int64_t val) {
}
int64_t getDelayAfterTrigger() {
int64_t retval = get64BitReg(SET_DELAY_LSB_REG, SET_DELAY_MSB_REG) / (1E-9 * CLK_FREQ);
int64_t retval =
get64BitReg(SET_DELAY_LSB_REG, SET_DELAY_MSB_REG) / (1E-9 * CLK_FREQ);
if (masterflags == IS_MASTER) {
LOG(logDEBUG1, ("\tActual Delay read (master): %lld\n", (long long int) retval));
LOG(logDEBUG1,
("\tActual Delay read (master): %lld\n", (long long int)retval));
retval -= masterdefaultdelay;
}
return retval;
@ -891,24 +916,26 @@ int64_t getNumTriggersLeft() {
}
int64_t getPeriodLeft() {
return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) / (1E-9 * CLK_FREQ);
return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) /
(1E-9 * CLK_FREQ);
}
int64_t getDelayAfterTriggerLeft() {
int64_t retval = get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) / (1E-9 * CLK_FREQ);
int64_t retval =
get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) / (1E-9 * CLK_FREQ);
if (masterflags == IS_MASTER) {
LOG(logDEBUG1, ("\tGetting Actual delay (master): %lld\n", (long long int) retval));
LOG(logDEBUG1,
("\tGetting Actual delay (master): %lld\n", (long long int)retval));
retval -= masterdefaultdelay;
}
return retval;
}
int64_t getExpTimeLeft() {
return get64BitReg(GET_EXPTIME_LSB_REG, GET_EXPTIME_MSB_REG) / (1E-9 * CLK_FREQ);
return get64BitReg(GET_EXPTIME_LSB_REG, GET_EXPTIME_MSB_REG) /
(1E-9 * CLK_FREQ);
}
/* parameters - channel, chip, module, settings */
int setModule(sls_detector_module myMod, char *mess) {
@ -977,7 +1004,9 @@ enum detectorSettings setSettings(enum detectorSettings sett){
confgain = GAIN_CONFGAIN_VRY_HGH_GAIN_VAL;
break;
default:
LOG(logERROR, ("This settings is not defined for this detector %d\n", (int)sett));
LOG(logERROR,
("This settings is not defined for this detector %d\n",
(int)sett));
return -1;
}
// set conf gain
@ -995,7 +1024,8 @@ enum detectorSettings getSettings(){
uint32_t val = regval & GAIN_CONFGAIN_MSK;
switch (val) {
case GAIN_CONFGAIN_DYNMC_GAIN_VAL:
LOG(logDEBUG1, ("Settings read: Dynamic Gain. Gain Reg: 0x%x\n", regval));
LOG(logDEBUG1,
("Settings read: Dynamic Gain. Gain Reg: 0x%x\n", regval));
thisSettings = DYNAMICGAIN;
break;
case GAIN_CONFGAIN_HGH_GAIN_VAL:
@ -1007,11 +1037,13 @@ enum detectorSettings getSettings(){
thisSettings = LOWGAIN;
break;
case GAIN_CONFGAIN_MDM_GAIN_VAL:
LOG(logDEBUG1, ("Settings read: Medium Gain. Gain Reg: 0x%x\n", regval));
LOG(logDEBUG1,
("Settings read: Medium Gain. Gain Reg: 0x%x\n", regval));
thisSettings = MEDIUMGAIN;
break;
case GAIN_CONFGAIN_VRY_HGH_GAIN_VAL:
LOG(logDEBUG1, ("Settings read: Very High Gain. Gain Reg: 0x%x\n", regval));
LOG(logDEBUG1,
("Settings read: Very High Gain. Gain Reg: 0x%x\n", regval));
thisSettings = VERYHIGHGAIN;
break;
default:
@ -1022,14 +1054,14 @@ enum detectorSettings getSettings(){
return thisSettings;
}
/* parameters - dac, adc, hv */
void setDAC(enum DACINDEX ind, int val, int mV) {
if (val < 0)
return;
LOG(logDEBUG1, ("Setting dac[%d]: %d %s \n", (int)ind, val, (mV ? "mV" : "dac units")));
LOG(logDEBUG1, ("Setting dac[%d]: %d %s \n", (int)ind, val,
(mV ? "mV" : "dac units")));
int dacval = val;
#ifdef VIRTUAL
if (!mV) {
@ -1052,14 +1084,12 @@ int getDAC(enum DACINDEX ind, int mV) {
}
int voltage = -1;
LTC2620_DacToVoltage(dacValues[ind], &voltage);
LOG(logDEBUG1, ("Getting DAC %d : %d dac (%d mV)\n",ind, dacValues[ind], voltage));
LOG(logDEBUG1,
("Getting DAC %d : %d dac (%d mV)\n", ind, dacValues[ind], voltage));
return voltage;
}
int getMaxDacSteps() {
return LTC2620_GetMaxNumSteps();
}
int getMaxDacSteps() { return LTC2620_GetMaxNumSteps(); }
int getADC(enum ADCINDEX ind) {
#ifdef VIRTUAL
@ -1075,7 +1105,8 @@ int getADC(enum ADCINDEX ind){
u_int32_t value = 0;
// standby, high clk, high cs
bus_w(addr, (TEMP_SPI_IN_T1_CLK_MSK | TEMP_SPI_IN_T1_CS_MSK | TEMP_SPI_IN_T2_CLK_MSK | TEMP_SPI_IN_T2_CS_MSK));
bus_w(addr, (TEMP_SPI_IN_T1_CLK_MSK | TEMP_SPI_IN_T1_CS_MSK |
TEMP_SPI_IN_T2_CLK_MSK | TEMP_SPI_IN_T2_CS_MSK));
// high clk low cs
bus_w(addr, (TEMP_SPI_IN_T1_CLK_MSK | TEMP_SPI_IN_T2_CLK_MSK));
@ -1095,15 +1126,18 @@ int getADC(enum ADCINDEX ind){
// only the first time
if (i <= 10) {
if (ind == TEMP_ADC)
value = (value << 1) + (bus_r(addrout) & TEMP_SPI_OUT_T1_DT_MSK);
value = (value << 1) +
(bus_r(addrout) & TEMP_SPI_OUT_T1_DT_MSK);
else
value = (value << 1) + (bus_r(addrout) & TEMP_SPI_OUT_T2_DT_MSK);
value = (value << 1) +
(bus_r(addrout) & TEMP_SPI_OUT_T2_DT_MSK);
}
}
}
// standby high clk, high cs
bus_w(addr, (TEMP_SPI_IN_T1_CLK_MSK | TEMP_SPI_IN_T1_CS_MSK | TEMP_SPI_IN_T2_CLK_MSK | TEMP_SPI_IN_T2_CS_MSK));
bus_w(addr, (TEMP_SPI_IN_T1_CLK_MSK | TEMP_SPI_IN_T1_CS_MSK |
TEMP_SPI_IN_T2_CLK_MSK | TEMP_SPI_IN_T2_CS_MSK));
LOG(logDEBUG1, ("\tInitial Temperature value: %u\n", value));
// conversion
@ -1141,7 +1175,8 @@ int setHighVoltage(int val){
sel = HV_SEL_200_VAL;
break;
default:
LOG(logERROR, ("%d high voltage is not defined for this detector\n", val));
LOG(logERROR,
("%d high voltage is not defined for this detector\n", val));
return setHighVoltage(-1);
}
LOG(logDEBUG1, ("\tHigh voltage value to be sent: 0x%x\n", sel));
@ -1189,10 +1224,8 @@ int setHighVoltage(int val){
return retval;
}
/* parameters - timing, extsig */
void setTiming(enum timingMode arg) {
u_int32_t addr = EXT_SIGNAL_REG;
switch (arg) {
@ -1228,23 +1261,23 @@ enum timingMode getTiming() {
void setExtSignal(enum externalSignalFlag mode) {
switch (mode) {
case TRIGGER_IN_RISING_EDGE:
LOG(logINFO, ("Setting External Signal flag: Trigger in Rising Edge\n"));
LOG(logINFO,
("Setting External Signal flag: Trigger in Rising Edge\n"));
break;
case TRIGGER_IN_FALLING_EDGE:
LOG(logINFO, ("Setting External Signal flag: Trigger in Falling Edge\n"));
LOG(logINFO,
("Setting External Signal flag: Trigger in Falling Edge\n"));
break;
default:
LOG(logERROR, ("Extsig (signal mode) %d not defined for this detector\n", mode));
LOG(logERROR,
("Extsig (signal mode) %d not defined for this detector\n", mode));
return;
}
signalMode = mode;
setTiming(getTiming());
}
int getExtSignal() {
return signalMode;
}
int getExtSignal() { return signalMode; }
/* configure mac */
@ -1265,7 +1298,8 @@ void calcChecksum(mac_conf* mac, int sourceip, int destip) {
int count = sizeof(mac->ip);
unsigned short *addr;
addr = (unsigned short*)(&(mac->ip)); /* warning: assignment from incompatible pointer type */
addr = (unsigned short *)(&(
mac->ip)); /* warning: assignment from incompatible pointer type */
long int sum = 0;
while (count > 1) {
@ -1290,21 +1324,20 @@ int configureMAC() {
int dstport = udpDetails.dstport;
LOG(logINFOBLUE, ("Configuring MAC\n"));
char src_mac[50], src_ip[INET_ADDRSTRLEN],dst_mac[50], dst_ip[INET_ADDRSTRLEN];
char src_mac[50], src_ip[INET_ADDRSTRLEN], dst_mac[50],
dst_ip[INET_ADDRSTRLEN];
getMacAddressinString(src_mac, 50, srcmac);
getMacAddressinString(dst_mac, 50, dstmac);
getIpAddressinString(src_ip, srcip);
getIpAddressinString(dst_ip, dstip);
LOG(logINFO, (
"\tSource IP : %s\n"
LOG(logINFO, ("\tSource IP : %s\n"
"\tSource MAC : %s\n"
"\tSource Port : %d\n"
"\tDest IP : %s\n"
"\tDest MAC : %s\n"
"\tDest Port : %d\n",
src_ip, src_mac, srcport,
dst_ip, dst_mac, dstport));
src_ip, src_mac, srcport, dst_ip, dst_mac, dstport));
#ifdef VIRTUAL
if (setUDPDestinationDetails(0, dst_ip, dstport) == FAIL) {
@ -1330,42 +1363,39 @@ int configureMAC() {
// write shadow regs
bus_w(addr, bus_r(addr) | (ENT_RSTN_MSK | WRT_BCK_MSK));
LOG(logDEBUG1, ("\tWrite shadow regs. MultiPurpose reg: 0x%x\n", bus_r(addr)));
LOG(logDEBUG1,
("\tWrite shadow regs. MultiPurpose reg: 0x%x\n", bus_r(addr)));
// release write back
bus_w(addr, bus_r(addr) & (~WRT_BCK_MSK));
LOG(logDEBUG1, ("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr)));
LOG(logDEBUG1,
("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr)));
LOG(logDEBUG1, ("\tConfiguring MAC CONF\n"));
mac_conf *mac_conf_regs = (mac_conf*)(Blackfin_getBaseAddress() + ENET_CONF_REG / 2); // direct write
mac_conf *mac_conf_regs = (mac_conf *)(Blackfin_getBaseAddress() +
ENET_CONF_REG / 2); // direct write
mac_conf_regs->mac.mac_dest_mac1 = ((dstmac >> (8 * 5)) & 0xFF);
mac_conf_regs->mac.mac_dest_mac2 = ((dstmac >> (8 * 4)) & 0xFF);
mac_conf_regs->mac.mac_dest_mac3 = ((dstmac >> (8 * 3)) & 0xFF);
mac_conf_regs->mac.mac_dest_mac4 = ((dstmac >> (8 * 2)) & 0xFF);
mac_conf_regs->mac.mac_dest_mac5 = ((dstmac >> (8 * 1)) & 0xFF);
mac_conf_regs->mac.mac_dest_mac6 = ((dstmac >> (8 * 0)) & 0xFF);
LOG(logDEBUG1, ("\tDestination Mac: %llx %x:%x:%x:%x:%x:%x\n",
dstmac,
mac_conf_regs->mac.mac_dest_mac1,
mac_conf_regs->mac.mac_dest_mac2,
mac_conf_regs->mac.mac_dest_mac3,
mac_conf_regs->mac.mac_dest_mac4,
mac_conf_regs->mac.mac_dest_mac5,
mac_conf_regs->mac.mac_dest_mac6));
LOG(logDEBUG1,
("\tDestination Mac: %llx %x:%x:%x:%x:%x:%x\n", dstmac,
mac_conf_regs->mac.mac_dest_mac1, mac_conf_regs->mac.mac_dest_mac2,
mac_conf_regs->mac.mac_dest_mac3, mac_conf_regs->mac.mac_dest_mac4,
mac_conf_regs->mac.mac_dest_mac5, mac_conf_regs->mac.mac_dest_mac6));
mac_conf_regs->mac.mac_src_mac1 = ((srcmac >> (8 * 5)) & 0xFF);
mac_conf_regs->mac.mac_src_mac2 = ((srcmac >> (8 * 4)) & 0xFF);
mac_conf_regs->mac.mac_src_mac3 = ((srcmac >> (8 * 3)) & 0xFF);
mac_conf_regs->mac.mac_src_mac4 = ((srcmac >> (8 * 2)) & 0xFF);
mac_conf_regs->mac.mac_src_mac5 = ((srcmac >> (8 * 1)) & 0xFF);
mac_conf_regs->mac.mac_src_mac6 = ((srcmac >> (8 * 0)) & 0xFF);
LOG(logDEBUG1, ("\tSource Mac: %llx %x:%x:%x:%x:%x:%x\n",
srcmac,
mac_conf_regs->mac.mac_src_mac1,
mac_conf_regs->mac.mac_src_mac2,
mac_conf_regs->mac.mac_src_mac3,
mac_conf_regs->mac.mac_src_mac4,
mac_conf_regs->mac.mac_src_mac5,
mac_conf_regs->mac.mac_src_mac6));
LOG(logDEBUG1,
("\tSource Mac: %llx %x:%x:%x:%x:%x:%x\n", srcmac,
mac_conf_regs->mac.mac_src_mac1, mac_conf_regs->mac.mac_src_mac2,
mac_conf_regs->mac.mac_src_mac3, mac_conf_regs->mac.mac_src_mac4,
mac_conf_regs->mac.mac_src_mac5, mac_conf_regs->mac.mac_src_mac6));
mac_conf_regs->mac.mac_ether_type = 0x0800; // ipv4
calcChecksum(mac_conf_regs, srcip, dstip);
@ -1375,13 +1405,15 @@ int configureMAC() {
mac_conf_regs->udp.udp_chksum = 0x0000;
LOG(logDEBUG1, ("\tConfiguring TSE\n"));
tse_conf *tse_conf_regs = (tse_conf*)(Blackfin_getBaseAddress() + TSE_CONF_REG / 2); // direct write
tse_conf *tse_conf_regs = (tse_conf *)(Blackfin_getBaseAddress() +
TSE_CONF_REG / 2); // direct write
tse_conf_regs->rev = 0xA00;
tse_conf_regs->scratch = 0xCCCCCCCC;
tse_conf_regs->command_config = 0xB;
tse_conf_regs->mac_0 = 0x17231C00;
tse_conf_regs->mac_1 = 0xCB4A;
tse_conf_regs->frm_length = 0x5DC; //max frame length (1500 bytes) (was 0x41C)
tse_conf_regs->frm_length =
0x5DC; // max frame length (1500 bytes) (was 0x41C)
tse_conf_regs->pause_quant = 0x0;
tse_conf_regs->rx_section_empty = 0x7F0;
tse_conf_regs->rx_section_full = 0x10;
@ -1396,13 +1428,16 @@ int configureMAC() {
mac_conf_regs->cdone = 0xFFFFFFFF;
bus_w(addr, bus_r(addr) | (INT_RSTN_MSK | WRT_BCK_MSK));
LOG(logDEBUG1, ("\tWrite shadow regs with int reset. MultiPurpose reg: 0x%x\n", bus_r(addr)));
LOG(logDEBUG1,
("\tWrite shadow regs with int reset. MultiPurpose reg: 0x%x\n",
bus_r(addr)));
usleep(100000);
// release write back
bus_w(addr, bus_r(addr) & (~WRT_BCK_MSK));
LOG(logDEBUG1, ("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr)));
LOG(logDEBUG1,
("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr)));
bus_w(addr, bus_r(addr) | SW1_MSK);
LOG(logDEBUG1, ("\tSw1. MultiPurpose reg: 0x%x\n", bus_r(addr)));
@ -1410,8 +1445,9 @@ int configureMAC() {
usleep(1000 * 1000);
LOG(logDEBUG1, ("\tConfigure Mac Done\n"));
{
/** send out first image as first packet does not give 0xcacacaca (needed to know if first image
* when switching back and forth between roi and no roi
/** send out first image as first packet does not give 0xcacacaca
* (needed to know if first image when switching back and forth between
* roi and no roi
*/
LOG(logINFOBLUE, ("Sending an image to counter the packet numbers\n"));
// remember old parameters
@ -1431,12 +1467,15 @@ int configureMAC() {
setTiming(AUTO_TIMING);
setNumFrames(1);
setNumTriggers(1);
setPeriod(1e9); // important to keep this until we have to wait for acquisition to start
setPeriod(1e9); // important to keep this until we have to wait for
// acquisition to start
setExpTime(900 * 1000);
// take an image
if (masterflags == IS_MASTER)
usleep(1 * 1000 * 1000); // required to ensure master starts acquisition only after slave has changed to basic parameters and is waiting
usleep(1 * 1000 * 1000); // required to ensure master starts
// acquisition only after slave has changed
// to basic parameters and is waiting
int loop = 0;
startStateMachine();
@ -1448,7 +1487,8 @@ int configureMAC() {
}
LOG(logINFO, ("\twaited %d loops to start\n", loop));
LOG(logINFO, ("\tWaiting for acquisition to end (frames left: %lld)\n", (long long int)getNumFramesLeft()));
LOG(logINFO, ("\tWaiting for acquisition to end (frames left: %lld)\n",
(long long int)getNumFramesLeft()));
// wait for status to be done
while (runBusy()) {
usleep(500);
@ -1461,8 +1501,9 @@ int configureMAC() {
"\ttriggers: %lld\n"
"\tperiod: %lld ns\n"
"\texptime:%lld ns\n",
(int)oldtiming, (long long int)oldframes, (long long int)oldtriggers,
(long long int)oldPeriod, (long long int)oldExptime));
(int)oldtiming, (long long int)oldframes,
(long long int)oldtriggers, (long long int)oldPeriod,
(long long int)oldExptime));
setTiming(oldtiming);
setNumFrames(oldframes);
setNumTriggers(oldtriggers);
@ -1473,19 +1514,14 @@ int configureMAC() {
return OK;
}
int getAdcConfigured(){
return adcConfigured;
}
int getAdcConfigured() { return adcConfigured; }
int setDetectorPosition(int pos[]) {
memcpy(detPos, pos, sizeof(detPos));
return OK;
}
int* getDetectorPosition() {
return detPos;
}
int *getDetectorPosition() { return detPos; }
/* gotthard specific - adc phase */
int setPhase(enum CLKINDEX ind, int val, int degrees) {
@ -1550,11 +1586,11 @@ void* start_timer(void* arg) {
}
int64_t periodNs = getPeriod();
int numFrames = (getNumFrames() *
getNumTriggers() );
int numFrames = (getNumFrames() * getNumTriggers());
int64_t expUs = getExpTime() / 1000;
int imageSize = adcConfigured == -1 ? DATA_BYTES : NCHAN_PER_ADC * NUM_BITS_PER_PIXEL;
int imageSize =
adcConfigured == -1 ? DATA_BYTES : NCHAN_PER_ADC * NUM_BITS_PER_PIXEL;
int dataSize = adcConfigured == -1 ? 1280 : 512;
int packetSize = adcConfigured == -1 ? 1286 : 518;
int packetsPerFrame = adcConfigured == -1 ? 2 : 1;
@ -1725,7 +1761,8 @@ enum runStatus getRunStatus(){
LOG(logINFOBLUE, ("Status: IDLE\n"));
s = IDLE;
} else {
LOG(logINFORED, ("Status: Unknown Status: 0x%x. Trying again.\n", retval));
LOG(logINFORED,
("Status: Unknown Status: 0x%x. Trying again.\n", retval));
int iloop = 0;
for (iloop = 0; iloop < 10; ++iloop) {
usleep(1000 * 1000);
@ -1741,8 +1778,7 @@ enum runStatus getRunStatus(){
if (retval & STATUS_WTNG_FR_TRGGR_MSK) {
LOG(logINFOBLUE, ("Status: Waiting\n"));
s = WAITING;
}
else{
} else {
LOG(logINFOBLUE, ("Status: Running\n"));
s = RUNNING;
}
@ -1768,7 +1804,8 @@ void readFrame(int *ret, char *mess){
*ret = (int)OK;
int64_t retval = getNumFramesLeft() + 1;
if (retval > -1) {
LOG(logERROR, ("No data and run stopped: %lld frames left\n",(long long int)retval));
LOG(logERROR, ("No data and run stopped: %lld frames left\n",
(long long int)retval));
} else {
LOG(logINFOGREEN, ("Acquisition successfully finished\n"));
}
@ -1795,13 +1832,11 @@ u_int32_t runState(enum TLogLevel lev) {
/* common */
int calculateDataBytes(){
return DATA_BYTES;
}
int calculateDataBytes() { return DATA_BYTES; }
int getTotalNumberOfChannels() {return (getNumberOfChannelsPerChip() * getNumberOfChips());}
int getTotalNumberOfChannels() {
return (getNumberOfChannelsPerChip() * getNumberOfChips());
}
int getNumberOfChips() { return NCHIP; }
int getNumberOfDACs() { return NDAC; }
int getNumberOfChannelsPerChip() { return NCHAN; }

647
slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c Executable file → Normal file
View File

File diff suppressed because it is too large Load Diff

14
slsDetectorServers/moenchDetectorServer/RegisterDefs.h
View File

@ -145,12 +145,14 @@
/* Exposure Time Left 64 bit RO register */
//#define EXPTIME_LEFT_LSB_REG (0x1A << MEM_MAP_SHIFT) // Not
//used in FW #define EXPTIME_LEFT_MSB_REG (0x1B << MEM_MAP_SHIFT)
// used in FW #define EXPTIME_LEFT_MSB_REG (0x1B <<
// MEM_MAP_SHIFT)
//// Not used in FW
/* Gates Left 64 bit RO register */
//#define GATES_LEFT_LSB_REG (0x1C << MEM_MAP_SHIFT) // Not
//used in FW #define GATES_LEFT_MSB_REG (0x1D << MEM_MAP_SHIFT)
// used in FW #define GATES_LEFT_MSB_REG (0x1D <<
// MEM_MAP_SHIFT)
//// Not used in FW
/* Data In 64 bit RO register TODO */
@ -163,7 +165,8 @@
/* Frames From Start 64 bit RO register TODO */
//#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT) // Not
//used in FW #define FRAMES_FROM_START_MSB_REG (0x23 << MEM_MAP_SHIFT)
// used in FW #define FRAMES_FROM_START_MSB_REG (0x23 <<
// MEM_MAP_SHIFT)
//// Not used in FW
/* Frames From Start PG 64 bit RO register. Reset using CONTROL_CRST. TODO */
@ -335,8 +338,9 @@
//#define CONTROL_STP_FF_TST_MSK (0x00000001 <<
// CONTROL_STP_FF_TST_OFST) #define CONTROL_STRT_RDT_OFST (4)
//#define CONTROL_STRT_RDT_MSK (0x00000001 <<
//CONTROL_STRT_RDT_OFST) #define CONTROL_STP_RDT_OFST (5) #define
//CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST)
// CONTROL_STRT_RDT_OFST) #define CONTROL_STP_RDT_OFST (5)
// #define CONTROL_STP_RDT_MSK (0x00000001 <<
// CONTROL_STP_RDT_OFST)
#define CONTROL_STRT_EXPSR_OFST (6)
#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST)
//#define CONTROL_STP_EXPSR_OFST (7)

493
slsDetectorServers/moenchDetectorServer/slsDetectorFunctionList.c Executable file → Normal file
View File

File diff suppressed because it is too large Load Diff

320
slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c
View File

@ -1,19 +1,19 @@
#include "slsDetectorFunctionList.h"
#include "versionAPI.h"
#include "clogger.h"
#include "ALTERA_PLL_CYCLONE10.h"
#include "DAC6571.h"
#include "LTC2620_Driver.h"
#include "common.h"
#include "RegisterDefs.h"
#include "ALTERA_PLL_CYCLONE10.h"
#include "clogger.h"
#include "common.h"
#include "versionAPI.h"
#ifdef VIRTUAL
#include "communication_funcs_UDP.h"
#include "communication_virtual.h"
#endif
#include <netinet/in.h>
#include <string.h>
#include <unistd.h> // usleep
#include <netinet/in.h>
#ifdef VIRTUAL
#include <pthread.h>
#include <time.h>
@ -45,11 +45,10 @@ uint32_t clkDivider[NUM_CLOCKS] = {};
int highvoltage = 0;
int dacValues[NDAC] = {};
int detPos[2] = {};
uint32_t countermask = 0; // will be removed later when in firmware converted to mask
uint32_t countermask =
0; // will be removed later when in firmware converted to mask
int isInitCheckDone() {
return initCheckDone;
}
int isInitCheckDone() { return initCheckDone; }
int getInitResult(char **mess) {
*mess = initErrorMessage;
@ -79,9 +78,10 @@ void basictests() {
return;
}
// does check only if flag is 0 (by default), set by command line
if ((!debugflag) && ((checkType() == FAIL) || (testFpga() == FAIL)|| (testBus() == FAIL))) {
strcpy(initErrorMessage,
"Could not pass basic tests of FPGA and bus. Dangerous to continue.\n");
if ((!debugflag) && ((checkType() == FAIL) || (testFpga() == FAIL) ||
(testBus() == FAIL))) {
strcpy(initErrorMessage, "Could not pass basic tests of FPGA and bus. "
"Dangerous to continue.\n");
LOG(logERROR, ("%s\n\n", initErrorMessage));
initError = FAIL;
return;
@ -91,11 +91,13 @@ void basictests() {
uint64_t macadd = getDetectorMAC();
int64_t fwversion = getFirmwareVersion();
int64_t swversion = getServerVersion();
int64_t sw_fw_apiversion = getFirmwareAPIVersion();;
int64_t sw_fw_apiversion = getFirmwareAPIVersion();
;
int64_t client_sw_apiversion = getClientServerAPIVersion();
uint32_t requiredFirmwareVersion = REQRD_FRMWRE_VRSN;
LOG(logINFOBLUE, ("*************************************************\n"
LOG(logINFOBLUE,
("*************************************************\n"
"Hardware Version:\t\t 0x%x\n"
"Detector IP Addr:\t\t 0x%x\n"
@ -107,22 +109,16 @@ void basictests() {
"Required Firmware Version:\t 0x%x\n"
"Client-Software API Version:\t 0x%llx\n"
"********************************************************\n",
hversion,
ipadd,
(long long unsigned int)macadd,
(long long int)fwversion,
(long long int)swversion,
(long long int)sw_fw_apiversion,
requiredFirmwareVersion,
(long long int)client_sw_apiversion
));
hversion, ipadd, (long long unsigned int)macadd,
(long long int)fwversion, (long long int)swversion,
(long long int)sw_fw_apiversion, requiredFirmwareVersion,
(long long int)client_sw_apiversion));
// return if flag is not zero, debug mode
if (debugflag) {
return;
}
// cant read versions
LOG(logINFO, ("Testing Firmware-software compatibility:\n"));
if (!fwversion || !sw_fw_apiversion) {
@ -136,8 +132,10 @@ void basictests() {
// check for API compatibility - old server
if (sw_fw_apiversion > requiredFirmwareVersion) {
sprintf(initErrorMessage,
"This detector software software version (0x%llx) is incompatible.\n"
"Please update detector software (min. 0x%llx) to be compatible with this firmware.\n",
"This detector software software version (0x%llx) is "
"incompatible.\n"
"Please update detector software (min. 0x%llx) to be "
"compatible with this firmware.\n",
(long long int)sw_fw_apiversion,
(long long int)requiredFirmwareVersion);
LOG(logERROR, (initErrorMessage));
@ -149,7 +147,8 @@ void basictests() {
if (requiredFirmwareVersion > fwversion) {
sprintf(initErrorMessage,
"This firmware version (0x%llx) is incompatible.\n"
"Please update firmware (min. 0x%llx) to be compatible with this server.\n",
"Please update firmware (min. 0x%llx) to be compatible with "
"this server.\n",
(long long int)fwversion,
(long long int)requiredFirmwareVersion);
LOG(logERROR, (initErrorMessage));
@ -160,14 +159,16 @@ void basictests() {
#endif
}
int checkType() {
#ifdef VIRTUAL
return OK;
#endif
u_int32_t type = ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST);
u_int32_t type =
((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST);
if (type != MYTHEN3) {
LOG(logERROR, ("This is not a Mythen3 firmware (read %d, expected %d)\n", type, MYTHEN3));
LOG(logERROR,
("This is not a Mythen3 firmware (read %d, expected %d)\n", type,
MYTHEN3));
return FAIL;
}
@ -186,7 +187,9 @@ int testFpga() {
if (val == FIX_PATT_VAL) {
LOG(logINFO, ("Fixed pattern: successful match 0x%08x\n", val));
} else {
LOG(logERROR, ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL));
LOG(logERROR,
("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n",
val, FIX_PATT_VAL));
ret = FAIL;
}
return ret;
@ -206,8 +209,8 @@ int testBus() {
for (i = 0; i < times; ++i) {
bus_w(addr, i * 100);
if (i * 100 != bus_r(addr)) {
LOG(logERROR, ("Mismatch! Wrote 0x%x, read 0x%x\n",
i * 100, bus_r(addr)));
LOG(logERROR,
("Mismatch! Wrote 0x%x, read 0x%x\n", i * 100, bus_r(addr)));
ret = FAIL;
}
}
@ -222,19 +225,16 @@ int testBus() {
/* Ids */
uint64_t getServerVersion() {
return APIMYTHEN3;
}
uint64_t getServerVersion() { return APIMYTHEN3; }
uint64_t getClientServerAPIVersion() {
return APIMYTHEN3;
}
uint64_t getClientServerAPIVersion() { return APIMYTHEN3; }
u_int64_t getFirmwareVersion() {
#ifdef VIRTUAL
return 0;
#endif
return ((bus_r(FPGA_VERSION_REG) & FPGA_COMPILATION_DATE_MSK) >> FPGA_COMPILATION_DATE_OFST);
return ((bus_r(FPGA_VERSION_REG) & FPGA_COMPILATION_DATE_MSK) >>
FPGA_COMPILATION_DATE_OFST);
}
u_int64_t getFirmwareAPIVersion() {
@ -255,17 +255,18 @@ u_int32_t getDetectorNumber(){
#ifdef VIRTUAL
return 0;
#endif
return ((bus_r(MCB_SERIAL_NO_REG) & MCB_SERIAL_NO_VRSN_MSK) >> MCB_SERIAL_NO_VRSN_OFST);
return ((bus_r(MCB_SERIAL_NO_REG) & MCB_SERIAL_NO_VRSN_MSK) >>
MCB_SERIAL_NO_VRSN_OFST);
}
u_int64_t getDetectorMAC() {
#ifdef VIRTUAL
return 0;
#else
char output[255], mac[255] = "";
u_int64_t res = 0;
FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r");
FILE *sysFile =
popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r");
fgets(output, sizeof(output), sysFile);
pclose(sysFile);
// getting rid of ":"
@ -288,7 +289,9 @@ u_int32_t getDetectorIP(){
u_int32_t res = 0;
// execute and get address
char output[255];
FILE* sysFile = popen("ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", "r");
FILE *sysFile = popen(
"ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2",
"r");
fgets(output, sizeof(output), sysFile);
pclose(sysFile);
@ -323,7 +326,8 @@ void initStopServer() {
usleep(CTRL_SRVR_INIT_TIME_US);
if (mapCSP0() == FAIL) {
LOG(logERROR, ("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n"));
LOG(logERROR,
("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n"));
exit(EXIT_FAILURE);
}
#ifdef VIRTUAL
@ -334,7 +338,6 @@ void initStopServer() {
#endif
}
/* set up detector */
void setupDetector() {
@ -364,7 +367,10 @@ void setupDetector() {
#endif
// pll defines
ALTERA_PLL_C10_SetDefines(REG_OFFSET, BASE_READOUT_PLL, BASE_SYSTEM_PLL, PLL_RESET_REG, PLL_RESET_REG, PLL_RESET_READOUT_MSK, PLL_RESET_SYSTEM_MSK, READOUT_PLL_VCO_FREQ_HZ, SYSTEM_PLL_VCO_FREQ_HZ);
ALTERA_PLL_C10_SetDefines(REG_OFFSET, BASE_READOUT_PLL, BASE_SYSTEM_PLL,
PLL_RESET_REG, PLL_RESET_REG,
PLL_RESET_READOUT_MSK, PLL_RESET_SYSTEM_MSK,
READOUT_PLL_VCO_FREQ_HZ, SYSTEM_PLL_VCO_FREQ_HZ);
ALTERA_PLL_C10_ResetPLL(READOUT_PLL);
ALTERA_PLL_C10_ResetPLL(SYSTEM_PLL);
// hv
@ -385,7 +391,6 @@ void setupDetector() {
// enable all counters
setCounterMask(MAX_COUNTER_MSK);
// Initialization of acquistion parameters
setNumFrames(DEFAULT_NUM_FRAMES);
setNumTriggers(DEFAULT_NUM_CYCLES);
@ -473,12 +478,12 @@ int setDynamicRange(int dr){
case CONFIG_DYNAMIC_RANGE_24_VAL:
return 32;
default:
LOG(logERROR, ("Invalid dynamic range %d read back\n", regval >> CONFIG_DYNAMIC_RANGE_OFST));
LOG(logERROR, ("Invalid dynamic range %d read back\n",
regval >> CONFIG_DYNAMIC_RANGE_OFST));
return -1;
}
}
/* parameters - speed, readout */
void setNumFrames(int64_t val) {
@ -544,7 +549,8 @@ int setPeriod(int64_t val) {
}
int64_t getPeriod() {
return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/ (1E-9 * FIXED_PLL_FREQUENCY);
return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG) /
(1E-9 * FIXED_PLL_FREQUENCY);
}
void setCounterMask(uint32_t arg) {
@ -588,9 +594,11 @@ uint32_t getCounterMask() {
ncounters = 3;
break;
}
// confirm ncounters work with mask saved in server (until firmware converts to mask)
// confirm ncounters work with mask saved in server (until firmware converts
// to mask)
int nc = __builtin_popcount(countermask);
// if not equal, make a mask of what is in register (will change once firmware changes)
// if not equal, make a mask of what is in register (will change once
// firmware changes)
if (nc != ncounters) {
switch (ncounters) {
case 1:
@ -609,7 +617,8 @@ uint32_t getCounterMask() {
int setDelayAfterTrigger(int64_t val) {
if (val < 0) {
LOG(logERROR, ("Invalid delay after trigger: %lld ns\n", (long long int)val));
LOG(logERROR,
("Invalid delay after trigger: %lld ns\n", (long long int)val));
return FAIL;
}
LOG(logINFO, ("Setting delay after trigger %lld ns\n", (long long int)val));
@ -626,7 +635,8 @@ int setDelayAfterTrigger(int64_t val) {
}
int64_t getDelayAfterTrigger() {
return get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY);
return get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG) /
(1E-9 * FIXED_PLL_FREQUENCY);
}
int64_t getNumFramesLeft() {
@ -638,11 +648,13 @@ int64_t getNumTriggersLeft() {
}
int64_t getDelayAfterTriggerLeft() {
return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY);
return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) /
(1E-9 * FIXED_PLL_FREQUENCY);
}
int64_t getPeriodLeft() {
return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY);
return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) /
(1E-9 * FIXED_PLL_FREQUENCY);
}
int64_t getFramesFromStart() {
@ -650,15 +662,15 @@ int64_t getFramesFromStart() {
}
int64_t getActualTime() {
return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY * 2);
return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG) /
(1E-9 * FIXED_PLL_FREQUENCY * 2);
}
int64_t getMeasurementTime() {
return get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY);
return get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG) /
(1E-9 * FIXED_PLL_FREQUENCY);
}
/* parameters - dac, hv */
void setDAC(enum DACINDEX ind, int val, int mV) {
if (val < 0) {
@ -666,11 +678,13 @@ void setDAC(enum DACINDEX ind, int val, int mV) {
}
char *dac_names[] = {DAC_NAMES};
LOG(logDEBUG1, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind], val, (mV ? "mV" : "dac units")));
LOG(logDEBUG1, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind],
val, (mV ? "mV" : "dac units")));
int dacval = val;
#ifdef VIRTUAL
LOG(logINFO, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind], val, (mV ? "mV" : "dac units")));
LOG(logINFO, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind],
val, (mV ? "mV" : "dac units")));
if (!mV) {
dacValues[ind] = val;
}
@ -679,7 +693,8 @@ void setDAC(enum DACINDEX ind, int val, int mV) {
dacValues[ind] = dacval;
}
#else
if (LTC2620_D_SetDACValue((int)ind, val, mV, dac_names[ind], &dacval) == OK) {
if (LTC2620_D_SetDACValue((int)ind, val, mV, dac_names[ind], &dacval) ==
OK) {
dacValues[ind] = dacval;
}
#endif
@ -692,13 +707,12 @@ int getDAC(enum DACINDEX ind, int mV) {
}
int voltage = -1;
LTC2620_D_DacToVoltage(dacValues[ind], &voltage);
LOG(logDEBUG1, ("Getting DAC %d : %d dac (%d mV)\n",ind, dacValues[ind], voltage));
LOG(logDEBUG1,
("Getting DAC %d : %d dac (%d mV)\n", ind, dacValues[ind], voltage));
return voltage;
}
int getMaxDacSteps() {
return LTC2620_D_GetMaxNumSteps();
}
int getMaxDacSteps() { return LTC2620_D_GetMaxNumSteps(); }
int setHighVoltage(int val) {
// limit values
@ -720,7 +734,6 @@ int setHighVoltage(int val){
return highvoltage;
}
/* parameters - timing */
void setTiming(enum timingMode arg) {
if (arg != GET_TIMING_MODE) {
@ -745,7 +758,6 @@ enum timingMode getTiming() {
return AUTO_TIMING;
}
int configureMAC() {
uint32_t srcip = udpDetails.srcip;
@ -756,21 +768,20 @@ int configureMAC() {
int dstport = udpDetails.dstport;
LOG(logINFOBLUE, ("Configuring MAC\n"));
char src_mac[50], src_ip[INET_ADDRSTRLEN],dst_mac[50], dst_ip[INET_ADDRSTRLEN];
char src_mac[50], src_ip[INET_ADDRSTRLEN], dst_mac[50],
dst_ip[INET_ADDRSTRLEN];
getMacAddressinString(src_mac, 50, srcmac);
getMacAddressinString(dst_mac, 50, dstmac);
getIpAddressinString(src_ip, srcip);
getIpAddressinString(dst_ip, dstip);
LOG(logINFO, (
"\tSource IP : %s\n"
LOG(logINFO, ("\tSource IP : %s\n"
"\tSource MAC : %s\n"
"\tSource Port : %d\n"
"\tDest IP : %s\n"
"\tDest MAC : %s\n"
"\tDest Port : %d\n",
src_ip, src_mac, srcport,
dst_ip, dst_mac, dstport));
src_ip, src_mac, srcport, dst_ip, dst_mac, dstport));
#ifdef VIRTUAL
if (setUDPDestinationDetails(0, dst_ip, dstport) == FAIL) {
@ -782,9 +793,11 @@ int configureMAC() {
// start addr
uint32_t addr = BASE_UDP_RAM;
// calculate rxr endpoint offset
//addr += (iRxEntry * RXR_ENDPOINT_OFST);//TODO: is there round robin already implemented?
// addr += (iRxEntry * RXR_ENDPOINT_OFST);//TODO: is there round robin
// already implemented?
// get struct memory
udp_header *udp = (udp_header*) (Nios_getBaseAddress() + addr/(sizeof(u_int32_t)));
udp_header *udp =
(udp_header *)(Nios_getBaseAddress() + addr / (sizeof(u_int32_t)));
memset(udp, 0, sizeof(udp_header));
// mac addresses
@ -865,19 +878,23 @@ int setDetectorPosition(int pos[]) {
// row
value = detPos[X];
bus_w(addr, (bus_r(addr) &~COORD_ROW_MSK) | ((value << COORD_ROW_OFST) & COORD_ROW_MSK));
bus_w(addr, (bus_r(addr) & ~COORD_ROW_MSK) |
((value << COORD_ROW_OFST) & COORD_ROW_MSK));
valueRead = ((bus_r(addr) & COORD_ROW_MSK) >> COORD_ROW_OFST);
if (valueRead != value) {
LOG(logERROR, ("Could not set row. Set %d, read %d\n", value, valueRead));
LOG(logERROR,
("Could not set row. Set %d, read %d\n", value, valueRead));
ret = FAIL;
}
// col
value = detPos[Y];
bus_w(addr, (bus_r(addr) &~COORD_COL_MSK) | ((value << COORD_COL_OFST) & COORD_COL_MSK));
bus_w(addr, (bus_r(addr) & ~COORD_COL_MSK) |
((value << COORD_COL_OFST) & COORD_COL_MSK));
valueRead = ((bus_r(addr) & COORD_COL_MSK) >> COORD_COL_OFST);
if (valueRead != value) {
LOG(logERROR, ("Could not set column. Set %d, read %d\n", value, valueRead));
LOG(logERROR,
("Could not set column. Set %d, read %d\n", value, valueRead));
ret = FAIL;
}
@ -888,9 +905,7 @@ int setDetectorPosition(int pos[]) {
return ret;
}
int* getDetectorPosition() {
return detPos;
}
int *getDetectorPosition() { return detPos; }
/* pattern */
@ -898,17 +913,22 @@ uint64_t readPatternWord(int addr) {
// error (handled in tcp)
if (addr < 0 || addr >= MAX_PATTERN_LENGTH) {
LOG(logERROR, ("Cannot get Pattern - Word. Invalid addr 0x%x. "
"Should be between 0 and 0x%x\n", addr, MAX_PATTERN_LENGTH));
"Should be between 0 and 0x%x\n",
addr, MAX_PATTERN_LENGTH));
return -1;
}
LOG(logINFO, (" Reading Pattern Word (addr:0x%x)\n", addr));
uint32_t reg_lsb = PATTERN_STEP0_LSB_REG + addr * REG_OFFSET * 2; // the first word in RAM as base plus the offset of the word to write (addr)
uint32_t reg_lsb =
PATTERN_STEP0_LSB_REG +
addr * REG_OFFSET * 2; // the first word in RAM as base plus the offset
// of the word to write (addr)
uint32_t reg_msb = PATTERN_STEP0_MSB_REG + addr * REG_OFFSET * 2;
// read value
uint64_t retval = get64BitReg(reg_lsb, reg_msb);
LOG(logDEBUG1, (" Word(addr:0x%x) retval: 0x%llx\n", addr, (long long int) retval));
LOG(logDEBUG1,
(" Word(addr:0x%x) retval: 0x%llx\n", addr, (long long int)retval));
return retval;
}
@ -921,17 +941,23 @@ uint64_t writePatternWord(int addr, uint64_t word) {
// error (handled in tcp)
if (addr < 0 || addr >= MAX_PATTERN_LENGTH) {
LOG(logERROR, ("Cannot set Pattern - Word. Invalid addr 0x%x. "
"Should be between 0 and 0x%x\n", addr, MAX_PATTERN_LENGTH));
"Should be between 0 and 0x%x\n",
addr, MAX_PATTERN_LENGTH));
return -1;
}
LOG(logINFO, ("Setting Pattern Word (addr:0x%x, word:0x%llx)\n", addr, (long long int) word));
uint32_t reg_lsb = PATTERN_STEP0_LSB_REG + addr * REG_OFFSET * 2; // the first word in RAM as base plus the offset of the word to write (addr)
LOG(logINFO, ("Setting Pattern Word (addr:0x%x, word:0x%llx)\n", addr,
(long long int)word));
uint32_t reg_lsb =
PATTERN_STEP0_LSB_REG +
addr * REG_OFFSET * 2; // the first word in RAM as base plus the offset
// of the word to write (addr)
uint32_t reg_msb = PATTERN_STEP0_MSB_REG + addr * REG_OFFSET * 2;
// write word
set64BitReg(word, reg_lsb, reg_msb);
LOG(logDEBUG1, (" Wrote word. PatternIn Reg: 0x%llx\n", get64BitReg(reg_lsb, reg_msb)));
LOG(logDEBUG1, (" Wrote word. PatternIn Reg: 0x%llx\n",
get64BitReg(reg_lsb, reg_msb)));
return readPatternWord(addr);
}
@ -941,7 +967,8 @@ int setPatternWaitAddress(int level, int addr) {
// error (handled in tcp)
if (addr >= MAX_PATTERN_LENGTH) {
LOG(logERROR, ("Cannot set Pattern Wait Address. Invalid addr 0x%x. "
"Should be between 0 and 0x%x\n", addr, MAX_PATTERN_LENGTH));
"Should be between 0 and 0x%x\n",
addr, MAX_PATTERN_LENGTH));
return -1;
}
@ -967,19 +994,22 @@ int setPatternWaitAddress(int level, int addr) {
break;
default:
LOG(logERROR, ("Cannot set Pattern Wait Address. Invalid level 0x%x. "
"Should be between 0 and 2.\n", level));
"Should be between 0 and 2.\n",
level));
return -1;
}
// set
if (addr >= 0) {
LOG(logINFO, ("Setting Pattern Wait Address (level:%d, addr:0x%x)\n", level, addr));
LOG(logINFO, ("Setting Pattern Wait Address (level:%d, addr:0x%x)\n",
level, addr));
bus_w(reg, ((addr << offset) & mask));
}
// get
uint32_t regval = ((bus_r(reg) & mask) >> offset);
LOG(logDEBUG1, (" Wait Address retval (level:%d, addr:0x%x)\n", level, regval));
LOG(logDEBUG1,
(" Wait Address retval (level:%d, addr:0x%x)\n", level, regval));
return regval;
}
@ -1002,19 +1032,22 @@ uint64_t setPatternWaitTime(int level, uint64_t t) {
break;
default:
LOG(logERROR, ("Cannot set Pattern Wait Time. Invalid level %d. "
"Should be between 0 and 2.\n", level));
"Should be between 0 and 2.\n",
level));
return -1;
}
// set
if ((int64_t)t >= 0) {
LOG(logINFO, ("Setting Pattern Wait Time (level:%d, t:%lld)\n", level, (long long int)t));
LOG(logINFO, ("Setting Pattern Wait Time (level:%d, t:%lld)\n", level,
(long long int)t));
set64BitReg(t, regl, regm);
}
// get
uint64_t regval = get64BitReg(regl, regm);
LOG(logDEBUG1, (" Wait Time retval (level:%d, t:%lld)\n", level, (long long int)regval));
LOG(logDEBUG1, (" Wait Time retval (level:%d, t:%lld)\n", level,
(long long int)regval));
return regval;
}
@ -1022,7 +1055,8 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) {
// (checked at tcp)
if (*startAddr >= MAX_PATTERN_LENGTH || *stopAddr >= MAX_PATTERN_LENGTH) {
LOG(logERROR, ("Cannot set Pattern Loop, Address (startaddr:0x%x, stopaddr:0x%x) must be "
LOG(logERROR, ("Cannot set Pattern Loop, Address (startaddr:0x%x, "
"stopaddr:0x%x) must be "
"less than 0x%x\n",
*startAddr, *stopAddr, MAX_PATTERN_LENGTH));
}
@ -1071,7 +1105,8 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) {
default:
// already checked at tcp interface
LOG(logERROR, ("Cannot set Pattern loop. Invalid level %d. "
"Should be between -1 and 2.\n", level));
"Should be between -1 and 2.\n",
level));
*startAddr = 0;
*stopAddr = 0;
*nLoop = 0;
@ -1081,8 +1116,8 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) {
if (level >= 0) {
// set iteration
if (*nLoop >= 0) {
LOG(logINFO, ("Setting Pattern Loop (level:%d, nLoop:%d)\n",
level, *nLoop));
LOG(logINFO,
("Setting Pattern Loop (level:%d, nLoop:%d)\n", level, *nLoop));
bus_w(nLoopReg, *nLoop);
}
*nLoop = bus_r(nLoopReg);
@ -1091,20 +1126,24 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) {
// set
if (*startAddr >= 0 && *stopAddr >= 0) {
// writing start and stop addr
LOG(logINFO, ("Setting Pattern Loop (level:%d, startaddr:0x%x, stopaddr:0x%x)\n",
LOG(logINFO,
("Setting Pattern Loop (level:%d, startaddr:0x%x, stopaddr:0x%x)\n",
level, *startAddr, *stopAddr));
bus_w(addr, ((*startAddr << startOffset) & startMask) | ((*stopAddr << stopOffset) & stopMask));
bus_w(addr, ((*startAddr << startOffset) & startMask) |
((*stopAddr << stopOffset) & stopMask));
LOG(logDEBUG1, ("Addr:0x%x, val:0x%x\n", addr, bus_r(addr)));
}
// get
else {
*startAddr = ((bus_r(addr) & startMask) >> startOffset);
LOG(logDEBUG1, ("Getting Pattern Loop Start Address (level:%d, Read startAddr:0x%x)\n",
LOG(logDEBUG1, ("Getting Pattern Loop Start Address (level:%d, Read "
"startAddr:0x%x)\n",
level, *startAddr));
*stopAddr = ((bus_r(addr) & stopMask) >> stopOffset);
LOG(logDEBUG1, ("Getting Pattern Loop Stop Address (level:%d, Read stopAddr:0x%x)\n",
LOG(logDEBUG1, ("Getting Pattern Loop Stop Address (level:%d, Read "
"stopAddr:0x%x)\n",
level, *stopAddr));
}
}
@ -1132,24 +1171,31 @@ int checkDetectorType() {
LOG(logINFO, ("Checking type of module\n"));
FILE *fd = fopen(TYPE_FILE_NAME, "r");
if (fd == NULL) {
LOG(logERROR, ("Could not open file %s to get type of the module attached\n", TYPE_FILE_NAME));
LOG(logERROR,
("Could not open file %s to get type of the module attached\n",
TYPE_FILE_NAME));
return -1;
}
char buffer[MAX_STR_LENGTH];
memset(buffer, 0, sizeof(buffer));
fread(buffer, MAX_STR_LENGTH, sizeof(char), fd);
if (strlen(buffer) == 0) {
LOG(logERROR, ("Could not read file %s to get type of the module attached\n", TYPE_FILE_NAME));
LOG(logERROR,
("Could not read file %s to get type of the module attached\n",
TYPE_FILE_NAME));
return -1;
}
int type = atoi(buffer);
if (type > TYPE_NO_MODULE_STARTING_VAL) {
LOG(logERROR, ("No Module attached! Expected %d for Mythen, got %d\n", TYPE_MYTHEN3_MODULE_VAL, type));
LOG(logERROR, ("No Module attached! Expected %d for Mythen, got %d\n",
TYPE_MYTHEN3_MODULE_VAL, type));
return -2;
}
if (abs(type - TYPE_MYTHEN3_MODULE_VAL) > TYPE_TOLERANCE) {
LOG(logERROR, ("Wrong Module attached! Expected %d for Mythen3, got %d\n", TYPE_MYTHEN3_MODULE_VAL, type));
LOG(logERROR,
("Wrong Module attached! Expected %d for Mythen3, got %d\n",
TYPE_MYTHEN3_MODULE_VAL, type));
return FAIL;
}
return OK;
@ -1160,24 +1206,25 @@ int powerChip (int on){
if (on) {
LOG(logINFO, ("Powering chip: on\n"));
bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_PWR_CHIP_MSK);
}
else{
} else {
LOG(logINFO, ("Powering chip: off\n"));
bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_PWR_CHIP_MSK);
}
}
return ((bus_r(CONTROL_REG) & CONTROL_PWR_CHIP_MSK) >> CONTROL_PWR_CHIP_OFST);
return ((bus_r(CONTROL_REG) & CONTROL_PWR_CHIP_MSK) >>
CONTROL_PWR_CHIP_OFST);
}
int setPhase(enum CLKINDEX ind, int val, int degrees) {
if (ind < 0 || ind >= NUM_CLOCKS) {
LOG(logERROR, ("Unknown clock index %d to set phase\n", ind));
return FAIL;
}
char *clock_names[] = {CLK_NAMES};
LOG(logINFOBLUE, ("Setting %s clock (%d) phase to %d %s\n", clock_names[ind], ind, val, degrees == 0 ? "" : "degrees"));
LOG(logINFOBLUE,
("Setting %s clock (%d) phase to %d %s\n", clock_names[ind], ind, val,
degrees == 0 ? "" : "degrees"));
int maxShift = getMaxPhase(ind);
// validation
if (degrees && (val < 0 || val > 359)) {
@ -1185,7 +1232,8 @@ int setPhase(enum CLKINDEX ind, int val, int degrees) {
return FAIL;
}
if (!degrees && (val < 0 || val > maxShift - 1)) {
LOG(logERROR, ("\tPhase outside limits (0 - %d phase shifts)\n", maxShift - 1));
LOG(logERROR,
("\tPhase outside limits (0 - %d phase shifts)\n", maxShift - 1));
return FAIL;
}
@ -1197,7 +1245,8 @@ int setPhase(enum CLKINDEX ind, int val, int degrees) {
LOG(logDEBUG1, ("\tphase shift: %d (degrees/shift: %d)\n", valShift, val));
int relativePhase = valShift - clkPhase[ind];
LOG(logDEBUG1, ("\trelative phase shift: %d (Current phase: %d)\n", relativePhase, clkPhase[ind]));
LOG(logDEBUG1, ("\trelative phase shift: %d (Current phase: %d)\n",
relativePhase, clkPhase[ind]));
// same phase
if (!relativePhase) {
@ -1227,7 +1276,8 @@ int getPhase(enum CLKINDEX ind, int degrees) {
return clkPhase[ind];
// convert back to degrees
int val = 0;
ConvertToDifferentRange(0, getMaxPhase(ind) - 1, 0, 359, clkPhase[ind], &val);
ConvertToDifferentRange(0, getMaxPhase(ind) - 1, 0, 359, clkPhase[ind],
&val);
return val;
}
@ -1248,7 +1298,8 @@ int getMaxPhase(enum CLKINDEX ind) {
int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval) {
if (ind < 0 || ind >= NUM_CLOCKS) {
LOG(logERROR, ("Unknown clock index %d to validate phase in degrees\n", ind));
LOG(logERROR,
("Unknown clock index %d to validate phase in degrees\n", ind));
return FAIL;
}
if (val == -1) {
@ -1267,8 +1318,6 @@ int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval) {
return FAIL;
}
int getFrequency(enum CLKINDEX ind) {
if (ind < 0 || ind >= NUM_CLOCKS) {
LOG(logERROR, ("Unknown clock index %d to get frequency\n", ind));
@ -1286,9 +1335,7 @@ int getVCOFrequency(enum CLKINDEX ind) {
return ALTERA_PLL_C10_GetVCOFrequency(pllIndex);
}
int getMaxClockDivider() {
return ALTERA_PLL_C10_GetMaxClockDivider();
}
int getMaxClockDivider() { return ALTERA_PLL_C10_GetMaxClockDivider(); }
int setClockDivider(enum CLKINDEX ind, int val) {
if (ind < 0 || ind >= NUM_CLOCKS) {
@ -1319,8 +1366,8 @@ int setClockDivider(enum CLKINDEX ind, int val) {
int clkIndex = (int)(ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind);
ALTERA_PLL_C10_SetOuputClockDivider(pllIndex, clkIndex, val);
clkDivider[ind] = val;
LOG(logINFO, ("\t%s clock (%d) divider set to %d\n",
clock_names[ind], ind, clkDivider[ind]));
LOG(logINFO, ("\t%s clock (%d) divider set to %d\n", clock_names[ind], ind,
clkDivider[ind]));
// phase is reset by pll (when setting output frequency)
if (ind >= READOUT_C0) {
@ -1338,7 +1385,8 @@ int setClockDivider(enum CLKINDEX ind, int val) {
for (i = 0; i < NUM_CLOCKS; ++i) {
int currPhaseDeg = getPhase(i, 1);
if (oldPhases[i] != currPhaseDeg) {
LOG(logINFO, ("\tCorrecting %s clock (%d) phase from %d to %d degrees\n",
LOG(logINFO,
("\tCorrecting %s clock (%d) phase from %d to %d degrees\n",
clock_names[i], i, currPhaseDeg, oldPhases[i]));
setPhase(i, oldPhases[i], 1);
}
@ -1396,9 +1444,6 @@ int startStateMachine(){
return OK;
}
#ifdef VIRTUAL
void *start_timer(void *arg) {
if (!isControlServer) {
@ -1406,8 +1451,7 @@ void* start_timer(void* arg) {
}
int64_t periodNs = getPeriod();
int numFrames = (getNumFrames() *
getNumTriggers() );
int numFrames = (getNumFrames() * getNumTriggers());
int64_t expUs = getExpTime() / 1000;
// int dr = setDynamicRange(-1);
@ -1438,7 +1482,6 @@ void* start_timer(void* arg) {
break;
}
// sleep for exposure time
struct timespec begin, end;
clock_gettime(CLOCK_REALTIME, &begin);
@ -1453,7 +1496,8 @@ void* start_timer(void* arg) {
memset(packetData, 0, packetSize);
// set header
sls_detector_header* header = (sls_detector_header*) (packetData);
sls_detector_header *header =
(sls_detector_header *)(packetData);
header->detType = (uint16_t)myDetectorType;
header->version = SLS_DETECTOR_HEADER_VERSION - 1;
header->frameNumber = frameNr + 1;
@ -1495,7 +1539,6 @@ void* start_timer(void* arg) {
}
#endif
int stopStateMachine() {
LOG(logINFORED, ("Stopping State Machine\n"));
#ifdef VIRTUAL
@ -1591,7 +1634,8 @@ void readFrame(int *ret, char *mess) {
int64_t retval = getNumFramesLeft() + 1;
if (retval > 0) {
LOG(logERROR, ("No data and run stopped: %lld frames left\n",(long long int)retval));
LOG(logERROR, ("No data and run stopped: %lld frames left\n",
(long long int)retval));
} else {
LOG(logINFOGREEN, ("Acquisition successfully finished\n"));
}
@ -1623,7 +1667,9 @@ int calculateDataBytes() {
return databytes;
}
int getTotalNumberOfChannels() {return (getNumberOfChannelsPerChip() * getNumberOfChips());}
int getTotalNumberOfChannels() {
return (getNumberOfChannelsPerChip() * getNumberOfChips());
}
int getNumberOfChips() { return NCHIP; }
int getNumberOfDACs() { return NDAC; }
int getNumberOfChannelsPerChip() { return NCHAN; }

128
slsDetectorServers/slsDetectorServer/src/AD7689.c Executable file → Normal file
View File

@ -1,9 +1,8 @@
#include "AD7689.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "common.h"
#include "blackfin.h"
#include "clogger.h"
#include "common.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
/* AD7689 ADC DEFINES */
@ -14,31 +13,45 @@
/** Channel sequencer */
#define AD7689_CFG_SEQ_OFST (1)
#define AD7689_CFG_SEQ_MSK (0x00000003 << AD7689_CFG_SEQ_OFST)
#define AD7689_CFG_SEQ_DSBLE_VAL ((0x0 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
#define AD7689_CFG_SEQ_UPDTE_DRNG_SQNCE_VAL ((0x1 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
#define AD7689_CFG_SEQ_SCN_WTH_TMP_VAL ((0x2 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
#define AD7689_CFG_SEQ_SCN_WTHT_TMP_VAL ((0x3 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
#define AD7689_CFG_SEQ_DSBLE_VAL \
((0x0 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
#define AD7689_CFG_SEQ_UPDTE_DRNG_SQNCE_VAL \
((0x1 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
#define AD7689_CFG_SEQ_SCN_WTH_TMP_VAL \
((0x2 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
#define AD7689_CFG_SEQ_SCN_WTHT_TMP_VAL \
((0x3 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
/** Reference/ buffer selection */
#define AD7689_CFG_REF_OFST (3)
#define AD7689_CFG_REF_MSK (0x00000007 << AD7689_CFG_REF_OFST)
/** Internal reference. REF = 2.5V buffered output. Temperature sensor enabled. */
#define AD7689_CFG_REF_INT_2500MV_VAL ((0x0 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_OFST)
/** Internal reference. REF = 4.096V buffered output. Temperature sensor enabled. */
#define AD7689_CFG_REF_INT_4096MV_VAL ((0x1 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
/** Internal reference. REF = 2.5V buffered output. Temperature sensor enabled.
*/
#define AD7689_CFG_REF_INT_2500MV_VAL \
((0x0 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_OFST)
/** Internal reference. REF = 4.096V buffered output. Temperature sensor
* enabled. */
#define AD7689_CFG_REF_INT_4096MV_VAL \
((0x1 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
/** External reference. Temperature sensor enabled. Internal buffer disabled. */
#define AD7689_CFG_REF_EXT_TMP_VAL ((0x2 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
#define AD7689_CFG_REF_EXT_TMP_VAL \
((0x2 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
/** External reference. Temperature sensor enabled. Internal buffer enabled. */
#define AD7689_CFG_REF_EXT_TMP_INTBUF_VAL ((0x3 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
/** External reference. Temperature sensor disabled. Internal buffer disabled. */
#define AD7689_CFG_REF_EXT_VAL ((0x6 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
#define AD7689_CFG_REF_EXT_TMP_INTBUF_VAL \
((0x3 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
/** External reference. Temperature sensor disabled. Internal buffer disabled.
*/
#define AD7689_CFG_REF_EXT_VAL \
((0x6 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
/** External reference. Temperature sensor disabled. Internal buffer enabled. */
#define AD7689_CFG_REF_EXT_INTBUF_VAL ((0x7 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
#define AD7689_CFG_REF_EXT_INTBUF_VAL \
((0x7 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
/** bandwidth of low pass filter */
#define AD7689_CFG_BW_OFST (6)
#define AD7689_CFG_BW_MSK (0x00000001 << AD7689_CFG_REF_OFST)
#define AD7689_CFG_BW_ONE_FOURTH_VAL ((0x0 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK)
#define AD7689_CFG_BW_ONE_FOURTH_VAL \
((0x0 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK)
#define AD7689_CFG_BW_FULL_VAL ((0x1 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK)
/** input channel selection IN0 - IN7 */
@ -48,25 +61,34 @@
/** input channel configuration */
#define AD7689_CFG_INCC_OFST (10)
#define AD7689_CFG_INCC_MSK (0x00000007 << AD7689_CFG_INCC_OFST)
#define AD7689_CFG_INCC_BPLR_DFFRNTL_PRS_VAL ((0x0 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_BPLR_IN_COM_VAL ((0x2 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_TMP_VAL ((0x3 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_UNPLR_DFFRNTL_PRS_VAL ((0x4 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_UNPLR_IN_COM_VAL ((0x6 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_UNPLR_IN_GND_VAL ((0x7 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_BPLR_DFFRNTL_PRS_VAL \
((0x0 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_BPLR_IN_COM_VAL \
((0x2 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_TMP_VAL \
((0x3 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_UNPLR_DFFRNTL_PRS_VAL \
((0x4 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_UNPLR_IN_COM_VAL \
((0x6 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_UNPLR_IN_GND_VAL \
((0x7 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
/** configuration update */
#define AD7689_CFG_CFG_OFST (13)
#define AD7689_CFG_CFG_MSK (0x00000001 << AD7689_CFG_CFG_OFST)
#define AD7689_CFG_CFG_NO_UPDATE_VAL ((0x0 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK)
#define AD7689_CFG_CFG_OVRWRTE_VAL ((0x1 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK)
#define AD7689_CFG_CFG_NO_UPDATE_VAL \
((0x0 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK)
#define AD7689_CFG_CFG_OVRWRTE_VAL \
((0x1 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK)
#define AD7689_ADC_CFG_NUMBITS (14)
#define AD7689_ADC_DATA_NUMBITS (16)
#define AD7689_NUM_CHANNELS (8)
#define AD7689_NUM_INVALID_CONVERSIONS (3)
#define AD7689_INT_REF_MAX_MV (2500) // chosen using reference buffer selection in config reg
#define AD7689_INT_REF_MAX_MV \
(2500) // chosen using reference buffer selection in config reg
#define AD7689_INT_REF_MIN_MV (0)
#define AD7689_INT_REF_MAX_UV (2500 * 1000)
#define AD7689_INT_REF_MIN_UV (0)
@ -81,8 +103,10 @@ uint32_t AD7689_ClkMask = 0x0;
uint32_t AD7689_DigMask = 0x0;
int AD7689_DigOffset = 0x0;
void AD7689_SetDefines(uint32_t reg, uint32_t roreg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst) {
LOG(logDEBUG, ("AD7689: reg:0x%x roreg:0x%x cmsk:0x%x clkmsk:0x%x dmsk:0x%x dofst:%d\n",
void AD7689_SetDefines(uint32_t reg, uint32_t roreg, uint32_t cmsk,
uint32_t clkmsk, uint32_t dmsk, int dofst) {
LOG(logDEBUG, ("AD7689: reg:0x%x roreg:0x%x cmsk:0x%x clkmsk:0x%x "
"dmsk:0x%x dofst:%d\n",
reg, roreg, cmsk, clkmsk, dmsk, dofst));
AD7689_Reg = reg;
AD7689_ROReg = roreg;
@ -93,22 +117,22 @@ void AD7689_SetDefines(uint32_t reg, uint32_t roreg, uint32_t cmsk, uint32_t clk
}
void AD7689_Disable() {
bus_w(AD7689_Reg, (bus_r(AD7689_Reg)
&~(AD7689_CnvMask)
&~AD7689_ClkMask
&~(AD7689_DigMask)));
bus_w(AD7689_Reg, (bus_r(AD7689_Reg) & ~(AD7689_CnvMask) & ~AD7689_ClkMask &
~(AD7689_DigMask)));
}
void AD7689_Set(uint32_t codata) {
LOG(logINFO, ("\tSetting ADC SPI Register. Writing 0x%08x to Config Reg\n", codata));
LOG(logINFO,
("\tSetting ADC SPI Register. Writing 0x%08x to Config Reg\n", codata));
serializeToSPI(AD7689_Reg, codata, AD7689_CnvMask, AD7689_ADC_CFG_NUMBITS,
AD7689_ClkMask, AD7689_DigMask, AD7689_DigOffset, 1);
}
uint16_t AD7689_Get() {
LOG(logINFO, ("\tGetting ADC SPI Register.\n"));
return (uint16_t)serializeFromSPI(AD7689_Reg, AD7689_CnvMask, AD7689_ADC_DATA_NUMBITS,
AD7689_ClkMask, AD7689_DigMask, AD7689_ROReg, 1);
return (uint16_t)serializeFromSPI(AD7689_Reg, AD7689_CnvMask,
AD7689_ADC_DATA_NUMBITS, AD7689_ClkMask,
AD7689_DigMask, AD7689_ROReg, 1);
}
int AD7689_GetTemperature() {
@ -117,7 +141,8 @@ int AD7689_GetTemperature() {
AD7689_CFG_RB_MSK |
// disable sequencer (different from config)
AD7689_CFG_SEQ_DSBLE_VAL |
// Internal reference. REF = 2.5V buffered output. Temperature sensor enabled.
// Internal reference. REF = 2.5V buffered output. Temperature sensor
// enabled.
AD7689_CFG_REF_INT_2500MV_VAL |
// full bandwidth of low pass filter
AD7689_CFG_BW_FULL_VAL |
@ -130,11 +155,11 @@ int AD7689_GetTemperature() {
int regval = AD7689_Get();
// value in mV FIXME: page 17? reference voltage temperature coefficient or t do with -40 to 85 °C
// value in mV FIXME: page 17? reference voltage temperature coefficient or
// t do with -40 to 85 °C
int retval = 0;
ConvertToDifferentRange(0, AD7689_INT_MAX_STEPS,
AD7689_INT_REF_MIN_MV, AD7689_INT_REF_MAX_MV,
regval, &retval);
ConvertToDifferentRange(0, AD7689_INT_MAX_STEPS, AD7689_INT_REF_MIN_MV,
AD7689_INT_REF_MAX_MV, regval, &retval);
LOG(logDEBUG1, ("voltage read for temp: %d mV\n", retval));
// value in °C
@ -142,14 +167,14 @@ int AD7689_GetTemperature() {
LOG(logINFO, ("\ttemp read : %f °C (%d unit)\n", tempValue, regval));
return tempValue;
}
int AD7689_GetChannel(int ichan) {
// filter channels val
if (ichan < 0 || ichan >= AD7689_NUM_CHANNELS) {
LOG(logERROR, ("Cannot get slow adc channel. "
"%d out of bounds (0 to %d)\n", ichan, AD7689_NUM_CHANNELS - 1));
"%d out of bounds (0 to %d)\n",
ichan, AD7689_NUM_CHANNELS - 1));
return -1;
}
@ -158,7 +183,8 @@ int AD7689_GetChannel(int ichan) {
AD7689_CFG_RB_MSK |
// disable sequencer (different from config)
AD7689_CFG_SEQ_DSBLE_VAL |
// Internal reference. REF = 2.5V buffered output. Temperature sensor enabled.
// Internal reference. REF = 2.5V buffered output. Temperature sensor
// enabled.
AD7689_CFG_REF_INT_2500MV_VAL |
// full bandwidth of low pass filter
AD7689_CFG_BW_FULL_VAL |
@ -172,14 +198,17 @@ int AD7689_GetChannel(int ichan) {
int regval = AD7689_Get();
// value in uV
int retval = ((double)(regval - 0) * (double)(AD7689_INT_REF_MAX_UV - AD7689_INT_REF_MIN_UV))
/ (double)(AD7689_INT_MAX_STEPS - 0) + AD7689_INT_REF_MIN_UV;
int retval = ((double)(regval - 0) *
(double)(AD7689_INT_REF_MAX_UV - AD7689_INT_REF_MIN_UV)) /
(double)(AD7689_INT_MAX_STEPS - 0) +
AD7689_INT_REF_MIN_UV;
/*ConvertToDifferentRange(0, AD7689_INT_MAX_STEPS,
AD7689_INT_REF_MIN_MV, AD7689_INT_REF_MAX_MV,
regval, &retval);*/
LOG(logINFO, ("\tvoltage read for chan %d: %d uV (regVal: %d)\n", ichan, retval, regval));
LOG(logINFO, ("\tvoltage read for chan %d: %d uV (regVal: %d)\n", ichan,
retval, regval));
return retval;
}
@ -187,7 +216,9 @@ void AD7689_Configure(){
LOG(logINFOBLUE, ("Configuring AD7689 (Slow ADCs): \n"));
// from power up, 3 invalid conversions
LOG(logINFO, ("\tConfiguring %d x due to invalid conversions from power up\n", AD7689_NUM_INVALID_CONVERSIONS));
LOG(logINFO,
("\tConfiguring %d x due to invalid conversions from power up\n",
AD7689_NUM_INVALID_CONVERSIONS));
int i = 0;
for (i = 0; i < AD7689_NUM_INVALID_CONVERSIONS; ++i) {
AD7689_Set(
@ -195,7 +226,8 @@ void AD7689_Configure(){
AD7689_CFG_RB_MSK |
// scan sequence IN0-IN7 then temperature sensor
AD7689_CFG_SEQ_SCN_WTH_TMP_VAL |
// Internal reference. REF = 2.5V buffered output. Temperature sensor enabled.
// Internal reference. REF = 2.5V buffered output. Temperature
// sensor enabled.
AD7689_CFG_REF_INT_2500MV_VAL |
// full bandwidth of low pass filter
AD7689_CFG_BW_FULL_VAL |

126
slsDetectorServers/slsDetectorServer/src/AD9252.c Executable file → Normal file
View File

@ -1,7 +1,7 @@
#include "AD9252.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "blackfin.h"
#include "clogger.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
/* AD9252 ADC DEFINES */
#define AD9252_ADC_NUMBITS (24)
@ -36,67 +36,99 @@
#define AD9252_POWER_MODE_REG (0x08)
#define AD9252_POWER_INTERNAL_OFST (0)
#define AD9252_POWER_INTERNAL_MSK (0x00000007 << AD9252_POWER_INTERNAL_OFST)
#define AD9252_INT_CHIP_RUN_VAL ((0x0 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
#define AD9252_INT_FULL_PWR_DWN_VAL ((0x1 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
#define AD9252_INT_STANDBY_VAL ((0x2 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
#define AD9252_INT_RESET_VAL ((0x3 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
#define AD9252_INT_CHIP_RUN_VAL \
((0x0 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
#define AD9252_INT_FULL_PWR_DWN_VAL \
((0x1 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
#define AD9252_INT_STANDBY_VAL \
((0x2 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
#define AD9252_INT_RESET_VAL \
((0x3 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
// default value is 0x0
#define AD9252_TEST_MODE_REG (0x0D)
#define AD9252_OUT_TEST_OFST (0)
#define AD9252_OUT_TEST_MSK (0x0000000F << AD9252_OUT_TEST_OFST)
#define AD9252_TST_OFF_VAL ((0x0 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_MDSCL_SHRT_VAL ((0x1 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_PSTV_FS_VAL ((0x2 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_NGTV_FS_VAL ((0x3 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_ALTRNTNG_CHKRBRD_VAL ((0x4 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_PN_23_SQNC_VAL ((0x5 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_PN_9_SQNC__VAL ((0x6 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_1_0_WRD_TGGL_VAL ((0x7 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_USR_INPT_VAL ((0x8 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_1_0_BT_TGGL_VAL ((0x9 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_1_x_SYNC_VAL ((0xa << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_1_BIT_HGH_VAL ((0xb << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_MXD_BT_FRQ_VAL ((0xc << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_MDSCL_SHRT_VAL \
((0x1 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_PSTV_FS_VAL \
((0x2 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_NGTV_FS_VAL \
((0x3 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_ALTRNTNG_CHKRBRD_VAL \
((0x4 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_PN_23_SQNC_VAL \
((0x5 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_PN_9_SQNC__VAL \
((0x6 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_1_0_WRD_TGGL_VAL \
((0x7 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_USR_INPT_VAL \
((0x8 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_1_0_BT_TGGL_VAL \
((0x9 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_1_x_SYNC_VAL \
((0xa << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_1_BIT_HGH_VAL \
((0xb << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_MXD_BT_FRQ_VAL \
((0xc << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_RST_SHRT_GN_OFST (4)
#define AD9252_TST_RST_SHRT_GN_MSK (0x00000001 << AD9252_TST_RST_SHRT_GN_OFST)
#define AD9252_TST_RST_LNG_GN_OFST (5)
#define AD9252_TST_RST_LNG_GN_MSK (0x00000001 << AD9252_TST_RST_LNG_GN_OFST)
#define AD9252_USER_IN_MODE_OFST (6)
#define AD9252_USER_IN_MODE_MSK (0x00000003 << AD9252_USER_IN_MODE_OFST)
#define AD9252_USR_IN_SNGL_VAL ((0x0 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
#define AD9252_USR_IN_ALTRNT_VAL ((0x1 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
#define AD9252_USR_IN_SNGL_ONC_VAL ((0x2 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
#define AD9252_USR_IN_ALTRNT_ONC_VAL ((0x3 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
#define AD9252_USR_IN_SNGL_VAL \
((0x0 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
#define AD9252_USR_IN_ALTRNT_VAL \
((0x1 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
#define AD9252_USR_IN_SNGL_ONC_VAL \
((0x2 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
#define AD9252_USR_IN_ALTRNT_ONC_VAL \
((0x3 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
// default value is 0x00
#define AD9252_OUT_MODE_REG (0x14)
#define AD9252_OUT_FORMAT_OFST (0)
#define AD9252_OUT_FORMAT_MSK (0x00000003 << AD9252_OUT_FORMAT_OFST)
#define AD9252_OUT_BINARY_OFST_VAL ((0x0 << AD9252_OUT_FORMAT_OFST) & AD9252_OUT_FORMAT_MSK)
#define AD9252_OUT_TWOS_COMPL_VAL ((0x1 << AD9252_OUT_FORMAT_OFST) & AD9252_OUT_FORMAT_MSK)
#define AD9252_OUT_BINARY_OFST_VAL \
((0x0 << AD9252_OUT_FORMAT_OFST) & AD9252_OUT_FORMAT_MSK)
#define AD9252_OUT_TWOS_COMPL_VAL \
((0x1 << AD9252_OUT_FORMAT_OFST) & AD9252_OUT_FORMAT_MSK)
#define AD9252_OUT_OTPT_INVRT_OFST (2)
#define AD9252_OUT_OTPT_INVRT_MSK (0x00000001 << AD9252_OUT_OTPT_INVRT_OFST)
#define AD9252_OUT_LVDS_OPT_OFST (6)
#define AD9252_OUT_LVDS_OPT_MSK (0x00000001 << AD9252_OUT_LVDS_OPT_OFST)
#define AD9252_OUT_LVDS_ANSI_VAL ((0x0 << AD9252_OUT_LVDS_OPT_OFST) & AD9252_OUT_LVDS_OPT_MSK)
#define AD9252_OUT_LVDS_IEEE_VAL ((0x1 << AD9252_OUT_LVDS_OPT_OFST) & AD9252_OUT_LVDS_OPT_MSK)
#define AD9252_OUT_LVDS_ANSI_VAL \
((0x0 << AD9252_OUT_LVDS_OPT_OFST) & AD9252_OUT_LVDS_OPT_MSK)
#define AD9252_OUT_LVDS_IEEE_VAL \
((0x1 << AD9252_OUT_LVDS_OPT_OFST) & AD9252_OUT_LVDS_OPT_MSK)
// default value is 0x3
#define AD9252_OUT_PHASE_REG (0x16)
#define AD9252_OUT_CLK_OFST (0)
#define AD9252_OUT_CLK_MSK (0x0000000F << AD9252_OUT_CLK_OFST)
#define AD9252_OUT_CLK_0_VAL ((0x0 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_60_VAL ((0x1 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_120_VAL ((0x2 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_180_VAL ((0x3 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_300_VAL ((0x5 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_360_VAL ((0x6 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_480_VAL ((0x8 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_540_VAL ((0x9 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_600_VAL ((0xa << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_660_VAL ((0xb << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) // 0xb - 0xf is 660
#define AD9252_OUT_CLK_60_VAL \
((0x1 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_120_VAL \
((0x2 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_180_VAL \
((0x3 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_300_VAL \
((0x5 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_360_VAL \
((0x6 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_480_VAL \
((0x8 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_540_VAL \
((0x9 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_600_VAL \
((0xa << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_660_VAL \
((0xb << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) // 0xb - 0xf is 660
// defines from the fpga
uint32_t AD9252_Reg = 0x0;
@ -105,7 +137,8 @@ uint32_t AD9252_ClkMask = 0x0;
uint32_t AD9252_DigMask = 0x0;
int AD9252_DigOffset = 0x0;
void AD9252_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst) {
void AD9252_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk,
uint32_t dmsk, int dofst) {
AD9252_Reg = reg;
AD9252_CsMask = cmsk;
AD9252_ClkMask = clkmsk;
@ -114,17 +147,16 @@ void AD9252_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dm
}
void AD9252_Disable() {
bus_w(AD9252_Reg, (bus_r(AD9252_Reg)
| AD9252_CsMask
| AD9252_ClkMask)
&~(AD9252_DigMask));
bus_w(AD9252_Reg, (bus_r(AD9252_Reg) | AD9252_CsMask | AD9252_ClkMask) &
~(AD9252_DigMask));
}
void AD9252_Set(int addr, int val) {
u_int32_t codata;
codata = val + (addr << 8);
LOG(logINFO, ("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr));
LOG(logINFO,
("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr));
serializeToSPI(AD9252_Reg, codata, AD9252_CsMask, AD9252_ADC_NUMBITS,
AD9252_ClkMask, AD9252_DigMask, AD9252_DigOffset, 0);
}
@ -158,11 +190,12 @@ void AD9252_Configure(){
// all devices on chip to receive next command
LOG(logINFO, ("\tAll devices on chip to receive next command\n"));
AD9252_Set(AD9252_DEV_IND_2_REG,
AD9252_CHAN_H_MSK | AD9252_CHAN_G_MSK | AD9252_CHAN_F_MSK | AD9252_CHAN_E_MSK);
AD9252_Set(AD9252_DEV_IND_1_REG,
AD9252_CHAN_D_MSK | AD9252_CHAN_C_MSK | AD9252_CHAN_B_MSK | AD9252_CHAN_A_MSK |
AD9252_CLK_CH_DCO_MSK | AD9252_CLK_CH_IFCO_MSK);
AD9252_Set(AD9252_DEV_IND_2_REG, AD9252_CHAN_H_MSK | AD9252_CHAN_G_MSK |
AD9252_CHAN_F_MSK | AD9252_CHAN_E_MSK);
AD9252_Set(AD9252_DEV_IND_1_REG, AD9252_CHAN_D_MSK | AD9252_CHAN_C_MSK |
AD9252_CHAN_B_MSK | AD9252_CHAN_A_MSK |
AD9252_CLK_CH_DCO_MSK |
AD9252_CLK_CH_IFCO_MSK);
// no test mode
LOG(logINFO, ("\tNo test mode\n"));
@ -175,4 +208,3 @@ void AD9252_Configure(){
AD9252_Set(AD9252_TEST_MODE_REG, AD9252_TST_MXD_BT_FRQ_VAL);
#endif
}

139
slsDetectorServers/slsDetectorServer/src/AD9257.c Executable file → Normal file
View File

@ -1,7 +1,7 @@
#include "AD9257.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "blackfin.h"
#include "clogger.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "sls_detector_defs.h"
/* AD9257 ADC DEFINES */
@ -37,72 +37,109 @@
#define AD9257_POWER_MODE_REG (0x08)
#define AD9257_POWER_INTERNAL_OFST (0)
#define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST)
#define AD9257_INT_CHIP_RUN_VAL ((0x0 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
#define AD9257_INT_FULL_PWR_DWN_VAL ((0x1 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
#define AD9257_INT_STANDBY_VAL ((0x2 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
#define AD9257_INT_RESET_VAL ((0x3 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
#define AD9257_INT_CHIP_RUN_VAL \
((0x0 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
#define AD9257_INT_FULL_PWR_DWN_VAL \
((0x1 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
#define AD9257_INT_STANDBY_VAL \
((0x2 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
#define AD9257_INT_RESET_VAL \
((0x3 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
#define AD9257_POWER_EXTERNAL_OFST (5)
#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST)
#define AD9257_EXT_FULL_POWER_VAL ((0x0 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK)
#define AD9257_EXT_STANDBY_VAL ((0x1 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK)
#define AD9257_EXT_FULL_POWER_VAL \
((0x0 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK)
#define AD9257_EXT_STANDBY_VAL \
((0x1 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK)
// default value is 0x0
#define AD9257_TEST_MODE_REG (0x0D)
#define AD9257_OUT_TEST_OFST (0)
#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST)
#define AD9257_TST_OFF_VAL ((0x0 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_MDSCL_SHRT_VAL ((0x1 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_PSTV_FS_VAL ((0x2 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_NGTV_FS_VAL ((0x3 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_ALTRNTNG_CHKRBRD_VAL ((0x4 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_PN_23_SQNC_VAL ((0x5 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_PN_9_SQNC__VAL ((0x6 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_1_0_WRD_TGGL_VAL ((0x7 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_USR_INPT_VAL ((0x8 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_1_0_BT_TGGL_VAL ((0x9 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_1_x_SYNC_VAL ((0xa << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_1_BIT_HGH_VAL ((0xb << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_MXD_BT_FRQ_VAL ((0xc << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_MDSCL_SHRT_VAL \
((0x1 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_PSTV_FS_VAL \
((0x2 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_NGTV_FS_VAL \
((0x3 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_ALTRNTNG_CHKRBRD_VAL \
((0x4 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_PN_23_SQNC_VAL \
((0x5 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_PN_9_SQNC__VAL \
((0x6 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_1_0_WRD_TGGL_VAL \
((0x7 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_USR_INPT_VAL \
((0x8 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_1_0_BT_TGGL_VAL \
((0x9 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_1_x_SYNC_VAL \
((0xa << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_1_BIT_HGH_VAL \
((0xb << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_MXD_BT_FRQ_VAL \
((0xc << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_RST_SHRT_GN_OFST (4)
#define AD9257_TST_RST_SHRT_GN_MSK (0x00000001 << AD9257_TST_RST_SHRT_GN_OFST)
#define AD9257_TST_RST_LNG_GN_OFST (5)
#define AD9257_TST_RST_LNG_GN_MSK (0x00000001 << AD9257_TST_RST_LNG_GN_OFST)
#define AD9257_USER_IN_MODE_OFST (6)
#define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST)
#define AD9257_USR_IN_SNGL_VAL ((0x0 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
#define AD9257_USR_IN_ALTRNT_VAL ((0x1 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
#define AD9257_USR_IN_SNGL_ONC_VAL ((0x2 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
#define AD9257_USR_IN_ALTRNT_ONC_VAL ((0x3 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
#define AD9257_USR_IN_SNGL_VAL \
((0x0 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
#define AD9257_USR_IN_ALTRNT_VAL \
((0x1 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
#define AD9257_USR_IN_SNGL_ONC_VAL \
((0x2 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
#define AD9257_USR_IN_ALTRNT_ONC_VAL \
((0x3 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
// default value is 0x01
#define AD9257_OUT_MODE_REG (0x14)
#define AD9257_OUT_FORMAT_OFST (0)
#define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST)
#define AD9257_OUT_BINARY_OFST_VAL ((0x0 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK)
#define AD9257_OUT_TWOS_COMPL_VAL ((0x1 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK)
#define AD9257_OUT_BINARY_OFST_VAL \
((0x0 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK)
#define AD9257_OUT_TWOS_COMPL_VAL \
((0x1 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK)
#define AD9257_OUT_OTPT_INVRT_OFST (2)
#define AD9257_OUT_OTPT_INVRT_MSK (0x00000001 << AD9257_OUT_OTPT_INVRT_OFST)
#define AD9257_OUT_LVDS_OPT_OFST (6)
#define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST)
#define AD9257_OUT_LVDS_ANSI_VAL ((0x0 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK)
#define AD9257_OUT_LVDS_IEEE_VAL ((0x1 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK)
#define AD9257_OUT_LVDS_ANSI_VAL \
((0x0 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK)
#define AD9257_OUT_LVDS_IEEE_VAL \
((0x1 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK)
// default value is 0x3
#define AD9257_OUT_PHASE_REG (0x16)
#define AD9257_OUT_CLK_OFST (0)
#define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST)
#define AD9257_OUT_CLK_0_VAL ((0x0 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_60_VAL ((0x1 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_120_VAL ((0x2 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_180_VAL ((0x3 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_240_VAL ((0x4 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_300_VAL ((0x5 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_360_VAL ((0x6 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_420_VAL ((0x7 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_480_VAL ((0x8 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_540_VAL ((0x9 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_600_VAL ((0xa << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_660_VAL ((0xb << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_60_VAL \
((0x1 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_120_VAL \
((0x2 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_180_VAL \
((0x3 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_240_VAL \
((0x4 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_300_VAL \
((0x5 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_360_VAL \
((0x6 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_420_VAL \
((0x7 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_480_VAL \
((0x8 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_540_VAL \
((0x9 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_600_VAL \
((0xa << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_660_VAL \
((0xb << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_IN_CLK_OFST (4)
#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST)
#define AD9257_IN_CLK_0_VAL ((0x0 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
@ -133,7 +170,8 @@ uint32_t AD9257_DigMask = 0x0;
int AD9257_DigOffset = 0x0;
int AD9257_VrefVoltage = 0;
void AD9257_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst) {
void AD9257_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk,
uint32_t dmsk, int dofst) {
AD9257_Reg = reg;
AD9257_CsMask = cmsk;
AD9257_ClkMask = clkmsk;
@ -142,10 +180,8 @@ void AD9257_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dm
}
void AD9257_Disable() {
bus_w(AD9257_Reg, (bus_r(AD9257_Reg)
| AD9257_CsMask
| AD9257_ClkMask)
& ~(AD9257_DigMask));
bus_w(AD9257_Reg, (bus_r(AD9257_Reg) | AD9257_CsMask | AD9257_ClkMask) &
~(AD9257_DigMask));
}
int AD9257_GetVrefVoltage(int mV) {
@ -225,7 +261,8 @@ void AD9257_Set(int addr, int val) {
u_int32_t codata;
codata = val + (addr << 8);
LOG(logINFO, ("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr));
LOG(logINFO,
("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr));
serializeToSPI(AD9257_Reg, codata, AD9257_CsMask, AD9257_ADC_NUMBITS,
AD9257_ClkMask, AD9257_DigMask, AD9257_DigOffset, 0);
}
@ -243,7 +280,8 @@ void AD9257_Configure(){
// binary offset, lvds-iee reduced
LOG(logINFO, ("\tBinary offset, Lvds-ieee reduced\n"));
AD9257_Set(AD9257_OUT_MODE_REG, AD9257_OUT_BINARY_OFST_VAL | AD9257_OUT_LVDS_IEEE_VAL);
AD9257_Set(AD9257_OUT_MODE_REG,
AD9257_OUT_BINARY_OFST_VAL | AD9257_OUT_LVDS_IEEE_VAL);
// output clock phase
LOG(logINFO, ("\tOutput clock phase: 180\n"));
@ -251,12 +289,13 @@ void AD9257_Configure(){
// all devices on chip to receive next command
LOG(logINFO, ("\tAll devices on chip to receive next command\n"));
AD9257_Set(AD9257_DEV_IND_2_REG,
AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK | AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK);
AD9257_Set(AD9257_DEV_IND_2_REG, AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK |
AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK);
AD9257_Set(AD9257_DEV_IND_1_REG,
AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK |
AD9257_CLK_CH_DCO_MSK | AD9257_CLK_CH_IFCO_MSK);
AD9257_Set(AD9257_DEV_IND_1_REG, AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK |
AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK |
AD9257_CLK_CH_DCO_MSK |
AD9257_CLK_CH_IFCO_MSK);
// vref
#ifdef GOTTHARDD

208
slsDetectorServers/slsDetectorServer/src/ALTERA_PLL.c Executable file → Normal file
View File

@ -1,6 +1,6 @@
#include "ALTERA_PLL.h"
#include "clogger.h"
#include "blackfin.h"
#include "clogger.h"
#include <unistd.h> // usleep
@ -20,49 +20,97 @@
#define ALTERA_PLL_C_COUNTER_REG (0x05)
#define ALTERA_PLL_C_COUNTER_LW_CNT_OFST (0)
#define ALTERA_PLL_C_COUNTER_LW_CNT_MSK (0x000000FF << ALTERA_PLL_C_COUNTER_LW_CNT_OFST)
#define ALTERA_PLL_C_COUNTER_LW_CNT_MSK \
(0x000000FF << ALTERA_PLL_C_COUNTER_LW_CNT_OFST)
#define ALTERA_PLL_C_COUNTER_HGH_CNT_OFST (8)
#define ALTERA_PLL_C_COUNTER_HGH_CNT_MSK (0x000000FF << ALTERA_PLL_C_COUNTER_HGH_CNT_OFST)
#define ALTERA_PLL_C_COUNTER_HGH_CNT_MSK \
(0x000000FF << ALTERA_PLL_C_COUNTER_HGH_CNT_OFST)
/* total_div = lw_cnt + hgh_cnt */
#define ALTERA_PLL_C_COUNTER_BYPSS_ENBL_OFST (16)
#define ALTERA_PLL_C_COUNTER_BYPSS_ENBL_MSK (0x00000001 << ALTERA_PLL_C_COUNTER_BYPSS_ENBL_OFST)
/* if bypss_enbl = 0, fout = f(vco)/total_div; else fout = f(vco) (c counter is bypassed) */
#define ALTERA_PLL_C_COUNTER_BYPSS_ENBL_MSK \
(0x00000001 << ALTERA_PLL_C_COUNTER_BYPSS_ENBL_OFST)
/* if bypss_enbl = 0, fout = f(vco)/total_div; else fout = f(vco) (c counter is
* bypassed) */
#define ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST (17)
#define ALTERA_PLL_C_COUNTER_ODD_DVSN_MSK (0x00000001 << ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST)
/** if odd_dvsn = 0 (even), duty cycle = hgh_cnt/ total_div; else duty cycle = (hgh_cnt - 0.5) / total_div */
#define ALTERA_PLL_C_COUNTER_ODD_DVSN_MSK \
(0x00000001 << ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST)
/** if odd_dvsn = 0 (even), duty cycle = hgh_cnt/ total_div; else duty cycle =
* (hgh_cnt - 0.5) / total_div */
#define ALTERA_PLL_C_COUNTER_SLCT_OFST (18)
#define ALTERA_PLL_C_COUNTER_SLCT_MSK (0x0000001F << ALTERA_PLL_C_COUNTER_SLCT_OFST)
#define ALTERA_PLL_C_COUNTER_SLCT_MSK \
(0x0000001F << ALTERA_PLL_C_COUNTER_SLCT_OFST)
#define ALTERA_PLL_PHASE_SHIFT_REG (0x06)
#define ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST (0)
#define ALTERA_PLL_SHIFT_NUM_SHIFTS_MSK (0x0000FFFF << ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST)
#define ALTERA_PLL_SHIFT_NUM_SHIFTS_MSK \
(0x0000FFFF << ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST)
#define ALTERA_PLL_SHIFT_CNT_SELECT_OFST (16)
#define ALTERA_PLL_SHIFT_CNT_SELECT_MSK (0x0000001F << ALTERA_PLL_SHIFT_CNT_SELECT_OFST)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C0_VAL ((0x0 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C1_VAL ((0x1 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C2_VAL ((0x2 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C3_VAL ((0x3 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C4_VAL ((0x4 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C5_VAL ((0x5 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C6_VAL ((0x6 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C7_VAL ((0x7 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C8_VAL ((0x8 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C9_VAL ((0x9 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C10_VAL ((0x10 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C11_VAL ((0x11 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C12_VAL ((0x12 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C13_VAL ((0x13 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C14_VAL ((0x14 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C15_VAL ((0x15 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C16_VAL ((0x16 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C17_VAL ((0x17 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SELECT_MSK \
(0x0000001F << ALTERA_PLL_SHIFT_CNT_SELECT_OFST)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C0_VAL \
((0x0 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C1_VAL \
((0x1 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C2_VAL \
((0x2 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C3_VAL \
((0x3 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C4_VAL \
((0x4 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C5_VAL \
((0x5 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C6_VAL \
((0x6 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C7_VAL \
((0x7 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C8_VAL \
((0x8 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C9_VAL \
((0x9 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C10_VAL \
((0x10 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C11_VAL \
((0x11 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C12_VAL \
((0x12 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C13_VAL \
((0x13 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C14_VAL \
((0x14 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C15_VAL \
((0x15 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C16_VAL \
((0x16 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C17_VAL \
((0x17 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_UP_DOWN_OFST (21)
#define ALTERA_PLL_SHIFT_UP_DOWN_MSK (0x00000001 << ALTERA_PLL_SHIFT_UP_DOWN_OFST)
#define ALTERA_PLL_SHIFT_UP_DOWN_NEG_VAL ((0x0 << ALTERA_PLL_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_SHIFT_UP_DOWN_MSK)
#define ALTERA_PLL_SHIFT_UP_DOWN_POS_VAL ((0x1 << ALTERA_PLL_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_SHIFT_UP_DOWN_MSK)
#define ALTERA_PLL_SHIFT_UP_DOWN_MSK \
(0x00000001 << ALTERA_PLL_SHIFT_UP_DOWN_OFST)
#define ALTERA_PLL_SHIFT_UP_DOWN_NEG_VAL \
((0x0 << ALTERA_PLL_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_SHIFT_UP_DOWN_MSK)
#define ALTERA_PLL_SHIFT_UP_DOWN_POS_VAL \
((0x1 << ALTERA_PLL_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_SHIFT_UP_DOWN_MSK)
#define ALTERA_PLL_K_COUNTER_REG (0x07)
#define ALTERA_PLL_BANDWIDTH_REG (0x08)
@ -70,10 +118,8 @@
#define ALTERA_PLL_VCO_DIV_REG (0x1c)
#define ALTERA_PLL_MIF_REG (0x1f)
#define ALTERA_PLL_WAIT_TIME_US (10 * 1000)
// defines from the fpga
uint32_t ALTERA_PLL_Cntrl_Reg = 0x0;
uint32_t ALTERA_PLL_Param_Reg = 0x0;
@ -89,7 +135,9 @@ uint32_t ALTERA_PLL_Cntrl_AddrMask = 0x0;
int ALTERA_PLL_Cntrl_AddrOfst = 0;
#ifdef JUNGFRAUD
void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, uint32_t wpmsk, uint32_t prmsk, uint32_t amsk, int aofst, uint32_t wd2msk, int clk2Index) {
void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk,
uint32_t wpmsk, uint32_t prmsk, uint32_t amsk,
int aofst, uint32_t wd2msk, int clk2Index) {
ALTERA_PLL_Cntrl_Reg = creg;
ALTERA_PLL_Param_Reg = preg;
ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask = rprmsk;
@ -101,7 +149,9 @@ void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, uint32
ALTERA_PLL_Cntrl_DBIT_ClkIndex = clk2Index;
}
#else
void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, uint32_t wpmsk, uint32_t prmsk, uint32_t amsk, int aofst) {
void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk,
uint32_t wpmsk, uint32_t prmsk, uint32_t amsk,
int aofst) {
ALTERA_PLL_Cntrl_Reg = creg;
ALTERA_PLL_Param_Reg = preg;
ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask = rprmsk;
@ -117,26 +167,36 @@ void ALTERA_PLL_ResetPLL () {
LOG(logDEBUG2, ("pllrstmsk:0x%x\n", ALTERA_PLL_Cntrl_PLLRstMask));
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) | ALTERA_PLL_Cntrl_PLLRstMask);
LOG(logDEBUG2, ("Set PLL Reset mSk: ALTERA_PLL_Cntrl_Reg:0x%x\n", bus_r(ALTERA_PLL_Cntrl_Reg)));
bus_w(ALTERA_PLL_Cntrl_Reg,
bus_r(ALTERA_PLL_Cntrl_Reg) | ALTERA_PLL_Cntrl_PLLRstMask);
LOG(logDEBUG2, ("Set PLL Reset mSk: ALTERA_PLL_Cntrl_Reg:0x%x\n",
bus_r(ALTERA_PLL_Cntrl_Reg)));
usleep(ALTERA_PLL_WAIT_TIME_US);
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) & ~ALTERA_PLL_Cntrl_PLLRstMask);
LOG(logDEBUG2, ("UnSet PLL Reset mSk: ALTERA_PLL_Cntrl_Reg:0x%x\n", bus_r(ALTERA_PLL_Cntrl_Reg)));
bus_w(ALTERA_PLL_Cntrl_Reg,
bus_r(ALTERA_PLL_Cntrl_Reg) & ~ALTERA_PLL_Cntrl_PLLRstMask);
LOG(logDEBUG2, ("UnSet PLL Reset mSk: ALTERA_PLL_Cntrl_Reg:0x%x\n",
bus_r(ALTERA_PLL_Cntrl_Reg)));
}
void ALTERA_PLL_ResetPLLAndReconfiguration() {
LOG(logINFO, ("Resetting PLL and Reconfiguration\n"));
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) | ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask | ALTERA_PLL_Cntrl_PLLRstMask);
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) |
ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask |
ALTERA_PLL_Cntrl_PLLRstMask);
usleep(ALTERA_PLL_WAIT_TIME_US);
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) & ~ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask & ~ALTERA_PLL_Cntrl_PLLRstMask);
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) &
~ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask &
~ALTERA_PLL_Cntrl_PLLRstMask);
}
void ALTERA_PLL_SetPllReconfigReg(uint32_t reg, uint32_t val, int useSecondWRMask) {
LOG(logDEBUG1, ("Setting PLL Reconfig Reg, reg:0x%x, val:0x%x, useSecondWRMask:%d)\n", reg, val, useSecondWRMask));
void ALTERA_PLL_SetPllReconfigReg(uint32_t reg, uint32_t val,
int useSecondWRMask) {
LOG(logDEBUG1,
("Setting PLL Reconfig Reg, reg:0x%x, val:0x%x, useSecondWRMask:%d)\n",
reg, val, useSecondWRMask));
uint32_t wrmask = ALTERA_PLL_Cntrl_WrPrmtrMask;
#ifdef JUNGFRAUD
@ -145,36 +205,47 @@ void ALTERA_PLL_SetPllReconfigReg(uint32_t reg, uint32_t val, int useSecondWRMas
}
#endif
LOG(logDEBUG2, ("pllparamreg:0x%x pllcontrolreg:0x%x addrofst:%d addrmsk:0x%x wrmask:0x%x\n",
ALTERA_PLL_Param_Reg, ALTERA_PLL_Cntrl_Reg, ALTERA_PLL_Cntrl_AddrOfst, ALTERA_PLL_Cntrl_AddrMask, wrmask));
LOG(logDEBUG2,
("pllparamreg:0x%x pllcontrolreg:0x%x addrofst:%d addrmsk:0x%x "
"wrmask:0x%x\n",
ALTERA_PLL_Param_Reg, ALTERA_PLL_Cntrl_Reg, ALTERA_PLL_Cntrl_AddrOfst,
ALTERA_PLL_Cntrl_AddrMask, wrmask));
// set parameter
bus_w(ALTERA_PLL_Param_Reg, val);
LOG(logDEBUG2, ("Set Parameter: ALTERA_PLL_Param_Reg:0x%x\n", bus_r(ALTERA_PLL_Param_Reg)));
LOG(logDEBUG2, ("Set Parameter: ALTERA_PLL_Param_Reg:0x%x\n",
bus_r(ALTERA_PLL_Param_Reg)));
usleep(ALTERA_PLL_WAIT_TIME_US);
// set address
bus_w(ALTERA_PLL_Cntrl_Reg, (reg << ALTERA_PLL_Cntrl_AddrOfst) & ALTERA_PLL_Cntrl_AddrMask);
LOG(logDEBUG2, ("Set Address: ALTERA_PLL_Cntrl_Reg:0x%x\n", bus_r(ALTERA_PLL_Cntrl_Reg)));
bus_w(ALTERA_PLL_Cntrl_Reg,
(reg << ALTERA_PLL_Cntrl_AddrOfst) & ALTERA_PLL_Cntrl_AddrMask);
LOG(logDEBUG2, ("Set Address: ALTERA_PLL_Cntrl_Reg:0x%x\n",
bus_r(ALTERA_PLL_Cntrl_Reg)));
usleep(ALTERA_PLL_WAIT_TIME_US);
// write parameter
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) | wrmask);
LOG(logDEBUG2, ("Set WR bit: ALTERA_PLL_Cntrl_Reg:0x%x\n", bus_r(ALTERA_PLL_Cntrl_Reg)));
LOG(logDEBUG2, ("Set WR bit: ALTERA_PLL_Cntrl_Reg:0x%x\n",
bus_r(ALTERA_PLL_Cntrl_Reg)));
usleep(ALTERA_PLL_WAIT_TIME_US);
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) & ~wrmask);
LOG(logDEBUG2, ("Unset WR bit: ALTERA_PLL_Cntrl_Reg:0x%x\n", bus_r(ALTERA_PLL_Cntrl_Reg)));
LOG(logDEBUG2, ("Unset WR bit: ALTERA_PLL_Cntrl_Reg:0x%x\n",
bus_r(ALTERA_PLL_Cntrl_Reg)));
usleep(ALTERA_PLL_WAIT_TIME_US);
}
void ALTERA_PLL_SetPhaseShift(int32_t phase, int clkIndex, int pos) {
LOG(logINFO, ("\tWriting PLL Phase Shift\n"));
uint32_t value = (((phase << ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST) & ALTERA_PLL_SHIFT_NUM_SHIFTS_MSK) |
((clkIndex << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) |
(pos ? ALTERA_PLL_SHIFT_UP_DOWN_POS_VAL : ALTERA_PLL_SHIFT_UP_DOWN_NEG_VAL));
uint32_t value = (((phase << ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST) &
ALTERA_PLL_SHIFT_NUM_SHIFTS_MSK) |
((clkIndex << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) &
ALTERA_PLL_SHIFT_CNT_SELECT_MSK) |
(pos ? ALTERA_PLL_SHIFT_UP_DOWN_POS_VAL
: ALTERA_PLL_SHIFT_UP_DOWN_NEG_VAL));
LOG(logDEBUG1, ("C%d phase word:0x%08x\n", clkIndex, value));
@ -186,16 +257,19 @@ void ALTERA_PLL_SetPhaseShift(int32_t phase, int clkIndex, int pos) {
#endif
// write phase shift
ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_PHASE_SHIFT_REG, value, useSecondWR);
ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_PHASE_SHIFT_REG, value,
useSecondWR);
}
void ALTERA_PLL_SetModePolling() {
LOG(logINFO, ("\tSetting Polling Mode\n"));
ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_MODE_REG, ALTERA_PLL_MODE_PLLNG_MD_VAL, 0);
ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_MODE_REG,
ALTERA_PLL_MODE_PLLNG_MD_VAL, 0);
}
int ALTERA_PLL_SetOuputFrequency(int clkIndex, int pllVCOFreqMhz, int value) {
LOG(logDEBUG1, ("C%d: Setting output frequency to %d (pllvcofreq: %dMhz)\n", clkIndex, value, pllVCOFreqMhz));
LOG(logDEBUG1, ("C%d: Setting output frequency to %d (pllvcofreq: %dMhz)\n",
clkIndex, value, pllVCOFreqMhz));
// calculate output frequency
float total_div = (float)pllVCOFreqMhz / (float)value;
@ -210,19 +284,25 @@ int ALTERA_PLL_SetOuputFrequency (int clkIndex, int pllVCOFreqMhz, int value) {
++high_count;
odd_division = 1;
}
LOG(logINFO, ("\tC%d: Low:%d, High:%d, Odd:%d\n", clkIndex, low_count, high_count, odd_division));
LOG(logINFO, ("\tC%d: Low:%d, High:%d, Odd:%d\n", clkIndex, low_count,
high_count, odd_division));
// command to set output frequency
uint32_t val = (((low_count << ALTERA_PLL_C_COUNTER_LW_CNT_OFST) & ALTERA_PLL_C_COUNTER_LW_CNT_MSK) |
((high_count << ALTERA_PLL_C_COUNTER_HGH_CNT_OFST) & ALTERA_PLL_C_COUNTER_HGH_CNT_MSK) |
((odd_division << ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST) & ALTERA_PLL_C_COUNTER_ODD_DVSN_MSK) |
((clkIndex << ALTERA_PLL_C_COUNTER_SLCT_OFST) & ALTERA_PLL_C_COUNTER_SLCT_MSK));
uint32_t val = (((low_count << ALTERA_PLL_C_COUNTER_LW_CNT_OFST) &
ALTERA_PLL_C_COUNTER_LW_CNT_MSK) |
((high_count << ALTERA_PLL_C_COUNTER_HGH_CNT_OFST) &
ALTERA_PLL_C_COUNTER_HGH_CNT_MSK) |
((odd_division << ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST) &
ALTERA_PLL_C_COUNTER_ODD_DVSN_MSK) |
((clkIndex << ALTERA_PLL_C_COUNTER_SLCT_OFST) &
ALTERA_PLL_C_COUNTER_SLCT_MSK));
LOG(logDEBUG1, ("C%d word:0x%08x\n", clkIndex, val));
// write frequency (post-scale output counter C)
ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_C_COUNTER_REG, val, 0);
// reset required to keep the phase (must reconfigure adcs again after this as adc clock is stopped temporarily when resetting pll)
// reset required to keep the phase (must reconfigure adcs again after this
// as adc clock is stopped temporarily when resetting pll)
ALTERA_PLL_ResetPLL();
/*double temp = ((double)pllVCOFreqMhz / (double)(low_count + high_count));
@ -233,5 +313,3 @@ int ALTERA_PLL_SetOuputFrequency (int clkIndex, int pllVCOFreqMhz, int value) {
*/
return value;
}

86
slsDetectorServers/slsDetectorServer/src/ALTERA_PLL_CYCLONE10.c Executable file → Normal file
View File

@ -10,40 +10,49 @@
/** PLL Reconfiguration Registers */
// https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an728.pdf
// c counter (C0-C8 (+1 to base address))
#define ALTERA_PLL_C10_C_COUNTER_BASE_REG (0x0C0)
#define ALTERA_PLL_C10_C_COUNTER_MAX_DIVIDER_VAL (512)
#define ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST (0)
#define ALTERA_PLL_C10_C_COUNTER_LW_CNT_MSK (0x000000FF << ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST)
#define ALTERA_PLL_C10_C_COUNTER_LW_CNT_MSK \
(0x000000FF << ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST)
#define ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST (8)
#define ALTERA_PLL_C10_C_COUNTER_HGH_CNT_MSK (0x000000FF << ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST)
#define ALTERA_PLL_C10_C_COUNTER_HGH_CNT_MSK \
(0x000000FF << ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST)
/* total_div = lw_cnt + hgh_cnt */
#define ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_OFST (16)
#define ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_MSK (0x00000001 << ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_OFST)
/* if bypss_enbl = 0, fout = f(vco)/total_div; else fout = f(vco) (c counter is bypassed) */
#define ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_MSK \
(0x00000001 << ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_OFST)
/* if bypss_enbl = 0, fout = f(vco)/total_div; else fout = f(vco) (c counter is
* bypassed) */
#define ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST (17)
#define ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_MSK (0x00000001 << ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST)
/** if odd_dvsn = 0 (even), duty cycle = hgh_cnt/ total_div; else duty cycle = (hgh_cnt - 0.5) / total_div */
#define ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_MSK \
(0x00000001 << ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST)
/** if odd_dvsn = 0 (even), duty cycle = hgh_cnt/ total_div; else duty cycle =
* (hgh_cnt - 0.5) / total_div */
// dynamic phase shift (C0-C8 (+1 to base address), 0xF for all counters)
#define ALTERA_PLL_C10_PHASE_SHIFT_BASE_REG (0x100)
#define ALTERA_PLL_C10_MAX_SHIFTS_PER_OPERATION (7)
#define ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST (0)
#define ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_MSK (0x00000007 << ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST)
#define ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_MSK \
(0x00000007 << ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST)
#define ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST (3)
#define ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK (0x00000001 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST)
#define ALTERA_PLL_C10_SHIFT_UP_DOWN_NEG_VAL ((0x0 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK)
#define ALTERA_PLL_C10_SHIFT_UP_DOWN_POS_VAL ((0x1 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK)
#define ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK \
(0x00000001 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST)
#define ALTERA_PLL_C10_SHIFT_UP_DOWN_NEG_VAL \
((0x0 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST) & \
ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK)
#define ALTERA_PLL_C10_SHIFT_UP_DOWN_POS_VAL \
((0x1 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST) & \
ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK)
#define ALTERA_PLL_C10_PHASE_SHIFT_STEP_OF_VCO (8)
#define ALTERA_PLL_C10_WAIT_TIME_US (1 * 1000) // 1 ms
int ALTERA_PLL_C10_Reg_offset = 0x0;
const int ALTERA_PLL_C10_NUM = 2;
uint32_t ALTERA_PLL_C10_BaseAddress[2] = {0x0, 0x0};
@ -51,7 +60,10 @@ uint32_t ALTERA_PLL_C10_Reset_Reg[2] = {0x0, 0x0};
uint32_t ALTERA_PLL_C10_Reset_Msk[2] = {0x0, 0x0};
int ALTERA_PLL_C10_VCO_FREQ[2] = {0, 0};
void ALTERA_PLL_C10_SetDefines(int regofst, uint32_t baseaddr0, uint32_t baseaddr1, uint32_t resetreg0, uint32_t resetreg1, uint32_t resetmsk0, uint32_t resetmsk1, int vcofreq0, int vcofreq1) {
void ALTERA_PLL_C10_SetDefines(int regofst, uint32_t baseaddr0,
uint32_t baseaddr1, uint32_t resetreg0,
uint32_t resetreg1, uint32_t resetmsk0,
uint32_t resetmsk1, int vcofreq0, int vcofreq1) {
ALTERA_PLL_C10_Reg_offset = regofst;
ALTERA_PLL_C10_BaseAddress[0] = baseaddr0;
ALTERA_PLL_C10_BaseAddress[1] = baseaddr1;
@ -79,7 +91,8 @@ void ALTERA_PLL_C10_Reconfigure(int pllIndex) {
LOG(logINFO, ("\tReconfiguring PLL %d\n", pllIndex));
// write anything to base address to start reconfiguring
LOG(logDEBUG1, ("\tWriting 1 to base address 0x%x to start reconfiguring\n", ALTERA_PLL_C10_BaseAddress[pllIndex]));
LOG(logDEBUG1, ("\tWriting 1 to base address 0x%x to start reconfiguring\n",
ALTERA_PLL_C10_BaseAddress[pllIndex]));
bus_w_csp1(ALTERA_PLL_C10_BaseAddress[pllIndex], 0x1);
usleep(ALTERA_PLL_C10_WAIT_TIME_US);
}
@ -93,19 +106,26 @@ void ALTERA_PLL_C10_ResetPLL (int pllIndex) {
usleep(ALTERA_PLL_C10_WAIT_TIME_US);
}
void ALTERA_PLL_C10_SetPhaseShift(int pllIndex, int clkIndex, int phase,
int pos) {
LOG(logINFO, ("\tC%d: Writing PLL %d Phase Shift [phase:%d, pos dir:%d]\n",
clkIndex, pllIndex, phase, pos));
void ALTERA_PLL_C10_SetPhaseShift(int pllIndex, int clkIndex, int phase, int pos) {
LOG(logINFO, ("\tC%d: Writing PLL %d Phase Shift [phase:%d, pos dir:%d]\n", clkIndex, pllIndex, phase, pos));
uint32_t addr = ALTERA_PLL_C10_BaseAddress[pllIndex] + (ALTERA_PLL_C10_PHASE_SHIFT_BASE_REG + (int)clkIndex) * ALTERA_PLL_C10_Reg_offset;
uint32_t addr = ALTERA_PLL_C10_BaseAddress[pllIndex] +
(ALTERA_PLL_C10_PHASE_SHIFT_BASE_REG + (int)clkIndex) *
ALTERA_PLL_C10_Reg_offset;
int maxshifts = ALTERA_PLL_C10_MAX_SHIFTS_PER_OPERATION;
// only 7 shifts at a time
while (phase > 0) {
int phaseToDo = (phase > maxshifts) ? maxshifts : phase;
uint32_t value = (((phaseToDo << ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST) & ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_MSK) |
(pos ? ALTERA_PLL_C10_SHIFT_UP_DOWN_POS_VAL : ALTERA_PLL_C10_SHIFT_UP_DOWN_NEG_VAL));
LOG(logDEBUG1, ("\t[addr:0x%x, phaseTodo:%d phaseleft:%d phase word:0x%08x]\n", addr, phaseToDo, phase, value));
uint32_t value = (((phaseToDo << ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST) &
ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_MSK) |
(pos ? ALTERA_PLL_C10_SHIFT_UP_DOWN_POS_VAL
: ALTERA_PLL_C10_SHIFT_UP_DOWN_NEG_VAL));
LOG(logDEBUG1,
("\t[addr:0x%x, phaseTodo:%d phaseleft:%d phase word:0x%08x]\n",
addr, phaseToDo, phase, value));
bus_w_csp1(addr, value);
ALTERA_PLL_C10_Reconfigure(pllIndex);
@ -113,8 +133,10 @@ void ALTERA_PLL_C10_SetPhaseShift(int pllIndex, int clkIndex, int phase, int pos
}
}
void ALTERA_PLL_C10_SetOuputClockDivider (int pllIndex, int clkIndex, int value) {
LOG(logDEBUG1, ("\tC%d: Setting output clock divider for pll%d to %d\n", clkIndex, pllIndex, value));
void ALTERA_PLL_C10_SetOuputClockDivider(int pllIndex, int clkIndex,
int value) {
LOG(logDEBUG1, ("\tC%d: Setting output clock divider for pll%d to %d\n",
clkIndex, pllIndex, value));
// assume 50% duty cycle
uint32_t low_count = value / 2;
@ -126,13 +148,19 @@ void ALTERA_PLL_C10_SetOuputClockDivider (int pllIndex, int clkIndex, int value)
++high_count;
odd_division = 1;
}
LOG(logINFO, ("\tC%d: Low:%d, High:%d, Odd:%d\n", clkIndex, low_count, high_count, odd_division));
LOG(logINFO, ("\tC%d: Low:%d, High:%d, Odd:%d\n", clkIndex, low_count,
high_count, odd_division));
// command to set output frequency
uint32_t addr = ALTERA_PLL_C10_BaseAddress[pllIndex] + (ALTERA_PLL_C10_C_COUNTER_BASE_REG + (int)clkIndex) * ALTERA_PLL_C10_Reg_offset;
uint32_t val = (((low_count << ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST) & ALTERA_PLL_C10_C_COUNTER_LW_CNT_MSK) |
((high_count << ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST) & ALTERA_PLL_C10_C_COUNTER_HGH_CNT_MSK) |
((odd_division << ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST) & ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_MSK));
uint32_t addr = ALTERA_PLL_C10_BaseAddress[pllIndex] +
(ALTERA_PLL_C10_C_COUNTER_BASE_REG + (int)clkIndex) *
ALTERA_PLL_C10_Reg_offset;
uint32_t val = (((low_count << ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST) &
ALTERA_PLL_C10_C_COUNTER_LW_CNT_MSK) |
((high_count << ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST) &
ALTERA_PLL_C10_C_COUNTER_HGH_CNT_MSK) |
((odd_division << ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST) &
ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_MSK));
LOG(logDEBUG1, ("\t[addr:0x%x, word:0x%08x]\n", addr, val));
// write frequency

18
slsDetectorServers/slsDetectorServer/src/ASIC_Driver.c Executable file → Normal file
View File

@ -3,22 +3,21 @@
#include "common.h"
#include "sls_detector_defs.h"
#include <getopt.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <getopt.h>
#include <string.h>
#include <unistd.h>
#include <fcntl.h>
#include <sys/ioctl.h>
#include <linux/types.h>
#include <linux/spi/spidev.h>
#include <linux/types.h>
#include <string.h>
#include <sys/ioctl.h>
#include <unistd.h>
// defines from the fpga
char ASIC_Driver_DriverFileName[MAX_STR_LENGTH];
void ASIC_Driver_SetDefines(char *driverfname) {
LOG(logINFOBLUE, ("Configuring ASIC Driver to %s\n", driverfname));
memset(ASIC_Driver_DriverFileName, 0, MAX_STR_LENGTH);
@ -32,7 +31,8 @@ int ASIC_Driver_Set (int index, int length, char* buffer) {
char fname[MAX_STR_LENGTH];
strcpy(fname, ASIC_Driver_DriverFileName);
strcat(fname, temp);
LOG(logDEBUG2, ("\t[chip index: %d, length: %d, fname: %s]\n", index, length, fname));
LOG(logDEBUG2,
("\t[chip index: %d, length: %d, fname: %s]\n", index, length, fname));
{
LOG(logDEBUG2, ("\t[values: \n"));
int i;
@ -45,7 +45,9 @@ int ASIC_Driver_Set (int index, int length, char* buffer) {
#ifndef VIRTUAL
int fd = open(fname, O_RDWR);
if (fd == -1) {
LOG(logERROR, ("Could not open file %s for writing to control ASIC (%d)\n", fname, index));
LOG(logERROR,
("Could not open file %s for writing to control ASIC (%d)\n", fname,
index));
return FAIL;
}

18
slsDetectorServers/slsDetectorServer/src/DAC6571.c Executable file → Normal file
View File

@ -9,13 +9,13 @@
#define DAC6571_MIN_DAC_VAL (0x0)
#define DAC6571_MAX_DAC_VAL (0x3FF)
// defines from the hardware
int DAC6571_HardMaxVoltage = 0;
char DAC6571_DriverFileName[MAX_STR_LENGTH];
void DAC6571_SetDefines(int hardMaxV, char *driverfname) {
LOG(logINFOBLUE, ("Configuring High Voltage to %s (hard max: %dV)\n", driverfname, hardMaxV));
LOG(logINFOBLUE, ("Configuring High Voltage to %s (hard max: %dV)\n",
driverfname, hardMaxV));
DAC6571_HardMaxVoltage = hardMaxV;
memset(DAC6571_DriverFileName, 0, MAX_STR_LENGTH);
strcpy(DAC6571_DriverFileName, driverfname);
@ -28,11 +28,9 @@ int DAC6571_Set (int val) {
int dacvalue = 0;
// convert value
ConvertToDifferentRange(0, DAC6571_HardMaxVoltage,
DAC6571_MIN_DAC_VAL, DAC6571_MAX_DAC_VAL,
val, &dacvalue);
ConvertToDifferentRange(0, DAC6571_HardMaxVoltage, DAC6571_MIN_DAC_VAL,
DAC6571_MAX_DAC_VAL, val, &dacvalue);
LOG(logINFO, ("\t%dV (dacval %d)\n", val, dacvalue));
@ -40,7 +38,9 @@ int DAC6571_Set (int val) {
// open file
FILE *fd = fopen(DAC6571_DriverFileName, "w");
if (fd == NULL) {
LOG(logERROR, ("Could not open file %s for writing to set high voltage\n", DAC6571_DriverFileName));
LOG(logERROR,
("Could not open file %s for writing to set high voltage\n",
DAC6571_DriverFileName));
return FAIL;
}
// convert to string, add 0 and write to file
@ -50,7 +50,3 @@ int DAC6571_Set (int val) {
return OK;
}

169
slsDetectorServers/slsDetectorServer/src/I2C.c Executable file → Normal file
View File

@ -23,7 +23,6 @@
* I2C_RX_DATA_FIFO_REG
*/
#define I2C_DATA_RATE_KBPS (200)
/** Control Register */
@ -31,28 +30,46 @@
#define I2C_CTRL_ENBLE_CORE_MSK (0x00000001 << I2C_CTRL_ENBLE_CORE_OFST)
#define I2C_CTRL_BUS_SPEED_OFST (1)
#define I2C_CTRL_BUS_SPEED_MSK (0x00000001 << I2C_CTRL_BUS_SPEED_OFST)
#define I2C_CTRL_BUS_SPEED_STNDRD_100_VAL ((0x0 << I2C_CTRL_BUS_SPEED_OFST) & I2C_CTRL_BUS_SPEED_MSK) // standard mode (up to 100 kbps)
#define I2C_CTRL_BUS_SPEED_FAST_400_VAL ((0x1 << I2C_CTRL_BUS_SPEED_OFST) & I2C_CTRL_BUS_SPEED_MSK) // fast mode (up to 400 kbps)
/** if actual level of transfer command fifo <= thd level, TX_READY interrupt asserted */
#define I2C_CTRL_BUS_SPEED_STNDRD_100_VAL \
((0x0 << I2C_CTRL_BUS_SPEED_OFST) & \
I2C_CTRL_BUS_SPEED_MSK) // standard mode (up to 100 kbps)
#define I2C_CTRL_BUS_SPEED_FAST_400_VAL \
((0x1 << I2C_CTRL_BUS_SPEED_OFST) & \
I2C_CTRL_BUS_SPEED_MSK) // fast mode (up to 400 kbps)
/** if actual level of transfer command fifo <= thd level, TX_READY interrupt
* asserted */
#define I2C_CTRL_TFR_CMD_FIFO_THD_OFST (2)
#define I2C_CTRL_TFR_CMD_FIFO_THD_MSK (0x00000003 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST)
#define I2C_CTRL_TFR_CMD_EMPTY_VAL ((0x0 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
#define I2C_CTRL_TFR_CMD_ONE_FOURTH_VAL ((0x1 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
#define I2C_CTRL_TFR_CMD_ONE_HALF_VAL ((0x2 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
#define I2C_CTRL_TFR_CMD_NOT_FULL_VAL ((0x3 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
/** if actual level of receive data fifo <= thd level, RX_READY interrupt asserted */
#define I2C_CTRL_TFR_CMD_FIFO_THD_MSK \
(0x00000003 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST)
#define I2C_CTRL_TFR_CMD_EMPTY_VAL \
((0x0 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
#define I2C_CTRL_TFR_CMD_ONE_FOURTH_VAL \
((0x1 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
#define I2C_CTRL_TFR_CMD_ONE_HALF_VAL \
((0x2 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
#define I2C_CTRL_TFR_CMD_NOT_FULL_VAL \
((0x3 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
/** if actual level of receive data fifo <= thd level, RX_READY interrupt
* asserted */
#define I2C_CTRL_RX_DATA_FIFO_THD_OFST (4)
#define I2C_CTRL_RX_DATA_FIFO_THD_MSK (0x00000003 << I2C_CTRL_RX_DATA_FIFO_THD_OFST)
#define I2C_CTRL_RX_DATA_1_VALID_ENTRY_VAL ((0x0 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
#define I2C_CTRL_RX_DATA_ONE_FOURTH_VAL ((0x1 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
#define I2C_CTRL_RX_DATA_ONE_HALF_VAL ((0x2 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
#define I2C_CTRL_RX_DATA_FULL_VAL ((0x3 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
#define I2C_CTRL_RX_DATA_FIFO_THD_MSK \
(0x00000003 << I2C_CTRL_RX_DATA_FIFO_THD_OFST)
#define I2C_CTRL_RX_DATA_1_VALID_ENTRY_VAL \
((0x0 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
#define I2C_CTRL_RX_DATA_ONE_FOURTH_VAL \
((0x1 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
#define I2C_CTRL_RX_DATA_ONE_HALF_VAL \
((0x2 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
#define I2C_CTRL_RX_DATA_FULL_VAL \
((0x3 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
/** Transfer Command Fifo register */
#define I2C_TFR_CMD_RW_OFST (0)
#define I2C_TFR_CMD_RW_MSK (0x00000001 << I2C_TFR_CMD_RW_OFST)
#define I2C_TFR_CMD_RW_WRITE_VAL ((0x0 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK)
#define I2C_TFR_CMD_RW_READ_VAL ((0x1 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK)
#define I2C_TFR_CMD_RW_WRITE_VAL \
((0x0 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK)
#define I2C_TFR_CMD_RW_READ_VAL \
((0x1 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK)
#define I2C_TFR_CMD_ADDR_OFST (1)
#define I2C_TFR_CMD_ADDR_MSK (0x0000007F << I2C_TFR_CMD_ADDR_OFST)
/** when writing, rw and addr converts to data to be written mask */
@ -73,19 +90,23 @@
/** SCL Low Count register */
#define I2C_SCL_LOW_COUNT_PERIOD_OFST (0)
#define I2C_SCL_LOW_COUNT_PERIOD_MSK (0x0000FFFF << I2C_SCL_LOW_COUNT_PERIOD_OFST)
#define I2C_SCL_LOW_COUNT_PERIOD_MSK \
(0x0000FFFF << I2C_SCL_LOW_COUNT_PERIOD_OFST)
/** SCL High Count register */
#define I2C_SCL_HIGH_COUNT_PERIOD_OFST (0)
#define I2C_SCL_HIGH_COUNT_PERIOD_MSK (0x0000FFFF << I2C_SCL_HIGH_COUNT_PERIOD_OFST)
#define I2C_SCL_HIGH_COUNT_PERIOD_MSK \
(0x0000FFFF << I2C_SCL_HIGH_COUNT_PERIOD_OFST)
/** SDA Hold Count register */
#define I2C_SDA_HOLD_COUNT_PERIOD_OFST (0)
#define I2C_SDA_HOLD_COUNT_PERIOD_MSK (0x0000FFFF << I2C_SDA_HOLD_COUNT_PERIOD_OFST)
#define I2C_SDA_HOLD_COUNT_PERIOD_MSK \
(0x0000FFFF << I2C_SDA_HOLD_COUNT_PERIOD_OFST)
/** Receive Data Fifo Level register */
//#define I2C_RX_DATA_FIFO_LVL_OFST (0)
//#define I2C_RX_DATA_FIFO_LVL_MSK (0x000000FF << I2C_RX_DATA_FIFO_LVL_OFST)
//#define I2C_RX_DATA_FIFO_LVL_MSK (0x000000FF <<
//I2C_RX_DATA_FIFO_LVL_OFST)
// defines in the fpga
uint32_t I2C_Control_Reg = 0x0;
@ -97,14 +118,14 @@ uint32_t I2C_Scl_High_Count_Reg = 0x0;
uint32_t I2C_Sda_Hold_Reg = 0x0;
uint32_t I2C_Transfer_Command_Fifo_Reg = 0x0;
void I2C_ConfigureI2CCore(uint32_t creg, uint32_t sreg,
uint32_t rreg, uint32_t rlvlreg,
uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) {
void I2C_ConfigureI2CCore(uint32_t creg, uint32_t sreg, uint32_t rreg,
uint32_t rlvlreg, uint32_t slreg, uint32_t shreg,
uint32_t sdreg, uint32_t treg) {
LOG(logINFO, ("\tConfiguring I2C Core for %d kbps:\n", I2C_DATA_RATE_KBPS));
LOG(logDEBUG1, ("controlreg,:0x%x, statusreg,:0x%x, "
"rxrdatafiforeg: 0x%x, rxdatafifocountreg,:0x%x, "
"scllow,:0x%x, sclhighreg,:0x%x, sdaholdreg,:0x%x, transfercmdreg,:0x%x\n",
"scllow,:0x%x, sclhighreg,:0x%x, sdaholdreg,:0x%x, "
"transfercmdreg,:0x%x\n",
creg, sreg, rreg, rlvlreg, slreg, shreg, sdreg, treg));
I2C_Control_Reg = creg;
@ -117,57 +138,77 @@ void I2C_ConfigureI2CCore(uint32_t creg, uint32_t sreg,
I2C_Transfer_Command_Fifo_Reg = treg;
// calculate scl low and high period count
uint32_t sclPeriodNs = ((1000.00 * 1000.00 * 1000.00) / ((double)I2C_DATA_RATE_KBPS * 1000.00));
uint32_t sclPeriodNs = ((1000.00 * 1000.00 * 1000.00) /
((double)I2C_DATA_RATE_KBPS * 1000.00));
// scl low period same as high period
uint32_t sclLowPeriodNs = sclPeriodNs / 2;
// convert to us, then to clock (defined in blackfin.h)
uint32_t sclLowPeriodCount = (sclLowPeriodNs / 1000.00) * I2C_CLOCK_MHZ;
// calculate sda hold data count
uint32_t sdaDataHoldTimeNs = (sclLowPeriodNs / 2); // scl low period same as high period
uint32_t sdaDataHoldTimeNs =
(sclLowPeriodNs / 2); // scl low period same as high period
// convert to us, then to clock (defined in blackfin.h)
uint32_t sdaDataHoldCount = ((sdaDataHoldTimeNs / 1000.00) * I2C_CLOCK_MHZ);
LOG(logINFO, ("\tSetting SCL Low Period: %d ns (%d clocks)\n", sclLowPeriodNs, sclLowPeriodCount));
bus_w(I2C_Scl_Low_Count_Reg, bus_r(I2C_Scl_Low_Count_Reg) |
((sclLowPeriodCount << I2C_SCL_LOW_COUNT_PERIOD_OFST) & I2C_SCL_LOW_COUNT_PERIOD_MSK));
LOG(logINFO, ("\tSetting SCL Low Period: %d ns (%d clocks)\n",
sclLowPeriodNs, sclLowPeriodCount));
bus_w(I2C_Scl_Low_Count_Reg,
bus_r(I2C_Scl_Low_Count_Reg) |
((sclLowPeriodCount << I2C_SCL_LOW_COUNT_PERIOD_OFST) &
I2C_SCL_LOW_COUNT_PERIOD_MSK));
LOG(logDEBUG1, ("SCL Low reg:0x%x\n", bus_r(I2C_Scl_Low_Count_Reg)));
LOG(logINFO, ("\tSetting SCL High Period: %d ns (%d clocks)\n", sclLowPeriodNs, sclLowPeriodCount));
bus_w(I2C_Scl_High_Count_Reg, bus_r(I2C_Scl_High_Count_Reg) |
((sclLowPeriodCount << I2C_SCL_HIGH_COUNT_PERIOD_OFST) & I2C_SCL_HIGH_COUNT_PERIOD_MSK));
LOG(logINFO, ("\tSetting SCL High Period: %d ns (%d clocks)\n",
sclLowPeriodNs, sclLowPeriodCount));
bus_w(I2C_Scl_High_Count_Reg,
bus_r(I2C_Scl_High_Count_Reg) |
((sclLowPeriodCount << I2C_SCL_HIGH_COUNT_PERIOD_OFST) &
I2C_SCL_HIGH_COUNT_PERIOD_MSK));
LOG(logDEBUG1, ("SCL High reg:0x%x\n", bus_r(I2C_Scl_High_Count_Reg)));
LOG(logINFO, ("\tSetting SDA Hold Time: %d ns (%d clocks)\n", sdaDataHoldTimeNs, sdaDataHoldCount));
bus_w(I2C_Sda_Hold_Reg, bus_r(I2C_Sda_Hold_Reg) |
((sdaDataHoldCount << I2C_SDA_HOLD_COUNT_PERIOD_OFST) & I2C_SDA_HOLD_COUNT_PERIOD_MSK));
LOG(logINFO, ("\tSetting SDA Hold Time: %d ns (%d clocks)\n",
sdaDataHoldTimeNs, sdaDataHoldCount));
bus_w(I2C_Sda_Hold_Reg,
bus_r(I2C_Sda_Hold_Reg) |
((sdaDataHoldCount << I2C_SDA_HOLD_COUNT_PERIOD_OFST) &
I2C_SDA_HOLD_COUNT_PERIOD_MSK));
LOG(logDEBUG1, ("SDA Hold reg:0x%x\n", bus_r(I2C_Sda_Hold_Reg)));
LOG(logINFO, ("\tEnabling core and bus speed to fast (up to 400 kbps)\n"));
bus_w(I2C_Control_Reg, bus_r(I2C_Control_Reg) |
I2C_CTRL_ENBLE_CORE_MSK | I2C_CTRL_BUS_SPEED_FAST_400_VAL);// fixme: (works?)
bus_w(I2C_Control_Reg,
bus_r(I2C_Control_Reg) | I2C_CTRL_ENBLE_CORE_MSK |
I2C_CTRL_BUS_SPEED_FAST_400_VAL); // fixme: (works?)
LOG(logDEBUG1, ("Control reg:0x%x\n", bus_r(I2C_Control_Reg)));
//The INA226 supports the transmission protocol for fast mode (1 kHz to 400 kHz) and high-speed mode (1 kHz to 2.94 MHz).
// The INA226 supports the transmission protocol for fast mode (1 kHz to 400
// kHz) and high-speed mode (1 kHz to 2.94 MHz).
}
uint32_t I2C_Read(uint32_t devId, uint32_t addr) {
LOG(logDEBUG2, (" ================================================\n"));
LOG(logDEBUG2, (" Reading from I2C device 0x%x and reg 0x%x\n", devId, addr));
LOG(logDEBUG2,
(" Reading from I2C device 0x%x and reg 0x%x\n", devId, addr));
// device Id mask
uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
uint32_t devIdMask =
((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
LOG(logDEBUG2, (" devId:0x%x\n", devIdMask));
// write I2C ID
bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
LOG(logDEBUG2, (" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK))));
LOG(logDEBUG2,
(" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK))));
// write register addr
bus_w(I2C_Transfer_Command_Fifo_Reg, addr);
LOG(logDEBUG2, (" write addr:0x%x\n", addr));
// repeated start with read (repeated start needed here because it was in write operation mode earlier, for the device ID)
bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL));
LOG(logDEBUG2, (" repeated start:0x%x\n", (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL)));
// repeated start with read (repeated start needed here because it was in
// write operation mode earlier, for the device ID)
bus_w(I2C_Transfer_Command_Fifo_Reg,
(devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL));
LOG(logDEBUG2,
(" repeated start:0x%x\n",
(devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL)));
// continue reading
bus_w(I2C_Transfer_Command_Fifo_Reg, 0x0);
@ -180,7 +221,8 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr) {
// read value
uint32_t retval = 0;
//In case one wants to do something more general (INA226 receives only 2 bytes)
// In case one wants to do something more general (INA226 receives only 2
// bytes)
// wait till status is idle
int status = 1;
while (status) {
@ -196,7 +238,8 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr) {
// level bytes to read, read 1 byte at a time
for (iloop = level - 1; iloop >= 0; --iloop) {
u_int16_t byte = bus_r(I2C_Rx_Data_Fifo_Reg) & I2C_RX_DATA_FIFO_RXDATA_MSK;
u_int16_t byte =
bus_r(I2C_Rx_Data_Fifo_Reg) & I2C_RX_DATA_FIFO_RXDATA_MSK;
LOG(logDEBUG2, (" byte nr %d:0x%x\n", iloop, byte));
// push by 1 byte at a time
retval |= (byte << (8 * iloop));
@ -208,33 +251,43 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr) {
void I2C_Write(uint32_t devId, uint32_t addr, uint16_t data) {
LOG(logDEBUG2, (" ================================================\n"));
LOG(logDEBUG2, (" Writing to I2C (Device:0x%x, reg:0x%x, data:%d)\n", devId, addr, data));
LOG(logDEBUG2, (" Writing to I2C (Device:0x%x, reg:0x%x, data:%d)\n", devId,
addr, data));
// device Id mask
uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
uint32_t devIdMask =
((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
LOG(logDEBUG2, (" devId:0x%x\n", devId));
// write I2C ID
bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
LOG(logDEBUG2, (" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK))));
LOG(logDEBUG2,
(" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK))));
// write register addr
bus_w(I2C_Transfer_Command_Fifo_Reg, addr);
LOG(logDEBUG2, (" write addr:0x%x\n", addr));
// do not do the repeated start as it is already in write operation mode (else it wont work)
// do not do the repeated start as it is already in write operation mode
// (else it wont work)
uint8_t msb = (uint8_t)((data & 0xFF00) >> 8);
uint8_t lsb = (uint8_t)(data & 0x00FF);
LOG(logDEBUG2, (" msb:0x%02x, lsb:0x%02x\n", msb, lsb));
// writing data MSB
bus_w(I2C_Transfer_Command_Fifo_Reg, ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK));
LOG(logDEBUG2, (" write msb:0x%02x\n", ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK)));
bus_w(I2C_Transfer_Command_Fifo_Reg,
((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK));
LOG(logDEBUG2,
(" write msb:0x%02x\n",
((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK)));
// writing data LSB and stop writing bit
bus_w(I2C_Transfer_Command_Fifo_Reg, ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK);
LOG(logDEBUG2, (" write lsb and stop writing:0x%x\n", ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK));
bus_w(I2C_Transfer_Command_Fifo_Reg,
((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) |
I2C_TFR_CMD_STOP_MSK);
LOG(logDEBUG2,
(" write lsb and stop writing:0x%x\n",
((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) |
I2C_TFR_CMD_STOP_MSK));
LOG(logDEBUG2, (" ================================================\n"));
}

57
slsDetectorServers/slsDetectorServer/src/INA226.c Executable file → Normal file
View File

@ -30,18 +30,19 @@
/** bus voltage register */
#define INA226_BUS_VOLTAGE_VMIN_UV (1250) // 1.25mV
#define INA226_BUS_VOLTAGE_MX_STPS (0x7FFF + 1)
#define INA226_BUS_VOLTAGE_VMAX_UV (INA226_BUS_VOLTAGE_VMIN_UV * INA226_BUS_VOLTAGE_MX_STPS) // 40960000uV, 40.96V
#define INA226_BUS_VOLTAGE_VMAX_UV \
(INA226_BUS_VOLTAGE_VMIN_UV * \
INA226_BUS_VOLTAGE_MX_STPS) // 40960000uV, 40.96V
/** shunt voltage register */
#define INA226_SHUNT_VOLTAGE_VMIN_NV (2500) // 2.5uV
#define INA226_SHUNT_VOLTAGE_MX_STPS (0x7FFF + 1)
#define INA226_SHUNT_VOLTAGE_VMAX_NV (INA226_SHUNT_VOLTAGE_VMIN_NV * INA226_SHUNT_VOLTAGE_MX_STPS) // 81920000nV, 81.92mV
#define INA226_SHUNT_VOLTAGE_VMAX_NV \
(INA226_SHUNT_VOLTAGE_VMIN_NV * \
INA226_SHUNT_VOLTAGE_MX_STPS) // 81920000nV, 81.92mV
#define INA226_SHUNT_NEGATIVE_MSK (1 << 15)
#define INA226_SHUNT_ABS_VALUE_MSK (0x7FFF)
/** current precision for calibration register */
#define INA226_CURRENT_IMIN_UA (100) // 100uA can be changed
@ -49,10 +50,12 @@
#define INA226_CALIBRATION_MSK (0x7FFF)
/** get calibration register value to be set */
#define INA226_getCalibrationValue(rOhm) (0.00512 /(INA226_CURRENT_IMIN_UA * 1e-6 * rOhm))
#define INA226_getCalibrationValue(rOhm) \
(0.00512 / (INA226_CURRENT_IMIN_UA * 1e-6 * rOhm))
/** get current unit */
#define INA226_getConvertedCurrentUnits(shuntV, calibReg) ((double)shuntV * (double)calibReg / (double)2048)
#define INA226_getConvertedCurrentUnits(shuntV, calibReg) \
((double)shuntV * (double)calibReg / (double)2048)
// defines from the fpga
double INA226_Shunt_Resistor_Ohm = 0.0;
@ -61,8 +64,8 @@ int INA226_Calibration_Register_Value = 0;
#define INA226_CALIBRATION_CURRENT_TOLERANCE (1.2268)
void INA226_ConfigureI2CCore(double rOhm, uint32_t creg, uint32_t sreg,
uint32_t rreg, uint32_t rlvlreg,
uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) {
uint32_t rreg, uint32_t rlvlreg, uint32_t slreg,
uint32_t shreg, uint32_t sdreg, uint32_t treg) {
LOG(logINFOBLUE, ("Configuring INA226\n"));
LOG(logDEBUG1, ("Shunt ohm resistor: %f\n", rOhm));
INA226_Shunt_Resistor_Ohm = rOhm;
@ -71,13 +74,19 @@ void INA226_ConfigureI2CCore(double rOhm, uint32_t creg, uint32_t sreg,
}
void INA226_CalibrateCurrentRegister(uint32_t deviceId) {
LOG(logINFO, ("Calibrating Current Register for Device ID: 0x%x\n", deviceId));
LOG(logINFO,
("Calibrating Current Register for Device ID: 0x%x\n", deviceId));
// get calibration value based on shunt resistor
uint16_t calVal = ((uint16_t)INA226_getCalibrationValue(INA226_Shunt_Resistor_Ohm)) & INA226_CALIBRATION_MSK;
LOG(logINFO, ("\tCalculated calibration reg value: 0x%0x (%d)\n", calVal, calVal));
uint16_t calVal =
((uint16_t)INA226_getCalibrationValue(INA226_Shunt_Resistor_Ohm)) &
INA226_CALIBRATION_MSK;
LOG(logINFO,
("\tCalculated calibration reg value: 0x%0x (%d)\n", calVal, calVal));
calVal = ((double)calVal / INA226_CALIBRATION_CURRENT_TOLERANCE) + 0.5;
LOG(logINFO, ("\tRealculated (for tolerance) calibration reg value: 0x%0x (%d)\n", calVal, calVal));
LOG(logINFO,
("\tRealculated (for tolerance) calibration reg value: 0x%0x (%d)\n",
calVal, calVal));
INA226_Calibration_Register_Value = calVal;
// calibrate current register
@ -86,7 +95,9 @@ void INA226_CalibrateCurrentRegister(uint32_t deviceId) {
// read back calibration register
int retval = I2C_Read(deviceId, INA226_CALIBRATION_REG);
if (retval != calVal) {
LOG(logERROR, ("Cannot set calibration register for I2C. Set 0x%x, read 0x%x\n", calVal, retval));
LOG(logERROR,
("Cannot set calibration register for I2C. Set 0x%x, read 0x%x\n",
calVal, retval));
}
}
@ -98,14 +109,15 @@ int INA226_ReadVoltage(uint32_t deviceId) {
// value in uV
int voltageuV = 0;
ConvertToDifferentRange(0, INA226_BUS_VOLTAGE_MX_STPS,
INA226_BUS_VOLTAGE_VMIN_UV, INA226_BUS_VOLTAGE_VMAX_UV,
regval, &voltageuV);
INA226_BUS_VOLTAGE_VMIN_UV,
INA226_BUS_VOLTAGE_VMAX_UV, regval, &voltageuV);
LOG(logDEBUG1, (" voltage: 0x%d uV\n", voltageuV));
// value in mV
int voltagemV = voltageuV / 1000;
LOG(logDEBUG1, (" voltage: %d mV\n", voltagemV));
LOG(logINFO, ("Voltage via I2C (Device: 0x%x): %d mV\n", deviceId, voltagemV));
LOG(logINFO,
("Voltage via I2C (Device: 0x%x): %d mV\n", deviceId, voltagemV));
return voltagemV;
}
@ -125,10 +137,10 @@ int INA226_ReadCurrent(uint32_t deviceId) {
LOG(logDEBUG1, (" shunt voltage reg: %d\n", shuntVoltageRegVal));
}
// value for current
int retval = INA226_getConvertedCurrentUnits(shuntVoltageRegVal, INA226_Calibration_Register_Value);
int retval = INA226_getConvertedCurrentUnits(
shuntVoltageRegVal, INA226_Calibration_Register_Value);
LOG(logDEBUG1, (" current unit value: %d\n", retval));
// reading directly the current reg
LOG(logDEBUG1, (" Reading current reg\n"));
int cuurentRegVal = I2C_Read(deviceId, INA226_CURRENT_REG);
@ -141,7 +153,9 @@ int INA226_ReadCurrent(uint32_t deviceId) {
}
// should be the same
LOG(logDEBUG1, (" ===============current reg: %d, current unit cal:%d=================================\n", cuurentRegVal, retval));
LOG(logDEBUG1, (" ===============current reg: %d, current unit "
"cal:%d=================================\n",
cuurentRegVal, retval));
// current in uA
int currentuA = cuurentRegVal * INA226_CURRENT_IMIN_UA;
LOG(logDEBUG1, (" current: %d uA\n", currentuA));
@ -150,7 +164,8 @@ int INA226_ReadCurrent(uint32_t deviceId) {
int currentmA = (currentuA / 1000.00) + 0.5;
LOG(logDEBUG1, (" current: %d mA\n", currentmA));
LOG(logINFO, ("Current via I2C (Device: 0x%x): %d mA\n", deviceId, currentmA));
LOG(logINFO,
("Current via I2C (Device: 0x%x): %d mA\n", deviceId, currentmA));
return currentmA;
}

107
slsDetectorServers/slsDetectorServer/src/LTC2620.c Executable file → Normal file
View File

@ -1,8 +1,8 @@
#include "LTC2620.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "common.h"
#include "blackfin.h"
#include "clogger.h"
#include "common.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "sls_detector_defs.h"
#include <string.h>
@ -16,15 +16,26 @@
#define LTC2620_DAC_CMD_OFST (20)
#define LTC2620_DAC_CMD_MSK (0x0000000F << LTC2620_DAC_CMD_OFST)
#define LTC2620_DAC_CMD_WR_IN_VAL ((0x0 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) // write to input register
#define LTC2620_DAC_CMD_UPDTE_DAC_VAL ((0x1 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) // update dac (power up)
#define LTC2620_DAC_CMD_WR_IN_UPDTE_DAC_VAL ((0x2 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) // write to input register and update dac (power up)
#define LTC2620_DAC_CMD_WR_UPDTE_DAC_VAL ((0x3 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) // write to and update dac (power up)
#define LTC2620_DAC_CMD_PWR_DWN_VAL ((0x4 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK)
#define LTC2620_DAC_CMD_NO_OPRTN_VAL ((0xF << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK)
#define LTC2620_DAC_CMD_WR_IN_VAL \
((0x0 << LTC2620_DAC_CMD_OFST) & \
LTC2620_DAC_CMD_MSK) // write to input register
#define LTC2620_DAC_CMD_UPDTE_DAC_VAL \
((0x1 << LTC2620_DAC_CMD_OFST) & \
LTC2620_DAC_CMD_MSK) // update dac (power up)
#define LTC2620_DAC_CMD_WR_IN_UPDTE_DAC_VAL \
((0x2 << LTC2620_DAC_CMD_OFST) & \
LTC2620_DAC_CMD_MSK) // write to input register and update dac (power up)
#define LTC2620_DAC_CMD_WR_UPDTE_DAC_VAL \
((0x3 << LTC2620_DAC_CMD_OFST) & \
LTC2620_DAC_CMD_MSK) // write to and update dac (power up)
#define LTC2620_DAC_CMD_PWR_DWN_VAL \
((0x4 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK)
#define LTC2620_DAC_CMD_NO_OPRTN_VAL \
((0xF << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK)
#define LTC2620_NUMBITS (24)
#define LTC2620_DAISY_CHAIN_NUMBITS (32) // due to shift register FIXME: was 33 earlier
#define LTC2620_DAISY_CHAIN_NUMBITS \
(32) // due to shift register FIXME: was 33 earlier
#define LTC2620_NUMCHANNELS (8)
#define LTC2620_PWR_DOWN_VAL (-100)
#define LTC2620_MIN_VAL (0)
@ -45,7 +56,9 @@ int LTC2620_Ndac = 0;
int LTC2620_MinVoltage = 0;
int LTC2620_MaxVoltage = 0;
void LTC2620_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst, int nd, int minMV, int maxMV) {
void LTC2620_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk,
uint32_t dmsk, int dofst, int nd, int minMV,
int maxMV) {
LTC2620_Reg = reg;
LTC2620_CsMask = cmsk;
LTC2620_ClkMask = clkmsk;
@ -57,32 +70,22 @@ void LTC2620_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t d
}
void LTC2620_Disable() {
bus_w(LTC2620_Reg, (bus_r(LTC2620_Reg)
| LTC2620_CsMask
| LTC2620_ClkMask)
& ~(LTC2620_DigMask));
bus_w(LTC2620_Reg, (bus_r(LTC2620_Reg) | LTC2620_CsMask | LTC2620_ClkMask) &
~(LTC2620_DigMask));
}
int LTC2620_GetPowerDownValue() {
return LTC2620_PWR_DOWN_VAL;
}
int LTC2620_GetPowerDownValue() { return LTC2620_PWR_DOWN_VAL; }
int LTC2620_GetMinInput() {
return LTC2620_MIN_VAL;
}
int LTC2620_GetMinInput() { return LTC2620_MIN_VAL; }
int LTC2620_GetMaxInput() {
return LTC2620_MAX_VAL;
}
int LTC2620_GetMaxInput() { return LTC2620_MAX_VAL; }
int LTC2620_GetMaxNumSteps() {
return LTC2620_MAX_STEPS;
}
int LTC2620_GetMaxNumSteps() { return LTC2620_MAX_STEPS; }
int LTC2620_VoltageToDac(int voltage, int *dacval) {
return ConvertToDifferentRange(LTC2620_MinVoltage, LTC2620_MaxVoltage,
LTC2620_MIN_VAL, LTC2620_MAX_VAL,
voltage, dacval);
LTC2620_MIN_VAL, LTC2620_MAX_VAL, voltage,
dacval);
}
int LTC2620_DacToVoltage(int dacval, int *voltage) {
@ -92,11 +95,12 @@ int LTC2620_DacToVoltage(int dacval, int* voltage) {
}
void LTC2620_SetSingle(int cmd, int data, int dacaddr) {
LOG(logDEBUG2, ("(Single) dac addr:%d, dac value:%d, cmd:%d\n", dacaddr, data, cmd));
LOG(logDEBUG2,
("(Single) dac addr:%d, dac value:%d, cmd:%d\n", dacaddr, data, cmd));
uint32_t codata = (((data << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK) |
((dacaddr << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) |
cmd);
uint32_t codata =
(((data << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK) |
((dacaddr << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) | cmd);
LOG(logDEBUG2, ("codata: 0x%x\n", codata));
serializeToSPI(LTC2620_Reg, codata, LTC2620_CsMask, LTC2620_NUMBITS,
@ -114,18 +118,20 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) {
uint32_t valw = 0;
int ichip = 0;
LOG(logDEBUG2, ("(Daisy) desired chip index:%d, nchip:%d, dac ch:%d, val:%d, cmd:0x%x \n",
LOG(logDEBUG2, ("(Daisy) desired chip index:%d, nchip:%d, dac ch:%d, "
"val:%d, cmd:0x%x \n",
chipIndex, nchip, dacaddr, data, cmd));
// data to be bit banged
uint32_t codata = (((data << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK) |
((dacaddr << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) |
cmd);
uint32_t codata =
(((data << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK) |
((dacaddr << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) | cmd);
LOG(logDEBUG2, ("codata: 0x%x\n", codata));
// select all chips (ctb daisy chain; others 1 chip)
LOG(logDEBUG2, ("Selecting LTC2620\n"));
SPIChipSelect (&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask, LTC2620_DigMask, 0);
SPIChipSelect(&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask,
LTC2620_DigMask, 0);
// send same data to all
if (chipIndex < 0) {
@ -138,7 +144,8 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) {
// send to one chip, nothing to others
else {
// send nothing to subsequent ichips (daisy chain) (if any chips after desired chip)
// send nothing to subsequent ichips (daisy chain) (if any chips after
// desired chip)
for (ichip = chipIndex + 1; ichip < nchip; ++ichip) {
LOG(logDEBUG2, ("Send nothing to ichip %d\n", ichip));
LTC2620_SendDaisyData(&valw, LTC2620_DAC_CMD_NO_OPRTN_VAL);
@ -148,7 +155,8 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) {
LOG(logDEBUG2, ("Send data (0x%x) to ichip %d\n", codata, chipIndex));
LTC2620_SendDaisyData(&valw, codata);
// send nothing to preceding ichips (daisy chain) (if any chips in front of desired chip)
// send nothing to preceding ichips (daisy chain) (if any chips in front
// of desired chip)
for (ichip = 0; ichip < chipIndex; ++ichip) {
LOG(logDEBUG2, ("Send nothing to ichip %d\n", ichip));
LTC2620_SendDaisyData(&valw, LTC2620_DAC_CMD_NO_OPRTN_VAL);
@ -157,11 +165,13 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) {
// deselect all chips (ctb daisy chain; others 1 chip)
LOG(logDEBUG2, ("Deselecting LTC2620\n"));
SPIChipDeselect(&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask, LTC2620_DigMask, 0);
SPIChipDeselect(&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask,
LTC2620_DigMask, 0);
}
void LTC2620_Set(int cmd, int data, int dacaddr, int chipIndex) {
LOG(logDEBUG1, ("cmd:0x%x, data:%d, dacaddr:%d, chipIndex:%d\n", cmd, data, dacaddr, chipIndex));
LOG(logDEBUG1, ("cmd:0x%x, data:%d, dacaddr:%d, chipIndex:%d\n", cmd, data,
dacaddr, chipIndex));
LOG(logDEBUG2, (" ================================================\n"));
// ctb
if (LTC2620_Ndac > LTC2620_NUMCHANNELS)
@ -182,7 +192,8 @@ void LTC2620_Configure(){
int data = 0x6;
// command
int cmd = LTC2620_DAC_CMD_WR_IN_VAL; //FIXME: should be command update and not write(does not power up)
int cmd = LTC2620_DAC_CMD_WR_IN_VAL; // FIXME: should be command update and
// not write(does not power up)
// also why do we need to power up (for jctb, we power down next)
LTC2620_Set(cmd, data, addr, -1);
@ -214,7 +225,8 @@ int LTC2620_SetDACValue (int dacnum, int val, int mV, int* dacval) {
LOG(logDEBUG1, ("dacnum:%d, val:%d, ismV:%d\n", dacnum, val, mV));
// validate index
if (dacnum < 0 || dacnum >= LTC2620_Ndac) {
LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum, LTC2620_Ndac - 1));
LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum,
LTC2620_Ndac - 1));
return FAIL;
}
@ -234,19 +246,22 @@ int LTC2620_SetDACValue (int dacnum, int val, int mV, int* dacval) {
ret = LTC2620_VoltageToDac(val, dacval);
} else if (val >= 0 && dacnum <= ndacsonly) {
// do not convert power down dac val
//(if not ndacsonly (pwr/vchip): dont need to print mV value as it will be wrong (wrong limits))
//(if not ndacsonly (pwr/vchip): dont need to print mV value as it will
//be wrong (wrong limits))
ret = LTC2620_DacToVoltage(val, &dacmV);
}
// conversion out of bounds
if (ret == FAIL) {
LOG(logERROR, ("Setting Dac %d %s is out of bounds\n", dacnum, (mV ? "mV" : "dac units")));
LOG(logERROR, ("Setting Dac %d %s is out of bounds\n", dacnum,
(mV ? "mV" : "dac units")));
return FAIL;
}
// set
if ((*dacval >= 0) || (*dacval == LTC2620_PWR_DOWN_VAL)) {
LOG(logINFO, ("Setting DAC %d: %d dac (%d mV)\n",dacnum, *dacval, dacmV));
LOG(logINFO,
("Setting DAC %d: %d dac (%d mV)\n", dacnum, *dacval, dacmV));
LTC2620_SetDAC(dacnum, *dacval);
}
return OK;

35
slsDetectorServers/slsDetectorServer/src/LTC2620_Driver.c Executable file → Normal file
View File

@ -10,40 +10,40 @@
#define LTC2620_D_MAX_DAC_VAL (4095) // 12 bits
#define LTC2620_D_MAX_STEPS (LTC2620_D_MAX_DAC_VAL + 1)
// defines from the fpga
int LTC2620_D_HardMaxVoltage = 0;
char LTC2620_D_DriverFileName[MAX_STR_LENGTH];
int LTC2620_D_NumDacs = 0;
void LTC2620_D_SetDefines(int hardMaxV, char *driverfname, int numdacs) {
LOG(logINFOBLUE, ("Configuring DACs (LTC2620) to %s (numdacs:%d, hard max: %dmV)\n", driverfname, numdacs, hardMaxV));
LOG(logINFOBLUE,
("Configuring DACs (LTC2620) to %s (numdacs:%d, hard max: %dmV)\n",
driverfname, numdacs, hardMaxV));
LTC2620_D_HardMaxVoltage = hardMaxV;
memset(LTC2620_D_DriverFileName, 0, MAX_STR_LENGTH);
strcpy(LTC2620_D_DriverFileName, driverfname);
LTC2620_D_NumDacs = numdacs;
}
int LTC2620_D_GetMaxNumSteps() {
return LTC2620_D_MAX_STEPS;
}
int LTC2620_D_GetMaxNumSteps() { return LTC2620_D_MAX_STEPS; }
int LTC2620_D_VoltageToDac(int voltage, int *dacval) {
return ConvertToDifferentRange(0, LTC2620_D_HardMaxVoltage, 0, LTC2620_D_MAX_DAC_VAL,
voltage, dacval);
return ConvertToDifferentRange(0, LTC2620_D_HardMaxVoltage, 0,
LTC2620_D_MAX_DAC_VAL, voltage, dacval);
}
int LTC2620_D_DacToVoltage(int dacval, int *voltage) {
return ConvertToDifferentRange( 0, LTC2620_D_MAX_DAC_VAL, 0, LTC2620_D_HardMaxVoltage,
dacval, voltage);
return ConvertToDifferentRange(0, LTC2620_D_MAX_DAC_VAL, 0,
LTC2620_D_HardMaxVoltage, dacval, voltage);
}
int LTC2620_D_SetDACValue (int dacnum, int val, int mV, char* dacname, int* dacval) {
int LTC2620_D_SetDACValue(int dacnum, int val, int mV, char *dacname,
int *dacval) {
LOG(logDEBUG1, ("dacnum:%d, val:%d, ismV:%d\n", dacnum, val, mV));
// validate index
if (dacnum < 0 || dacnum >= LTC2620_D_NumDacs) {
LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum, LTC2620_D_NumDacs - 1));
LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum,
LTC2620_D_NumDacs - 1));
return FAIL;
}
@ -64,14 +64,15 @@ int LTC2620_D_SetDACValue (int dacnum, int val, int mV, char* dacname, int* dacv
// conversion out of bounds
if (ret == FAIL) {
LOG(logERROR, ("Setting Dac %d %s is out of bounds\n", dacnum, (mV ? "mV" : "dac units")));
LOG(logERROR, ("Setting Dac %d %s is out of bounds\n", dacnum,
(mV ? "mV" : "dac units")));
return FAIL;
}
// set
if ((*dacval >= 0) || (*dacval == LTC2620_D_PWR_DOWN_VAL)) {
LOG(logINFO, ("Setting DAC %2d [%-12s] : %d dac (%d mV)\n",dacnum, dacname, *dacval, dacmV));
LOG(logINFO, ("Setting DAC %2d [%-12s] : %d dac (%d mV)\n", dacnum,
dacname, *dacval, dacmV));
#ifndef VIRTUAL
char fname[MAX_STR_LENGTH];
@ -85,14 +86,14 @@ int LTC2620_D_SetDACValue (int dacnum, int val, int mV, char* dacname, int* dacv
// open file
FILE *fd = fopen(fname, "w");
if (fd == NULL) {
LOG(logERROR, ("Could not open file %s for writing to set dac %d\n", fname, dacnum));
LOG(logERROR, ("Could not open file %s for writing to set dac %d\n",
fname, dacnum));
return FAIL;
}
// convert to string, add 0 and write to file
fprintf(fd, "%d\n", *dacval);
fclose(fd);
#endif
}
return OK;
}

20
slsDetectorServers/slsDetectorServer/src/MAX1932.c Executable file → Normal file
View File

@ -1,8 +1,8 @@
#include "MAX1932.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "blackfin.h"
#include "clogger.h"
#include "common.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "sls_detector_defs.h"
/* MAX1932 HV DEFINES */
@ -24,8 +24,8 @@ int MAX1932_DigOffset = 0x0;
int MAX1932_MinVoltage = 0;
int MAX1932_MaxVoltage = 0;
void MAX1932_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst,
int minMV, int maxMV) {
void MAX1932_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk,
uint32_t dmsk, int dofst, int minMV, int maxMV) {
LOG(logINFOBLUE, ("Configuring High Voltage\n"));
MAX1932_Reg = reg;
MAX1932_CsMask = cmsk;
@ -37,10 +37,8 @@ void MAX1932_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t d
}
void MAX1932_Disable() {
bus_w(MAX1932_Reg, (bus_r(MAX1932_Reg)
| MAX1932_CsMask
| MAX1932_ClkMask)
& ~(MAX1932_DigMask));
bus_w(MAX1932_Reg, (bus_r(MAX1932_Reg) | MAX1932_CsMask | MAX1932_ClkMask) &
~(MAX1932_DigMask));
}
int MAX1932_Set(int *val) {
@ -64,8 +62,8 @@ int MAX1932_Set (int* val) {
else {
// no failure in conversion as limits handled (range from 0x1 to 0xFF)
ConvertToDifferentRange(MAX1932_MinVoltage, MAX1932_MaxVoltage,
MAX1932_MIN_DAC_VAL, MAX1932_MAX_DAC_VAL,
*val, &dacvalue);
MAX1932_MIN_DAC_VAL, MAX1932_MAX_DAC_VAL, *val,
&dacvalue);
dacvalue &= MAX1932_HV_DATA_MSK;
}
@ -74,7 +72,3 @@ int MAX1932_Set (int* val) {
MAX1932_ClkMask, MAX1932_DigMask, MAX1932_DigOffset, 0);
return OK;
}

53
slsDetectorServers/slsDetectorServer/src/UDPPacketHeaderGenerator.c Executable file → Normal file
View File

@ -2,16 +2,16 @@
#include "clogger.h"
#include "sls_detector_defs.h"
#include <stdio.h>
#include <stdlib.h>
#include <sys/types.h>
#include <sys/socket.h>
#include <arpa/inet.h>
#include <netinet/in.h>
#include <string.h>
#include <unistd.h>
#include <errno.h>
#include <netdb.h>
#include <netinet/in.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/socket.h>
#include <sys/types.h>
#include <unistd.h>
#define UDP_PACKET_HEADER_VERSION (0x1)
@ -27,14 +27,9 @@ int digitalOffset = 0;
uint32_t udpPacketNumber = 0;
uint64_t udpFrameNumber = 0;
uint32_t getUDPPacketNumber() { return udpPacketNumber; }
uint32_t getUDPPacketNumber() {
return udpPacketNumber;
}
uint64_t getUDPFrameNumber() {
return udpFrameNumber;
}
uint64_t getUDPFrameNumber() { return udpFrameNumber; }
void createUDPPacketHeader(char *buffer, uint16_t id) {
memset(buffer, 0, sizeof(sls_detector_header));
@ -54,7 +49,9 @@ void createUDPPacketHeader(char* buffer, uint16_t id) {
}
int fillUDPPacket(char *buffer) {
LOG(logDEBUG2, ("Analog (databytes:%d, offset:%d)\n Digital (databytes:%d offset:%d)\n",
LOG(logDEBUG2,
("Analog (databytes:%d, offset:%d)\n Digital (databytes:%d "
"offset:%d)\n",
analogDataBytes, analogOffset, digitalDataBytes, digitalOffset));
// reached end of data for one frame
if (analogOffset >= analogDataBytes && digitalOffset >= digitalDataBytes) {
@ -76,7 +73,8 @@ int fillUDPPacket(char* buffer) {
// increment and copy udp packet number (starts at 0)
++udpPacketNumber;
header->packetNumber = udpPacketNumber;
LOG(logDEBUG2, ("Creating packet number %d (fnum:%lld)\n", udpPacketNumber, (long long int) udpFrameNumber));
LOG(logDEBUG2, ("Creating packet number %d (fnum:%lld)\n", udpPacketNumber,
(long long int)udpFrameNumber));
int freeBytes = UDP_PACKET_DATA_BYTES;
@ -84,10 +82,12 @@ int fillUDPPacket(char* buffer) {
int analogBytes = 0;
if (analogOffset < analogDataBytes) {
// bytes to copy
analogBytes = ((analogOffset + freeBytes) <= analogDataBytes) ?
freeBytes : (analogDataBytes - analogOffset);
analogBytes = ((analogOffset + freeBytes) <= analogDataBytes)
? freeBytes
: (analogDataBytes - analogOffset);
// copy
memcpy(buffer + sizeof(sls_detector_header), analogData + analogOffset, analogBytes);
memcpy(buffer + sizeof(sls_detector_header), analogData + analogOffset,
analogBytes);
// increment offset
analogOffset += analogBytes;
// decrement free bytes
@ -98,10 +98,12 @@ int fillUDPPacket(char* buffer) {
int digitalBytes = 0;
if (freeBytes && digitalOffset < digitalDataBytes) {
// bytes to copy
digitalBytes = ((digitalOffset + freeBytes) <= digitalDataBytes) ?
freeBytes : (digitalDataBytes - digitalOffset);
digitalBytes = ((digitalOffset + freeBytes) <= digitalDataBytes)
? freeBytes
: (digitalDataBytes - digitalOffset);
// copy
memcpy(buffer + sizeof(sls_detector_header) + analogBytes, digitalData + digitalOffset, digitalBytes);
memcpy(buffer + sizeof(sls_detector_header) + analogBytes,
digitalData + digitalOffset, digitalBytes);
// increment offset
digitalOffset += digitalBytes;
// decrement free bytes
@ -110,8 +112,11 @@ int fillUDPPacket(char* buffer) {
// pad data
if (freeBytes) {
memset(buffer + sizeof(sls_detector_header) + analogBytes + digitalBytes, 0, freeBytes);
LOG(logDEBUG1, ("Padding %d bytes for fnum:%lld pnum:%d\n", freeBytes, (long long int)udpFrameNumber, udpPacketNumber));
memset(buffer + sizeof(sls_detector_header) + analogBytes +
digitalBytes,
0, freeBytes);
LOG(logDEBUG1, ("Padding %d bytes for fnum:%lld pnum:%d\n", freeBytes,
(long long int)udpFrameNumber, udpPacketNumber));
}
return UDP_PACKET_DATA_BYTES + sizeof(sls_detector_header);

19
slsDetectorServers/slsDetectorServer/src/blackfin.c Executable file → Normal file
View File

@ -1,8 +1,8 @@
#include "blackfin.h"
#include "RegisterDefs.h"
#include "sls_detector_defs.h"
#include "ansi.h"
#include "clogger.h"
#include "sls_detector_defs.h"
#include <fcntl.h> // open
#include <sys/mman.h> // mmap
@ -12,7 +12,6 @@ u_int32_t* csp0base = 0;
#define CSP0 0x20200000
#define MEM_SIZE 0x100000
void bus_w16(u_int32_t offset, u_int16_t data) {
volatile u_int16_t *ptr1;
ptr1 = (u_int16_t *)(csp0base + offset / 2);
@ -44,7 +43,8 @@ int64_t get64BitReg(int aLSB, int aMSB){
vMSB = bus_r(aMSB);
v64 = vMSB;
v64 = (v64 << 32) | vLSB;
LOG(logDEBUG5, (" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, (long long unsigned int)v64));
LOG(logDEBUG5, (" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB,
(long long unsigned int)v64));
return v64;
}
@ -59,7 +59,6 @@ int64_t set64BitReg(int64_t value, int aLSB, int aMSB){
bus_w(aMSB, vMSB);
}
return get64BitReg(aLSB, aMSB);
}
uint64_t getU64BitReg(int aLSB, int aMSB) {
@ -110,21 +109,19 @@ int mapCSP0(void) {
return FAIL;
}
LOG(logDEBUG1, ("/dev/mem opened\n"));
csp0base = mmap(0, MEM_SIZE, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, fd, CSP0);
csp0base = mmap(0, MEM_SIZE, PROT_READ | PROT_WRITE,
MAP_FILE | MAP_SHARED, fd, CSP0);
if (csp0base == MAP_FAILED) {
LOG(logERROR, ("Can't map memmory area\n"));
return FAIL;
}
#endif
LOG(logINFO, ("csp0base mapped from %p to %p\n",
csp0base, (csp0base + MEM_SIZE)));
LOG(logINFO, ("csp0base mapped from %p to %p\n", csp0base,
(csp0base + MEM_SIZE)));
LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG)));
} else
LOG(logINFO, ("Memory already mapped before\n"));
return OK;
}
uint32_t* Blackfin_getBaseAddress() {
return csp0base;
}
uint32_t *Blackfin_getBaseAddress() { return csp0base; }

17
slsDetectorServers/slsDetectorServer/src/common.c Executable file → Normal file
View File

@ -2,13 +2,14 @@
#include "clogger.h"
#include "sls_detector_defs.h"
int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin, int outputMax,
int inputValue, int* outputValue) {
int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin,
int outputMax, int inputValue, int *outputValue) {
LOG(logDEBUG1, (" Input Value: %d (Input:(%d - %d), Output:(%d - %d))\n",
inputValue, inputMin, inputMax, outputMin, outputMax));
// validate within bounds
// eg. MAX1932 range is v(60 - 200) to dac(255 - 1), here inputMin > inputMax (when dac to voltage)
// eg. MAX1932 range is v(60 - 200) to dac(255 - 1), here inputMin >
// inputMax (when dac to voltage)
int smaller = inputMin;
int bigger = inputMax;
if (smaller > bigger) {
@ -16,13 +17,16 @@ int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin, int outpu
bigger = inputMin;
}
if ((inputValue < smaller) || (inputValue > bigger)) {
LOG(logERROR, ("Input Value is outside bounds (%d to %d): %d\n", smaller, bigger, inputValue));
LOG(logERROR, ("Input Value is outside bounds (%d to %d): %d\n",
smaller, bigger, inputValue));
*outputValue = -1;
return FAIL;
}
double value = ((double)(inputValue - inputMin) * (double)(outputMax - outputMin))
/ (double)(inputMax - inputMin) + outputMin;
double value =
((double)(inputValue - inputMin) * (double)(outputMax - outputMin)) /
(double)(inputMax - inputMin) +
outputMin;
// double to integer conversion (if decimal places, round to integer)
if ((value - (int)value) > 0.0001) {
@ -33,4 +37,3 @@ int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin, int outpu
LOG(logDEBUG1, (" Converted Output Value: %d\n", *outputValue));
return OK;
}

66
slsDetectorServers/slsDetectorServer/src/commonServerFunctions.c Executable file → Normal file
View File

@ -4,15 +4,19 @@
#include <unistd.h> // usleep
void SPIChipSelect (uint32_t* valw, uint32_t addr, uint32_t csmask, uint32_t clkmask, uint32_t digoutmask, int convBit) {
LOG(logDEBUG2, ("SPI chip select. valw:0x%08x addr:0x%x csmask:0x%x, clkmask:0x%x digmask:0x%x convbit:%d\n",
void SPIChipSelect(uint32_t *valw, uint32_t addr, uint32_t csmask,
uint32_t clkmask, uint32_t digoutmask, int convBit) {
LOG(logDEBUG2, ("SPI chip select. valw:0x%08x addr:0x%x csmask:0x%x, "
"clkmask:0x%x digmask:0x%x convbit:%d\n",
*valw, addr, csmask, clkmask, digoutmask, convBit));
// start point
if (convBit) {
// needed for the slow adcs for apprx 20 ns before and after rising of convbit (usleep val is vague assumption)
// needed for the slow adcs for apprx 20 ns before and after rising of
// convbit (usleep val is vague assumption)
usleep(20);
// clkmask has to be down for conversion to have correct value (for conv bit = 1)
// clkmask has to be down for conversion to have correct value (for conv
// bit = 1)
(*valw) = (((bus_r(addr) | csmask) & (~clkmask)) & (~digoutmask));
} else {
(*valw) = ((bus_r(addr) | csmask | clkmask) & (~digoutmask));
@ -20,7 +24,8 @@ void SPIChipSelect (uint32_t* valw, uint32_t addr, uint32_t csmask, uint32_t cl
bus_w(addr, (*valw));
LOG(logDEBUG2, ("startpoint. valw:0x%08x\n", *valw));
// needed for the slow adcs for apprx 10 ns before and after rising of convbit (usleep val is vague assumption)
// needed for the slow adcs for apprx 10 ns before and after rising of
// convbit (usleep val is vague assumption)
if (convBit)
usleep(10);
@ -30,12 +35,14 @@ void SPIChipSelect (uint32_t* valw, uint32_t addr, uint32_t csmask, uint32_t cl
LOG(logDEBUG2, ("chip sel bar down. valw:0x%08x\n", *valw));
}
void SPIChipDeselect (uint32_t* valw, uint32_t addr, uint32_t csmask, uint32_t clkmask, uint32_t digoutmask, int convBit) {
LOG(logDEBUG2, ("SPI chip deselect. valw:0x%08x addr:0x%x csmask:0x%x, clkmask:0x%x digmask:0x%x convbit:%d\n",
void SPIChipDeselect(uint32_t *valw, uint32_t addr, uint32_t csmask,
uint32_t clkmask, uint32_t digoutmask, int convBit) {
LOG(logDEBUG2, ("SPI chip deselect. valw:0x%08x addr:0x%x csmask:0x%x, "
"clkmask:0x%x digmask:0x%x convbit:%d\n",
*valw, addr, csmask, clkmask, digoutmask, convBit));
// needed for the slow adcs for apprx 20 ns before and after rising of convbit (usleep val is vague assumption)
// needed for the slow adcs for apprx 20 ns before and after rising of
// convbit (usleep val is vague assumption)
if (convBit)
usleep(20);
@ -44,7 +51,8 @@ void SPIChipDeselect (uint32_t* valw, uint32_t addr, uint32_t csmask, uint32_t
bus_w(addr, (*valw));
LOG(logDEBUG2, ("chip sel bar up. valw:0x%08x\n", *valw));
// needed for the slow adcs for apprx 10 ns before and after rising of convbit (usleep val is vague assumption)
// needed for the slow adcs for apprx 10 ns before and after rising of
// convbit (usleep val is vague assumption)
if (convBit)
usleep(10);
@ -61,12 +69,18 @@ void SPIChipDeselect (uint32_t* valw, uint32_t addr, uint32_t csmask, uint32_t
} else {
(*valw) |= csmask;
}
bus_w (addr, (*valw)); //FIXME: for ctb slow adcs, might need to set it to low again
bus_w(
addr,
(*valw)); // FIXME: for ctb slow adcs, might need to set it to low again
LOG(logDEBUG2, ("stop point. valw:0x%08x\n", *valw));
}
void sendDataToSPI (uint32_t* valw, uint32_t addr, uint32_t val, int numbitstosend, uint32_t clkmask, uint32_t digoutmask, int digofset) {
LOG(logDEBUG2, ("SPI send data. valw:0x%08x addr:0x%x val:0x%x, numbitstosend:%d, clkmask:0x%x digmask:0x%x digofst:%d\n",
void sendDataToSPI(uint32_t *valw, uint32_t addr, uint32_t val,
int numbitstosend, uint32_t clkmask, uint32_t digoutmask,
int digofset) {
LOG(logDEBUG2,
("SPI send data. valw:0x%08x addr:0x%x val:0x%x, numbitstosend:%d, "
"clkmask:0x%x digmask:0x%x digofst:%d\n",
*valw, addr, val, numbitstosend, clkmask, digoutmask, digofset));
int i = 0;
@ -79,7 +93,8 @@ void sendDataToSPI (uint32_t* valw, uint32_t addr, uint32_t val, int numbitstose
// write data (i)
(*valw) = (((*valw) & ~digoutmask) + // unset bit
(((val >> (numbitstosend - 1 - i)) & 0x1) << digofset)); // each bit from val starting from msb
(((val >> (numbitstosend - 1 - i)) & 0x1)
<< digofset)); // each bit from val starting from msb
bus_w(addr, (*valw));
LOG(logDEBUG2, ("write data %d. valw:0x%08x\n", i, *valw));
@ -90,8 +105,10 @@ void sendDataToSPI (uint32_t* valw, uint32_t addr, uint32_t val, int numbitstose
}
}
uint32_t receiveDataFromSPI (uint32_t* valw, uint32_t addr, int numbitstoreceive, uint32_t clkmask, uint32_t readaddr) {
LOG(logDEBUG2, ("SPI send data. valw:0x%08x addr:0x%x numbitstoreceive:%d, clkmask:0x%x readaddr:0x%x \n",
uint32_t receiveDataFromSPI(uint32_t *valw, uint32_t addr, int numbitstoreceive,
uint32_t clkmask, uint32_t readaddr) {
LOG(logDEBUG2, ("SPI send data. valw:0x%08x addr:0x%x numbitstoreceive:%d, "
"clkmask:0x%x readaddr:0x%x \n",
*valw, addr, numbitstoreceive, clkmask, readaddr));
uint32_t retval = 0;
@ -121,7 +138,9 @@ uint32_t receiveDataFromSPI (uint32_t* valw, uint32_t addr, int numbitstoreceive
return retval;
}
void serializeToSPI(uint32_t addr, uint32_t val, uint32_t csmask, int numbitstosend, uint32_t clkmask, uint32_t digoutmask, int digofset, int convBit) {
void serializeToSPI(uint32_t addr, uint32_t val, uint32_t csmask,
int numbitstosend, uint32_t clkmask, uint32_t digoutmask,
int digofset, int convBit) {
if (numbitstosend == 16) {
LOG(logDEBUG2, ("Writing to SPI Register: 0x%04x\n", val));
} else {
@ -131,21 +150,26 @@ void serializeToSPI(uint32_t addr, uint32_t val, uint32_t csmask, int numbitstos
SPIChipSelect(&valw, addr, csmask, clkmask, digoutmask, convBit);
sendDataToSPI(&valw, addr, val, numbitstosend, clkmask, digoutmask, digofset);
sendDataToSPI(&valw, addr, val, numbitstosend, clkmask, digoutmask,
digofset);
SPIChipDeselect(&valw, addr, csmask, clkmask, digoutmask, convBit);
}
uint32_t serializeFromSPI(uint32_t addr, uint32_t csmask, int numbitstoreceive, uint32_t clkmask, uint32_t digoutmask, uint32_t readaddr, int convBit) {
uint32_t serializeFromSPI(uint32_t addr, uint32_t csmask, int numbitstoreceive,
uint32_t clkmask, uint32_t digoutmask,
uint32_t readaddr, int convBit) {
uint32_t valw;
SPIChipSelect(&valw, addr, csmask, clkmask, digoutmask, convBit);
uint32_t retval = receiveDataFromSPI(&valw, addr, numbitstoreceive, clkmask, readaddr);
uint32_t retval =
receiveDataFromSPI(&valw, addr, numbitstoreceive, clkmask, readaddr);
// not needed for conv bit (not a chip select)
//SPIChipDeselect(&valw, addr, csmask, clkmask, digoutmask, convBit); // moving this before bringin up earlier changes temp of slow adc
// SPIChipDeselect(&valw, addr, csmask, clkmask, digoutmask, convBit); //
// moving this before bringin up earlier changes temp of slow adc
if (numbitstoreceive == 16) {
LOG(logDEBUG2, ("Read From SPI Register: 0x%04x\n", retval));

172
slsDetectorServers/slsDetectorServer/src/communication_funcs.c Executable file → Normal file
View File

@ -1,15 +1,13 @@
#include "communication_funcs.h"
#include "clogger.h"
#include <string.h>
#include <errno.h>
#include <arpa/inet.h>
#include <errno.h>
#include <string.h>
#include <sys/select.h>
#include <unistd.h>
#define SEND_REC_MAX_SIZE 4096
#define DEFAULT_PORTNO 1952
#define DEFAULT_BACKLOG 5
@ -19,7 +17,6 @@
#define CPU_RSND_PCKT_LOOP (10)
#define CPU_RSND_WAIT_US (1)
// Global variables from errno.h
// extern int errno;
@ -44,7 +41,6 @@ int isock = 0;
// becomes max value of socket descriptor (listen) and file descriptor (accept)
int maxfd = 0;
int bindSocket(unsigned short int port_number) {
ret = FAIL;
int socketDescriptor = -1;
@ -53,7 +49,9 @@ int bindSocket(unsigned short int port_number) {
// same port
if (myport == port_number) {
sprintf(mess, "Cannot create %s socket with port %d. Already in use before.\n",
sprintf(
mess,
"Cannot create %s socket with port %d. Already in use before.\n",
(isControlServer ? "control" : "stop"), port_number);
LOG(logERROR, (mess));
}
@ -72,14 +70,16 @@ int bindSocket(unsigned short int port_number) {
else {
i = 1;
// set port reusable
setsockopt(socketDescriptor, SOL_SOCKET, SO_REUSEADDR, &i, sizeof(i));
setsockopt(socketDescriptor, SOL_SOCKET, SO_REUSEADDR, &i,
sizeof(i));
// Set some fields in the serverAddress structure
addressS.sin_family = AF_INET;
addressS.sin_addr.s_addr = htonl(INADDR_ANY);
addressS.sin_port = htons(port_number);
// bind socket error
if(bind(socketDescriptor,(struct sockaddr *) &addressS,sizeof(addressS)) < 0){
if (bind(socketDescriptor, (struct sockaddr *)&addressS,
sizeof(addressS)) < 0) {
sprintf(mess, "Cannot bind %s socket to port %d.\n",
(isControlServer ? "control" : "stop"), port_number);
LOG(logERROR, (mess));
@ -100,14 +100,17 @@ int bindSocket(unsigned short int port_number) {
// success
myport = port_number;
ret = OK;
LOG(logDEBUG1, ("%s socket bound: isock=%d, port=%d, fd=%d\n",
(isControlServer ? "Control":"Stop"), isock, port_number, socketDescriptor));
LOG(logDEBUG1,
("%s socket bound: isock=%d, port=%d, fd=%d\n",
(isControlServer ? "Control" : "Stop"), isock,
port_number, socketDescriptor));
}
// listen socket error
else {
sprintf(mess, "Cannot bind %s socket to port %d.\n",
(isControlServer ? "control":"stop"), port_number);
(isControlServer ? "control" : "stop"),
port_number);
LOG(logERROR, (mess));
}
}
@ -117,8 +120,6 @@ int bindSocket(unsigned short int port_number) {
return socketDescriptor;
}
int acceptConnection(int socketDescriptor) {
int j;
struct sockaddr_in addressC;
@ -147,13 +148,15 @@ int acceptConnection(int socketDescriptor) {
// error (not signal caught)
else if (result < 0 && errno != EINTR) {
LOG(logERROR, ("%s socket select() error: %s\n",
LOG(logERROR,
("%s socket select() error: %s\n",
(isControlServer ? "control" : "stop"), myport, strerror(errno)));
}
// activity in descriptor set
else if (result > 0) {
LOG(logDEBUG3, ("%s select returned!\n", (isControlServer ? "control":"stop")));
LOG(logDEBUG3,
("%s select returned!\n", (isControlServer ? "control" : "stop")));
// loop through the file descriptor set
for (j = 0; j < maxfd + 1; ++j) {
@ -166,11 +169,13 @@ int acceptConnection(int socketDescriptor) {
FD_CLR(j, &tempset);
// accept connection (if error)
if ((file_des = accept(j,(struct sockaddr *) &addressC, &address_length)) < 0) {
LOG(logERROR, ("%s socket accept() error. Connection refused.\n",
if ((file_des = accept(j, (struct sockaddr *)&addressC,
&address_length)) < 0) {
LOG(logERROR,
("%s socket accept() error. Connection refused.\n",
"Error Number: %d, Message: %s\n",
(isControlServer ? "control":"stop"),
myport, errno, strerror(errno)));
(isControlServer ? "control" : "stop"), myport, errno,
strerror(errno)));
switch (errno) {
case EWOULDBLOCK:
LOG(logERROR, ("ewouldblock eagain"));
@ -222,8 +227,10 @@ int acceptConnection(int socketDescriptor) {
else {
char buf[INET_ADDRSTRLEN] = "";
memset(buf, 0, INET_ADDRSTRLEN);
inet_ntop(AF_INET, &(addressC.sin_addr), buf, INET_ADDRSTRLEN);
LOG(logDEBUG3, ("%s socket accepted connection, fd= %d\n",
inet_ntop(AF_INET, &(addressC.sin_addr), buf,
INET_ADDRSTRLEN);
LOG(logDEBUG3,
("%s socket accepted connection, fd= %d\n",
(isControlServer ? "control" : "stop"), file_des));
getIpAddressFromString(buf, &dummyClientIP);
@ -238,12 +245,6 @@ int acceptConnection(int socketDescriptor) {
return file_des;
}
void closeConnection(int file_des) {
if (file_des >= 0)
close(file_des);
@ -255,15 +256,13 @@ void exitServer(int socketDescriptor) {
if (socketDescriptor >= 0) {
close(socketDescriptor);
}
LOG(logINFO, ("Closing %s server\n", (isControlServer ? "control":"stop")));
LOG(logINFO,
("Closing %s server\n", (isControlServer ? "control" : "stop")));
FD_CLR(socketDescriptor, &readset);
isock--;
fflush(stdout);
}
void swapData(void *val, int length, intType itype) {
int i;
int16_t *c = (int16_t *)val;
@ -281,8 +280,10 @@ void swapData(void* val,int length,intType itype){
length -= sizeof(int32_t);
break;
case INT64:
b[i] = ((b[i] << 8) & 0xFF00FF00FF00FF00ULL ) | ((b[i] >> 8) & 0x00FF00FF00FF00FFULL );
b[i] = ((b[i] << 16) & 0xFFFF0000FFFF0000ULL ) | ((b[i] >> 16) & 0x0000FFFF0000FFFFULL );
b[i] = ((b[i] << 8) & 0xFF00FF00FF00FF00ULL) |
((b[i] >> 8) & 0x00FF00FF00FF00FFULL);
b[i] = ((b[i] << 16) & 0xFFFF0000FFFF0000ULL) |
((b[i] >> 16) & 0x0000FFFF0000FFFFULL);
b[i] = (b[i] << 32) | ((b[i] >> 32) & 0xFFFFFFFFULL);
length -= sizeof(int64_t);
break;
@ -302,48 +303,52 @@ int sendData(int file_des, void* buf,int length, intType itype){
return sendDataOnly(file_des, buf, length);
}
int receiveData(int file_des, void *buf, int length, intType itype) {
int lret = receiveDataOnly(file_des, buf, length);
#ifndef PCCOMPILE
#ifdef EIGERD
if (lret >= 0) swapData(buf, length, itype);
if (lret >= 0)
swapData(buf, length, itype);
#endif
#endif
return lret;
}
int sendDataOnly(int file_des, void *buf, int length) {
if (!length)
return 0;
int bytesSent = 0;
int retry = 0; // retry index when buffer is blocked (write returns 0)
while (bytesSent < length) {
// setting a max packet size for blackfin driver (and network driver does not do a check if packets sent)
// setting a max packet size for blackfin driver (and network driver
// does not do a check if packets sent)
int bytesToSend = length - bytesSent;
if (bytesToSend > CPU_DRVR_SND_LMT)
bytesToSend = CPU_DRVR_SND_LMT;
// send
int rc = write(file_des, (char*)((char*)buf + bytesSent), bytesToSend);
int rc =
write(file_des, (char *)((char *)buf + bytesSent), bytesToSend);
// error
if (rc < 0) {
LOG(logERROR, ("Could not write to %s socket. Possible socket crash\n",
LOG(logERROR,
("Could not write to %s socket. Possible socket crash\n",
(isControlServer ? "control" : "stop")));
return bytesSent;
}
// also error, wrote nothing, buffer blocked up, too fast sending for client
// also error, wrote nothing, buffer blocked up, too fast sending for
// client
if (rc == 0) {
LOG(logERROR, ("Could not write to %s socket. Buffer full. Retry: %d\n",
LOG(logERROR,
("Could not write to %s socket. Buffer full. Retry: %d\n",
(isControlServer ? "control" : "stop"), retry));
++retry;
// wrote nothing for many loops
if (retry >= CPU_RSND_PCKT_LOOP) {
LOG(logERROR, ("Could not write to %s socket. Buffer full! Too fast! No more.\n",
LOG(logERROR, ("Could not write to %s socket. Buffer full! Too "
"fast! No more.\n",
(isControlServer ? "control" : "stop")));
return bytesSent;
}
@ -353,7 +358,9 @@ int sendDataOnly(int file_des, void* buf,int length) {
else {
retry = 0;
if (rc != bytesToSend) {
LOG(logWARNING, ("Only partial write to %s socket. Expected to write %d bytes, wrote %d\n",
LOG(logWARNING,
("Only partial write to %s socket. Expected to write %d "
"bytes, wrote %d\n",
(isControlServer ? "control" : "stop"), bytesToSend, rc));
}
}
@ -363,18 +370,20 @@ int sendDataOnly(int file_des, void* buf,int length) {
return bytesSent;
}
int receiveDataOnly(int file_des, void *buf, int length) {
int total_received = 0;
int nreceiving;
int nreceived;
if (file_des<0) return -1;
LOG(logDEBUG3, ("want to receive %d Bytes to %s server\n",
length, (isControlServer ? "control":"stop")));
if (file_des < 0)
return -1;
LOG(logDEBUG3, ("want to receive %d Bytes to %s server\n", length,
(isControlServer ? "control" : "stop")));
while (length > 0) {
nreceiving = (length>SEND_REC_MAX_SIZE) ? SEND_REC_MAX_SIZE:length; // (condition) ? if_true : if_false
nreceiving = (length > SEND_REC_MAX_SIZE)
? SEND_REC_MAX_SIZE
: length; // (condition) ? if_true : if_false
nreceived = read(file_des, (char *)buf + total_received, nreceiving);
if (!nreceived) {
if (!total_received) {
@ -391,19 +400,16 @@ int receiveDataOnly(int file_des, void* buf,int length) {
if (lastClientIP != thisClientIP) {
differentClients = 1;
}
else
} else
differentClients = 0;
return total_received;
}
int sendModule(int file_des, sls_detector_module *myMod) {
int ts = 0, n = 0;
n = sendData(file_des,&(myMod->serialnumber),sizeof(myMod->serialnumber),INT32);
n = sendData(file_des, &(myMod->serialnumber), sizeof(myMod->serialnumber),
INT32);
if (!n) {
return -1;
}
@ -428,8 +434,7 @@ int sendModule(int file_des, sls_detector_module *myMod) {
return -1;
}
ts += n;
n = sendData(file_des, &(myMod->iodelay), sizeof(myMod->iodelay),
INT32);
n = sendData(file_des, &(myMod->iodelay), sizeof(myMod->iodelay), INT32);
if (!n) {
return -1;
}
@ -463,8 +468,6 @@ int sendModule(int file_des, sls_detector_module *myMod) {
return ts;
}
int receiveModule(int file_des, sls_detector_module *myMod) {
enum TLogLevel level = logDEBUG1;
LOG(level, ("Receiving Module\n"));
@ -474,7 +477,8 @@ int receiveModule(int file_des, sls_detector_module* myMod) {
int nChans = myMod->nchan; // can be zero for no trimbits
LOG(level, ("nChans: %d\n", nChans));
#endif
n = receiveData(file_des,&(myMod->serialnumber), sizeof(myMod->serialnumber), INT32);
n = receiveData(file_des, &(myMod->serialnumber),
sizeof(myMod->serialnumber), INT32);
if (!n) {
return -1;
}
@ -486,36 +490,32 @@ int receiveModule(int file_des, sls_detector_module* myMod) {
return -1;
}
ts += n;
LOG(level,
("nchan received. %d bytes. nchan: %d\n", n, myMod->nchan));
LOG(level, ("nchan received. %d bytes. nchan: %d\n", n, myMod->nchan));
n = receiveData(file_des, &(myMod->nchip), sizeof(myMod->nchip), INT32);
if (!n) {
return -1;
}
ts += n;
LOG(level,
("nchip received. %d bytes. nchip: %d\n", n, myMod->nchip));
LOG(level, ("nchip received. %d bytes. nchip: %d\n", n, myMod->nchip));
n = receiveData(file_des, &(myMod->ndac), sizeof(myMod->ndac), INT32);
if (!n) {
return -1;
}
ts += n;
LOG(level,
("ndac received. %d bytes. ndac: %d\n", n, myMod->ndac));
LOG(level, ("ndac received. %d bytes. ndac: %d\n", n, myMod->ndac));
n = receiveData(file_des, &(myMod->reg), sizeof(myMod->reg), INT32);
if (!n) {
return -1;
}
ts += n;
LOG(level, ("reg received. %d bytes. reg: %d\n", n, myMod->reg));
n = receiveData(file_des, &(myMod->iodelay), sizeof(myMod->iodelay),
INT32);
n = receiveData(file_des, &(myMod->iodelay), sizeof(myMod->iodelay), INT32);
if (!n) {
return -1;
}
ts += n;
LOG(level, ("iodelay received. %d bytes. iodelay: %d\n", n,
myMod->iodelay));
LOG(level,
("iodelay received. %d bytes. iodelay: %d\n", n, myMod->iodelay));
n = receiveData(file_des, &(myMod->tau), sizeof(myMod->tau), INT32);
if (!n) {
return -1;
@ -546,10 +546,12 @@ int receiveModule(int file_des, sls_detector_module* myMod) {
if (((myMod->nchan) != 0) && // no trimbits
(nChans != (myMod->nchan))) { // with trimbits
LOG(logERROR, ("received wrong number of channels. "
"Expected %d, got %d\n", nChans, (myMod->nchan)));
"Expected %d, got %d\n",
nChans, (myMod->nchan)));
return 0;
}
n = receiveData(file_des, myMod->chanregs, sizeof(int) * (myMod->nchan), INT32);
n = receiveData(file_des, myMod->chanregs, sizeof(int) * (myMod->nchan),
INT32);
LOG(level, ("chanregs received. %d bytes.\n", n));
if (!n && myMod->nchan != 0) {
return -1;
@ -560,7 +562,6 @@ int receiveModule(int file_des, sls_detector_module* myMod) {
return ts;
}
void Server_LockedError() {
ret = FAIL;
char buf[INET_ADDRSTRLEN] = "";
@ -569,15 +570,14 @@ void Server_LockedError() {
LOG(logWARNING, (mess));
}
int Server_VerifyLock() {
if (differentClients && lockStatus)
Server_LockedError();
return ret;
}
int Server_SendResult(int fileDes, intType itype, void* retval, int retvalSize) {
int Server_SendResult(int fileDes, intType itype, void *retval,
int retvalSize) {
// send success of operation
int ret1 = ret;
@ -598,16 +598,13 @@ int Server_SendResult(int fileDes, intType itype, void* retval, int retvalSize)
return ret;
}
void getMacAddressinString(char *cmac, int size, uint64_t mac) {
memset(cmac, 0, size);
sprintf(cmac,"%02x:%02x:%02x:%02x:%02x:%02x",
(unsigned int)((mac>>40)&0xFF),
(unsigned int)((mac>>32)&0xFF),
(unsigned int)((mac>>24)&0xFF),
(unsigned int)((mac>>16)&0xFF),
(unsigned int)((mac>>8)&0xFF),
(unsigned int)((mac>>0)&0xFF));
sprintf(
cmac, "%02x:%02x:%02x:%02x:%02x:%02x",
(unsigned int)((mac >> 40) & 0xFF), (unsigned int)((mac >> 32) & 0xFF),
(unsigned int)((mac >> 24) & 0xFF), (unsigned int)((mac >> 16) & 0xFF),
(unsigned int)((mac >> 8) & 0xFF), (unsigned int)((mac >> 0) & 0xFF));
}
void getIpAddressinString(char *cip, uint32_t ip) {
@ -615,12 +612,11 @@ void getIpAddressinString(char* cip, uint32_t ip) {
#if defined(EIGERD) && !defined(VIRTUAL)
inet_ntop(AF_INET, &ip, cip, INET_ADDRSTRLEN);
#else
sprintf(cip, "%d.%d.%d.%d",
(ip>>24)&0xff,(ip>>16)&0xff,(ip>>8)&0xff,(ip)&0xff);
sprintf(cip, "%d.%d.%d.%d", (ip >> 24) & 0xff, (ip >> 16) & 0xff,
(ip >> 8) & 0xff, (ip)&0xff);
#endif
}
void getIpAddressFromString(char *cip, uint32_t *ip) {
char buf[INET_ADDRSTRLEN] = "";
memset(buf, 0, INET_ADDRSTRLEN);

59
slsDetectorServers/slsDetectorServer/src/communication_funcs_UDP.c Executable file → Normal file
View File

@ -2,16 +2,16 @@
#include "clogger.h"
#include "sls_detector_defs.h"
#include <stdio.h>
#include <stdlib.h>
#include <sys/types.h>
#include <sys/socket.h>
#include <arpa/inet.h>
#include <netinet/in.h>
#include <string.h>
#include <unistd.h>
#include <errno.h>
#include <netdb.h>
#include <netinet/in.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/socket.h>
#include <sys/types.h>
#include <unistd.h>
int udpSockfd[2] = {-1, -1};
struct addrinfo *udpServerAddrInfo[2] = {0, 0};
@ -19,15 +19,15 @@ unsigned short int udpDestinationPort[2] = {0, 0};
char udpDestinationIp[2][INET_ADDRSTRLEN] = {"", ""};
// DEFAULT_TX_UDP_PORT;// src port
int getUdPSocketDescriptor(int index) {
return udpSockfd[index];
}
int getUdPSocketDescriptor(int index) { return udpSockfd[index]; }
int setUDPDestinationDetails(int index, const char* ip, unsigned short int port) {
int setUDPDestinationDetails(int index, const char *ip,
unsigned short int port) {
udpDestinationPort[index] = port;
size_t len = strlen(ip);
memset(udpDestinationIp[index], 0, INET_ADDRSTRLEN);
strncpy(udpDestinationIp[index], ip, len > INET_ADDRSTRLEN ? INET_ADDRSTRLEN : len );
strncpy(udpDestinationIp[index], ip,
len > INET_ADDRSTRLEN ? INET_ADDRSTRLEN : len);
if (udpServerAddrInfo[index]) {
freeaddrinfo(udpServerAddrInfo[index]);
@ -44,15 +44,19 @@ int setUDPDestinationDetails(int index, const char* ip, unsigned short int port)
char sport[100];
memset(sport, 0, 100);
sprintf(sport, "%d", udpDestinationPort[index]);
int err = getaddrinfo(udpDestinationIp[index], sport, &hints, &udpServerAddrInfo[index]);
int err = getaddrinfo(udpDestinationIp[index], sport, &hints,
&udpServerAddrInfo[index]);
if (err != 0) {
LOG(logERROR, ("Failed to resolve remote socket address %s at port %d. "
"(Error code:%d, %s)\n", udpDestinationIp[index], udpDestinationPort[index], err, gai_strerror(err)));
"(Error code:%d, %s)\n",
udpDestinationIp[index], udpDestinationPort[index], err,
gai_strerror(err)));
return FAIL;
}
if (udpServerAddrInfo[index] == NULL) {
LOG(logERROR, ("Failed to resolve remote socket address %s at port %d "
"(getaddrinfo returned NULL)\n", udpDestinationIp[index], udpDestinationPort[index]));
"(getaddrinfo returned NULL)\n",
udpDestinationIp[index], udpDestinationPort[index]));
udpServerAddrInfo[index] = 0;
return FAIL;
}
@ -68,13 +72,16 @@ int createUDPSocket(int index) {
}
if (udpSockfd[index] != -1) {
LOG(logERROR, ("Strange that Udp socket was still open. Closing it to create a new one\n"));
LOG(logERROR, ("Strange that Udp socket was still open. Closing it to "
"create a new one\n"));
close(udpSockfd[index]);
udpSockfd[index] = -1;
}
// Creating socket file descriptor
udpSockfd[index] = socket(udpServerAddrInfo[index]->ai_family, udpServerAddrInfo[index]->ai_socktype, udpServerAddrInfo[index]->ai_protocol);
udpSockfd[index] = socket(udpServerAddrInfo[index]->ai_family,
udpServerAddrInfo[index]->ai_socktype,
udpServerAddrInfo[index]->ai_protocol);
if (udpSockfd[index] == -1) {
LOG(logERROR, ("UDP socket at port %d failed. (Error code:%d, %s)\n",
udpDestinationPort[index], errno, gai_strerror(errno)));
@ -83,19 +90,23 @@ int createUDPSocket(int index) {
LOG(logINFO, ("Udp client socket created for server (port %d, ip:%s)\n",
udpDestinationPort[index], udpDestinationIp[index]));
// Using connect expects that the receiver (udp server) exists to listen to these packets
// connecting allows to use "send/write" instead of "sendto", avoiding checking for server address for each packet
// using write without a connect will end in segv
LOG(logINFO, ("Udp client socket connected\n",
udpDestinationPort[index], udpDestinationIp[index]));
// Using connect expects that the receiver (udp server) exists to listen to
// these packets connecting allows to use "send/write" instead of "sendto",
// avoiding checking for server address for each packet using write without
// a connect will end in segv
LOG(logINFO, ("Udp client socket connected\n", udpDestinationPort[index],
udpDestinationIp[index]));
return OK;
}
int sendUDPPacket(int index, const char *buf, int length) {
int n = sendto(udpSockfd[index], buf, length, 0, udpServerAddrInfo[index]->ai_addr, udpServerAddrInfo[index]->ai_addrlen);
int n = sendto(udpSockfd[index], buf, length, 0,
udpServerAddrInfo[index]->ai_addr,
udpServerAddrInfo[index]->ai_addrlen);
// udp sends atomically, no need to handle partial data
if (n == -1) {
LOG(logERROR, ("Could not send udp packet for socket %d. (Error code:%d, %s)\n",
LOG(logERROR,
("Could not send udp packet for socket %d. (Error code:%d, %s)\n",
index, n, errno, gai_strerror(errno)));
} else {
LOG(logDEBUG2, ("%d bytes sent\n", n));

7
slsDetectorServers/slsDetectorServer/src/communication_virtual.c Executable file → Normal file
View File

@ -80,7 +80,8 @@ int ComVirtual_getStop() {
return retval;
}
int ComVirtual_writeToFile(int value, const char* fname, const char* serverName) {
int ComVirtual_writeToFile(int value, const char *fname,
const char *serverName) {
FILE *fd = NULL;
if (NULL == (fd = fopen(fname, "w"))) {
LOG(logERROR, ("Vritual %s Server [%d] could not open "
@ -98,7 +99,8 @@ int ComVirtual_writeToFile(int value, const char* fname, const char* serverName)
return 1;
}
int ComVirtual_readFromFile(int* value, const char* fname, const char* serverName) {
int ComVirtual_readFromFile(int *value, const char *fname,
const char *serverName) {
FILE *fd = NULL;
if (NULL == (fd = fopen(fname, "r"))) {
LOG(logERROR, ("Vritual %s Server [%d] could not open "
@ -116,5 +118,4 @@ int ComVirtual_readFromFile(int* value, const char* fname, const char* serverNam
return 1;
}
#endif

35
slsDetectorServers/slsDetectorServer/src/nios.c Executable file → Normal file
View File

@ -1,8 +1,8 @@
#include "nios.h"
#include "RegisterDefs.h"
#include "sls_detector_defs.h"
#include "ansi.h"
#include "clogger.h"
#include "sls_detector_defs.h"
#include <fcntl.h> // open
#include <sys/mman.h> // mmap
@ -10,7 +10,9 @@
/* global variables */
u_int32_t *csp0base = 0;
#define CSP0 0x18060000
#define MEM_SIZE 0x100000 //TODO (1804 0000 - 1804 07FF = 800 * 4 = 2000), (1806 0000 = 10000* 4 = 40000)
#define MEM_SIZE \
0x100000 // TODO (1804 0000 - 1804 07FF = 800 * 4 = 2000), (1806 0000 =
// 10000* 4 = 40000)
u_int32_t *csp1base = 0;
#define CSP1 0x18040000
@ -46,7 +48,8 @@ int64_t get64BitReg(int aLSB, int aMSB){
vMSB = bus_r(aMSB);
v64 = vMSB;
v64 = (v64 << 32) | vLSB;
LOG(logDEBUG5, (" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, (long long unsigned int)v64));
LOG(logDEBUG5, (" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB,
(long long unsigned int)v64));
return v64;
}
@ -61,7 +64,6 @@ int64_t set64BitReg(int64_t value, int aLSB, int aMSB){
bus_w(aMSB, vMSB);
}
return get64BitReg(aLSB, aMSB);
}
uint64_t getU64BitReg(int aLSB, int aMSB) {
@ -75,16 +77,13 @@ void setU64BitReg(uint64_t value, int aLSB, int aMSB){
bus_w(aMSB, (value >> 32) & (0xffffffff));
}
u_int32_t readRegister(u_int32_t offset) {
return bus_r(offset);
}
u_int32_t readRegister(u_int32_t offset) { return bus_r(offset); }
u_int32_t writeRegister(u_int32_t offset, u_int32_t data) {
bus_w(offset, data);
return readRegister(offset);
}
int mapCSP0(void) {
u_int32_t csps[2] = {CSP0, CSP1};
u_int32_t **cspbases[2] = {&csp0base, &csp1base};
@ -98,7 +97,8 @@ int mapCSP0(void) {
#ifdef VIRTUAL
*cspbases[i] = malloc(MEM_SIZE);
if (*cspbases[i] == NULL) {
LOG(logERROR, ("Could not allocate virtual memory for %s.\n", names[i]));
LOG(logERROR,
("Could not allocate virtual memory for %s.\n", names[i]));
return FAIL;
}
LOG(logINFO, ("memory allocated for %s\n", names[i]));
@ -108,15 +108,18 @@ int mapCSP0(void) {
LOG(logERROR, ("Can't find /dev/mem for %s\n", names[i]));
return FAIL;
}
LOG(logDEBUG1, ("/dev/mem opened for %s, (CSP:0x%x)\n", names[i], csps[i]));
*cspbases[i] = (u_int32_t*)mmap(0, MEM_SIZE, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, fd, csps[i]);
LOG(logDEBUG1,
("/dev/mem opened for %s, (CSP:0x%x)\n", names[i], csps[i]));
*cspbases[i] =
(u_int32_t *)mmap(0, MEM_SIZE, PROT_READ | PROT_WRITE,
MAP_FILE | MAP_SHARED, fd, csps[i]);
if (*cspbases[i] == MAP_FAILED) {
LOG(logERROR, ("Can't map memmory area for %s\n", names[i]));
return FAIL;
}
#endif
LOG(logINFO, ("%s mapped from %p to %p,(CSP:0x%x) \n",
names[i], *cspbases[i], *cspbases[i]+MEM_SIZE, csps[i]));
LOG(logINFO, ("%s mapped from %p to %p,(CSP:0x%x) \n", names[i],
*cspbases[i], *cspbases[i] + MEM_SIZE, csps[i]));
// LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG)));
} else
LOG(logINFO, ("Memory %s already mapped before\n", names[i]));
@ -124,8 +127,4 @@ int mapCSP0(void) {
return OK;
}
u_int32_t* Nios_getBaseAddress() {
return csp0base;
}
u_int32_t *Nios_getBaseAddress() { return csp0base; }

15
slsDetectorServers/slsDetectorServer/src/programFpgaBlackfin.c Executable file → Normal file
View File

@ -3,9 +3,8 @@
#include "clogger.h"
#include "slsDetectorServer_defs.h"
#include <unistd.h> // usleep
#include <string.h>
#include <unistd.h> // usleep
/* global variables */
#define MTDSIZE 10
@ -23,7 +22,8 @@ void defineGPIOpins(){
system("echo out > /sys/class/gpio/gpio9/direction");
LOG(logINFO, ("gpio pins defined\n"));
gpioDefined = 1;
}else LOG(logDEBUG1, ("gpio pins already defined earlier\n"));
} else
LOG(logDEBUG1, ("gpio pins already defined earlier\n"));
}
void FPGAdontTouchFlash() {
@ -65,7 +65,8 @@ int startWritingFPGAprogram(FILE** filefp){
// mtd3: 01000000 00010000 "bitfile(spi)"
char output[255];
memset(output, 0, 255);
FILE* fp = popen("awk \'$4== \"\\\"bitfile(spi)\\\"\" {print $1}\' /proc/mtd", "r");
FILE *fp = popen(
"awk \'$4== \"\\\"bitfile(spi)\\\"\" {print $1}\' /proc/mtd", "r");
if (fp == NULL) {
LOG(logERROR, ("popen returned NULL. Need that to get mtd drive.\n"));
return 1;
@ -127,13 +128,15 @@ void stopWritingFPGAprogram(FILE* filefp){
}
int writeFPGAProgram(char *fpgasrc, uint64_t fsize, FILE *filefp) {
LOG(logDEBUG1, ("Writing of FPGA Program\n"
LOG(logDEBUG1,
("Writing of FPGA Program\n"
"\taddress of fpgasrc:%p\n"
"\tfsize:%llu\n\tpointer:%p\n",
(void *)fpgasrc, (long long unsigned int)fsize, (void *)filefp));
if (fwrite((void *)fpgasrc, sizeof(char), fsize, filefp) != fsize) {
LOG(logERROR, ("Could not write FPGA source to flash (size:%llu)\n", (long long unsigned int)fsize));
LOG(logERROR, ("Could not write FPGA source to flash (size:%llu)\n",
(long long unsigned int)fsize));
return 1;
}
LOG(logDEBUG1, ("program written to flash\n"));

14
slsDetectorServers/slsDetectorServer/src/programFpgaNios.c Executable file → Normal file
View File

@ -3,9 +3,8 @@
#include "clogger.h"
#include "slsDetectorServer_defs.h"
#include <unistd.h> // usleep
#include <string.h>
#include <unistd.h> // usleep
/* global variables */
#define MTDSIZE 10
@ -26,10 +25,12 @@ void CreateNotificationForCriticalTasks() {
if (fd == NULL) {
fd = fopen(NOTIFICATION_FILE, "w");
if (fd == NULL) {
LOG(logERROR, ("Could not create notication file: %s\n", NOTIFICATION_FILE));
LOG(logERROR,
("Could not create notication file: %s\n", NOTIFICATION_FILE));
return;
}
LOG(logINFOBLUE, ("Created notification file: %s\n", NOTIFICATION_FILE));
LOG(logINFOBLUE,
("Created notification file: %s\n", NOTIFICATION_FILE));
}
fclose(fd);
NotifyCriticalTaskDone();
@ -143,7 +144,10 @@ int writeFPGAProgram(char* mess, char* fpgasrc, uint64_t fsize, FILE* filefp) {
uint64_t retval = fwrite((void *)fpgasrc, sizeof(char), fsize, filefp);
if (retval != fsize) {
sprintf (mess, "Could not write FPGA source to flash (size:%llu), write %llu\n", (long long unsigned int) fsize, (long long unsigned int)retval);
sprintf(
mess,
"Could not write FPGA source to flash (size:%llu), write %llu\n",
(long long unsigned int)fsize, (long long unsigned int)retval);
LOG(logERROR, (mess));
return FAIL;
}

151
slsDetectorServers/slsDetectorServer/src/readDefaultPattern.c Executable file → Normal file
View File

@ -1,8 +1,8 @@
#include "readDefaultPattern.h"
#include "sls_detector_defs.h"
#include "slsDetectorServer_defs.h"
#include "ansi.h"
#include "clogger.h"
#include "slsDetectorServer_defs.h"
#include "sls_detector_defs.h"
#include <string.h>
@ -14,8 +14,8 @@ extern uint64_t writePatternClkControl(uint64_t word);
extern uint64_t writePatternWord(int addr, uint64_t word);
extern int setPatternWaitAddress(int level, int addr);
extern uint64_t setPatternWaitTime(int level, uint64_t t);
extern void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop);
extern void setPatternLoop(int level, int *startAddr, int *stopAddr,
int *nLoop);
int loadDefaultPattern(char *fname) {
if (initError == FAIL) {
@ -31,7 +31,6 @@ int loadDefaultPattern(char* fname) {
}
LOG(logINFOBLUE, ("Reading default pattern file %s\n", fname));
// Initialization
const size_t LZ = 256;
char line[LZ];
@ -77,8 +76,8 @@ int loadDefaultPattern(char* fname) {
LOG(logDEBUG1, ("Removing leading spaces.\n"));
}
LOG(logDEBUG1, ("Command to process: (size:%d) %.*s\n",
strlen(line), strlen(line) -1, line));
LOG(logDEBUG1, ("Command to process: (size:%d) %.*s\n", strlen(line),
strlen(line) - 1, line));
memset(command, 0, LZ);
// patword
@ -92,8 +91,10 @@ int loadDefaultPattern(char* fname) {
#else
if (sscanf(line, "%s 0x%x 0x%llx", command, &addr, &word) != 3) {
#endif
sprintf(initErrorMessage, "Could not scan patword arguments from default "
"pattern file. Line:[%s].\n", line);
sprintf(initErrorMessage,
"Could not scan patword arguments from default "
"pattern file. Line:[%s].\n",
line);
break;
}
@ -112,8 +113,10 @@ int loadDefaultPattern(char* fname) {
#else
if (sscanf(line, "%s 0x%llx", command, &arg) != 2) {
#endif
sprintf(initErrorMessage, "Could not scan patioctrl arguments from default "
"pattern file. Line:[%s].\n", line);
sprintf(initErrorMessage,
"Could not scan patioctrl arguments from default "
"pattern file. Line:[%s].\n",
line);
break;
}
@ -132,8 +135,10 @@ int loadDefaultPattern(char* fname) {
#else
if (sscanf(line, "%s 0x%llx", command, &arg) != 2) {
#endif
sprintf(initErrorMessage, "Could not scan patclkctrl arguments from default "
"pattern file. Line:[%s].\n", line);
sprintf(initErrorMessage,
"Could not scan patclkctrl arguments from default "
"pattern file. Line:[%s].\n",
line);
break;
}
@ -148,13 +153,17 @@ int loadDefaultPattern(char* fname) {
uint32_t stopAddr = 0;
// cannot scan values
if (sscanf(line, "%s 0x%x 0x%x", command, &startAddr, &stopAddr) != 3) {
sprintf(initErrorMessage, "Could not scan patlimits arguments from default "
"pattern file. Line:[%s].\n", line);
if (sscanf(line, "%s 0x%x 0x%x", command, &startAddr, &stopAddr) !=
3) {
sprintf(initErrorMessage,
"Could not scan patlimits arguments from default "
"pattern file. Line:[%s].\n",
line);
break;
}
if (default_setPatternLoopLimits(line, startAddr, stopAddr) == FAIL) {
if (default_setPatternLoopLimits(line, startAddr, stopAddr) ==
FAIL) {
break;
}
}
@ -177,13 +186,17 @@ int loadDefaultPattern(char* fname) {
uint32_t startAddr = 0;
uint32_t stopAddr = 0;
// cannot scan values
if (sscanf(line, "%s 0x%x 0x%x", command, &startAddr, &stopAddr) != 3) {
sprintf(initErrorMessage, "Could not scan patloop%d arguments from default "
"pattern file. Line:[%s].\n", level, line);
if (sscanf(line, "%s 0x%x 0x%x", command, &startAddr, &stopAddr) !=
3) {
sprintf(initErrorMessage,
"Could not scan patloop%d arguments from default "
"pattern file. Line:[%s].\n",
level, line);
break;
}
if (default_setPatternLoopAddresses(line, level, startAddr, stopAddr) == FAIL) {
if (default_setPatternLoopAddresses(line, level, startAddr,
stopAddr) == FAIL) {
break;
}
}
@ -206,8 +219,10 @@ int loadDefaultPattern(char* fname) {
int numLoops = -1;
// cannot scan values
if (sscanf(line, "%s %d", command, &numLoops) != 2) {
sprintf(initErrorMessage, "Could not scan patnloop%d arguments from default "
"pattern file. Line:[%s].\n", level, line);
sprintf(initErrorMessage,
"Could not scan patnloop%d arguments from default "
"pattern file. Line:[%s].\n",
level, line);
break;
}
@ -234,8 +249,10 @@ int loadDefaultPattern(char* fname) {
uint32_t addr = 0;
// cannot scan values
if (sscanf(line, "%s 0x%x", command, &addr) != 2) {
sprintf(initErrorMessage, "Could not scan patwait%d arguments from default "
"pattern file. Line:[%s].\n", level, line);
sprintf(initErrorMessage,
"Could not scan patwait%d arguments from default "
"pattern file. Line:[%s].\n",
level, line);
break;
}
@ -267,8 +284,10 @@ int loadDefaultPattern(char* fname) {
#else
if (sscanf(line, "%s %lld", command, &waittime) != 2) {
#endif
sprintf(initErrorMessage, "Could not scan patwaittime%d arguments from default "
"pattern file. Line:[%s].\n", level, line);
sprintf(initErrorMessage,
"Could not scan patwaittime%d arguments from default "
"pattern file. Line:[%s].\n",
level, line);
break;
}
@ -290,11 +309,11 @@ int loadDefaultPattern(char* fname) {
return initError;
}
int default_writePatternWord(char *line, uint32_t addr, uint64_t word) {
// validations
if ((int32_t)addr < 0 || addr >= MAX_PATTERN_LENGTH) {
sprintf(initErrorMessage, "Cannot set pattern word from default "
sprintf(initErrorMessage,
"Cannot set pattern word from default "
"pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n",
MAX_PATTERN_LENGTH, line);
return FAIL;
@ -308,38 +327,47 @@ int default_writePatternIOControl(char* line, uint64_t arg) {
uint64_t retval = writePatternIOControl(arg);
if (retval != arg) {
#ifdef VIRTUAL
sprintf(initErrorMessage, "Could not set patioctrl from default pattern "
"file. Set 0x%lx, read 0x%lx. Line:[%s]\n", arg, retval, line);
sprintf(initErrorMessage,
"Could not set patioctrl from default pattern "
"file. Set 0x%lx, read 0x%lx. Line:[%s]\n",
arg, retval, line);
#else
sprintf(initErrorMessage, "Could not set patioctrl from default pattern "
"file. Set 0x%llx, read 0x%llx. Line:[%s]\n", arg, retval, line);
sprintf(initErrorMessage,
"Could not set patioctrl from default pattern "
"file. Set 0x%llx, read 0x%llx. Line:[%s]\n",
arg, retval, line);
#endif
return FAIL;
}
return OK;
}
int default_writePatternClkControl(char *line, uint64_t arg) {
uint64_t retval = writePatternClkControl(arg);
if (retval != arg) {
#ifdef VIRTUAL
sprintf(initErrorMessage, "Could not set patclkctrl from default pattern "
"file. Set 0x%lx, read 0x%lx. Line:[%s]\n", arg, retval, line);
sprintf(initErrorMessage,
"Could not set patclkctrl from default pattern "
"file. Set 0x%lx, read 0x%lx. Line:[%s]\n",
arg, retval, line);
#else
sprintf(initErrorMessage, "Could not set patclkctrl from default pattern "
"file. Set 0x%llx, read 0x%llx. Line:[%s]\n", arg, retval, line);
sprintf(initErrorMessage,
"Could not set patclkctrl from default pattern "
"file. Set 0x%llx, read 0x%llx. Line:[%s]\n",
arg, retval, line);
#endif
return FAIL;
}
return OK;
}
int default_setPatternLoopLimits(char* line, uint32_t startAddr, uint32_t stopAddr) {
int default_setPatternLoopLimits(char *line, uint32_t startAddr,
uint32_t stopAddr) {
// validations
if ((int32_t)startAddr < 0 || startAddr >= MAX_PATTERN_LENGTH ||
(int32_t)stopAddr < 0 || stopAddr >= MAX_PATTERN_LENGTH) {
sprintf(initErrorMessage, "Cannot set patlimits from default "
sprintf(initErrorMessage,
"Cannot set patlimits from default "
"pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n",
MAX_PATTERN_LENGTH, line);
return FAIL;
@ -350,7 +378,8 @@ int default_setPatternLoopLimits(char* line, uint32_t startAddr, uint32_t stopAd
// validate
if (r_startAddr != (int)startAddr || r_stopAddr != (int)stopAddr) {
sprintf(initErrorMessage, "Could not set patlimits from default pattern "
sprintf(initErrorMessage,
"Could not set patlimits from default pattern "
"file. Read start addr:0x%x, stop addr: 0x%x. Line:[%s]\n",
r_startAddr, r_stopAddr, line);
return FAIL;
@ -358,17 +387,20 @@ int default_setPatternLoopLimits(char* line, uint32_t startAddr, uint32_t stopAd
return OK;
}
int default_setPatternLoopAddresses(char* line, int level, uint32_t startAddr, uint32_t stopAddr) {
int default_setPatternLoopAddresses(char *line, int level, uint32_t startAddr,
uint32_t stopAddr) {
// validations
if (level < 0 || level > 2) {
sprintf(initErrorMessage, "Cannot set patloop from default "
sprintf(initErrorMessage,
"Cannot set patloop from default "
"pattern file. Level must be between 0 and 2. Line:[%s]\n",
line);
return FAIL;
}
if ((int32_t)startAddr < 0 || startAddr >= MAX_PATTERN_LENGTH ||
(int32_t)stopAddr < 0 || stopAddr >= MAX_PATTERN_LENGTH) {
sprintf(initErrorMessage, "Cannot set patloop (level: %d) from default "
sprintf(initErrorMessage,
"Cannot set patloop (level: %d) from default "
"pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n",
level, MAX_PATTERN_LENGTH, line);
return FAIL;
@ -379,7 +411,9 @@ int default_setPatternLoopAddresses(char* line, int level, uint32_t startAddr, u
// validate
if (r_startAddr != (int)startAddr || r_stopAddr != (int)stopAddr) {
sprintf(initErrorMessage, "Could not set patloop (level: %d) from default "
sprintf(
initErrorMessage,
"Could not set patloop (level: %d) from default "
"pattern file. Read start addr:0x%x, stop addr: 0x%x. Line:[%s]\n",
level, r_startAddr, r_stopAddr, line);
return FAIL;
@ -390,13 +424,15 @@ int default_setPatternLoopAddresses(char* line, int level, uint32_t startAddr, u
int default_setPatternLoopCycles(char *line, int level, int numLoops) {
// validations
if (level < 0 || level > 2) {
sprintf(initErrorMessage, "Cannot set patnloop from default "
sprintf(initErrorMessage,
"Cannot set patnloop from default "
"pattern file. Level must be between 0 and 2. Line:[%s]\n",
line);
return FAIL;
}
if (numLoops < 0) {
sprintf(initErrorMessage, "Cannot set patnloop from default "
sprintf(initErrorMessage,
"Cannot set patnloop from default "
"pattern file. Iterations must be between > 0. Line:[%s]\n",
line);
return FAIL;
@ -408,7 +444,8 @@ int default_setPatternLoopCycles(char* line, int level, int numLoops) {
// validate
if (r_numLoops != numLoops) {
sprintf(initErrorMessage, "Could not set patnloop (level: %d) from default "
sprintf(initErrorMessage,
"Could not set patnloop (level: %d) from default "
"pattern file. Read %d loops. Line:[%s]\n",
level, r_numLoops, line);
return FAIL;
@ -419,13 +456,15 @@ int default_setPatternLoopCycles(char* line, int level, int numLoops) {
int default_setPatternWaitAddresses(char *line, int level, uint32_t addr) {
// validations
if (level < 0 || level > 2) {
sprintf(initErrorMessage, "Cannot set patwait address from default "
sprintf(initErrorMessage,
"Cannot set patwait address from default "
"pattern file. Level must be between 0 and 2. Line:[%s]\n",
line);
return FAIL;
}
if ((int32_t)addr < 0 || addr >= MAX_PATTERN_LENGTH) {
sprintf(initErrorMessage, "Cannot set patwait address (level: %d) from default "
sprintf(initErrorMessage,
"Cannot set patwait address (level: %d) from default "
"pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n",
level, MAX_PATTERN_LENGTH, line);
return FAIL;
@ -435,7 +474,8 @@ int default_setPatternWaitAddresses(char* line, int level, uint32_t addr) {
// validate
if (retval != addr) {
sprintf(initErrorMessage, "Could not set patwait address (level: %d) from default "
sprintf(initErrorMessage,
"Could not set patwait address (level: %d) from default "
"pattern file. Read addr: 0x%x. Line:[%s]\n",
level, retval, line);
return FAIL;
@ -446,7 +486,8 @@ int default_setPatternWaitAddresses(char* line, int level, uint32_t addr) {
int default_setPatternWaitTime(char *line, int level, uint64_t waittime) {
// validations
if (level < 0 || level > 2) {
sprintf(initErrorMessage, "Cannot set patwaittime from default "
sprintf(initErrorMessage,
"Cannot set patwaittime from default "
"pattern file. Level must be between 0 and 2. Line:[%s]\n",
line);
return FAIL;
@ -456,11 +497,13 @@ int default_setPatternWaitTime(char* line, int level, uint64_t waittime) {
// validate
if (retval != waittime) {
#ifdef VIRTUAL
sprintf(initErrorMessage, "Could not set patwaittime (level: %d) from default "
sprintf(initErrorMessage,
"Could not set patwaittime (level: %d) from default "
"pattern file. Read %ld wait time. Line:[%s]\n",
level, retval, line);
#else
sprintf(initErrorMessage, "Could not set patwaittime (level: %d) from default "
sprintf(initErrorMessage,
"Could not set patwaittime (level: %d) from default "
"pattern file. Read %lld wait time. Line:[%s]\n",
level, retval, line);
#endif

26
slsDetectorServers/slsDetectorServer/src/slsDetectorServer.c Executable file → Normal file
View File

@ -1,11 +1,11 @@
/* A simple server in the internet domain using TCP
The port number is passed as an argument */
#include "sls_detector_defs.h"
#include "clogger.h"
#include "communication_funcs.h"
#include "slsDetectorServer_funcs.h"
#include "slsDetectorServer_defs.h"
#include "slsDetectorServer_funcs.h"
#include "sls_detector_defs.h"
#include "versionAPI.h"
#ifdef VIRTUAL
#include "communication_virtual.h"
@ -24,15 +24,12 @@ extern int sockfd;
extern int debugflag;
extern int checkModuleFlag;
// Global variables from slsDetectorFunctionList
#ifdef GOTTHARDD
extern int phaseShift;
#endif
void error(char *msg){
perror(msg);
}
void error(char *msg) { perror(msg); }
int main(int argc, char *argv[]) {
@ -69,22 +66,20 @@ int main(int argc, char *argv[]) {
if (!strcasecmp(argv[i], "-stopserver")) {
LOG(logINFO, ("Detected stop server\n"));
isControlServer = 0;
}
else if(!strcasecmp(argv[i],"-devel")){
} else if (!strcasecmp(argv[i], "-devel")) {
LOG(logINFO, ("Detected developer mode\n"));
debugflag = 1;
}
else if(!strcasecmp(argv[i],"-nomodule")){
} else if (!strcasecmp(argv[i], "-nomodule")) {
LOG(logINFO, ("Detected No Module mode\n"));
checkModuleFlag = 0;
}
else if(!strcasecmp(argv[i],"-port")){
} else if (!strcasecmp(argv[i], "-port")) {
if ((i + 1) >= argc) {
LOG(logERROR, ("no port value given. Exiting.\n"));
return -1;
}
if (sscanf(argv[i + 1], "%d", &portno) == 0) {
LOG(logERROR, ("cannot decode port value %s. Exiting.\n", argv[i + 1]));
LOG(logERROR, ("cannot decode port value %s. Exiting.\n",
argv[i + 1]));
return -1;
}
LOG(logINFO, ("Detected port: %d\n", portno));
@ -96,7 +91,9 @@ int main(int argc, char *argv[]) {
return -1;
}
if (sscanf(argv[i + 1], "%d", &phaseShift) == 0) {
LOG(logERROR, ("cannot decode phase shift value %s. Exiting.\n", argv[i + 1]));
LOG(logERROR,
("cannot decode phase shift value %s. Exiting.\n",
argv[i + 1]));
return -1;
}
LOG(logINFO, ("Detected phase shift of %d\n", phaseShift));
@ -148,7 +145,6 @@ int main(int argc, char *argv[]) {
#endif
}
init_detector();
// bind socket
sockfd = bindSocket(portno);

2011
slsDetectorServers/slsDetectorServer/src/slsDetectorServer_funcs.c Executable file → Normal file
View File

File diff suppressed because it is too large Load Diff