detectors/slsDetectorPackage
25
0
Fork 0
mirror of https://github.com/slsdetectorgroup/slsDetectorPackage.git synced 2025-04-19 18:40:01 +02:00
Code Issues Actions Packages Releases Activity

format slsdetectorservers .c

Browse Source
This commit is contained in:
maliakal_d 2020-05-05 15:30:44 +02:00
parent 671cf45fd7
commit 7d94ad51ab
43 changed files with 20315 additions and 18726 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
cmake/clang-format.cmake
View File

@ -1,7 +1,7 @@
# A CMake script to find all source files and setup clang-format targets for them # A CMake script to find all source files and setup clang-format targets for them
# Find all source files # Find all source files
set(ClangFormat_CXX_FILE_EXTENSIONS ${ClangFormat_CXX_FILE_EXTENSIONS} *.cpp *.h *.cxx *.hxx *.hpp *.cc *.ipp) set(ClangFormat_CXX_FILE_EXTENSIONS ${ClangFormat_CXX_FILE_EXTENSIONS} *.cpp *.h *.cxx *.hxx *.hpp *.cc *.ipp *.c)
file(GLOB_RECURSE ALL_SOURCE_FILES ${ClangFormat_CXX_FILE_EXTENSIONS}) file(GLOB_RECURSE ALL_SOURCE_FILES ${ClangFormat_CXX_FILE_EXTENSIONS})
# Don't include some common build folders # Don't include some common build folders

34
slsDetectorServers/ctbDetectorServer/RegisterDefs.h
View File

@ -145,12 +145,14 @@
/* Exposure Time Left 64 bit RO register */ /* Exposure Time Left 64 bit RO register */
//#define EXPTIME_LEFT_LSB_REG (0x1A << MEM_MAP_SHIFT) // Not //#define EXPTIME_LEFT_LSB_REG (0x1A << MEM_MAP_SHIFT) // Not
//used in FW #define EXPTIME_LEFT_MSB_REG (0x1B << MEM_MAP_SHIFT) // used in FW #define EXPTIME_LEFT_MSB_REG (0x1B <<
// MEM_MAP_SHIFT)
//// Not used in FW //// Not used in FW
/* Gates Left 64 bit RO register */ /* Gates Left 64 bit RO register */
//#define GATES_LEFT_LSB_REG (0x1C << MEM_MAP_SHIFT) // Not //#define GATES_LEFT_LSB_REG (0x1C << MEM_MAP_SHIFT) // Not
//used in FW #define GATES_LEFT_MSB_REG (0x1D << MEM_MAP_SHIFT) // used in FW #define GATES_LEFT_MSB_REG (0x1D <<
// MEM_MAP_SHIFT)
//// Not used in FW //// Not used in FW
/* Data In 64 bit RO register TODO */ /* Data In 64 bit RO register TODO */
@ -163,7 +165,8 @@
/* Frames From Start 64 bit RO register TODO */ /* Frames From Start 64 bit RO register TODO */
//#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT) // Not //#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT) // Not
//used in FW #define FRAMES_FROM_START_MSB_REG (0x23 << MEM_MAP_SHIFT) // used in FW #define FRAMES_FROM_START_MSB_REG (0x23 <<
// MEM_MAP_SHIFT)
//// Not used in FW //// Not used in FW
/* Frames From Start PG 64 bit RO register. Reset using CONTROL_CRST. TODO */ /* Frames From Start PG 64 bit RO register. Reset using CONTROL_CRST. TODO */
@ -331,21 +334,22 @@
#define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST) #define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST)
//#define CONTROL_STRT_FF_TST_OFST (2) //#define CONTROL_STRT_FF_TST_OFST (2)
//#define CONTROL_STRT_FF_TST_MSK (0x00000001 << //#define CONTROL_STRT_FF_TST_MSK (0x00000001 <<
//CONTROL_STRT_FF_TST_OFST) #define CONTROL_STP_FF_TST_OFST (3) // CONTROL_STRT_FF_TST_OFST) #define CONTROL_STP_FF_TST_OFST (3)
//#define CONTROL_STP_FF_TST_MSK (0x00000001 << //#define CONTROL_STP_FF_TST_MSK (0x00000001 <<
//CONTROL_STP_FF_TST_OFST) #define CONTROL_STRT_RDT_OFST (4) // CONTROL_STP_FF_TST_OFST) #define CONTROL_STRT_RDT_OFST (4)
//#define CONTROL_STRT_RDT_MSK (0x00000001 << //#define CONTROL_STRT_RDT_MSK (0x00000001 <<
//CONTROL_STRT_RDT_OFST) #define CONTROL_STP_RDT_OFST (5) #define // CONTROL_STRT_RDT_OFST) #define CONTROL_STP_RDT_OFST (5)
//CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST) // #define CONTROL_STP_RDT_MSK (0x00000001 <<
// CONTROL_STP_RDT_OFST)
#define CONTROL_STRT_EXPSR_OFST (6) #define CONTROL_STRT_EXPSR_OFST (6)
#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST) #define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST)
//#define CONTROL_STP_EXPSR_OFST (7) //#define CONTROL_STP_EXPSR_OFST (7)
//#define CONTROL_STP_EXPSR_MSK (0x00000001 << //#define CONTROL_STP_EXPSR_MSK (0x00000001 <<
//CONTROL_STP_RDT_OFST) #define CONTROL_STRT_TRN_OFST (8) #define // CONTROL_STP_RDT_OFST) #define CONTROL_STRT_TRN_OFST (8) #define
//CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) // CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_RDT_OFST)
//#define CONTROL_STP_TRN_OFST (9) //#define CONTROL_STP_TRN_OFST (9)
//#define CONTROL_STP_TRN_MSK (0x00000001 << //#define CONTROL_STP_TRN_MSK (0x00000001 <<
//CONTROL_STP_RDT_OFST) // CONTROL_STP_RDT_OFST)
#define CONTROL_CRE_RST_OFST (10) #define CONTROL_CRE_RST_OFST (10)
#define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST) #define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST)
#define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10? #define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10?
@ -354,7 +358,7 @@
#define CONTROL_MMRY_RST_MSK (0x00000001 << CONTROL_MMRY_RST_OFST) #define CONTROL_MMRY_RST_MSK (0x00000001 << CONTROL_MMRY_RST_OFST)
//#define CONTROL_PLL_RCNFG_WR_OFST (13) //#define CONTROL_PLL_RCNFG_WR_OFST (13)
//#define CONTROL_PLL_RCNFG_WR_MSK (0x00000001 << //#define CONTROL_PLL_RCNFG_WR_MSK (0x00000001 <<
//CONTROL_PLL_RCNFG_WR_OFST) // CONTROL_PLL_RCNFG_WR_OFST)
#define CONTROL_SND_10GB_PCKT_OFST (14) #define CONTROL_SND_10GB_PCKT_OFST (14)
#define CONTROL_SND_10GB_PCKT_MSK (0x00000001 << CONTROL_SND_10GB_PCKT_OFST) #define CONTROL_SND_10GB_PCKT_MSK (0x00000001 << CONTROL_SND_10GB_PCKT_OFST)
#define CONTROL_CLR_ACQSTN_FIFO_OFST (15) #define CONTROL_CLR_ACQSTN_FIFO_OFST (15)
@ -486,13 +490,13 @@
/* Period 64 bit RW register */ /* Period 64 bit RW register */
//#define EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) // //#define EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) //
//Not used in FW #define EXPTIME_MSB_REG (0x69 << // Not used in FW #define EXPTIME_MSB_REG (0x69 <<
//MEM_MAP_SHIFT) // Not used in FW // MEM_MAP_SHIFT) // Not used in FW
/* Gates 64 bit RW register */ /* Gates 64 bit RW register */
//#define GATES_LSB_REG (0x6A << MEM_MAP_SHIFT) // Not used //#define GATES_LSB_REG (0x6A << MEM_MAP_SHIFT) // Not used
//in FW #define GATES_MSB_REG (0x6B << MEM_MAP_SHIFT) // // in FW #define GATES_MSB_REG (0x6B << MEM_MAP_SHIFT) //
//Not used in FW // Not used in FW
/* Pattern IO Control 64 bit RW regiser /* Pattern IO Control 64 bit RW regiser
* Each bit configured as output(1)/ input(0) */ * Each bit configured as output(1)/ input(0) */

1913
slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c Executable file → Normal file
View File

File diff suppressed because it is too large Load Diff

339
slsDetectorServers/eigerDetectorServer/9mhvserial_bf.c Executable file → Normal file
View File

@ -1,202 +1,197 @@
#include "ansi.h" #include "ansi.h"
#include <termios.h> /* POSIX terminal control definitions */
#include <stdio.h>
#include <stdlib.h> // atoi
#include <fcntl.h> // File control definitions
#include <sys/ioctl.h> // ioctl
#include <unistd.h> // read, close
#include <string.h> // memset
#include <linux/i2c-dev.h> // I2C_SLAVE, __u8 reg
#include <errno.h> #include <errno.h>
#include <fcntl.h> // File control definitions
#include <linux/i2c-dev.h> // I2C_SLAVE, __u8 reg
#include <stdio.h>
#include <stdlib.h> // atoi
#include <string.h> // memset
#include <sys/ioctl.h> // ioctl
#include <termios.h> /* POSIX terminal control definitions */
#include <unistd.h> // read, close
#define PORTNAME "/dev/ttyBF1" #define PORTNAME "/dev/ttyBF1"
#define GOODBYE 200 #define GOODBYE 200
#define BUFFERSIZE 16 #define BUFFERSIZE 16
#define I2C_DEVICE_FILE "/dev/i2c-0" #define I2C_DEVICE_FILE "/dev/i2c-0"
#define I2C_DEVICE_ADDRESS 0x4C #define I2C_DEVICE_ADDRESS 0x4C
//#define I2C_DEVICE_ADDRESS 0x48 //#define I2C_DEVICE_ADDRESS 0x48
#define I2C_REGISTER_ADDRESS 0x40 #define I2C_REGISTER_ADDRESS 0x40
int i2c_open(const char *file, unsigned int addr) {
// device file
int fd = open(file, O_RDWR);
if (fd < 0) {
LOG(logERROR, ("Warning: Unable to open file %s\n", file));
return -1;
}
int i2c_open(const char* file,unsigned int addr){ // device address
if (ioctl(fd, I2C_SLAVE, addr & 0x7F) < 0) {
//device file LOG(logERROR, ("Warning: Unable to set slave address:0x%x \n", addr));
int fd = open( file, O_RDWR ); return -2;
if (fd < 0) { }
LOG(logERROR, ("Warning: Unable to open file %s\n",file)); return fd;
return -1;
}
//device address
if( ioctl( fd, I2C_SLAVE, addr&0x7F ) < 0 ) {
LOG(logERROR, ("Warning: Unable to set slave address:0x%x \n",addr));
return -2;
}
return fd;
} }
int i2c_read() {
int i2c_read(){ int fd = i2c_open(I2C_DEVICE_FILE, I2C_DEVICE_ADDRESS);
__u8 reg = I2C_REGISTER_ADDRESS & 0xff;
int fd = i2c_open(I2C_DEVICE_FILE, I2C_DEVICE_ADDRESS); unsigned char buf = reg;
__u8 reg = I2C_REGISTER_ADDRESS & 0xff; if (write(fd, &buf, 1) != 1) {
LOG(logERROR,
unsigned char buf = reg; ("Warning: Unable to write read request to register %d\n", reg));
if (write(fd, &buf, 1)!= 1){ return -1;
LOG(logERROR, ("Warning: Unable to write read request to register %d\n", reg)); }
return -1; // read and update value (but old value read out)
} if (read(fd, &buf, 1) != 1) {
//read and update value (but old value read out) LOG(logERROR, ("Warning: Unable to read register %d\n", reg));
if(read(fd, &buf, 1) != 1){ return -2;
LOG(logERROR, ("Warning: Unable to read register %d\n", reg)); }
return -2; // read again to read the updated value
} if (read(fd, &buf, 1) != 1) {
//read again to read the updated value LOG(logERROR, ("Warning: Unable to read register %d\n", reg));
if(read(fd, &buf, 1) != 1){ return -2;
LOG(logERROR, ("Warning: Unable to read register %d\n", reg)); }
return -2; close(fd);
} return buf;
close(fd);
return buf;
} }
int i2c_write(unsigned int value) {
int i2c_write(unsigned int value){ __u8 val = value & 0xff;
__u8 val = value & 0xff; int fd = i2c_open(I2C_DEVICE_FILE, I2C_DEVICE_ADDRESS);
if (fd < 0)
return fd;
int fd = i2c_open(I2C_DEVICE_FILE, I2C_DEVICE_ADDRESS); __u8 reg = I2C_REGISTER_ADDRESS & 0xff;
if(fd < 0) char buf[3];
return fd; buf[0] = reg;
buf[1] = val;
if (write(fd, buf, 2) != 2) {
LOG(logERROR,
("Warning: Unable to write %d to register %d\n", val, reg));
return -1;
}
__u8 reg = I2C_REGISTER_ADDRESS & 0xff; close(fd);
char buf[3]; return 0;
buf[0] = reg;
buf[1] = val;
if (write(fd, buf, 2) != 2) {
LOG(logERROR, ("Warning: Unable to write %d to register %d\n",val, reg));
return -1;
}
close(fd);
return 0;
} }
int main(int argc, char *argv[]) {
int fd = open(PORTNAME, O_RDWR | O_NOCTTY | O_SYNC);
if (fd < 0) {
LOG(logERROR, ("Warning: Unable to open port %s\n", PORTNAME));
return -1;
}
LOG(logINFO, ("opened port at %s\n", PORTNAME));
struct termios serial_conf;
// reset structure
memset(&serial_conf, 0, sizeof(serial_conf));
// control options
serial_conf.c_cflag = B2400 | CS8 | CREAD | CLOCAL;
// input options
serial_conf.c_iflag = IGNPAR;
// output options
serial_conf.c_oflag = 0;
// line options
serial_conf.c_lflag = ICANON;
// flush input
if (tcflush(fd, TCIOFLUSH) < 0) {
LOG(logERROR, ("Warning: error form tcflush %d\n", errno));
return 0;
}
// set new options for the port, TCSANOW:changes occur immediately without
// waiting for data to complete
if (tcsetattr(fd, TCSANOW, &serial_conf) < 0) {
LOG(logERROR, ("Warning: error form tcsetattr %d\n", errno));
return 0;
}
if (tcsetattr(fd, TCSAFLUSH, &serial_conf) < 0) {
LOG(logERROR, ("Warning: error form tcsetattr %d\n", errno));
return 0;
}
int main(int argc, char* argv[]) { int ret = 0;
int n = 0;
int ival = 0;
char buffer[BUFFERSIZE];
memset(buffer, 0, BUFFERSIZE);
buffer[BUFFERSIZE - 1] = '\n';
LOG(logINFO, ("Ready...\n"));
int fd = open(PORTNAME, O_RDWR | O_NOCTTY | O_SYNC); while (ret != GOODBYE) {
if(fd < 0){ memset(buffer, 0, BUFFERSIZE);
LOG(logERROR, ("Warning: Unable to open port %s\n", PORTNAME)); n = read(fd, buffer, BUFFERSIZE);
return -1; LOG(logDEBUG1, ("Received %d Bytes\n", n));
} LOG(logINFO, ("Got message: '%s'\n", buffer));
LOG(logINFO, ("opened port at %s\n",PORTNAME));
struct termios serial_conf; switch (buffer[0]) {
// reset structure case '\0':
memset(&serial_conf,0,sizeof(serial_conf)); LOG(logINFO, ("Got Start (Detector restart)\n"));
// control options break;
serial_conf.c_cflag = B2400 | CS8 | CREAD | CLOCAL; case 's':
// input options LOG(logINFO, ("Got Start \n"));
serial_conf.c_iflag = IGNPAR; break;
// output options case 'p':
serial_conf.c_oflag = 0; if (!sscanf(&buffer[1], "%d", &ival)) {
// line options LOG(logERROR, ("Warning: cannot scan voltage value\n"));
serial_conf.c_lflag = ICANON; break;
// flush input }
if(tcflush(fd, TCIOFLUSH) < 0){ // ok/ fail
LOG(logERROR, ("Warning: error form tcflush %d\n", errno)); memset(buffer, 0, BUFFERSIZE);
return 0; buffer[BUFFERSIZE - 1] = '\n';
} if (i2c_write(ival) < 0)
// set new options for the port, TCSANOW:changes occur immediately without waiting for data to complete strcpy(buffer, "fail ");
if(tcsetattr(fd, TCSANOW, &serial_conf) < 0){ else
LOG(logERROR, ("Warning: error form tcsetattr %d\n", errno)); strcpy(buffer, "success ");
return 0; LOG(logINFO, ("Sending: '%s'\n", buffer));
} n = write(fd, buffer, BUFFERSIZE);
LOG(logDEBUG1, ("Sent %d Bytes\n", n));
break;
if(tcsetattr(fd, TCSAFLUSH, &serial_conf) < 0){ case 'g':
LOG(logERROR, ("Warning: error form tcsetattr %d\n", errno)); ival = i2c_read();
return 0; // ok/ fail
} memset(buffer, 0, BUFFERSIZE);
buffer[BUFFERSIZE - 1] = '\n';
if (ival < 0)
strcpy(buffer, "fail ");
else
strcpy(buffer, "success ");
n = write(fd, buffer, BUFFERSIZE);
LOG(logINFO, ("Sending: '%s'\n", buffer));
LOG(logDEBUG1, ("Sent %d Bytes\n", n));
// value
memset(buffer, 0, BUFFERSIZE);
buffer[BUFFERSIZE - 1] = '\n';
if (ival >= 0) {
LOG(logINFO, ("Sending: '%d'\n", ival));
sprintf(buffer, "%d ", ival);
n = write(fd, buffer, BUFFERSIZE);
LOG(logINFO, ("Sent %d Bytes\n", n));
} else
LOG(logERROR, ("%s\n", buffer));
break;
int ret = 0; case 'e':
int n = 0; printf("Exiting Program\n");
int ival= 0; ret = GOODBYE;
char buffer[BUFFERSIZE]; break;
memset(buffer,0,BUFFERSIZE); default:
buffer[BUFFERSIZE-1] = '\n'; LOG(logERROR, ("Unknown Command. buffer:'%s'\n", buffer));
LOG(logINFO, ("Ready...\n")); break;
}
}
close(fd);
while(ret != GOODBYE){ printf("Goodbye Serial Communication for HV(9M)\n");
memset(buffer,0,BUFFERSIZE); return 0;
n = read(fd,buffer,BUFFERSIZE);
LOG(logDEBUG1, ("Received %d Bytes\n", n));
LOG(logINFO, ("Got message: '%s'\n",buffer));
switch(buffer[0]){
case '\0':
LOG(logINFO, ("Got Start (Detector restart)\n"));
break;
case 's':
LOG(logINFO, ("Got Start \n"));
break;
case 'p':
if (!sscanf(&buffer[1],"%d",&ival)){
LOG(logERROR, ("Warning: cannot scan voltage value\n"));
break;
}
// ok/ fail
memset(buffer,0,BUFFERSIZE);
buffer[BUFFERSIZE-1] = '\n';
if(i2c_write(ival)<0)
strcpy(buffer,"fail ");
else
strcpy(buffer,"success ");
LOG(logINFO, ("Sending: '%s'\n",buffer));
n = write(fd, buffer, BUFFERSIZE);
LOG(logDEBUG1, ("Sent %d Bytes\n", n));
break;
case 'g':
ival = i2c_read();
//ok/ fail
memset(buffer,0,BUFFERSIZE);
buffer[BUFFERSIZE-1] = '\n';
if(ival < 0)
strcpy(buffer,"fail ");
else
strcpy(buffer,"success ");
n = write(fd, buffer, BUFFERSIZE);
LOG(logINFO, ("Sending: '%s'\n",buffer));
LOG(logDEBUG1, ("Sent %d Bytes\n", n));
//value
memset(buffer,0,BUFFERSIZE);
buffer[BUFFERSIZE-1] = '\n';
if(ival >= 0){
LOG(logINFO, ("Sending: '%d'\n",ival));
sprintf(buffer,"%d ",ival);
n = write(fd, buffer, BUFFERSIZE);
LOG(logINFO, ("Sent %d Bytes\n", n));
}else LOG(logERROR, ("%s\n",buffer));
break;
case 'e':
printf("Exiting Program\n");
ret = GOODBYE;
break;
default:
LOG(logERROR, ("Unknown Command. buffer:'%s'\n",buffer));
break;
}
}
close(fd);
printf("Goodbye Serial Communication for HV(9M)\n");
return 0;
} }

2522
slsDetectorServers/eigerDetectorServer/Beb.c Executable file → Normal file
View File

File diff suppressed because it is too large Load Diff

3857
slsDetectorServers/eigerDetectorServer/FebControl.c Executable file → Normal file
View File

File diff suppressed because it is too large Load Diff

7
slsDetectorServers/eigerDetectorServer/FebControl.h
View File

@ -136,9 +136,10 @@ unsigned int Feb_Control_GetDynamicRange();
int Feb_Control_SetReadoutSpeed( int Feb_Control_SetReadoutSpeed(
unsigned int readout_speed); // 0 was default, 0->full,1->half,2->quarter or unsigned int readout_speed); // 0 was default, 0->full,1->half,2->quarter or
// 3->super_slow // 3->super_slow
int Feb_Control_SetReadoutMode(unsigned int readout_mode); /// 0 was int Feb_Control_SetReadoutMode(
/// default,0->parallel,1->non-parallel,2-> unsigned int readout_mode); /// 0 was
/// safe_mode /// default,0->parallel,1->non-parallel,2->
/// safe_mode
int Feb_Control_SetTriggerMode(unsigned int trigger_mode, int Feb_Control_SetTriggerMode(unsigned int trigger_mode,
int polarity); // 0 and 1 was default, int polarity); // 0 and 1 was default,
int Feb_Control_SetExternalEnableMode(int use_external_enable, int Feb_Control_SetExternalEnableMode(int use_external_enable,

315
slsDetectorServers/eigerDetectorServer/FebInterface.c Executable file → Normal file
View File

@ -1,195 +1,236 @@
#include "FebInterface.h" #include "FebInterface.h"
#include "LocalLinkInterface.h" #include "LocalLinkInterface.h"
#include "xparameters.h"
#include "clogger.h" #include "clogger.h"
#include "xparameters.h"
#include <unistd.h> #include <unistd.h>
struct LocalLinkInterface ll_local, *ll;
unsigned int Feb_Interface_nfebs;
unsigned int *Feb_Interface_feb_numb;
struct LocalLinkInterface ll_local,* ll; int Feb_Interface_send_ndata;
unsigned int Feb_Interface_send_buffer_size;
unsigned int Feb_Interface_nfebs; unsigned int *Feb_Interface_send_data_raw;
unsigned int* Feb_Interface_feb_numb; unsigned int *Feb_Interface_send_data;
int Feb_Interface_send_ndata;
unsigned int Feb_Interface_send_buffer_size;
unsigned int* Feb_Interface_send_data_raw;
unsigned int* Feb_Interface_send_data;
int Feb_Interface_recv_ndata;
unsigned int Feb_Interface_recv_buffer_size;
unsigned int* Feb_Interface_recv_data_raw;
unsigned int* Feb_Interface_recv_data;
int Feb_Interface_recv_ndata;
unsigned int Feb_Interface_recv_buffer_size;
unsigned int *Feb_Interface_recv_data_raw;
unsigned int *Feb_Interface_recv_data;
void Feb_Interface_FebInterface() { void Feb_Interface_FebInterface() {
ll = &ll_local; ll = &ll_local;
Feb_Interface_nfebs = 0; Feb_Interface_nfebs = 0;
Feb_Interface_feb_numb = 0; Feb_Interface_feb_numb = 0;
Feb_Interface_send_ndata = 0; Feb_Interface_send_ndata = 0;
Feb_Interface_send_buffer_size = 1026; Feb_Interface_send_buffer_size = 1026;
Feb_Interface_send_data_raw = malloc((Feb_Interface_send_buffer_size+1) * sizeof(unsigned int)); Feb_Interface_send_data_raw =
Feb_Interface_send_data = &Feb_Interface_send_data_raw[1]; malloc((Feb_Interface_send_buffer_size + 1) * sizeof(unsigned int));
Feb_Interface_send_data = &Feb_Interface_send_data_raw[1];
Feb_Interface_recv_ndata = 0; Feb_Interface_recv_ndata = 0;
Feb_Interface_recv_buffer_size = 1026; Feb_Interface_recv_buffer_size = 1026;
Feb_Interface_recv_data_raw = malloc((Feb_Interface_recv_buffer_size+1) * sizeof(unsigned int)); Feb_Interface_recv_data_raw =
Feb_Interface_recv_data = &Feb_Interface_recv_data_raw[1]; malloc((Feb_Interface_recv_buffer_size + 1) * sizeof(unsigned int));
Feb_Interface_recv_data = &Feb_Interface_recv_data_raw[1];
Local_LocalLinkInterface1(ll,XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT_BASEADDR);
Local_LocalLinkInterface1(
ll, XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT_BASEADDR);
} }
void Feb_Interface_SendCompleteList(unsigned int n, unsigned int *list) {
unsigned int i;
void Feb_Interface_SendCompleteList(unsigned int n,unsigned int* list) { if (Feb_Interface_feb_numb)
unsigned int i; free(Feb_Interface_feb_numb);
if (Feb_Interface_feb_numb) free(Feb_Interface_feb_numb); Feb_Interface_nfebs = n;
Feb_Interface_nfebs = n; Feb_Interface_feb_numb = malloc(n * sizeof(unsigned int));
Feb_Interface_feb_numb = malloc(n * sizeof(unsigned int)); for (i = 0; i < n; i++)
for(i=0;i<n;i++) Feb_Interface_feb_numb[i] = list[i]; Feb_Interface_feb_numb[i] = list[i];
} }
int Feb_Interface_WriteTo(unsigned int ch) { int Feb_Interface_WriteTo(unsigned int ch) {
if (ch>0xfff) return 0; if (ch > 0xfff)
return 0;
LOG(logDEBUG1, ("FIW ch %d\n", ch)); LOG(logDEBUG1, ("FIW ch %d\n", ch));
Feb_Interface_send_data_raw[0] = 0x8fff0000; Feb_Interface_send_data_raw[0] = 0x8fff0000;
if (Local_Write(ll,4,Feb_Interface_send_data_raw)!=4) return 0; if (Local_Write(ll, 4, Feb_Interface_send_data_raw) != 4)
return 0;
Feb_Interface_send_data_raw[0] = 0x90000000 | (ch<<16); Feb_Interface_send_data_raw[0] = 0x90000000 | (ch << 16);
if (Local_Write(ll,4,Feb_Interface_send_data_raw)!=4) return 0; if (Local_Write(ll, 4, Feb_Interface_send_data_raw) != 4)
return 0;
Feb_Interface_send_data_raw[0] = 0xc0000000; Feb_Interface_send_data_raw[0] = 0xc0000000;
return ((Feb_Interface_send_ndata+1)*4==Local_Write(ll,(Feb_Interface_send_ndata+1)*4,Feb_Interface_send_data_raw)); return ((Feb_Interface_send_ndata + 1) * 4 ==
Local_Write(ll, (Feb_Interface_send_ndata + 1) * 4,
Feb_Interface_send_data_raw));
} }
int Feb_Interface_ReadFrom(unsigned int ch, unsigned int ntrys) { int Feb_Interface_ReadFrom(unsigned int ch, unsigned int ntrys) {
unsigned int t; unsigned int t;
if (ch>=0xfff) return 0; if (ch >= 0xfff)
return 0;
Feb_Interface_recv_data_raw[0] = 0xa0000000 | (ch<<16); Feb_Interface_recv_data_raw[0] = 0xa0000000 | (ch << 16);
Local_Write(ll,4,Feb_Interface_recv_data_raw); Local_Write(ll, 4, Feb_Interface_recv_data_raw);
usleep(20); usleep(20);
Feb_Interface_recv_ndata=-1; Feb_Interface_recv_ndata = -1;
for(t=0;t<ntrys;t++) { for (t = 0; t < ntrys; t++) {
if ((Feb_Interface_recv_ndata=Local_Read(ll,Feb_Interface_recv_buffer_size*4,Feb_Interface_recv_data_raw)/4)>0) { if ((Feb_Interface_recv_ndata =
Feb_Interface_recv_ndata--; Local_Read(ll, Feb_Interface_recv_buffer_size * 4,
break; Feb_Interface_recv_data_raw) /
} 4) > 0) {
usleep(1000); Feb_Interface_recv_ndata--;
} break;
}
usleep(1000);
}
return (Feb_Interface_recv_ndata>=0); return (Feb_Interface_recv_ndata >= 0);
} }
int Feb_Interface_SetByteOrder() { int Feb_Interface_SetByteOrder() {
Feb_Interface_send_data_raw[0] = 0x8fff0000; Feb_Interface_send_data_raw[0] = 0x8fff0000;
if (Local_Write(ll,4,Feb_Interface_send_data_raw)!=4) return 0; if (Local_Write(ll, 4, Feb_Interface_send_data_raw) != 4)
Feb_Interface_send_ndata = 2; return 0;
Feb_Interface_send_data[0] = 0; Feb_Interface_send_ndata = 2;
Feb_Interface_send_data[1] = 0; Feb_Interface_send_data[0] = 0;
unsigned int i; Feb_Interface_send_data[1] = 0;
unsigned int dst = 0xff; unsigned int i;
for(i=0;i<Feb_Interface_nfebs;i++) dst = (dst | Feb_Interface_feb_numb[i]); unsigned int dst = 0xff;
int passed = Feb_Interface_WriteTo(dst); for (i = 0; i < Feb_Interface_nfebs; i++)
dst = (dst | Feb_Interface_feb_numb[i]);
int passed = Feb_Interface_WriteTo(dst);
return passed; return passed;
} }
int Feb_Interface_ReadRegister(unsigned int sub_num, unsigned int reg_num,
int Feb_Interface_ReadRegister(unsigned int sub_num, unsigned int reg_num,unsigned int* value_read) { unsigned int *value_read) {
return Feb_Interface_ReadRegisters(sub_num,1,&reg_num,value_read); return Feb_Interface_ReadRegisters(sub_num, 1, &reg_num, value_read);
} }
int Feb_Interface_ReadRegisters(unsigned int sub_num, unsigned int nreads,
unsigned int *reg_nums,
unsigned int *values_read) {
// here cout<<"Reading Register ...."<<endl;
unsigned int i;
nreads &= 0x3ff;
if (!nreads || nreads > Feb_Interface_send_buffer_size - 2)
return 0;
int Feb_Interface_ReadRegisters(unsigned int sub_num, unsigned int nreads, unsigned int* reg_nums,unsigned int* values_read) { Feb_Interface_send_ndata = nreads + 2;
//here cout<<"Reading Register ...."<<endl; Feb_Interface_send_data[0] = 0x20000000 | nreads << 14;
unsigned int i;
nreads &= 0x3ff;
if (!nreads||nreads>Feb_Interface_send_buffer_size-2) return 0;
Feb_Interface_send_ndata = nreads+2; for (i = 0; i < nreads; i++)
Feb_Interface_send_data[0] = 0x20000000 | nreads << 14; Feb_Interface_send_data[i + 1] = reg_nums[i];
Feb_Interface_send_data[nreads + 1] = 0;
for(i=0;i<nreads;i++) Feb_Interface_send_data[i+1]=reg_nums[i]; if (!Feb_Interface_WriteTo(sub_num) ||
Feb_Interface_send_data[nreads+1] = 0; !Feb_Interface_ReadFrom(sub_num, 20) ||
Feb_Interface_recv_ndata != (int)(nreads + 2))
return 0;
if (!Feb_Interface_WriteTo(sub_num)||!Feb_Interface_ReadFrom(sub_num,20)||Feb_Interface_recv_ndata!=(int)(nreads+2)) return 0; for (i = 0; i < nreads; i++)
values_read[i] = Feb_Interface_recv_data[i + 1];
for(i=0;i<nreads;i++) values_read[i] = Feb_Interface_recv_data[i+1]; return 1;
return 1;
} }
int Feb_Interface_WriteRegister(unsigned int sub_num, unsigned int reg_num,unsigned int value, int wait_on, unsigned int wait_on_address) { int Feb_Interface_WriteRegister(unsigned int sub_num, unsigned int reg_num,
return Feb_Interface_WriteRegisters(sub_num,1,&reg_num,&value,&wait_on,&wait_on_address); unsigned int value, int wait_on,
unsigned int wait_on_address) {
return Feb_Interface_WriteRegisters(sub_num, 1, &reg_num, &value, &wait_on,
&wait_on_address);
} }
int Feb_Interface_WriteRegisters(unsigned int sub_num, unsigned int nwrites, unsigned int* reg_nums, unsigned int* values, int* wait_ons, unsigned int* wait_on_addresses) { int Feb_Interface_WriteRegisters(unsigned int sub_num, unsigned int nwrites,
unsigned int i; unsigned int *reg_nums, unsigned int *values,
nwrites &= 0x3ff; //10 bits int *wait_ons,
if (!nwrites||2*nwrites>Feb_Interface_send_buffer_size-2) return 0; unsigned int *wait_on_addresses) {
unsigned int i;
nwrites &= 0x3ff; // 10 bits
if (!nwrites || 2 * nwrites > Feb_Interface_send_buffer_size - 2)
return 0;
//cout<<"Write register : "<<this<<" "<<s_num<<" "<<nwrites<<" "<<reg_nums<<" "<<values<<" "<<wait_ons<<" "<<wait_on_addresses<<endl; // cout<<"Write register : "<<this<<" "<<s_num<<" "<<nwrites<<"
Feb_Interface_send_ndata = 2*nwrites+2; // "<<reg_nums<<" "<<values<<" "<<wait_ons<<" "<<wait_on_addresses<<endl;
Feb_Interface_send_data[0] = 0x80000000 | nwrites << 14; Feb_Interface_send_ndata = 2 * nwrites + 2;
Feb_Interface_send_data[2*nwrites+1] = 0; Feb_Interface_send_data[0] = 0x80000000 | nwrites << 14;
Feb_Interface_send_data[2 * nwrites + 1] = 0;
for(i=0;i<nwrites;i++) Feb_Interface_send_data[2*i+1] = 0x3fff&reg_nums[i]; for (i = 0; i < nwrites; i++)
for(i=0;i<nwrites;i++) Feb_Interface_send_data[2*i+2] = values[i]; Feb_Interface_send_data[2 * i + 1] = 0x3fff & reg_nums[i];
// wait on busy data(28), address of busy flag data(27 downto 14) for (i = 0; i < nwrites; i++)
if (wait_ons&&wait_on_addresses) for(i=0;i<nwrites;i++) Feb_Interface_send_data[2*i+1] |= (wait_ons[i]<<28 | (0x3fff&wait_on_addresses[i])<<14); Feb_Interface_send_data[2 * i + 2] = values[i];
// wait on busy data(28), address of busy flag data(27 downto 14)
if (wait_ons && wait_on_addresses)
for (i = 0; i < nwrites; i++)
Feb_Interface_send_data[2 * i + 1] |=
(wait_ons[i] << 28 | (0x3fff & wait_on_addresses[i]) << 14);
if (!Feb_Interface_WriteTo(sub_num)) return 0; if (!Feb_Interface_WriteTo(sub_num))
return 0;
return 1; return 1;
} }
int Feb_Interface_WriteMemoryInLoops(unsigned int sub_num, unsigned int mem_num, unsigned int start_address, unsigned int nwrites, unsigned int *values) { int Feb_Interface_WriteMemoryInLoops(unsigned int sub_num, unsigned int mem_num,
unsigned int max_single_packet_size = 352; unsigned int start_address,
int passed=1; unsigned int nwrites,
unsigned int n_to_send = max_single_packet_size; unsigned int *values) {
unsigned int ndata_sent = 0; unsigned int max_single_packet_size = 352;
unsigned int ndata_countdown = nwrites; int passed = 1;
while(ndata_countdown>0) { unsigned int n_to_send = max_single_packet_size;
n_to_send = ndata_countdown<max_single_packet_size ? ndata_countdown:max_single_packet_size; unsigned int ndata_sent = 0;
if (!Feb_Interface_WriteMemory(sub_num,mem_num,start_address,n_to_send,&(values[ndata_sent]))) {passed=0; break;} unsigned int ndata_countdown = nwrites;
ndata_countdown-=n_to_send; while (ndata_countdown > 0) {
ndata_sent +=n_to_send; n_to_send = ndata_countdown < max_single_packet_size
start_address +=n_to_send; ? ndata_countdown
usleep(500);//500 works : max_single_packet_size;
} if (!Feb_Interface_WriteMemory(sub_num, mem_num, start_address,
return passed; n_to_send, &(values[ndata_sent]))) {
passed = 0;
break;
}
ndata_countdown -= n_to_send;
ndata_sent += n_to_send;
start_address += n_to_send;
usleep(500); // 500 works
}
return passed;
} }
int Feb_Interface_WriteMemory(unsigned int sub_num, unsigned int mem_num, unsigned int start_address, unsigned int nwrites, unsigned int *values) { int Feb_Interface_WriteMemory(unsigned int sub_num, unsigned int mem_num,
// -1 means write to all unsigned int start_address, unsigned int nwrites,
unsigned int i; unsigned int *values) {
mem_num &= 0x3f; // -1 means write to all
start_address &= 0x3fff; unsigned int i;
nwrites &= 0x3ff; mem_num &= 0x3f;
if (!nwrites||nwrites>Feb_Interface_send_buffer_size-2) { start_address &= 0x3fff;
LOG(logERROR, ("invalid nwrites:%d\n",nwrites)); nwrites &= 0x3ff;
return 0; if (!nwrites || nwrites > Feb_Interface_send_buffer_size - 2) {
}//*d-1026 LOG(logERROR, ("invalid nwrites:%d\n", nwrites));
return 0;
} //*d-1026
Feb_Interface_send_ndata = nwrites+2;//*d-1026 Feb_Interface_send_ndata = nwrites + 2; //*d-1026
Feb_Interface_send_data[0] = 0xc0000000 | mem_num << 24 | nwrites << 14 | start_address; //cmd -> write to memory, nwrites, mem number, start address Feb_Interface_send_data[0] =
Feb_Interface_send_data[nwrites+1] = 0; 0xc0000000 | mem_num << 24 | nwrites << 14 |
for(i=0;i<nwrites;i++) Feb_Interface_send_data[i+1] = values[i]; start_address; // cmd -> write to memory, nwrites, mem number, start
// address
Feb_Interface_send_data[nwrites + 1] = 0;
for (i = 0; i < nwrites; i++)
Feb_Interface_send_data[i + 1] = values[i];
if (!Feb_Interface_WriteTo(sub_num))
return 0;
if (!Feb_Interface_WriteTo(sub_num)) return 0; return 1;
return 1;
} }

6
slsDetectorServers/eigerDetectorServer/FebRegisterDefs.h
View File

@ -72,7 +72,7 @@
0x000c0000 // everything at ~200 kHz (200 kHz MHz ddr readout) 0x000c0000 // everything at ~200 kHz (200 kHz MHz ddr readout)
//#define DAQ_FIFO_ENABLE 0x00100000 commented out as it //#define DAQ_FIFO_ENABLE 0x00100000 commented out as it
//is not used anywhere // is not used anywhere
#define DAQ_REG_CHIP_CMDS_INT_TRIGGER 0x00100000 #define DAQ_REG_CHIP_CMDS_INT_TRIGGER 0x00100000
// direct chip commands to the DAQ_REG_CHIP_CMDS register // direct chip commands to the DAQ_REG_CHIP_CMDS register
@ -84,7 +84,7 @@
// DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES is old now hard-wired in the firmware // DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES is old now hard-wired in the firmware
// that every image comes with a header #define // that every image comes with a header #define
//DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES 0x00800000 // DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES 0x00800000
////DAQ_IGNORE_INITIAL_CRAP and DAQ_CLKOUT_LAST_4_BITS_AND_RETURN_TO_START ////DAQ_IGNORE_INITIAL_CRAP and DAQ_CLKOUT_LAST_4_BITS_AND_RETURN_TO_START
#define DAQ_NEXPOSURERS_EXTERNAL_ENABLING 0x01000000 #define DAQ_NEXPOSURERS_EXTERNAL_ENABLING 0x01000000
@ -102,7 +102,7 @@
#define DAQ_NEXPOSURERS_ACTIVATE_RATE_CORRECTION 0x40000000 #define DAQ_NEXPOSURERS_ACTIVATE_RATE_CORRECTION 0x40000000
//#define DAQ_MASTER_HALF_MODULE 0x80000000 currently not //#define DAQ_MASTER_HALF_MODULE 0x80000000 currently not
//used // used
// chips static bits // chips static bits
#define DAQ_STATIC_BIT_PROGRAM 0x00000001 #define DAQ_STATIC_BIT_PROGRAM 0x00000001

36
slsDetectorServers/eigerDetectorServer/HardwareIO.c Executable file → Normal file
View File

@ -1,76 +1,64 @@
#include "HardwareIO.h" #include "HardwareIO.h"
xfs_u8 HWIO_xfs_in8(xfs_u32 InAddress) xfs_u8 HWIO_xfs_in8(xfs_u32 InAddress) {
{
/* read the contents of the I/O location and then synchronize the I/O /* read the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on * such that the I/O operation completes before proceeding on
*/ */
xfs_u8 IoContents; xfs_u8 IoContents;
__asm__ volatile ("eieio; lbz %0,0(%1)":"=r" (IoContents):"b" __asm__ volatile("eieio; lbz %0,0(%1)" : "=r"(IoContents) : "b"(InAddress));
(InAddress));
return IoContents; return IoContents;
} }
/*****************************************************************************/ /*****************************************************************************/
xfs_u16 HWIO_xfs_in16(xfs_u32 InAddress) xfs_u16 HWIO_xfs_in16(xfs_u32 InAddress) {
{
/* read the contents of the I/O location and then synchronize the I/O /* read the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on * such that the I/O operation completes before proceeding on
*/ */
xfs_u16 IoContents; xfs_u16 IoContents;
__asm__ volatile ("eieio; lhz %0,0(%1)":"=r" (IoContents):"b" __asm__ volatile("eieio; lhz %0,0(%1)" : "=r"(IoContents) : "b"(InAddress));
(InAddress));
return IoContents; return IoContents;
} }
/*****************************************************************************/ /*****************************************************************************/
xfs_u32 HWIO_xfs_in32(xfs_u32 InAddress) xfs_u32 HWIO_xfs_in32(xfs_u32 InAddress) {
{
/* read the contents of the I/O location and then synchronize the I/O /* read the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on * such that the I/O operation completes before proceeding on
*/ */
xfs_u32 IoContents; xfs_u32 IoContents;
__asm__ volatile ("eieio; lwz %0,0(%1)":"=r" (IoContents):"b" __asm__ volatile("eieio; lwz %0,0(%1)" : "=r"(IoContents) : "b"(InAddress));
(InAddress));
return IoContents; return IoContents;
} }
/*****************************************************************************/ /*****************************************************************************/
void HWIO_xfs_out8(xfs_u32 OutAddress, xfs_u8 Value) void HWIO_xfs_out8(xfs_u32 OutAddress, xfs_u8 Value) {
{
/* write the contents of the I/O location and then synchronize the I/O /* write the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on * such that the I/O operation completes before proceeding on
*/ */
__asm__ volatile ("stb %0,0(%1); eieio"::"r" (Value), "b"(OutAddress)); __asm__ volatile("stb %0,0(%1); eieio" ::"r"(Value), "b"(OutAddress));
} }
/*****************************************************************************/ /*****************************************************************************/
void HWIO_xfs_out16(xfs_u32 OutAddress, xfs_u16 Value) void HWIO_xfs_out16(xfs_u32 OutAddress, xfs_u16 Value) {
{
/* write the contents of the I/O location and then synchronize the I/O /* write the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on * such that the I/O operation completes before proceeding on
*/ */
__asm__ volatile ("sth %0,0(%1); eieio"::"r" (Value), "b"(OutAddress)); __asm__ volatile("sth %0,0(%1); eieio" ::"r"(Value), "b"(OutAddress));
} }
/*****************************************************************************/ /*****************************************************************************/
void HWIO_xfs_out32(xfs_u32 OutAddress, xfs_u32 Value) void HWIO_xfs_out32(xfs_u32 OutAddress, xfs_u32 Value) {
{
/* write the contents of the I/O location and then synchronize the I/O /* write the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on * such that the I/O operation completes before proceeding on
*/ */
__asm__ volatile ("stw %0,0(%1); eieio"::"r" (Value), "b"(OutAddress)); __asm__ volatile("stw %0,0(%1); eieio" ::"r"(Value), "b"(OutAddress));
} }

340
slsDetectorServers/eigerDetectorServer/LocalLinkInterface.c Executable file → Normal file
View File

@ -2,219 +2,221 @@
#include "HardwareMMappingDefs.h" #include "HardwareMMappingDefs.h"
#include "clogger.h" #include "clogger.h"
#include <unistd.h>
#include <sys/mman.h>
#include <fcntl.h> #include <fcntl.h>
#include <sys/mman.h>
#include <unistd.h>
void Local_LocalLinkInterface1(struct LocalLinkInterface *ll,
void Local_LocalLinkInterface1(struct LocalLinkInterface* ll,unsigned int ll_fifo_badr) { unsigned int ll_fifo_badr) {
LOG(logDEBUG1, ("Initialize PLB LL FIFOs\n")); LOG(logDEBUG1, ("Initialize PLB LL FIFOs\n"));
ll->ll_fifo_base=0; ll->ll_fifo_base = 0;
ll->ll_fifo_ctrl_reg=0; ll->ll_fifo_ctrl_reg = 0;
if (Local_Init(ll,ll_fifo_badr)) { if (Local_Init(ll, ll_fifo_badr)) {
Local_Reset(ll); Local_Reset(ll);
LOG(logDEBUG1, ("\tFIFO Status : 0x%08x\n\n\n", Local_StatusVector(ll))); LOG(logDEBUG1,
} else LOG(logERROR, ("\tCould not map LocalLink : 0x%08x\n\n\n", ll_fifo_badr)); ("\tFIFO Status : 0x%08x\n\n\n", Local_StatusVector(ll)));
} else
LOG(logERROR,
("\tCould not map LocalLink : 0x%08x\n\n\n", ll_fifo_badr));
} }
void Local_LocalLinkInterface(struct LocalLinkInterface *ll) {
void Local_LocalLinkInterface(struct LocalLinkInterface* ll) { LOG(logDEBUG1, ("Initializing new memory\n"));
LOG(logDEBUG1, ("Initializing new memory\n"));
} }
int Local_Init(struct LocalLinkInterface *ll, unsigned int ll_fifo_badr) {
int fd;
void *plb_ll_fifo_ptr;
if ((fd = open("/dev/mem", O_RDWR)) < 0) {
fprintf(stderr, "Could not open /dev/mem\n");
return 0;
}
int Local_Init(struct LocalLinkInterface* ll,unsigned int ll_fifo_badr) { plb_ll_fifo_ptr = mmap(0, getpagesize(), PROT_READ | PROT_WRITE,
int fd; MAP_FILE | MAP_SHARED, fd, ll_fifo_badr);
void *plb_ll_fifo_ptr; close(fd);
if ((fd=open("/dev/mem", O_RDWR)) < 0) { if (plb_ll_fifo_ptr == MAP_FAILED) {
fprintf(stderr, "Could not open /dev/mem\n"); perror("mmap");
return 0; return 0;
} }
plb_ll_fifo_ptr = mmap(0, getpagesize(), PROT_READ | PROT_WRITE, MAP_FILE | MAP_SHARED, fd, ll_fifo_badr); ll->ll_fifo_base = (xfs_u32)plb_ll_fifo_ptr;
close(fd); ll->ll_fifo_ctrl_reg = 0;
if (plb_ll_fifo_ptr == MAP_FAILED) { return 1;
perror ("mmap");
return 0;
}
ll->ll_fifo_base = (xfs_u32) plb_ll_fifo_ptr;
ll->ll_fifo_ctrl_reg = 0;
return 1;
} }
int Local_Reset(struct LocalLinkInterface *ll) {
return Local_Reset1(ll, PLB_LL_FIFO_CTRL_RESET_STD);
int Local_Reset(struct LocalLinkInterface* ll) {
return Local_Reset1(ll,PLB_LL_FIFO_CTRL_RESET_STD);
} }
int Local_Reset1(struct LocalLinkInterface* ll,unsigned int rst_mask) { int Local_Reset1(struct LocalLinkInterface *ll, unsigned int rst_mask) {
ll->ll_fifo_ctrl_reg |= rst_mask; ll->ll_fifo_ctrl_reg |= rst_mask;
LOG(logDEBUG1, ("\tCTRL Register bits: 0x%08x\n",ll->ll_fifo_ctrl_reg)); LOG(logDEBUG1, ("\tCTRL Register bits: 0x%08x\n", ll->ll_fifo_ctrl_reg));
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg); HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL,
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg); ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg); HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL,
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg); ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL,
ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL,
ll->ll_fifo_ctrl_reg);
ll->ll_fifo_ctrl_reg &= (~rst_mask); ll->ll_fifo_ctrl_reg &= (~rst_mask);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg); HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL,
return 1; ll->ll_fifo_ctrl_reg);
return 1;
} }
unsigned int Local_StatusVector(struct LocalLinkInterface *ll) {
return HWIO_xfs_in32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_STATUS);
unsigned int Local_StatusVector(struct LocalLinkInterface* ll) {
return HWIO_xfs_in32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_STATUS);
} }
int Local_Write(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer) { int Local_Write(struct LocalLinkInterface *ll, unsigned int buffer_len,
// note: buffer must be word (4 byte) aligned void *buffer) {
// frame_len in byte // note: buffer must be word (4 byte) aligned
int vacancy=0; // frame_len in byte
int i; int vacancy = 0;
int words_send = 0; int i;
int last_word; int words_send = 0;
unsigned int *word_ptr; int last_word;
unsigned int fifo_ctrl; unsigned int *word_ptr;
xfs_u32 status; unsigned int fifo_ctrl;
xfs_u32 status;
if (buffer_len < 1) return -1; if (buffer_len < 1)
return -1;
last_word = (buffer_len-1)/4; last_word = (buffer_len - 1) / 4;
word_ptr = (unsigned int *)buffer; word_ptr = (unsigned int *)buffer;
LOG(logDEBUG1, ("LL Write - Len: %2d - If: %X - Data: ",buffer_len, ll->ll_fifo_base)); LOG(logDEBUG1, ("LL Write - Len: %2d - If: %X - Data: ", buffer_len,
for (i=0; i < buffer_len/4; i++) ll->ll_fifo_base));
LOG(logDEBUG1, ("%.8X ",*(((unsigned *) buffer)+i))); for (i = 0; i < buffer_len / 4; i++)
LOG(logDEBUG1, ("%.8X ", *(((unsigned *)buffer) + i)));
while (words_send <= last_word) while (words_send <= last_word) {
{ while (!vacancy) // wait for Fifo to be empty again
while (!vacancy)//wait for Fifo to be empty again {
{ status =
status = HWIO_xfs_in32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_STATUS); HWIO_xfs_in32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_STATUS);
if ((status & PLB_LL_FIFO_STATUS_ALMOSTFULL) == 0) vacancy = 1; if ((status & PLB_LL_FIFO_STATUS_ALMOSTFULL) == 0)
if (vacancy == 0) { vacancy = 1;
LOG(logERROR, ("Fifo full!\n")); if (vacancy == 0) {
} LOG(logERROR, ("Fifo full!\n"));
} }
}
//Just to know: #define PLB_LL_FIFO_ALMOST_FULL_THRESHOLD_WORDS 100 // Just to know: #define PLB_LL_FIFO_ALMOST_FULL_THRESHOLD_WORDS 100
for (i=0; ((i<PLB_LL_FIFO_ALMOST_FULL_THRESHOLD_WORDS) && (words_send <= last_word)); i++) for (i = 0; ((i < PLB_LL_FIFO_ALMOST_FULL_THRESHOLD_WORDS) &&
{ (words_send <= last_word));
fifo_ctrl = 0; i++) {
if (words_send == 0) fifo_ctrl = 0;
{ if (words_send == 0) {
fifo_ctrl = PLB_LL_FIFO_CTRL_LL_SOF;//announce the start of file fifo_ctrl =
} PLB_LL_FIFO_CTRL_LL_SOF; // announce the start of file
}
if (words_send == last_word) if (words_send == last_word) {
{ fifo_ctrl |=
fifo_ctrl |= (PLB_LL_FIFO_CTRL_LL_EOF | (( (buffer_len-1)<<PLB_LL_FIFO_CTRL_LL_REM_SHIFT) & PLB_LL_FIFO_CTRL_LL_REM) ); (PLB_LL_FIFO_CTRL_LL_EOF |
} (((buffer_len - 1) << PLB_LL_FIFO_CTRL_LL_REM_SHIFT) &
Local_ctrl_reg_write_mask(ll,PLB_LL_FIFO_CTRL_LL_MASK,fifo_ctrl); PLB_LL_FIFO_CTRL_LL_REM));
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_FIFO,word_ptr[words_send++]); }
} Local_ctrl_reg_write_mask(ll, PLB_LL_FIFO_CTRL_LL_MASK, fifo_ctrl);
} HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_FIFO,
return buffer_len; word_ptr[words_send++]);
}
}
return buffer_len;
} }
int Local_Read(struct LocalLinkInterface *ll, unsigned int buffer_len,
void *buffer) {
static unsigned int buffer_ptr = 0;
// note: buffer must be word (4 byte) aligned
// frame_len in byte
int len;
unsigned int *word_ptr;
unsigned int status;
volatile unsigned int fifo_val;
int sof = 0;
int Local_Read(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer) { LOG(logDEBUG1, ("LL Read - If: %X - Data: ", ll->ll_fifo_base));
static unsigned int buffer_ptr = 0;
// note: buffer must be word (4 byte) aligned
// frame_len in byte
int len;
unsigned int *word_ptr;
unsigned int status;
volatile unsigned int fifo_val;
int sof = 0;
LOG(logDEBUG1, ("LL Read - If: %X - Data: ",ll->ll_fifo_base)); word_ptr = (unsigned int *)buffer;
do {
status = HWIO_xfs_in32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_STATUS);
word_ptr = (unsigned int *)buffer; if (!(status & PLB_LL_FIFO_STATUS_EMPTY)) {
do if (status & PLB_LL_FIFO_STATUS_LL_SOF) {
{ if (buffer_ptr) {
status = HWIO_xfs_in32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_STATUS); buffer_ptr = 0;
return -1; // buffer overflow
}
buffer_ptr = 0;
sof = 1;
}
if (!(status & PLB_LL_FIFO_STATUS_EMPTY)) fifo_val = HWIO_xfs_in32(
{ ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_FIFO); // read from fifo
if (status & PLB_LL_FIFO_STATUS_LL_SOF)
{
if (buffer_ptr)
{
buffer_ptr = 0;
return -1; // buffer overflow
}
buffer_ptr = 0;
sof = 1;
}
fifo_val = HWIO_xfs_in32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_FIFO); //read from fifo if ((buffer_ptr > 0) || sof) {
if ((buffer_len >> 2) > buffer_ptr) {
LOG(logDEBUG1, ("%.8X ", fifo_val));
word_ptr[buffer_ptr++] = fifo_val; // write to buffer
} else {
buffer_ptr = 0;
return -2; // buffer overflow
}
if ((buffer_ptr > 0) || sof) if (status & PLB_LL_FIFO_STATUS_LL_EOF) {
{ len = (buffer_ptr << 2) - 3 +
if ( (buffer_len >> 2) > buffer_ptr) ((status & PLB_LL_FIFO_STATUS_LL_REM) >>
{ PLB_LL_FIFO_STATUS_LL_REM_SHIFT);
LOG(logDEBUG1, ("%.8X ", fifo_val)); LOG(logDEBUG1, ("Len: %d\n", len));
word_ptr[buffer_ptr++] = fifo_val; //write to buffer buffer_ptr = 0;
} return len;
else }
{ }
buffer_ptr = 0; }
return -2; // buffer overflow } while (!(status & PLB_LL_FIFO_STATUS_EMPTY));
}
if (status & PLB_LL_FIFO_STATUS_LL_EOF) return 0;
{
len = (buffer_ptr << 2) -3 + ( (status & PLB_LL_FIFO_STATUS_LL_REM)>>PLB_LL_FIFO_STATUS_LL_REM_SHIFT );
LOG(logDEBUG1, ("Len: %d\n",len));
buffer_ptr = 0;
return len;
}
}
}
}
while(!(status & PLB_LL_FIFO_STATUS_EMPTY));
return 0;
} }
int Local_ctrl_reg_write_mask(struct LocalLinkInterface* ll,unsigned int mask, unsigned int val) { int Local_ctrl_reg_write_mask(struct LocalLinkInterface *ll, unsigned int mask,
ll->ll_fifo_ctrl_reg &= (~mask); unsigned int val) {
ll->ll_fifo_ctrl_reg |= ( mask & val); ll->ll_fifo_ctrl_reg &= (~mask);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg); ll->ll_fifo_ctrl_reg |= (mask & val);
return 1; HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL,
ll->ll_fifo_ctrl_reg);
return 1;
} }
int Local_Test(struct LocalLinkInterface *ll, unsigned int buffer_len,
void *buffer) {
int Local_Test(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer) { int len;
unsigned int rec_buff_len = 4096;
unsigned int rec_buffer[4097];
int len; Local_Write(ll, buffer_len, buffer);
unsigned int rec_buff_len = 4096; usleep(10000);
unsigned int rec_buffer[4097];
do {
len = Local_Read(ll, rec_buff_len, rec_buffer);
LOG(logDEBUG1, ("receive length: %i\n", len));
Local_Write(ll,buffer_len,buffer); if (len > 0) {
usleep(10000); rec_buffer[len] = 0;
LOG(logINFO, ("%s\n", (char *)rec_buffer));
}
} while (len > 0);
do{ return 1;
len = Local_Read(ll,rec_buff_len,rec_buffer);
LOG(logDEBUG1, ("receive length: %i\n",len));
if (len > 0) {
rec_buffer[len]=0;
LOG(logINFO, ("%s\n", (char*) rec_buffer));
}
} while(len > 0);
return 1;
} }

3031
slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c Executable file → Normal file
View File

File diff suppressed because it is too large Load Diff

3364
slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c
View File

File diff suppressed because it is too large Load Diff

1405
slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c Executable file → Normal file
View File

File diff suppressed because it is too large Load Diff

2399
slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c Executable file → Normal file
View File

File diff suppressed because it is too large Load Diff

34
slsDetectorServers/moenchDetectorServer/RegisterDefs.h
View File

@ -145,12 +145,14 @@
/* Exposure Time Left 64 bit RO register */ /* Exposure Time Left 64 bit RO register */
//#define EXPTIME_LEFT_LSB_REG (0x1A << MEM_MAP_SHIFT) // Not //#define EXPTIME_LEFT_LSB_REG (0x1A << MEM_MAP_SHIFT) // Not
//used in FW #define EXPTIME_LEFT_MSB_REG (0x1B << MEM_MAP_SHIFT) // used in FW #define EXPTIME_LEFT_MSB_REG (0x1B <<
// MEM_MAP_SHIFT)
//// Not used in FW //// Not used in FW
/* Gates Left 64 bit RO register */ /* Gates Left 64 bit RO register */
//#define GATES_LEFT_LSB_REG (0x1C << MEM_MAP_SHIFT) // Not //#define GATES_LEFT_LSB_REG (0x1C << MEM_MAP_SHIFT) // Not
//used in FW #define GATES_LEFT_MSB_REG (0x1D << MEM_MAP_SHIFT) // used in FW #define GATES_LEFT_MSB_REG (0x1D <<
// MEM_MAP_SHIFT)
//// Not used in FW //// Not used in FW
/* Data In 64 bit RO register TODO */ /* Data In 64 bit RO register TODO */
@ -163,7 +165,8 @@
/* Frames From Start 64 bit RO register TODO */ /* Frames From Start 64 bit RO register TODO */
//#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT) // Not //#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT) // Not
//used in FW #define FRAMES_FROM_START_MSB_REG (0x23 << MEM_MAP_SHIFT) // used in FW #define FRAMES_FROM_START_MSB_REG (0x23 <<
// MEM_MAP_SHIFT)
//// Not used in FW //// Not used in FW
/* Frames From Start PG 64 bit RO register. Reset using CONTROL_CRST. TODO */ /* Frames From Start PG 64 bit RO register. Reset using CONTROL_CRST. TODO */
@ -331,21 +334,22 @@
#define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST) #define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST)
//#define CONTROL_STRT_FF_TST_OFST (2) //#define CONTROL_STRT_FF_TST_OFST (2)
//#define CONTROL_STRT_FF_TST_MSK (0x00000001 << //#define CONTROL_STRT_FF_TST_MSK (0x00000001 <<
//CONTROL_STRT_FF_TST_OFST) #define CONTROL_STP_FF_TST_OFST (3) // CONTROL_STRT_FF_TST_OFST) #define CONTROL_STP_FF_TST_OFST (3)
//#define CONTROL_STP_FF_TST_MSK (0x00000001 << //#define CONTROL_STP_FF_TST_MSK (0x00000001 <<
//CONTROL_STP_FF_TST_OFST) #define CONTROL_STRT_RDT_OFST (4) // CONTROL_STP_FF_TST_OFST) #define CONTROL_STRT_RDT_OFST (4)
//#define CONTROL_STRT_RDT_MSK (0x00000001 << //#define CONTROL_STRT_RDT_MSK (0x00000001 <<
//CONTROL_STRT_RDT_OFST) #define CONTROL_STP_RDT_OFST (5) #define // CONTROL_STRT_RDT_OFST) #define CONTROL_STP_RDT_OFST (5)
//CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST) // #define CONTROL_STP_RDT_MSK (0x00000001 <<
// CONTROL_STP_RDT_OFST)
#define CONTROL_STRT_EXPSR_OFST (6) #define CONTROL_STRT_EXPSR_OFST (6)
#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST) #define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST)
//#define CONTROL_STP_EXPSR_OFST (7) //#define CONTROL_STP_EXPSR_OFST (7)
//#define CONTROL_STP_EXPSR_MSK (0x00000001 << //#define CONTROL_STP_EXPSR_MSK (0x00000001 <<
//CONTROL_STP_RDT_OFST) #define CONTROL_STRT_TRN_OFST (8) #define // CONTROL_STP_RDT_OFST) #define CONTROL_STRT_TRN_OFST (8) #define
//CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) // CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_RDT_OFST)
//#define CONTROL_STP_TRN_OFST (9) //#define CONTROL_STP_TRN_OFST (9)
//#define CONTROL_STP_TRN_MSK (0x00000001 << //#define CONTROL_STP_TRN_MSK (0x00000001 <<
//CONTROL_STP_RDT_OFST) // CONTROL_STP_RDT_OFST)
#define CONTROL_CRE_RST_OFST (10) #define CONTROL_CRE_RST_OFST (10)
#define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST) #define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST)
#define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10? #define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10?
@ -354,7 +358,7 @@
#define CONTROL_MMRY_RST_MSK (0x00000001 << CONTROL_MMRY_RST_OFST) #define CONTROL_MMRY_RST_MSK (0x00000001 << CONTROL_MMRY_RST_OFST)
//#define CONTROL_PLL_RCNFG_WR_OFST (13) //#define CONTROL_PLL_RCNFG_WR_OFST (13)
//#define CONTROL_PLL_RCNFG_WR_MSK (0x00000001 << //#define CONTROL_PLL_RCNFG_WR_MSK (0x00000001 <<
//CONTROL_PLL_RCNFG_WR_OFST) // CONTROL_PLL_RCNFG_WR_OFST)
#define CONTROL_SND_10GB_PCKT_OFST (14) #define CONTROL_SND_10GB_PCKT_OFST (14)
#define CONTROL_SND_10GB_PCKT_MSK (0x00000001 << CONTROL_SND_10GB_PCKT_OFST) #define CONTROL_SND_10GB_PCKT_MSK (0x00000001 << CONTROL_SND_10GB_PCKT_OFST)
#define CONTROL_CLR_ACQSTN_FIFO_OFST (15) #define CONTROL_CLR_ACQSTN_FIFO_OFST (15)
@ -486,13 +490,13 @@
/* Period 64 bit RW register */ /* Period 64 bit RW register */
//#define EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) // //#define EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) //
//Not used in FW #define EXPTIME_MSB_REG (0x69 << // Not used in FW #define EXPTIME_MSB_REG (0x69 <<
//MEM_MAP_SHIFT) // Not used in FW // MEM_MAP_SHIFT) // Not used in FW
/* Gates 64 bit RW register */ /* Gates 64 bit RW register */
//#define GATES_LSB_REG (0x6A << MEM_MAP_SHIFT) // Not used //#define GATES_LSB_REG (0x6A << MEM_MAP_SHIFT) // Not used
//in FW #define GATES_MSB_REG (0x6B << MEM_MAP_SHIFT) // // in FW #define GATES_MSB_REG (0x6B << MEM_MAP_SHIFT) //
//Not used in FW // Not used in FW
/* Pattern IO Control 64 bit RW regiser /* Pattern IO Control 64 bit RW regiser
* Each bit configured as output(1)/ input(0) */ * Each bit configured as output(1)/ input(0) */

1815
slsDetectorServers/moenchDetectorServer/slsDetectorFunctionList.c Executable file → Normal file
View File

File diff suppressed because it is too large Load Diff

1896
slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c
View File

File diff suppressed because it is too large Load Diff

240
slsDetectorServers/slsDetectorServer/src/AD7689.c Executable file → Normal file
View File

@ -1,77 +1,99 @@
#include "AD7689.h" #include "AD7689.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "common.h"
#include "blackfin.h" #include "blackfin.h"
#include "clogger.h" #include "clogger.h"
#include "common.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
/* AD7689 ADC DEFINES */ /* AD7689 ADC DEFINES */
/** Read back CFG Register */ /** Read back CFG Register */
#define AD7689_CFG_RB_OFST (0) #define AD7689_CFG_RB_OFST (0)
#define AD7689_CFG_RB_MSK (0x00000001 << AD7689_CFG_RB_OFST) #define AD7689_CFG_RB_MSK (0x00000001 << AD7689_CFG_RB_OFST)
/** Channel sequencer */ /** Channel sequencer */
#define AD7689_CFG_SEQ_OFST (1) #define AD7689_CFG_SEQ_OFST (1)
#define AD7689_CFG_SEQ_MSK (0x00000003 << AD7689_CFG_SEQ_OFST) #define AD7689_CFG_SEQ_MSK (0x00000003 << AD7689_CFG_SEQ_OFST)
#define AD7689_CFG_SEQ_DSBLE_VAL ((0x0 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) #define AD7689_CFG_SEQ_DSBLE_VAL \
#define AD7689_CFG_SEQ_UPDTE_DRNG_SQNCE_VAL ((0x1 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) ((0x0 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
#define AD7689_CFG_SEQ_SCN_WTH_TMP_VAL ((0x2 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) #define AD7689_CFG_SEQ_UPDTE_DRNG_SQNCE_VAL \
#define AD7689_CFG_SEQ_SCN_WTHT_TMP_VAL ((0x3 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) ((0x1 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
#define AD7689_CFG_SEQ_SCN_WTH_TMP_VAL \
((0x2 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
#define AD7689_CFG_SEQ_SCN_WTHT_TMP_VAL \
((0x3 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
/** Reference/ buffer selection */ /** Reference/ buffer selection */
#define AD7689_CFG_REF_OFST (3) #define AD7689_CFG_REF_OFST (3)
#define AD7689_CFG_REF_MSK (0x00000007 << AD7689_CFG_REF_OFST) #define AD7689_CFG_REF_MSK (0x00000007 << AD7689_CFG_REF_OFST)
/** Internal reference. REF = 2.5V buffered output. Temperature sensor enabled. */ /** Internal reference. REF = 2.5V buffered output. Temperature sensor enabled.
#define AD7689_CFG_REF_INT_2500MV_VAL ((0x0 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_OFST) */
/** Internal reference. REF = 4.096V buffered output. Temperature sensor enabled. */ #define AD7689_CFG_REF_INT_2500MV_VAL \
#define AD7689_CFG_REF_INT_4096MV_VAL ((0x1 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) ((0x0 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_OFST)
/** Internal reference. REF = 4.096V buffered output. Temperature sensor
* enabled. */
#define AD7689_CFG_REF_INT_4096MV_VAL \
((0x1 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
/** External reference. Temperature sensor enabled. Internal buffer disabled. */ /** External reference. Temperature sensor enabled. Internal buffer disabled. */
#define AD7689_CFG_REF_EXT_TMP_VAL ((0x2 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) #define AD7689_CFG_REF_EXT_TMP_VAL \
((0x2 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
/** External reference. Temperature sensor enabled. Internal buffer enabled. */ /** External reference. Temperature sensor enabled. Internal buffer enabled. */
#define AD7689_CFG_REF_EXT_TMP_INTBUF_VAL ((0x3 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) #define AD7689_CFG_REF_EXT_TMP_INTBUF_VAL \
/** External reference. Temperature sensor disabled. Internal buffer disabled. */ ((0x3 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
#define AD7689_CFG_REF_EXT_VAL ((0x6 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) /** External reference. Temperature sensor disabled. Internal buffer disabled.
*/
#define AD7689_CFG_REF_EXT_VAL \
((0x6 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
/** External reference. Temperature sensor disabled. Internal buffer enabled. */ /** External reference. Temperature sensor disabled. Internal buffer enabled. */
#define AD7689_CFG_REF_EXT_INTBUF_VAL ((0x7 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) #define AD7689_CFG_REF_EXT_INTBUF_VAL \
((0x7 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
/** bandwidth of low pass filter */ /** bandwidth of low pass filter */
#define AD7689_CFG_BW_OFST (6) #define AD7689_CFG_BW_OFST (6)
#define AD7689_CFG_BW_MSK (0x00000001 << AD7689_CFG_REF_OFST) #define AD7689_CFG_BW_MSK (0x00000001 << AD7689_CFG_REF_OFST)
#define AD7689_CFG_BW_ONE_FOURTH_VAL ((0x0 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK) #define AD7689_CFG_BW_ONE_FOURTH_VAL \
#define AD7689_CFG_BW_FULL_VAL ((0x1 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK) ((0x0 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK)
#define AD7689_CFG_BW_FULL_VAL ((0x1 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK)
/** input channel selection IN0 - IN7 */ /** input channel selection IN0 - IN7 */
#define AD7689_CFG_IN_OFST (7) #define AD7689_CFG_IN_OFST (7)
#define AD7689_CFG_IN_MSK (0x00000007 << AD7689_CFG_IN_OFST) #define AD7689_CFG_IN_MSK (0x00000007 << AD7689_CFG_IN_OFST)
/** input channel configuration */ /** input channel configuration */
#define AD7689_CFG_INCC_OFST (10) #define AD7689_CFG_INCC_OFST (10)
#define AD7689_CFG_INCC_MSK (0x00000007 << AD7689_CFG_INCC_OFST) #define AD7689_CFG_INCC_MSK (0x00000007 << AD7689_CFG_INCC_OFST)
#define AD7689_CFG_INCC_BPLR_DFFRNTL_PRS_VAL ((0x0 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) #define AD7689_CFG_INCC_BPLR_DFFRNTL_PRS_VAL \
#define AD7689_CFG_INCC_BPLR_IN_COM_VAL ((0x2 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) ((0x0 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_TMP_VAL ((0x3 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) #define AD7689_CFG_INCC_BPLR_IN_COM_VAL \
#define AD7689_CFG_INCC_UNPLR_DFFRNTL_PRS_VAL ((0x4 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) ((0x2 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_UNPLR_IN_COM_VAL ((0x6 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) #define AD7689_CFG_INCC_TMP_VAL \
#define AD7689_CFG_INCC_UNPLR_IN_GND_VAL ((0x7 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) ((0x3 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_UNPLR_DFFRNTL_PRS_VAL \
((0x4 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_UNPLR_IN_COM_VAL \
((0x6 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
#define AD7689_CFG_INCC_UNPLR_IN_GND_VAL \
((0x7 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
/** configuration update */ /** configuration update */
#define AD7689_CFG_CFG_OFST (13) #define AD7689_CFG_CFG_OFST (13)
#define AD7689_CFG_CFG_MSK (0x00000001 << AD7689_CFG_CFG_OFST) #define AD7689_CFG_CFG_MSK (0x00000001 << AD7689_CFG_CFG_OFST)
#define AD7689_CFG_CFG_NO_UPDATE_VAL ((0x0 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK) #define AD7689_CFG_CFG_NO_UPDATE_VAL \
#define AD7689_CFG_CFG_OVRWRTE_VAL ((0x1 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK) ((0x0 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK)
#define AD7689_CFG_CFG_OVRWRTE_VAL \
((0x1 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK)
#define AD7689_ADC_CFG_NUMBITS (14) #define AD7689_ADC_CFG_NUMBITS (14)
#define AD7689_ADC_DATA_NUMBITS (16) #define AD7689_ADC_DATA_NUMBITS (16)
#define AD7689_NUM_CHANNELS (8) #define AD7689_NUM_CHANNELS (8)
#define AD7689_NUM_INVALID_CONVERSIONS (3) #define AD7689_NUM_INVALID_CONVERSIONS (3)
#define AD7689_INT_REF_MAX_MV (2500) // chosen using reference buffer selection in config reg #define AD7689_INT_REF_MAX_MV \
#define AD7689_INT_REF_MIN_MV (0) (2500) // chosen using reference buffer selection in config reg
#define AD7689_INT_REF_MAX_UV (2500 * 1000) #define AD7689_INT_REF_MIN_MV (0)
#define AD7689_INT_REF_MIN_UV (0) #define AD7689_INT_REF_MAX_UV (2500 * 1000)
#define AD7689_INT_MAX_STEPS (0xFFFF + 1) #define AD7689_INT_REF_MIN_UV (0)
#define AD7689_TMP_C_FOR_1_MV (25.00 / 283.00) #define AD7689_INT_MAX_STEPS (0xFFFF + 1)
#define AD7689_TMP_C_FOR_1_MV (25.00 / 283.00)
// Definitions from the fpga // Definitions from the fpga
uint32_t AD7689_Reg = 0x0; uint32_t AD7689_Reg = 0x0;
@ -81,9 +103,11 @@ uint32_t AD7689_ClkMask = 0x0;
uint32_t AD7689_DigMask = 0x0; uint32_t AD7689_DigMask = 0x0;
int AD7689_DigOffset = 0x0; int AD7689_DigOffset = 0x0;
void AD7689_SetDefines(uint32_t reg, uint32_t roreg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst) { void AD7689_SetDefines(uint32_t reg, uint32_t roreg, uint32_t cmsk,
LOG(logDEBUG, ("AD7689: reg:0x%x roreg:0x%x cmsk:0x%x clkmsk:0x%x dmsk:0x%x dofst:%d\n", uint32_t clkmsk, uint32_t dmsk, int dofst) {
reg, roreg, cmsk, clkmsk, dmsk, dofst)); LOG(logDEBUG, ("AD7689: reg:0x%x roreg:0x%x cmsk:0x%x clkmsk:0x%x "
"dmsk:0x%x dofst:%d\n",
reg, roreg, cmsk, clkmsk, dmsk, dofst));
AD7689_Reg = reg; AD7689_Reg = reg;
AD7689_ROReg = roreg; AD7689_ROReg = roreg;
AD7689_CnvMask = cmsk; AD7689_CnvMask = cmsk;
@ -93,48 +117,49 @@ void AD7689_SetDefines(uint32_t reg, uint32_t roreg, uint32_t cmsk, uint32_t clk
} }
void AD7689_Disable() { void AD7689_Disable() {
bus_w(AD7689_Reg, (bus_r(AD7689_Reg) bus_w(AD7689_Reg, (bus_r(AD7689_Reg) & ~(AD7689_CnvMask) & ~AD7689_ClkMask &
&~(AD7689_CnvMask) ~(AD7689_DigMask)));
&~AD7689_ClkMask
&~(AD7689_DigMask)));
} }
void AD7689_Set(uint32_t codata) { void AD7689_Set(uint32_t codata) {
LOG(logINFO, ("\tSetting ADC SPI Register. Writing 0x%08x to Config Reg\n", codata)); LOG(logINFO,
("\tSetting ADC SPI Register. Writing 0x%08x to Config Reg\n", codata));
serializeToSPI(AD7689_Reg, codata, AD7689_CnvMask, AD7689_ADC_CFG_NUMBITS, serializeToSPI(AD7689_Reg, codata, AD7689_CnvMask, AD7689_ADC_CFG_NUMBITS,
AD7689_ClkMask, AD7689_DigMask, AD7689_DigOffset, 1); AD7689_ClkMask, AD7689_DigMask, AD7689_DigOffset, 1);
} }
uint16_t AD7689_Get() { uint16_t AD7689_Get() {
LOG(logINFO, ("\tGetting ADC SPI Register.\n")); LOG(logINFO, ("\tGetting ADC SPI Register.\n"));
return (uint16_t)serializeFromSPI(AD7689_Reg, AD7689_CnvMask, AD7689_ADC_DATA_NUMBITS, return (uint16_t)serializeFromSPI(AD7689_Reg, AD7689_CnvMask,
AD7689_ClkMask, AD7689_DigMask, AD7689_ROReg, 1); AD7689_ADC_DATA_NUMBITS, AD7689_ClkMask,
AD7689_DigMask, AD7689_ROReg, 1);
} }
int AD7689_GetTemperature() { int AD7689_GetTemperature() {
AD7689_Set( AD7689_Set(
// read back // read back
AD7689_CFG_RB_MSK | AD7689_CFG_RB_MSK |
// disable sequencer (different from config) // disable sequencer (different from config)
AD7689_CFG_SEQ_DSBLE_VAL | AD7689_CFG_SEQ_DSBLE_VAL |
// Internal reference. REF = 2.5V buffered output. Temperature sensor enabled. // Internal reference. REF = 2.5V buffered output. Temperature sensor
AD7689_CFG_REF_INT_2500MV_VAL | // enabled.
// full bandwidth of low pass filter AD7689_CFG_REF_INT_2500MV_VAL |
AD7689_CFG_BW_FULL_VAL | // full bandwidth of low pass filter
// all channel (different from config) AD7689_CFG_BW_FULL_VAL |
AD7689_CFG_IN_MSK | // all channel (different from config)
// temperature sensor (different from config) AD7689_CFG_IN_MSK |
AD7689_CFG_INCC_TMP_VAL | // temperature sensor (different from config)
// overwrite configuration AD7689_CFG_INCC_TMP_VAL |
AD7689_CFG_CFG_OVRWRTE_VAL); // overwrite configuration
AD7689_CFG_CFG_OVRWRTE_VAL);
int regval = AD7689_Get(); int regval = AD7689_Get();
// value in mV FIXME: page 17? reference voltage temperature coefficient or t do with -40 to 85 °C // value in mV FIXME: page 17? reference voltage temperature coefficient or
// t do with -40 to 85 °C
int retval = 0; int retval = 0;
ConvertToDifferentRange(0, AD7689_INT_MAX_STEPS, ConvertToDifferentRange(0, AD7689_INT_MAX_STEPS, AD7689_INT_REF_MIN_MV,
AD7689_INT_REF_MIN_MV, AD7689_INT_REF_MAX_MV, AD7689_INT_REF_MAX_MV, regval, &retval);
regval, &retval);
LOG(logDEBUG1, ("voltage read for temp: %d mV\n", retval)); LOG(logDEBUG1, ("voltage read for temp: %d mV\n", retval));
// value in °C // value in °C
@ -142,52 +167,58 @@ int AD7689_GetTemperature() {
LOG(logINFO, ("\ttemp read : %f °C (%d unit)\n", tempValue, regval)); LOG(logINFO, ("\ttemp read : %f °C (%d unit)\n", tempValue, regval));
return tempValue; return tempValue;
} }
int AD7689_GetChannel(int ichan) { int AD7689_GetChannel(int ichan) {
// filter channels val // filter channels val
if (ichan < 0 || ichan >= AD7689_NUM_CHANNELS) { if (ichan < 0 || ichan >= AD7689_NUM_CHANNELS) {
LOG(logERROR, ("Cannot get slow adc channel. " LOG(logERROR, ("Cannot get slow adc channel. "
"%d out of bounds (0 to %d)\n", ichan, AD7689_NUM_CHANNELS - 1)); "%d out of bounds (0 to %d)\n",
return -1; ichan, AD7689_NUM_CHANNELS - 1));
return -1;
} }
AD7689_Set( AD7689_Set(
// read back // read back
AD7689_CFG_RB_MSK | AD7689_CFG_RB_MSK |
// disable sequencer (different from config) // disable sequencer (different from config)
AD7689_CFG_SEQ_DSBLE_VAL | AD7689_CFG_SEQ_DSBLE_VAL |
// Internal reference. REF = 2.5V buffered output. Temperature sensor enabled. // Internal reference. REF = 2.5V buffered output. Temperature sensor
AD7689_CFG_REF_INT_2500MV_VAL | // enabled.
// full bandwidth of low pass filter AD7689_CFG_REF_INT_2500MV_VAL |
AD7689_CFG_BW_FULL_VAL | // full bandwidth of low pass filter
// specific channel (different from config) AD7689_CFG_BW_FULL_VAL |
((ichan << AD7689_CFG_IN_OFST) & AD7689_CFG_IN_MSK) | // specific channel (different from config)
// input channel configuration (unipolar. inx to gnd) ((ichan << AD7689_CFG_IN_OFST) & AD7689_CFG_IN_MSK) |
AD7689_CFG_INCC_UNPLR_IN_GND_VAL | // input channel configuration (unipolar. inx to gnd)
// overwrite configuration AD7689_CFG_INCC_UNPLR_IN_GND_VAL |
AD7689_CFG_CFG_OVRWRTE_VAL); // overwrite configuration
AD7689_CFG_CFG_OVRWRTE_VAL);
int regval = AD7689_Get(); int regval = AD7689_Get();
// value in uV // value in uV
int retval = ((double)(regval - 0) * (double)(AD7689_INT_REF_MAX_UV - AD7689_INT_REF_MIN_UV)) int retval = ((double)(regval - 0) *
/ (double)(AD7689_INT_MAX_STEPS - 0) + AD7689_INT_REF_MIN_UV; (double)(AD7689_INT_REF_MAX_UV - AD7689_INT_REF_MIN_UV)) /
(double)(AD7689_INT_MAX_STEPS - 0) +
AD7689_INT_REF_MIN_UV;
/*ConvertToDifferentRange(0, AD7689_INT_MAX_STEPS, /*ConvertToDifferentRange(0, AD7689_INT_MAX_STEPS,
AD7689_INT_REF_MIN_MV, AD7689_INT_REF_MAX_MV, AD7689_INT_REF_MIN_MV, AD7689_INT_REF_MAX_MV,
regval, &retval);*/ regval, &retval);*/
LOG(logINFO, ("\tvoltage read for chan %d: %d uV (regVal: %d)\n", ichan, retval, regval)); LOG(logINFO, ("\tvoltage read for chan %d: %d uV (regVal: %d)\n", ichan,
return retval; retval, regval));
return retval;
} }
void AD7689_Configure(){ void AD7689_Configure() {
LOG(logINFOBLUE, ("Configuring AD7689 (Slow ADCs): \n")); LOG(logINFOBLUE, ("Configuring AD7689 (Slow ADCs): \n"));
// from power up, 3 invalid conversions // from power up, 3 invalid conversions
LOG(logINFO, ("\tConfiguring %d x due to invalid conversions from power up\n", AD7689_NUM_INVALID_CONVERSIONS)); LOG(logINFO,
("\tConfiguring %d x due to invalid conversions from power up\n",
AD7689_NUM_INVALID_CONVERSIONS));
int i = 0; int i = 0;
for (i = 0; i < AD7689_NUM_INVALID_CONVERSIONS; ++i) { for (i = 0; i < AD7689_NUM_INVALID_CONVERSIONS; ++i) {
AD7689_Set( AD7689_Set(
@ -195,7 +226,8 @@ void AD7689_Configure(){
AD7689_CFG_RB_MSK | AD7689_CFG_RB_MSK |
// scan sequence IN0-IN7 then temperature sensor // scan sequence IN0-IN7 then temperature sensor
AD7689_CFG_SEQ_SCN_WTH_TMP_VAL | AD7689_CFG_SEQ_SCN_WTH_TMP_VAL |
// Internal reference. REF = 2.5V buffered output. Temperature sensor enabled. // Internal reference. REF = 2.5V buffered output. Temperature
// sensor enabled.
AD7689_CFG_REF_INT_2500MV_VAL | AD7689_CFG_REF_INT_2500MV_VAL |
// full bandwidth of low pass filter // full bandwidth of low pass filter
AD7689_CFG_BW_FULL_VAL | AD7689_CFG_BW_FULL_VAL |

218
slsDetectorServers/slsDetectorServer/src/AD9252.c Executable file → Normal file
View File

@ -1,102 +1,134 @@
#include "AD9252.h" #include "AD9252.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "blackfin.h" #include "blackfin.h"
#include "clogger.h" #include "clogger.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
/* AD9252 ADC DEFINES */ /* AD9252 ADC DEFINES */
#define AD9252_ADC_NUMBITS (24) #define AD9252_ADC_NUMBITS (24)
// default value is 0xF // default value is 0xF
#define AD9252_DEV_IND_2_REG (0x04) #define AD9252_DEV_IND_2_REG (0x04)
#define AD9252_CHAN_H_OFST (0) #define AD9252_CHAN_H_OFST (0)
#define AD9252_CHAN_H_MSK (0x00000001 << AD9252_CHAN_H_OFST) #define AD9252_CHAN_H_MSK (0x00000001 << AD9252_CHAN_H_OFST)
#define AD9252_CHAN_G_OFST (1) #define AD9252_CHAN_G_OFST (1)
#define AD9252_CHAN_G_MSK (0x00000001 << AD9252_CHAN_G_OFST) #define AD9252_CHAN_G_MSK (0x00000001 << AD9252_CHAN_G_OFST)
#define AD9252_CHAN_F_OFST (2) #define AD9252_CHAN_F_OFST (2)
#define AD9252_CHAN_F_MSK (0x00000001 << AD9252_CHAN_F_OFST) #define AD9252_CHAN_F_MSK (0x00000001 << AD9252_CHAN_F_OFST)
#define AD9252_CHAN_E_OFST (3) #define AD9252_CHAN_E_OFST (3)
#define AD9252_CHAN_E_MSK (0x00000001 << AD9252_CHAN_E_OFST) #define AD9252_CHAN_E_MSK (0x00000001 << AD9252_CHAN_E_OFST)
// default value is 0x0F // default value is 0x0F
#define AD9252_DEV_IND_1_REG (0x05) #define AD9252_DEV_IND_1_REG (0x05)
#define AD9252_CHAN_D_OFST (0) #define AD9252_CHAN_D_OFST (0)
#define AD9252_CHAN_D_MSK (0x00000001 << AD9252_CHAN_D_OFST) #define AD9252_CHAN_D_MSK (0x00000001 << AD9252_CHAN_D_OFST)
#define AD9252_CHAN_C_OFST (1) #define AD9252_CHAN_C_OFST (1)
#define AD9252_CHAN_C_MSK (0x00000001 << AD9252_CHAN_C_OFST) #define AD9252_CHAN_C_MSK (0x00000001 << AD9252_CHAN_C_OFST)
#define AD9252_CHAN_B_OFST (2) #define AD9252_CHAN_B_OFST (2)
#define AD9252_CHAN_B_MSK (0x00000001 << AD9252_CHAN_B_OFST) #define AD9252_CHAN_B_MSK (0x00000001 << AD9252_CHAN_B_OFST)
#define AD9252_CHAN_A_OFST (3) #define AD9252_CHAN_A_OFST (3)
#define AD9252_CHAN_A_MSK (0x00000001 << AD9252_CHAN_A_OFST) #define AD9252_CHAN_A_MSK (0x00000001 << AD9252_CHAN_A_OFST)
#define AD9252_CLK_CH_DCO_OFST (4) #define AD9252_CLK_CH_DCO_OFST (4)
#define AD9252_CLK_CH_DCO_MSK (0x00000001 << AD9252_CLK_CH_DCO_OFST) #define AD9252_CLK_CH_DCO_MSK (0x00000001 << AD9252_CLK_CH_DCO_OFST)
#define AD9252_CLK_CH_IFCO_OFST (5) #define AD9252_CLK_CH_IFCO_OFST (5)
#define AD9252_CLK_CH_IFCO_MSK (0x00000001 << AD9252_CLK_CH_IFCO_OFST) #define AD9252_CLK_CH_IFCO_MSK (0x00000001 << AD9252_CLK_CH_IFCO_OFST)
// default value is 0x00 // default value is 0x00
#define AD9252_POWER_MODE_REG (0x08) #define AD9252_POWER_MODE_REG (0x08)
#define AD9252_POWER_INTERNAL_OFST (0) #define AD9252_POWER_INTERNAL_OFST (0)
#define AD9252_POWER_INTERNAL_MSK (0x00000007 << AD9252_POWER_INTERNAL_OFST) #define AD9252_POWER_INTERNAL_MSK (0x00000007 << AD9252_POWER_INTERNAL_OFST)
#define AD9252_INT_CHIP_RUN_VAL ((0x0 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK) #define AD9252_INT_CHIP_RUN_VAL \
#define AD9252_INT_FULL_PWR_DWN_VAL ((0x1 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK) ((0x0 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
#define AD9252_INT_STANDBY_VAL ((0x2 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK) #define AD9252_INT_FULL_PWR_DWN_VAL \
#define AD9252_INT_RESET_VAL ((0x3 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK) ((0x1 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
#define AD9252_INT_STANDBY_VAL \
((0x2 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
#define AD9252_INT_RESET_VAL \
((0x3 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
// default value is 0x0 // default value is 0x0
#define AD9252_TEST_MODE_REG (0x0D) #define AD9252_TEST_MODE_REG (0x0D)
#define AD9252_OUT_TEST_OFST (0) #define AD9252_OUT_TEST_OFST (0)
#define AD9252_OUT_TEST_MSK (0x0000000F << AD9252_OUT_TEST_OFST) #define AD9252_OUT_TEST_MSK (0x0000000F << AD9252_OUT_TEST_OFST)
#define AD9252_TST_OFF_VAL ((0x0 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) #define AD9252_TST_OFF_VAL ((0x0 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_MDSCL_SHRT_VAL ((0x1 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) #define AD9252_TST_MDSCL_SHRT_VAL \
#define AD9252_TST_PSTV_FS_VAL ((0x2 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) ((0x1 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_NGTV_FS_VAL ((0x3 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) #define AD9252_TST_PSTV_FS_VAL \
#define AD9252_TST_ALTRNTNG_CHKRBRD_VAL ((0x4 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) ((0x2 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_PN_23_SQNC_VAL ((0x5 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) #define AD9252_TST_NGTV_FS_VAL \
#define AD9252_TST_PN_9_SQNC__VAL ((0x6 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) ((0x3 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_1_0_WRD_TGGL_VAL ((0x7 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) #define AD9252_TST_ALTRNTNG_CHKRBRD_VAL \
#define AD9252_TST_USR_INPT_VAL ((0x8 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) ((0x4 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_1_0_BT_TGGL_VAL ((0x9 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) #define AD9252_TST_PN_23_SQNC_VAL \
#define AD9252_TST_1_x_SYNC_VAL ((0xa << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) ((0x5 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_1_BIT_HGH_VAL ((0xb << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) #define AD9252_TST_PN_9_SQNC__VAL \
#define AD9252_TST_MXD_BT_FRQ_VAL ((0xc << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) ((0x6 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_1_0_WRD_TGGL_VAL \
((0x7 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_USR_INPT_VAL \
((0x8 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_1_0_BT_TGGL_VAL \
((0x9 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_1_x_SYNC_VAL \
((0xa << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_1_BIT_HGH_VAL \
((0xb << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_MXD_BT_FRQ_VAL \
((0xc << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
#define AD9252_TST_RST_SHRT_GN_OFST (4) #define AD9252_TST_RST_SHRT_GN_OFST (4)
#define AD9252_TST_RST_SHRT_GN_MSK (0x00000001 << AD9252_TST_RST_SHRT_GN_OFST) #define AD9252_TST_RST_SHRT_GN_MSK (0x00000001 << AD9252_TST_RST_SHRT_GN_OFST)
#define AD9252_TST_RST_LNG_GN_OFST (5) #define AD9252_TST_RST_LNG_GN_OFST (5)
#define AD9252_TST_RST_LNG_GN_MSK (0x00000001 << AD9252_TST_RST_LNG_GN_OFST) #define AD9252_TST_RST_LNG_GN_MSK (0x00000001 << AD9252_TST_RST_LNG_GN_OFST)
#define AD9252_USER_IN_MODE_OFST (6) #define AD9252_USER_IN_MODE_OFST (6)
#define AD9252_USER_IN_MODE_MSK (0x00000003 << AD9252_USER_IN_MODE_OFST) #define AD9252_USER_IN_MODE_MSK (0x00000003 << AD9252_USER_IN_MODE_OFST)
#define AD9252_USR_IN_SNGL_VAL ((0x0 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK) #define AD9252_USR_IN_SNGL_VAL \
#define AD9252_USR_IN_ALTRNT_VAL ((0x1 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK) ((0x0 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
#define AD9252_USR_IN_SNGL_ONC_VAL ((0x2 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK) #define AD9252_USR_IN_ALTRNT_VAL \
#define AD9252_USR_IN_ALTRNT_ONC_VAL ((0x3 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK) ((0x1 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
#define AD9252_USR_IN_SNGL_ONC_VAL \
((0x2 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
#define AD9252_USR_IN_ALTRNT_ONC_VAL \
((0x3 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
// default value is 0x00 // default value is 0x00
#define AD9252_OUT_MODE_REG (0x14) #define AD9252_OUT_MODE_REG (0x14)
#define AD9252_OUT_FORMAT_OFST (0) #define AD9252_OUT_FORMAT_OFST (0)
#define AD9252_OUT_FORMAT_MSK (0x00000003 << AD9252_OUT_FORMAT_OFST) #define AD9252_OUT_FORMAT_MSK (0x00000003 << AD9252_OUT_FORMAT_OFST)
#define AD9252_OUT_BINARY_OFST_VAL ((0x0 << AD9252_OUT_FORMAT_OFST) & AD9252_OUT_FORMAT_MSK) #define AD9252_OUT_BINARY_OFST_VAL \
#define AD9252_OUT_TWOS_COMPL_VAL ((0x1 << AD9252_OUT_FORMAT_OFST) & AD9252_OUT_FORMAT_MSK) ((0x0 << AD9252_OUT_FORMAT_OFST) & AD9252_OUT_FORMAT_MSK)
#define AD9252_OUT_OTPT_INVRT_OFST (2) #define AD9252_OUT_TWOS_COMPL_VAL \
#define AD9252_OUT_OTPT_INVRT_MSK (0x00000001 << AD9252_OUT_OTPT_INVRT_OFST) ((0x1 << AD9252_OUT_FORMAT_OFST) & AD9252_OUT_FORMAT_MSK)
#define AD9252_OUT_LVDS_OPT_OFST (6) #define AD9252_OUT_OTPT_INVRT_OFST (2)
#define AD9252_OUT_LVDS_OPT_MSK (0x00000001 << AD9252_OUT_LVDS_OPT_OFST) #define AD9252_OUT_OTPT_INVRT_MSK (0x00000001 << AD9252_OUT_OTPT_INVRT_OFST)
#define AD9252_OUT_LVDS_ANSI_VAL ((0x0 << AD9252_OUT_LVDS_OPT_OFST) & AD9252_OUT_LVDS_OPT_MSK) #define AD9252_OUT_LVDS_OPT_OFST (6)
#define AD9252_OUT_LVDS_IEEE_VAL ((0x1 << AD9252_OUT_LVDS_OPT_OFST) & AD9252_OUT_LVDS_OPT_MSK) #define AD9252_OUT_LVDS_OPT_MSK (0x00000001 << AD9252_OUT_LVDS_OPT_OFST)
#define AD9252_OUT_LVDS_ANSI_VAL \
((0x0 << AD9252_OUT_LVDS_OPT_OFST) & AD9252_OUT_LVDS_OPT_MSK)
#define AD9252_OUT_LVDS_IEEE_VAL \
((0x1 << AD9252_OUT_LVDS_OPT_OFST) & AD9252_OUT_LVDS_OPT_MSK)
// default value is 0x3 // default value is 0x3
#define AD9252_OUT_PHASE_REG (0x16) #define AD9252_OUT_PHASE_REG (0x16)
#define AD9252_OUT_CLK_OFST (0) #define AD9252_OUT_CLK_OFST (0)
#define AD9252_OUT_CLK_MSK (0x0000000F << AD9252_OUT_CLK_OFST) #define AD9252_OUT_CLK_MSK (0x0000000F << AD9252_OUT_CLK_OFST)
#define AD9252_OUT_CLK_0_VAL ((0x0 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) #define AD9252_OUT_CLK_0_VAL ((0x0 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_60_VAL ((0x1 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) #define AD9252_OUT_CLK_60_VAL \
#define AD9252_OUT_CLK_120_VAL ((0x2 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) ((0x1 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_180_VAL ((0x3 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) #define AD9252_OUT_CLK_120_VAL \
#define AD9252_OUT_CLK_300_VAL ((0x5 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) ((0x2 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_360_VAL ((0x6 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) #define AD9252_OUT_CLK_180_VAL \
#define AD9252_OUT_CLK_480_VAL ((0x8 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) ((0x3 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_540_VAL ((0x9 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) #define AD9252_OUT_CLK_300_VAL \
#define AD9252_OUT_CLK_600_VAL ((0xa << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) ((0x5 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_660_VAL ((0xb << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) // 0xb - 0xf is 660 #define AD9252_OUT_CLK_360_VAL \
((0x6 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_480_VAL \
((0x8 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_540_VAL \
((0x9 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_600_VAL \
((0xa << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
#define AD9252_OUT_CLK_660_VAL \
((0xb << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) // 0xb - 0xf is 660
// defines from the fpga // defines from the fpga
uint32_t AD9252_Reg = 0x0; uint32_t AD9252_Reg = 0x0;
@ -105,7 +137,8 @@ uint32_t AD9252_ClkMask = 0x0;
uint32_t AD9252_DigMask = 0x0; uint32_t AD9252_DigMask = 0x0;
int AD9252_DigOffset = 0x0; int AD9252_DigOffset = 0x0;
void AD9252_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst) { void AD9252_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk,
uint32_t dmsk, int dofst) {
AD9252_Reg = reg; AD9252_Reg = reg;
AD9252_CsMask = cmsk; AD9252_CsMask = cmsk;
AD9252_ClkMask = clkmsk; AD9252_ClkMask = clkmsk;
@ -114,29 +147,28 @@ void AD9252_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dm
} }
void AD9252_Disable() { void AD9252_Disable() {
bus_w(AD9252_Reg, (bus_r(AD9252_Reg) bus_w(AD9252_Reg, (bus_r(AD9252_Reg) | AD9252_CsMask | AD9252_ClkMask) &
| AD9252_CsMask ~(AD9252_DigMask));
| AD9252_ClkMask)
&~(AD9252_DigMask));
} }
void AD9252_Set(int addr, int val) { void AD9252_Set(int addr, int val) {
u_int32_t codata; u_int32_t codata;
codata = val + (addr << 8); codata = val + (addr << 8);
LOG(logINFO, ("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr)); LOG(logINFO,
("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr));
serializeToSPI(AD9252_Reg, codata, AD9252_CsMask, AD9252_ADC_NUMBITS, serializeToSPI(AD9252_Reg, codata, AD9252_CsMask, AD9252_ADC_NUMBITS,
AD9252_ClkMask, AD9252_DigMask, AD9252_DigOffset, 0); AD9252_ClkMask, AD9252_DigMask, AD9252_DigOffset, 0);
} }
void AD9252_Configure(){ void AD9252_Configure() {
LOG(logINFOBLUE, ("Configuring ADC9252:\n")); LOG(logINFOBLUE, ("Configuring ADC9252:\n"));
//power mode reset // power mode reset
LOG(logINFO, ("\tPower mode reset\n")); LOG(logINFO, ("\tPower mode reset\n"));
AD9252_Set(AD9252_POWER_MODE_REG, AD9252_INT_RESET_VAL); AD9252_Set(AD9252_POWER_MODE_REG, AD9252_INT_RESET_VAL);
//power mode chip run // power mode chip run
LOG(logINFO, ("\tPower mode chip run\n")); LOG(logINFO, ("\tPower mode chip run\n"));
AD9252_Set(AD9252_POWER_MODE_REG, AD9252_INT_CHIP_RUN_VAL); AD9252_Set(AD9252_POWER_MODE_REG, AD9252_INT_CHIP_RUN_VAL);
@ -144,7 +176,7 @@ void AD9252_Configure(){
LOG(logINFO, ("\tBinary offset\n")); LOG(logINFO, ("\tBinary offset\n"));
AD9252_Set(AD9252_OUT_MODE_REG, AD9252_OUT_BINARY_OFST_VAL); AD9252_Set(AD9252_OUT_MODE_REG, AD9252_OUT_BINARY_OFST_VAL);
//output clock phase // output clock phase
#ifdef GOTTHARDD #ifdef GOTTHARDD
LOG(logINFO, ("\tOutput clock phase is at default: 180\n")); LOG(logINFO, ("\tOutput clock phase is at default: 180\n"));
#else #else
@ -158,11 +190,12 @@ void AD9252_Configure(){
// all devices on chip to receive next command // all devices on chip to receive next command
LOG(logINFO, ("\tAll devices on chip to receive next command\n")); LOG(logINFO, ("\tAll devices on chip to receive next command\n"));
AD9252_Set(AD9252_DEV_IND_2_REG, AD9252_Set(AD9252_DEV_IND_2_REG, AD9252_CHAN_H_MSK | AD9252_CHAN_G_MSK |
AD9252_CHAN_H_MSK | AD9252_CHAN_G_MSK | AD9252_CHAN_F_MSK | AD9252_CHAN_E_MSK); AD9252_CHAN_F_MSK | AD9252_CHAN_E_MSK);
AD9252_Set(AD9252_DEV_IND_1_REG, AD9252_Set(AD9252_DEV_IND_1_REG, AD9252_CHAN_D_MSK | AD9252_CHAN_C_MSK |
AD9252_CHAN_D_MSK | AD9252_CHAN_C_MSK | AD9252_CHAN_B_MSK | AD9252_CHAN_A_MSK | AD9252_CHAN_B_MSK | AD9252_CHAN_A_MSK |
AD9252_CLK_CH_DCO_MSK | AD9252_CLK_CH_IFCO_MSK); AD9252_CLK_CH_DCO_MSK |
AD9252_CLK_CH_IFCO_MSK);
// no test mode // no test mode
LOG(logINFO, ("\tNo test mode\n")); LOG(logINFO, ("\tNo test mode\n"));
@ -175,4 +208,3 @@ void AD9252_Configure(){
AD9252_Set(AD9252_TEST_MODE_REG, AD9252_TST_MXD_BT_FRQ_VAL); AD9252_Set(AD9252_TEST_MODE_REG, AD9252_TST_MXD_BT_FRQ_VAL);
#endif #endif
} }

439
slsDetectorServers/slsDetectorServer/src/AD9257.c Executable file → Normal file
View File

@ -1,129 +1,166 @@
#include "AD9257.h" #include "AD9257.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "blackfin.h" #include "blackfin.h"
#include "clogger.h" #include "clogger.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "sls_detector_defs.h" #include "sls_detector_defs.h"
/* AD9257 ADC DEFINES */ /* AD9257 ADC DEFINES */
#define AD9257_ADC_NUMBITS (24) #define AD9257_ADC_NUMBITS (24)
// default value is 0xF // default value is 0xF
#define AD9257_DEV_IND_2_REG (0x04) #define AD9257_DEV_IND_2_REG (0x04)
#define AD9257_CHAN_H_OFST (0) #define AD9257_CHAN_H_OFST (0)
#define AD9257_CHAN_H_MSK (0x00000001 << AD9257_CHAN_H_OFST) #define AD9257_CHAN_H_MSK (0x00000001 << AD9257_CHAN_H_OFST)
#define AD9257_CHAN_G_OFST (1) #define AD9257_CHAN_G_OFST (1)
#define AD9257_CHAN_G_MSK (0x00000001 << AD9257_CHAN_G_OFST) #define AD9257_CHAN_G_MSK (0x00000001 << AD9257_CHAN_G_OFST)
#define AD9257_CHAN_F_OFST (2) #define AD9257_CHAN_F_OFST (2)
#define AD9257_CHAN_F_MSK (0x00000001 << AD9257_CHAN_F_OFST) #define AD9257_CHAN_F_MSK (0x00000001 << AD9257_CHAN_F_OFST)
#define AD9257_CHAN_E_OFST (3) #define AD9257_CHAN_E_OFST (3)
#define AD9257_CHAN_E_MSK (0x00000001 << AD9257_CHAN_E_OFST) #define AD9257_CHAN_E_MSK (0x00000001 << AD9257_CHAN_E_OFST)
// default value is 0x3F // default value is 0x3F
#define AD9257_DEV_IND_1_REG (0x05) #define AD9257_DEV_IND_1_REG (0x05)
#define AD9257_CHAN_D_OFST (0) #define AD9257_CHAN_D_OFST (0)
#define AD9257_CHAN_D_MSK (0x00000001 << AD9257_CHAN_D_OFST) #define AD9257_CHAN_D_MSK (0x00000001 << AD9257_CHAN_D_OFST)
#define AD9257_CHAN_C_OFST (1) #define AD9257_CHAN_C_OFST (1)
#define AD9257_CHAN_C_MSK (0x00000001 << AD9257_CHAN_C_OFST) #define AD9257_CHAN_C_MSK (0x00000001 << AD9257_CHAN_C_OFST)
#define AD9257_CHAN_B_OFST (2) #define AD9257_CHAN_B_OFST (2)
#define AD9257_CHAN_B_MSK (0x00000001 << AD9257_CHAN_B_OFST) #define AD9257_CHAN_B_MSK (0x00000001 << AD9257_CHAN_B_OFST)
#define AD9257_CHAN_A_OFST (3) #define AD9257_CHAN_A_OFST (3)
#define AD9257_CHAN_A_MSK (0x00000001 << AD9257_CHAN_A_OFST) #define AD9257_CHAN_A_MSK (0x00000001 << AD9257_CHAN_A_OFST)
#define AD9257_CLK_CH_DCO_OFST (4) #define AD9257_CLK_CH_DCO_OFST (4)
#define AD9257_CLK_CH_DCO_MSK (0x00000001 << AD9257_CLK_CH_DCO_OFST) #define AD9257_CLK_CH_DCO_MSK (0x00000001 << AD9257_CLK_CH_DCO_OFST)
#define AD9257_CLK_CH_IFCO_OFST (5) #define AD9257_CLK_CH_IFCO_OFST (5)
#define AD9257_CLK_CH_IFCO_MSK (0x00000001 << AD9257_CLK_CH_IFCO_OFST) #define AD9257_CLK_CH_IFCO_MSK (0x00000001 << AD9257_CLK_CH_IFCO_OFST)
// default value is 0x00 // default value is 0x00
#define AD9257_POWER_MODE_REG (0x08) #define AD9257_POWER_MODE_REG (0x08)
#define AD9257_POWER_INTERNAL_OFST (0) #define AD9257_POWER_INTERNAL_OFST (0)
#define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST) #define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST)
#define AD9257_INT_CHIP_RUN_VAL ((0x0 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK) #define AD9257_INT_CHIP_RUN_VAL \
#define AD9257_INT_FULL_PWR_DWN_VAL ((0x1 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK) ((0x0 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
#define AD9257_INT_STANDBY_VAL ((0x2 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK) #define AD9257_INT_FULL_PWR_DWN_VAL \
#define AD9257_INT_RESET_VAL ((0x3 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK) ((0x1 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
#define AD9257_POWER_EXTERNAL_OFST (5) #define AD9257_INT_STANDBY_VAL \
#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST) ((0x2 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
#define AD9257_EXT_FULL_POWER_VAL ((0x0 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK) #define AD9257_INT_RESET_VAL \
#define AD9257_EXT_STANDBY_VAL ((0x1 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK) ((0x3 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
#define AD9257_POWER_EXTERNAL_OFST (5)
#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST)
#define AD9257_EXT_FULL_POWER_VAL \
((0x0 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK)
#define AD9257_EXT_STANDBY_VAL \
((0x1 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK)
// default value is 0x0 // default value is 0x0
#define AD9257_TEST_MODE_REG (0x0D) #define AD9257_TEST_MODE_REG (0x0D)
#define AD9257_OUT_TEST_OFST (0) #define AD9257_OUT_TEST_OFST (0)
#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST) #define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST)
#define AD9257_TST_OFF_VAL ((0x0 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) #define AD9257_TST_OFF_VAL ((0x0 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_MDSCL_SHRT_VAL ((0x1 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) #define AD9257_TST_MDSCL_SHRT_VAL \
#define AD9257_TST_PSTV_FS_VAL ((0x2 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) ((0x1 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_NGTV_FS_VAL ((0x3 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) #define AD9257_TST_PSTV_FS_VAL \
#define AD9257_TST_ALTRNTNG_CHKRBRD_VAL ((0x4 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) ((0x2 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_PN_23_SQNC_VAL ((0x5 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) #define AD9257_TST_NGTV_FS_VAL \
#define AD9257_TST_PN_9_SQNC__VAL ((0x6 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) ((0x3 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_1_0_WRD_TGGL_VAL ((0x7 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) #define AD9257_TST_ALTRNTNG_CHKRBRD_VAL \
#define AD9257_TST_USR_INPT_VAL ((0x8 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) ((0x4 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_1_0_BT_TGGL_VAL ((0x9 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) #define AD9257_TST_PN_23_SQNC_VAL \
#define AD9257_TST_1_x_SYNC_VAL ((0xa << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) ((0x5 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_1_BIT_HGH_VAL ((0xb << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) #define AD9257_TST_PN_9_SQNC__VAL \
#define AD9257_TST_MXD_BT_FRQ_VAL ((0xc << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) ((0x6 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_1_0_WRD_TGGL_VAL \
((0x7 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_USR_INPT_VAL \
((0x8 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_1_0_BT_TGGL_VAL \
((0x9 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_1_x_SYNC_VAL \
((0xa << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_1_BIT_HGH_VAL \
((0xb << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_MXD_BT_FRQ_VAL \
((0xc << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
#define AD9257_TST_RST_SHRT_GN_OFST (4) #define AD9257_TST_RST_SHRT_GN_OFST (4)
#define AD9257_TST_RST_SHRT_GN_MSK (0x00000001 << AD9257_TST_RST_SHRT_GN_OFST) #define AD9257_TST_RST_SHRT_GN_MSK (0x00000001 << AD9257_TST_RST_SHRT_GN_OFST)
#define AD9257_TST_RST_LNG_GN_OFST (5) #define AD9257_TST_RST_LNG_GN_OFST (5)
#define AD9257_TST_RST_LNG_GN_MSK (0x00000001 << AD9257_TST_RST_LNG_GN_OFST) #define AD9257_TST_RST_LNG_GN_MSK (0x00000001 << AD9257_TST_RST_LNG_GN_OFST)
#define AD9257_USER_IN_MODE_OFST (6) #define AD9257_USER_IN_MODE_OFST (6)
#define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST) #define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST)
#define AD9257_USR_IN_SNGL_VAL ((0x0 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK) #define AD9257_USR_IN_SNGL_VAL \
#define AD9257_USR_IN_ALTRNT_VAL ((0x1 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK) ((0x0 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
#define AD9257_USR_IN_SNGL_ONC_VAL ((0x2 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK) #define AD9257_USR_IN_ALTRNT_VAL \
#define AD9257_USR_IN_ALTRNT_ONC_VAL ((0x3 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK) ((0x1 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
#define AD9257_USR_IN_SNGL_ONC_VAL \
((0x2 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
#define AD9257_USR_IN_ALTRNT_ONC_VAL \
((0x3 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
// default value is 0x01 // default value is 0x01
#define AD9257_OUT_MODE_REG (0x14) #define AD9257_OUT_MODE_REG (0x14)
#define AD9257_OUT_FORMAT_OFST (0) #define AD9257_OUT_FORMAT_OFST (0)
#define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST) #define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST)
#define AD9257_OUT_BINARY_OFST_VAL ((0x0 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK) #define AD9257_OUT_BINARY_OFST_VAL \
#define AD9257_OUT_TWOS_COMPL_VAL ((0x1 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK) ((0x0 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK)
#define AD9257_OUT_OTPT_INVRT_OFST (2) #define AD9257_OUT_TWOS_COMPL_VAL \
#define AD9257_OUT_OTPT_INVRT_MSK (0x00000001 << AD9257_OUT_OTPT_INVRT_OFST) ((0x1 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK)
#define AD9257_OUT_LVDS_OPT_OFST (6) #define AD9257_OUT_OTPT_INVRT_OFST (2)
#define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST) #define AD9257_OUT_OTPT_INVRT_MSK (0x00000001 << AD9257_OUT_OTPT_INVRT_OFST)
#define AD9257_OUT_LVDS_ANSI_VAL ((0x0 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK) #define AD9257_OUT_LVDS_OPT_OFST (6)
#define AD9257_OUT_LVDS_IEEE_VAL ((0x1 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK) #define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST)
#define AD9257_OUT_LVDS_ANSI_VAL \
((0x0 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK)
#define AD9257_OUT_LVDS_IEEE_VAL \
((0x1 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK)
// default value is 0x3 // default value is 0x3
#define AD9257_OUT_PHASE_REG (0x16) #define AD9257_OUT_PHASE_REG (0x16)
#define AD9257_OUT_CLK_OFST (0) #define AD9257_OUT_CLK_OFST (0)
#define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST) #define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST)
#define AD9257_OUT_CLK_0_VAL ((0x0 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) #define AD9257_OUT_CLK_0_VAL ((0x0 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_60_VAL ((0x1 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) #define AD9257_OUT_CLK_60_VAL \
#define AD9257_OUT_CLK_120_VAL ((0x2 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) ((0x1 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_180_VAL ((0x3 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) #define AD9257_OUT_CLK_120_VAL \
#define AD9257_OUT_CLK_240_VAL ((0x4 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) ((0x2 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_300_VAL ((0x5 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) #define AD9257_OUT_CLK_180_VAL \
#define AD9257_OUT_CLK_360_VAL ((0x6 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) ((0x3 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_420_VAL ((0x7 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) #define AD9257_OUT_CLK_240_VAL \
#define AD9257_OUT_CLK_480_VAL ((0x8 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) ((0x4 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_540_VAL ((0x9 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) #define AD9257_OUT_CLK_300_VAL \
#define AD9257_OUT_CLK_600_VAL ((0xa << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) ((0x5 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_OUT_CLK_660_VAL ((0xb << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) #define AD9257_OUT_CLK_360_VAL \
#define AD9257_IN_CLK_OFST (4) ((0x6 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST) #define AD9257_OUT_CLK_420_VAL \
#define AD9257_IN_CLK_0_VAL ((0x0 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) ((0x7 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_IN_CLK_1_VAL ((0x1 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) #define AD9257_OUT_CLK_480_VAL \
#define AD9257_IN_CLK_2_VAL ((0x2 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) ((0x8 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_IN_CLK_3_VAL ((0x3 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) #define AD9257_OUT_CLK_540_VAL \
#define AD9257_IN_CLK_4_VAL ((0x4 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) ((0x9 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_IN_CLK_5_VAL ((0x5 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) #define AD9257_OUT_CLK_600_VAL \
#define AD9257_IN_CLK_6_VAL ((0x6 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) ((0xa << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_IN_CLK_7_VAL ((0x7 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) #define AD9257_OUT_CLK_660_VAL \
((0xb << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
#define AD9257_IN_CLK_OFST (4)
#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST)
#define AD9257_IN_CLK_0_VAL ((0x0 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
#define AD9257_IN_CLK_1_VAL ((0x1 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
#define AD9257_IN_CLK_2_VAL ((0x2 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
#define AD9257_IN_CLK_3_VAL ((0x3 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
#define AD9257_IN_CLK_4_VAL ((0x4 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
#define AD9257_IN_CLK_5_VAL ((0x5 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
#define AD9257_IN_CLK_6_VAL ((0x6 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
#define AD9257_IN_CLK_7_VAL ((0x7 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
// default value is 0x4 // default value is 0x4
#define AD9257_VREF_REG (0x18) #define AD9257_VREF_REG (0x18)
#define AD9257_VREF_OFST (0) #define AD9257_VREF_OFST (0)
#define AD9257_VREF_MSK (0x00000007 << AD9257_VREF_OFST) #define AD9257_VREF_MSK (0x00000007 << AD9257_VREF_OFST)
#define AD9257_VREF_DEFAULT_VAL (AD9257_VREF_2_0_VAL) #define AD9257_VREF_DEFAULT_VAL (AD9257_VREF_2_0_VAL)
#define AD9257_VREF_1_0_VAL ((0x0 << AD9257_VREF_OFST) & AD9257_VREF_MSK) #define AD9257_VREF_1_0_VAL ((0x0 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
#define AD9257_VREF_1_14_VAL ((0x1 << AD9257_VREF_OFST) & AD9257_VREF_MSK) #define AD9257_VREF_1_14_VAL ((0x1 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
#define AD9257_VREF_1_33_VAL ((0x2 << AD9257_VREF_OFST) & AD9257_VREF_MSK) #define AD9257_VREF_1_33_VAL ((0x2 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
#define AD9257_VREF_1_6_VAL ((0x3 << AD9257_VREF_OFST) & AD9257_VREF_MSK) #define AD9257_VREF_1_6_VAL ((0x3 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
#define AD9257_VREF_2_0_VAL ((0x4 << AD9257_VREF_OFST) & AD9257_VREF_MSK) #define AD9257_VREF_2_0_VAL ((0x4 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
// defines from the fpga // defines from the fpga
uint32_t AD9257_Reg = 0x0; uint32_t AD9257_Reg = 0x0;
@ -133,7 +170,8 @@ uint32_t AD9257_DigMask = 0x0;
int AD9257_DigOffset = 0x0; int AD9257_DigOffset = 0x0;
int AD9257_VrefVoltage = 0; int AD9257_VrefVoltage = 0;
void AD9257_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst) { void AD9257_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk,
uint32_t dmsk, int dofst) {
AD9257_Reg = reg; AD9257_Reg = reg;
AD9257_CsMask = cmsk; AD9257_CsMask = cmsk;
AD9257_ClkMask = clkmsk; AD9257_ClkMask = clkmsk;
@ -142,137 +180,138 @@ void AD9257_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dm
} }
void AD9257_Disable() { void AD9257_Disable() {
bus_w(AD9257_Reg, (bus_r(AD9257_Reg) bus_w(AD9257_Reg, (bus_r(AD9257_Reg) | AD9257_CsMask | AD9257_ClkMask) &
| AD9257_CsMask ~(AD9257_DigMask));
| AD9257_ClkMask)
& ~(AD9257_DigMask));
} }
int AD9257_GetVrefVoltage(int mV) { int AD9257_GetVrefVoltage(int mV) {
if (mV == 0) if (mV == 0)
return AD9257_VrefVoltage; return AD9257_VrefVoltage;
switch(AD9257_VrefVoltage) { switch (AD9257_VrefVoltage) {
case 0: case 0:
return 1000; return 1000;
case 1: case 1:
return 1140; return 1140;
case 2: case 2:
return 1330; return 1330;
case 3: case 3:
return 1600; return 1600;
case 4: case 4:
return 2000; return 2000;
default: default:
LOG(logERROR, ("Could not convert Adc Vpp from mode to mV\n")); LOG(logERROR, ("Could not convert Adc Vpp from mode to mV\n"));
return -1; return -1;
} }
} }
int AD9257_SetVrefVoltage(int val, int mV) { int AD9257_SetVrefVoltage(int val, int mV) {
int mode = val; int mode = val;
// convert to mode // convert to mode
if (mV) { if (mV) {
switch(val) { switch (val) {
case 1000: case 1000:
mode = 0; mode = 0;
break; break;
case 1140: case 1140:
mode = 1; mode = 1;
break; break;
case 1330: case 1330:
mode = 2; mode = 2;
break; break;
case 1600: case 1600:
mode = 3; mode = 3;
break; break;
case 2000: case 2000:
mode = 4; mode = 4;
break; break;
// validation for mV // validation for mV
default: default:
LOG(logERROR, ("mv:%d doesnt exist\n", val)); LOG(logERROR, ("mv:%d doesnt exist\n", val));
return FAIL; return FAIL;
} }
} }
// validation for mode // validation for mode
switch(mode) { switch (mode) {
case 0: case 0:
LOG(logINFO, ("Setting ADC Vref to 1.0 V (Mode:%d)\n", mode)); LOG(logINFO, ("Setting ADC Vref to 1.0 V (Mode:%d)\n", mode));
break; break;
case 1: case 1:
LOG(logINFO, ("Setting ADC Vref to 1.14 V (Mode:%d)\n", mode)); LOG(logINFO, ("Setting ADC Vref to 1.14 V (Mode:%d)\n", mode));
break; break;
case 2: case 2:
LOG(logINFO, ("Setting ADC Vref to 1.33 V (Mode:%d)\n", mode)); LOG(logINFO, ("Setting ADC Vref to 1.33 V (Mode:%d)\n", mode));
break; break;
case 3: case 3:
LOG(logINFO, ("Setting ADC Vref to 1.6 V (Mode:%d)\n", mode)); LOG(logINFO, ("Setting ADC Vref to 1.6 V (Mode:%d)\n", mode));
break; break;
case 4: case 4:
LOG(logINFO, ("Setting ADC Vref to 2.0 V (Mode:%d)\n", mode)); LOG(logINFO, ("Setting ADC Vref to 2.0 V (Mode:%d)\n", mode));
break; break;
default: default:
return FAIL; return FAIL;
} }
// set vref voltage // set vref voltage
AD9257_Set(AD9257_VREF_REG, mode); AD9257_Set(AD9257_VREF_REG, mode);
AD9257_VrefVoltage = mode; AD9257_VrefVoltage = mode;
return OK; return OK;
} }
void AD9257_Set(int addr, int val) { void AD9257_Set(int addr, int val) {
u_int32_t codata; u_int32_t codata;
codata = val + (addr << 8); codata = val + (addr << 8);
LOG(logINFO, ("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr)); LOG(logINFO,
serializeToSPI(AD9257_Reg, codata, AD9257_CsMask, AD9257_ADC_NUMBITS, ("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr));
AD9257_ClkMask, AD9257_DigMask, AD9257_DigOffset, 0); serializeToSPI(AD9257_Reg, codata, AD9257_CsMask, AD9257_ADC_NUMBITS,
AD9257_ClkMask, AD9257_DigMask, AD9257_DigOffset, 0);
} }
void AD9257_Configure(){ void AD9257_Configure() {
LOG(logINFOBLUE, ("Configuring ADC9257:\n")); LOG(logINFOBLUE, ("Configuring ADC9257:\n"));
//power mode reset // power mode reset
LOG(logINFO, ("\tPower mode reset\n")); LOG(logINFO, ("\tPower mode reset\n"));
AD9257_Set(AD9257_POWER_MODE_REG, AD9257_INT_RESET_VAL); AD9257_Set(AD9257_POWER_MODE_REG, AD9257_INT_RESET_VAL);
//power mode chip run // power mode chip run
LOG(logINFO, ("\tPower mode chip run\n")); LOG(logINFO, ("\tPower mode chip run\n"));
AD9257_Set(AD9257_POWER_MODE_REG, AD9257_INT_CHIP_RUN_VAL); AD9257_Set(AD9257_POWER_MODE_REG, AD9257_INT_CHIP_RUN_VAL);
// binary offset, lvds-iee reduced // binary offset, lvds-iee reduced
LOG(logINFO, ("\tBinary offset, Lvds-ieee reduced\n")); LOG(logINFO, ("\tBinary offset, Lvds-ieee reduced\n"));
AD9257_Set(AD9257_OUT_MODE_REG, AD9257_OUT_BINARY_OFST_VAL | AD9257_OUT_LVDS_IEEE_VAL); AD9257_Set(AD9257_OUT_MODE_REG,
AD9257_OUT_BINARY_OFST_VAL | AD9257_OUT_LVDS_IEEE_VAL);
//output clock phase // output clock phase
LOG(logINFO, ("\tOutput clock phase: 180\n")); LOG(logINFO, ("\tOutput clock phase: 180\n"));
AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_180_VAL); AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_180_VAL);
// all devices on chip to receive next command // all devices on chip to receive next command
LOG(logINFO, ("\tAll devices on chip to receive next command\n")); LOG(logINFO, ("\tAll devices on chip to receive next command\n"));
AD9257_Set(AD9257_DEV_IND_2_REG, AD9257_Set(AD9257_DEV_IND_2_REG, AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK |
AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK | AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK); AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK);
AD9257_Set(AD9257_DEV_IND_1_REG, AD9257_Set(AD9257_DEV_IND_1_REG, AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK |
AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK |
AD9257_CLK_CH_DCO_MSK | AD9257_CLK_CH_IFCO_MSK); AD9257_CLK_CH_DCO_MSK |
AD9257_CLK_CH_IFCO_MSK);
// vref // vref
#ifdef GOTTHARDD #ifdef GOTTHARDD
LOG(logINFO, ("\tVref default at 2.0\n")); LOG(logINFO, ("\tVref default at 2.0\n"));
AD9257_SetVrefVoltage(AD9257_VREF_DEFAULT_VAL, 0); AD9257_SetVrefVoltage(AD9257_VREF_DEFAULT_VAL, 0);
#else #else
LOG(logINFO, ("\tVref 1.33\n")); LOG(logINFO, ("\tVref 1.33\n"));
AD9257_SetVrefVoltage(AD9257_VREF_1_33_VAL, 0); AD9257_SetVrefVoltage(AD9257_VREF_1_33_VAL, 0);
#endif #endif
// no test mode // no test mode
LOG(logINFO, ("\tNo test mode\n")); LOG(logINFO, ("\tNo test mode\n"));
AD9257_Set(AD9257_TEST_MODE_REG, AD9257_TST_OFF_VAL); AD9257_Set(AD9257_TEST_MODE_REG, AD9257_TST_OFF_VAL);
#ifdef TESTADC #ifdef TESTADC
LOG(logINFOBLUE, ("Putting ADC in Test Mode!\n"); LOG(logINFOBLUE, ("Putting ADC in Test Mode!\n");
// mixed bit frequency test mode // mixed bit frequency test mode
LOG(logINFO, ("\tMixed bit frequency test mode\n")); LOG(logINFO, ("\tMixed bit frequency test mode\n"));
AD9257_Set(AD9257_TEST_MODE_REG, AD9257_TST_MXD_BT_FRQ_VAL); AD9257_Set(AD9257_TEST_MODE_REG, AD9257_TST_MXD_BT_FRQ_VAL);

282
slsDetectorServers/slsDetectorServer/src/ALTERA_PLL.c Executable file → Normal file
View File

@ -1,78 +1,124 @@
#include "ALTERA_PLL.h" #include "ALTERA_PLL.h"
#include "clogger.h"
#include "blackfin.h" #include "blackfin.h"
#include "clogger.h"
#include <unistd.h> // usleep #include <unistd.h> // usleep
/* Altera PLL DEFINES */ /* Altera PLL DEFINES */
/** PLL Reconfiguration Registers */ /** PLL Reconfiguration Registers */
//https://www.altera.com/documentation/mcn1424769382940.html // https://www.altera.com/documentation/mcn1424769382940.html
#define ALTERA_PLL_MODE_REG (0x00) #define ALTERA_PLL_MODE_REG (0x00)
#define ALTERA_PLL_MODE_WT_RQUST_VAL (0) #define ALTERA_PLL_MODE_WT_RQUST_VAL (0)
#define ALTERA_PLL_MODE_PLLNG_MD_VAL (1) #define ALTERA_PLL_MODE_PLLNG_MD_VAL (1)
#define ALTERA_PLL_STATUS_REG (0x01) #define ALTERA_PLL_STATUS_REG (0x01)
#define ALTERA_PLL_START_REG (0x02) #define ALTERA_PLL_START_REG (0x02)
#define ALTERA_PLL_N_COUNTER_REG (0x03) #define ALTERA_PLL_N_COUNTER_REG (0x03)
#define ALTERA_PLL_M_COUNTER_REG (0x04) #define ALTERA_PLL_M_COUNTER_REG (0x04)
#define ALTERA_PLL_C_COUNTER_REG (0x05) #define ALTERA_PLL_C_COUNTER_REG (0x05)
#define ALTERA_PLL_C_COUNTER_LW_CNT_OFST (0) #define ALTERA_PLL_C_COUNTER_LW_CNT_OFST (0)
#define ALTERA_PLL_C_COUNTER_LW_CNT_MSK (0x000000FF << ALTERA_PLL_C_COUNTER_LW_CNT_OFST) #define ALTERA_PLL_C_COUNTER_LW_CNT_MSK \
#define ALTERA_PLL_C_COUNTER_HGH_CNT_OFST (8) (0x000000FF << ALTERA_PLL_C_COUNTER_LW_CNT_OFST)
#define ALTERA_PLL_C_COUNTER_HGH_CNT_MSK (0x000000FF << ALTERA_PLL_C_COUNTER_HGH_CNT_OFST) #define ALTERA_PLL_C_COUNTER_HGH_CNT_OFST (8)
#define ALTERA_PLL_C_COUNTER_HGH_CNT_MSK \
(0x000000FF << ALTERA_PLL_C_COUNTER_HGH_CNT_OFST)
/* total_div = lw_cnt + hgh_cnt */ /* total_div = lw_cnt + hgh_cnt */
#define ALTERA_PLL_C_COUNTER_BYPSS_ENBL_OFST (16) #define ALTERA_PLL_C_COUNTER_BYPSS_ENBL_OFST (16)
#define ALTERA_PLL_C_COUNTER_BYPSS_ENBL_MSK (0x00000001 << ALTERA_PLL_C_COUNTER_BYPSS_ENBL_OFST) #define ALTERA_PLL_C_COUNTER_BYPSS_ENBL_MSK \
/* if bypss_enbl = 0, fout = f(vco)/total_div; else fout = f(vco) (c counter is bypassed) */ (0x00000001 << ALTERA_PLL_C_COUNTER_BYPSS_ENBL_OFST)
#define ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST (17) /* if bypss_enbl = 0, fout = f(vco)/total_div; else fout = f(vco) (c counter is
#define ALTERA_PLL_C_COUNTER_ODD_DVSN_MSK (0x00000001 << ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST) * bypassed) */
/** if odd_dvsn = 0 (even), duty cycle = hgh_cnt/ total_div; else duty cycle = (hgh_cnt - 0.5) / total_div */ #define ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST (17)
#define ALTERA_PLL_C_COUNTER_SLCT_OFST (18) #define ALTERA_PLL_C_COUNTER_ODD_DVSN_MSK \
#define ALTERA_PLL_C_COUNTER_SLCT_MSK (0x0000001F << ALTERA_PLL_C_COUNTER_SLCT_OFST) (0x00000001 << ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST)
/** if odd_dvsn = 0 (even), duty cycle = hgh_cnt/ total_div; else duty cycle =
* (hgh_cnt - 0.5) / total_div */
#define ALTERA_PLL_C_COUNTER_SLCT_OFST (18)
#define ALTERA_PLL_C_COUNTER_SLCT_MSK \
(0x0000001F << ALTERA_PLL_C_COUNTER_SLCT_OFST)
#define ALTERA_PLL_PHASE_SHIFT_REG (0x06) #define ALTERA_PLL_PHASE_SHIFT_REG (0x06)
#define ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST (0) #define ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST (0)
#define ALTERA_PLL_SHIFT_NUM_SHIFTS_MSK (0x0000FFFF << ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST) #define ALTERA_PLL_SHIFT_NUM_SHIFTS_MSK \
(0x0000FFFF << ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST)
#define ALTERA_PLL_SHIFT_CNT_SELECT_OFST (16) #define ALTERA_PLL_SHIFT_CNT_SELECT_OFST (16)
#define ALTERA_PLL_SHIFT_CNT_SELECT_MSK (0x0000001F << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) #define ALTERA_PLL_SHIFT_CNT_SELECT_MSK \
#define ALTERA_PLL_SHIFT_CNT_SLCT_C0_VAL ((0x0 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) (0x0000001F << ALTERA_PLL_SHIFT_CNT_SELECT_OFST)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C1_VAL ((0x1 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) #define ALTERA_PLL_SHIFT_CNT_SLCT_C0_VAL \
#define ALTERA_PLL_SHIFT_CNT_SLCT_C2_VAL ((0x2 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) ((0x0 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
#define ALTERA_PLL_SHIFT_CNT_SLCT_C3_VAL ((0x3 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C4_VAL ((0x4 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) #define ALTERA_PLL_SHIFT_CNT_SLCT_C1_VAL \
#define ALTERA_PLL_SHIFT_CNT_SLCT_C5_VAL ((0x5 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) ((0x1 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
#define ALTERA_PLL_SHIFT_CNT_SLCT_C6_VAL ((0x6 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C7_VAL ((0x7 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) #define ALTERA_PLL_SHIFT_CNT_SLCT_C2_VAL \
#define ALTERA_PLL_SHIFT_CNT_SLCT_C8_VAL ((0x8 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) ((0x2 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
#define ALTERA_PLL_SHIFT_CNT_SLCT_C9_VAL ((0x9 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C10_VAL ((0x10 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) #define ALTERA_PLL_SHIFT_CNT_SLCT_C3_VAL \
#define ALTERA_PLL_SHIFT_CNT_SLCT_C11_VAL ((0x11 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) ((0x3 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
#define ALTERA_PLL_SHIFT_CNT_SLCT_C12_VAL ((0x12 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C13_VAL ((0x13 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) #define ALTERA_PLL_SHIFT_CNT_SLCT_C4_VAL \
#define ALTERA_PLL_SHIFT_CNT_SLCT_C14_VAL ((0x14 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) ((0x4 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
#define ALTERA_PLL_SHIFT_CNT_SLCT_C15_VAL ((0x15 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C16_VAL ((0x16 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) #define ALTERA_PLL_SHIFT_CNT_SLCT_C5_VAL \
#define ALTERA_PLL_SHIFT_CNT_SLCT_C17_VAL ((0x17 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) ((0x5 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C6_VAL \
((0x6 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C7_VAL \
((0x7 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C8_VAL \
((0x8 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C9_VAL \
((0x9 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C10_VAL \
((0x10 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C11_VAL \
((0x11 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C12_VAL \
((0x12 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C13_VAL \
((0x13 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C14_VAL \
((0x14 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C15_VAL \
((0x15 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C16_VAL \
((0x16 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_CNT_SLCT_C17_VAL \
((0x17 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \
ALTERA_PLL_SHIFT_CNT_SELECT_MSK)
#define ALTERA_PLL_SHIFT_UP_DOWN_OFST (21) #define ALTERA_PLL_SHIFT_UP_DOWN_OFST (21)
#define ALTERA_PLL_SHIFT_UP_DOWN_MSK (0x00000001 << ALTERA_PLL_SHIFT_UP_DOWN_OFST) #define ALTERA_PLL_SHIFT_UP_DOWN_MSK \
#define ALTERA_PLL_SHIFT_UP_DOWN_NEG_VAL ((0x0 << ALTERA_PLL_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_SHIFT_UP_DOWN_MSK) (0x00000001 << ALTERA_PLL_SHIFT_UP_DOWN_OFST)
#define ALTERA_PLL_SHIFT_UP_DOWN_POS_VAL ((0x1 << ALTERA_PLL_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_SHIFT_UP_DOWN_MSK) #define ALTERA_PLL_SHIFT_UP_DOWN_NEG_VAL \
((0x0 << ALTERA_PLL_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_SHIFT_UP_DOWN_MSK)
#define ALTERA_PLL_SHIFT_UP_DOWN_POS_VAL \
((0x1 << ALTERA_PLL_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_SHIFT_UP_DOWN_MSK)
#define ALTERA_PLL_K_COUNTER_REG (0x07) #define ALTERA_PLL_K_COUNTER_REG (0x07)
#define ALTERA_PLL_BANDWIDTH_REG (0x08) #define ALTERA_PLL_BANDWIDTH_REG (0x08)
#define ALTERA_PLL_CHARGEPUMP_REG (0x09) #define ALTERA_PLL_CHARGEPUMP_REG (0x09)
#define ALTERA_PLL_VCO_DIV_REG (0x1c) #define ALTERA_PLL_VCO_DIV_REG (0x1c)
#define ALTERA_PLL_MIF_REG (0x1f) #define ALTERA_PLL_MIF_REG (0x1f)
#define ALTERA_PLL_WAIT_TIME_US (10 * 1000)
#define ALTERA_PLL_WAIT_TIME_US (10 * 1000)
// defines from the fpga // defines from the fpga
uint32_t ALTERA_PLL_Cntrl_Reg = 0x0; uint32_t ALTERA_PLL_Cntrl_Reg = 0x0;
@ -89,7 +135,9 @@ uint32_t ALTERA_PLL_Cntrl_AddrMask = 0x0;
int ALTERA_PLL_Cntrl_AddrOfst = 0; int ALTERA_PLL_Cntrl_AddrOfst = 0;
#ifdef JUNGFRAUD #ifdef JUNGFRAUD
void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, uint32_t wpmsk, uint32_t prmsk, uint32_t amsk, int aofst, uint32_t wd2msk, int clk2Index) { void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk,
uint32_t wpmsk, uint32_t prmsk, uint32_t amsk,
int aofst, uint32_t wd2msk, int clk2Index) {
ALTERA_PLL_Cntrl_Reg = creg; ALTERA_PLL_Cntrl_Reg = creg;
ALTERA_PLL_Param_Reg = preg; ALTERA_PLL_Param_Reg = preg;
ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask = rprmsk; ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask = rprmsk;
@ -101,7 +149,9 @@ void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, uint32
ALTERA_PLL_Cntrl_DBIT_ClkIndex = clk2Index; ALTERA_PLL_Cntrl_DBIT_ClkIndex = clk2Index;
} }
#else #else
void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, uint32_t wpmsk, uint32_t prmsk, uint32_t amsk, int aofst) { void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk,
uint32_t wpmsk, uint32_t prmsk, uint32_t amsk,
int aofst) {
ALTERA_PLL_Cntrl_Reg = creg; ALTERA_PLL_Cntrl_Reg = creg;
ALTERA_PLL_Param_Reg = preg; ALTERA_PLL_Param_Reg = preg;
ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask = rprmsk; ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask = rprmsk;
@ -112,31 +162,41 @@ void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, uint32
} }
#endif #endif
void ALTERA_PLL_ResetPLL () { void ALTERA_PLL_ResetPLL() {
LOG(logINFO, ("Resetting only PLL\n")); LOG(logINFO, ("Resetting only PLL\n"));
LOG(logDEBUG2, ("pllrstmsk:0x%x\n", ALTERA_PLL_Cntrl_PLLRstMask)); LOG(logDEBUG2, ("pllrstmsk:0x%x\n", ALTERA_PLL_Cntrl_PLLRstMask));
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) | ALTERA_PLL_Cntrl_PLLRstMask); bus_w(ALTERA_PLL_Cntrl_Reg,
LOG(logDEBUG2, ("Set PLL Reset mSk: ALTERA_PLL_Cntrl_Reg:0x%x\n", bus_r(ALTERA_PLL_Cntrl_Reg))); bus_r(ALTERA_PLL_Cntrl_Reg) | ALTERA_PLL_Cntrl_PLLRstMask);
LOG(logDEBUG2, ("Set PLL Reset mSk: ALTERA_PLL_Cntrl_Reg:0x%x\n",
bus_r(ALTERA_PLL_Cntrl_Reg)));
usleep(ALTERA_PLL_WAIT_TIME_US); usleep(ALTERA_PLL_WAIT_TIME_US);
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) & ~ALTERA_PLL_Cntrl_PLLRstMask); bus_w(ALTERA_PLL_Cntrl_Reg,
LOG(logDEBUG2, ("UnSet PLL Reset mSk: ALTERA_PLL_Cntrl_Reg:0x%x\n", bus_r(ALTERA_PLL_Cntrl_Reg))); bus_r(ALTERA_PLL_Cntrl_Reg) & ~ALTERA_PLL_Cntrl_PLLRstMask);
LOG(logDEBUG2, ("UnSet PLL Reset mSk: ALTERA_PLL_Cntrl_Reg:0x%x\n",
bus_r(ALTERA_PLL_Cntrl_Reg)));
} }
void ALTERA_PLL_ResetPLLAndReconfiguration () { void ALTERA_PLL_ResetPLLAndReconfiguration() {
LOG(logINFO, ("Resetting PLL and Reconfiguration\n")); LOG(logINFO, ("Resetting PLL and Reconfiguration\n"));
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) | ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask | ALTERA_PLL_Cntrl_PLLRstMask); bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) |
ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask |
ALTERA_PLL_Cntrl_PLLRstMask);
usleep(ALTERA_PLL_WAIT_TIME_US); usleep(ALTERA_PLL_WAIT_TIME_US);
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) & ~ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask & ~ALTERA_PLL_Cntrl_PLLRstMask); bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) &
~ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask &
~ALTERA_PLL_Cntrl_PLLRstMask);
} }
void ALTERA_PLL_SetPllReconfigReg(uint32_t reg, uint32_t val, int useSecondWRMask) { void ALTERA_PLL_SetPllReconfigReg(uint32_t reg, uint32_t val,
LOG(logDEBUG1, ("Setting PLL Reconfig Reg, reg:0x%x, val:0x%x, useSecondWRMask:%d)\n", reg, val, useSecondWRMask)); int useSecondWRMask) {
LOG(logDEBUG1,
("Setting PLL Reconfig Reg, reg:0x%x, val:0x%x, useSecondWRMask:%d)\n",
reg, val, useSecondWRMask));
uint32_t wrmask = ALTERA_PLL_Cntrl_WrPrmtrMask; uint32_t wrmask = ALTERA_PLL_Cntrl_WrPrmtrMask;
#ifdef JUNGFRAUD #ifdef JUNGFRAUD
@ -145,36 +205,47 @@ void ALTERA_PLL_SetPllReconfigReg(uint32_t reg, uint32_t val, int useSecondWRMas
} }
#endif #endif
LOG(logDEBUG2, ("pllparamreg:0x%x pllcontrolreg:0x%x addrofst:%d addrmsk:0x%x wrmask:0x%x\n", LOG(logDEBUG2,
ALTERA_PLL_Param_Reg, ALTERA_PLL_Cntrl_Reg, ALTERA_PLL_Cntrl_AddrOfst, ALTERA_PLL_Cntrl_AddrMask, wrmask)); ("pllparamreg:0x%x pllcontrolreg:0x%x addrofst:%d addrmsk:0x%x "
"wrmask:0x%x\n",
ALTERA_PLL_Param_Reg, ALTERA_PLL_Cntrl_Reg, ALTERA_PLL_Cntrl_AddrOfst,
ALTERA_PLL_Cntrl_AddrMask, wrmask));
// set parameter // set parameter
bus_w(ALTERA_PLL_Param_Reg, val); bus_w(ALTERA_PLL_Param_Reg, val);
LOG(logDEBUG2, ("Set Parameter: ALTERA_PLL_Param_Reg:0x%x\n", bus_r(ALTERA_PLL_Param_Reg))); LOG(logDEBUG2, ("Set Parameter: ALTERA_PLL_Param_Reg:0x%x\n",
bus_r(ALTERA_PLL_Param_Reg)));
usleep(ALTERA_PLL_WAIT_TIME_US); usleep(ALTERA_PLL_WAIT_TIME_US);
// set address // set address
bus_w(ALTERA_PLL_Cntrl_Reg, (reg << ALTERA_PLL_Cntrl_AddrOfst) & ALTERA_PLL_Cntrl_AddrMask); bus_w(ALTERA_PLL_Cntrl_Reg,
LOG(logDEBUG2, ("Set Address: ALTERA_PLL_Cntrl_Reg:0x%x\n", bus_r(ALTERA_PLL_Cntrl_Reg))); (reg << ALTERA_PLL_Cntrl_AddrOfst) & ALTERA_PLL_Cntrl_AddrMask);
LOG(logDEBUG2, ("Set Address: ALTERA_PLL_Cntrl_Reg:0x%x\n",
bus_r(ALTERA_PLL_Cntrl_Reg)));
usleep(ALTERA_PLL_WAIT_TIME_US); usleep(ALTERA_PLL_WAIT_TIME_US);
//write parameter // write parameter
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) | wrmask); bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) | wrmask);
LOG(logDEBUG2, ("Set WR bit: ALTERA_PLL_Cntrl_Reg:0x%x\n", bus_r(ALTERA_PLL_Cntrl_Reg))); LOG(logDEBUG2, ("Set WR bit: ALTERA_PLL_Cntrl_Reg:0x%x\n",
bus_r(ALTERA_PLL_Cntrl_Reg)));
usleep(ALTERA_PLL_WAIT_TIME_US); usleep(ALTERA_PLL_WAIT_TIME_US);
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) & ~wrmask); bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) & ~wrmask);
LOG(logDEBUG2, ("Unset WR bit: ALTERA_PLL_Cntrl_Reg:0x%x\n", bus_r(ALTERA_PLL_Cntrl_Reg))); LOG(logDEBUG2, ("Unset WR bit: ALTERA_PLL_Cntrl_Reg:0x%x\n",
bus_r(ALTERA_PLL_Cntrl_Reg)));
usleep(ALTERA_PLL_WAIT_TIME_US); usleep(ALTERA_PLL_WAIT_TIME_US);
} }
void ALTERA_PLL_SetPhaseShift(int32_t phase, int clkIndex, int pos) { void ALTERA_PLL_SetPhaseShift(int32_t phase, int clkIndex, int pos) {
LOG(logINFO, ("\tWriting PLL Phase Shift\n")); LOG(logINFO, ("\tWriting PLL Phase Shift\n"));
uint32_t value = (((phase << ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST) & ALTERA_PLL_SHIFT_NUM_SHIFTS_MSK) | uint32_t value = (((phase << ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST) &
((clkIndex << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) | ALTERA_PLL_SHIFT_NUM_SHIFTS_MSK) |
(pos ? ALTERA_PLL_SHIFT_UP_DOWN_POS_VAL : ALTERA_PLL_SHIFT_UP_DOWN_NEG_VAL)); ((clkIndex << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) &
ALTERA_PLL_SHIFT_CNT_SELECT_MSK) |
(pos ? ALTERA_PLL_SHIFT_UP_DOWN_POS_VAL
: ALTERA_PLL_SHIFT_UP_DOWN_NEG_VAL));
LOG(logDEBUG1, ("C%d phase word:0x%08x\n", clkIndex, value)); LOG(logDEBUG1, ("C%d phase word:0x%08x\n", clkIndex, value));
@ -186,19 +257,22 @@ void ALTERA_PLL_SetPhaseShift(int32_t phase, int clkIndex, int pos) {
#endif #endif
// write phase shift // write phase shift
ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_PHASE_SHIFT_REG, value, useSecondWR); ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_PHASE_SHIFT_REG, value,
useSecondWR);
} }
void ALTERA_PLL_SetModePolling() { void ALTERA_PLL_SetModePolling() {
LOG(logINFO, ("\tSetting Polling Mode\n")); LOG(logINFO, ("\tSetting Polling Mode\n"));
ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_MODE_REG, ALTERA_PLL_MODE_PLLNG_MD_VAL, 0); ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_MODE_REG,
ALTERA_PLL_MODE_PLLNG_MD_VAL, 0);
} }
int ALTERA_PLL_SetOuputFrequency (int clkIndex, int pllVCOFreqMhz, int value) { int ALTERA_PLL_SetOuputFrequency(int clkIndex, int pllVCOFreqMhz, int value) {
LOG(logDEBUG1, ("C%d: Setting output frequency to %d (pllvcofreq: %dMhz)\n", clkIndex, value, pllVCOFreqMhz)); LOG(logDEBUG1, ("C%d: Setting output frequency to %d (pllvcofreq: %dMhz)\n",
clkIndex, value, pllVCOFreqMhz));
// calculate output frequency // calculate output frequency
float total_div = (float)pllVCOFreqMhz / (float)value; float total_div = (float)pllVCOFreqMhz / (float)value;
// assume 50% duty cycle // assume 50% duty cycle
uint32_t low_count = total_div / 2; uint32_t low_count = total_div / 2;
@ -210,28 +284,32 @@ int ALTERA_PLL_SetOuputFrequency (int clkIndex, int pllVCOFreqMhz, int value) {
++high_count; ++high_count;
odd_division = 1; odd_division = 1;
} }
LOG(logINFO, ("\tC%d: Low:%d, High:%d, Odd:%d\n", clkIndex, low_count, high_count, odd_division)); LOG(logINFO, ("\tC%d: Low:%d, High:%d, Odd:%d\n", clkIndex, low_count,
high_count, odd_division));
// command to set output frequency // command to set output frequency
uint32_t val = (((low_count << ALTERA_PLL_C_COUNTER_LW_CNT_OFST) & ALTERA_PLL_C_COUNTER_LW_CNT_MSK) | uint32_t val = (((low_count << ALTERA_PLL_C_COUNTER_LW_CNT_OFST) &
((high_count << ALTERA_PLL_C_COUNTER_HGH_CNT_OFST) & ALTERA_PLL_C_COUNTER_HGH_CNT_MSK) | ALTERA_PLL_C_COUNTER_LW_CNT_MSK) |
((odd_division << ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST) & ALTERA_PLL_C_COUNTER_ODD_DVSN_MSK) | ((high_count << ALTERA_PLL_C_COUNTER_HGH_CNT_OFST) &
((clkIndex << ALTERA_PLL_C_COUNTER_SLCT_OFST) & ALTERA_PLL_C_COUNTER_SLCT_MSK)); ALTERA_PLL_C_COUNTER_HGH_CNT_MSK) |
((odd_division << ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST) &
ALTERA_PLL_C_COUNTER_ODD_DVSN_MSK) |
((clkIndex << ALTERA_PLL_C_COUNTER_SLCT_OFST) &
ALTERA_PLL_C_COUNTER_SLCT_MSK));
LOG(logDEBUG1, ("C%d word:0x%08x\n", clkIndex, val)); LOG(logDEBUG1, ("C%d word:0x%08x\n", clkIndex, val));
// write frequency (post-scale output counter C) // write frequency (post-scale output counter C)
ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_C_COUNTER_REG, val, 0); ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_C_COUNTER_REG, val, 0);
// reset required to keep the phase (must reconfigure adcs again after this as adc clock is stopped temporarily when resetting pll) // reset required to keep the phase (must reconfigure adcs again after this
ALTERA_PLL_ResetPLL (); // as adc clock is stopped temporarily when resetting pll)
ALTERA_PLL_ResetPLL();
/*double temp = ((double)pllVCOFreqMhz / (double)(low_count + high_count)); /*double temp = ((double)pllVCOFreqMhz / (double)(low_count + high_count));
if ((temp - (int)temp) > 0.0001) { if ((temp - (int)temp) > 0.0001) {
temp += 0.5; temp += 0.5;
} }
return (int)temp; return (int)temp;
*/ */
return value; return value;
} }

118
slsDetectorServers/slsDetectorServer/src/ALTERA_PLL_CYCLONE10.c Executable file → Normal file
View File

@ -3,46 +3,55 @@
#include "nios.h" #include "nios.h"
#include "sls_detector_defs.h" #include "sls_detector_defs.h"
#include <unistd.h> // usleep #include <unistd.h> // usleep
/* Altera PLL CYCLONE 10 DEFINES */ /* Altera PLL CYCLONE 10 DEFINES */
/** PLL Reconfiguration Registers */ /** PLL Reconfiguration Registers */
// https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an728.pdf // https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an728.pdf
// c counter (C0-C8 (+1 to base address)) // c counter (C0-C8 (+1 to base address))
#define ALTERA_PLL_C10_C_COUNTER_BASE_REG (0x0C0) #define ALTERA_PLL_C10_C_COUNTER_BASE_REG (0x0C0)
#define ALTERA_PLL_C10_C_COUNTER_MAX_DIVIDER_VAL (512) #define ALTERA_PLL_C10_C_COUNTER_MAX_DIVIDER_VAL (512)
#define ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST (0) #define ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST (0)
#define ALTERA_PLL_C10_C_COUNTER_LW_CNT_MSK (0x000000FF << ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST) #define ALTERA_PLL_C10_C_COUNTER_LW_CNT_MSK \
#define ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST (8) (0x000000FF << ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST)
#define ALTERA_PLL_C10_C_COUNTER_HGH_CNT_MSK (0x000000FF << ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST) #define ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST (8)
#define ALTERA_PLL_C10_C_COUNTER_HGH_CNT_MSK \
(0x000000FF << ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST)
/* total_div = lw_cnt + hgh_cnt */ /* total_div = lw_cnt + hgh_cnt */
#define ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_OFST (16) #define ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_OFST (16)
#define ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_MSK (0x00000001 << ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_OFST) #define ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_MSK \
/* if bypss_enbl = 0, fout = f(vco)/total_div; else fout = f(vco) (c counter is bypassed) */ (0x00000001 << ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_OFST)
#define ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST (17) /* if bypss_enbl = 0, fout = f(vco)/total_div; else fout = f(vco) (c counter is
#define ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_MSK (0x00000001 << ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST) * bypassed) */
/** if odd_dvsn = 0 (even), duty cycle = hgh_cnt/ total_div; else duty cycle = (hgh_cnt - 0.5) / total_div */ #define ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST (17)
#define ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_MSK \
(0x00000001 << ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST)
/** if odd_dvsn = 0 (even), duty cycle = hgh_cnt/ total_div; else duty cycle =
* (hgh_cnt - 0.5) / total_div */
// dynamic phase shift (C0-C8 (+1 to base address), 0xF for all counters) // dynamic phase shift (C0-C8 (+1 to base address), 0xF for all counters)
#define ALTERA_PLL_C10_PHASE_SHIFT_BASE_REG (0x100) #define ALTERA_PLL_C10_PHASE_SHIFT_BASE_REG (0x100)
#define ALTERA_PLL_C10_MAX_SHIFTS_PER_OPERATION (7) #define ALTERA_PLL_C10_MAX_SHIFTS_PER_OPERATION (7)
#define ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST (0) #define ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST (0)
#define ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_MSK (0x00000007 << ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST) #define ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_MSK \
(0x00000007 << ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST)
#define ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST (3) #define ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST (3)
#define ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK (0x00000001 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST) #define ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK \
#define ALTERA_PLL_C10_SHIFT_UP_DOWN_NEG_VAL ((0x0 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK) (0x00000001 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST)
#define ALTERA_PLL_C10_SHIFT_UP_DOWN_POS_VAL ((0x1 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK) #define ALTERA_PLL_C10_SHIFT_UP_DOWN_NEG_VAL \
((0x0 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST) & \
#define ALTERA_PLL_C10_PHASE_SHIFT_STEP_OF_VCO (8) ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK)
#define ALTERA_PLL_C10_WAIT_TIME_US (1 * 1000) // 1 ms #define ALTERA_PLL_C10_SHIFT_UP_DOWN_POS_VAL \
((0x1 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST) & \
ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK)
#define ALTERA_PLL_C10_PHASE_SHIFT_STEP_OF_VCO (8)
#define ALTERA_PLL_C10_WAIT_TIME_US (1 * 1000) // 1 ms
int ALTERA_PLL_C10_Reg_offset = 0x0; int ALTERA_PLL_C10_Reg_offset = 0x0;
const int ALTERA_PLL_C10_NUM = 2; const int ALTERA_PLL_C10_NUM = 2;
@ -51,7 +60,10 @@ uint32_t ALTERA_PLL_C10_Reset_Reg[2] = {0x0, 0x0};
uint32_t ALTERA_PLL_C10_Reset_Msk[2] = {0x0, 0x0}; uint32_t ALTERA_PLL_C10_Reset_Msk[2] = {0x0, 0x0};
int ALTERA_PLL_C10_VCO_FREQ[2] = {0, 0}; int ALTERA_PLL_C10_VCO_FREQ[2] = {0, 0};
void ALTERA_PLL_C10_SetDefines(int regofst, uint32_t baseaddr0, uint32_t baseaddr1, uint32_t resetreg0, uint32_t resetreg1, uint32_t resetmsk0, uint32_t resetmsk1, int vcofreq0, int vcofreq1) { void ALTERA_PLL_C10_SetDefines(int regofst, uint32_t baseaddr0,
uint32_t baseaddr1, uint32_t resetreg0,
uint32_t resetreg1, uint32_t resetmsk0,
uint32_t resetmsk1, int vcofreq0, int vcofreq1) {
ALTERA_PLL_C10_Reg_offset = regofst; ALTERA_PLL_C10_Reg_offset = regofst;
ALTERA_PLL_C10_BaseAddress[0] = baseaddr0; ALTERA_PLL_C10_BaseAddress[0] = baseaddr0;
ALTERA_PLL_C10_BaseAddress[1] = baseaddr1; ALTERA_PLL_C10_BaseAddress[1] = baseaddr1;
@ -68,7 +80,7 @@ int ALTERA_PLL_C10_GetMaxClockDivider() {
} }
int ALTERA_PLL_C10_GetVCOFrequency(int pllIndex) { int ALTERA_PLL_C10_GetVCOFrequency(int pllIndex) {
return ALTERA_PLL_C10_VCO_FREQ[pllIndex]; return ALTERA_PLL_C10_VCO_FREQ[pllIndex];
} }
int ALTERA_PLL_C10_GetMaxPhaseShiftStepsofVCO() { int ALTERA_PLL_C10_GetMaxPhaseShiftStepsofVCO() {
@ -79,12 +91,13 @@ void ALTERA_PLL_C10_Reconfigure(int pllIndex) {
LOG(logINFO, ("\tReconfiguring PLL %d\n", pllIndex)); LOG(logINFO, ("\tReconfiguring PLL %d\n", pllIndex));
// write anything to base address to start reconfiguring // write anything to base address to start reconfiguring
LOG(logDEBUG1, ("\tWriting 1 to base address 0x%x to start reconfiguring\n", ALTERA_PLL_C10_BaseAddress[pllIndex])); LOG(logDEBUG1, ("\tWriting 1 to base address 0x%x to start reconfiguring\n",
ALTERA_PLL_C10_BaseAddress[pllIndex]));
bus_w_csp1(ALTERA_PLL_C10_BaseAddress[pllIndex], 0x1); bus_w_csp1(ALTERA_PLL_C10_BaseAddress[pllIndex], 0x1);
usleep(ALTERA_PLL_C10_WAIT_TIME_US); usleep(ALTERA_PLL_C10_WAIT_TIME_US);
} }
void ALTERA_PLL_C10_ResetPLL (int pllIndex) { void ALTERA_PLL_C10_ResetPLL(int pllIndex) {
uint32_t resetreg = ALTERA_PLL_C10_Reset_Reg[pllIndex]; uint32_t resetreg = ALTERA_PLL_C10_Reset_Reg[pllIndex];
uint32_t resetmsk = ALTERA_PLL_C10_Reset_Msk[pllIndex]; uint32_t resetmsk = ALTERA_PLL_C10_Reset_Msk[pllIndex];
LOG(logINFO, ("Resetting PLL %d\n", pllIndex)); LOG(logINFO, ("Resetting PLL %d\n", pllIndex));
@ -93,19 +106,26 @@ void ALTERA_PLL_C10_ResetPLL (int pllIndex) {
usleep(ALTERA_PLL_C10_WAIT_TIME_US); usleep(ALTERA_PLL_C10_WAIT_TIME_US);
} }
void ALTERA_PLL_C10_SetPhaseShift(int pllIndex, int clkIndex, int phase,
int pos) {
LOG(logINFO, ("\tC%d: Writing PLL %d Phase Shift [phase:%d, pos dir:%d]\n",
clkIndex, pllIndex, phase, pos));
void ALTERA_PLL_C10_SetPhaseShift(int pllIndex, int clkIndex, int phase, int pos) { uint32_t addr = ALTERA_PLL_C10_BaseAddress[pllIndex] +
LOG(logINFO, ("\tC%d: Writing PLL %d Phase Shift [phase:%d, pos dir:%d]\n", clkIndex, pllIndex, phase, pos)); (ALTERA_PLL_C10_PHASE_SHIFT_BASE_REG + (int)clkIndex) *
ALTERA_PLL_C10_Reg_offset;
uint32_t addr = ALTERA_PLL_C10_BaseAddress[pllIndex] + (ALTERA_PLL_C10_PHASE_SHIFT_BASE_REG + (int)clkIndex) * ALTERA_PLL_C10_Reg_offset;
int maxshifts = ALTERA_PLL_C10_MAX_SHIFTS_PER_OPERATION; int maxshifts = ALTERA_PLL_C10_MAX_SHIFTS_PER_OPERATION;
// only 7 shifts at a time // only 7 shifts at a time
while (phase > 0) { while (phase > 0) {
int phaseToDo = (phase > maxshifts) ? maxshifts : phase; int phaseToDo = (phase > maxshifts) ? maxshifts : phase;
uint32_t value = (((phaseToDo << ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST) & ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_MSK) | uint32_t value = (((phaseToDo << ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST) &
(pos ? ALTERA_PLL_C10_SHIFT_UP_DOWN_POS_VAL : ALTERA_PLL_C10_SHIFT_UP_DOWN_NEG_VAL)); ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_MSK) |
LOG(logDEBUG1, ("\t[addr:0x%x, phaseTodo:%d phaseleft:%d phase word:0x%08x]\n", addr, phaseToDo, phase, value)); (pos ? ALTERA_PLL_C10_SHIFT_UP_DOWN_POS_VAL
: ALTERA_PLL_C10_SHIFT_UP_DOWN_NEG_VAL));
LOG(logDEBUG1,
("\t[addr:0x%x, phaseTodo:%d phaseleft:%d phase word:0x%08x]\n",
addr, phaseToDo, phase, value));
bus_w_csp1(addr, value); bus_w_csp1(addr, value);
ALTERA_PLL_C10_Reconfigure(pllIndex); ALTERA_PLL_C10_Reconfigure(pllIndex);
@ -113,8 +133,10 @@ void ALTERA_PLL_C10_SetPhaseShift(int pllIndex, int clkIndex, int phase, int pos
} }
} }
void ALTERA_PLL_C10_SetOuputClockDivider (int pllIndex, int clkIndex, int value) { void ALTERA_PLL_C10_SetOuputClockDivider(int pllIndex, int clkIndex,
LOG(logDEBUG1, ("\tC%d: Setting output clock divider for pll%d to %d\n", clkIndex, pllIndex, value)); int value) {
LOG(logDEBUG1, ("\tC%d: Setting output clock divider for pll%d to %d\n",
clkIndex, pllIndex, value));
// assume 50% duty cycle // assume 50% duty cycle
uint32_t low_count = value / 2; uint32_t low_count = value / 2;
@ -126,13 +148,19 @@ void ALTERA_PLL_C10_SetOuputClockDivider (int pllIndex, int clkIndex, int value)
++high_count; ++high_count;
odd_division = 1; odd_division = 1;
} }
LOG(logINFO, ("\tC%d: Low:%d, High:%d, Odd:%d\n", clkIndex, low_count, high_count, odd_division)); LOG(logINFO, ("\tC%d: Low:%d, High:%d, Odd:%d\n", clkIndex, low_count,
high_count, odd_division));
// command to set output frequency // command to set output frequency
uint32_t addr = ALTERA_PLL_C10_BaseAddress[pllIndex] + (ALTERA_PLL_C10_C_COUNTER_BASE_REG + (int)clkIndex) * ALTERA_PLL_C10_Reg_offset; uint32_t addr = ALTERA_PLL_C10_BaseAddress[pllIndex] +
uint32_t val = (((low_count << ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST) & ALTERA_PLL_C10_C_COUNTER_LW_CNT_MSK) | (ALTERA_PLL_C10_C_COUNTER_BASE_REG + (int)clkIndex) *
((high_count << ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST) & ALTERA_PLL_C10_C_COUNTER_HGH_CNT_MSK) | ALTERA_PLL_C10_Reg_offset;
((odd_division << ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST) & ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_MSK)); uint32_t val = (((low_count << ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST) &
ALTERA_PLL_C10_C_COUNTER_LW_CNT_MSK) |
((high_count << ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST) &
ALTERA_PLL_C10_C_COUNTER_HGH_CNT_MSK) |
((odd_division << ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST) &
ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_MSK));
LOG(logDEBUG1, ("\t[addr:0x%x, word:0x%08x]\n", addr, val)); LOG(logDEBUG1, ("\t[addr:0x%x, word:0x%08x]\n", addr, val));
// write frequency // write frequency
@ -141,5 +169,5 @@ void ALTERA_PLL_C10_SetOuputClockDivider (int pllIndex, int clkIndex, int value)
ALTERA_PLL_C10_Reconfigure(pllIndex); ALTERA_PLL_C10_Reconfigure(pllIndex);
// reset required to keep the phase relationships // reset required to keep the phase relationships
ALTERA_PLL_C10_ResetPLL (pllIndex); ALTERA_PLL_C10_ResetPLL(pllIndex);
} }

26
slsDetectorServers/slsDetectorServer/src/ASIC_Driver.c Executable file → Normal file
View File

@ -3,36 +3,36 @@
#include "common.h" #include "common.h"
#include "sls_detector_defs.h" #include "sls_detector_defs.h"
#include <getopt.h>
#include <stdint.h> #include <stdint.h>
#include <stdio.h> #include <stdio.h>
#include <stdlib.h> #include <stdlib.h>
#include <getopt.h>
#include <string.h>
#include <unistd.h>
#include <fcntl.h> #include <fcntl.h>
#include <sys/ioctl.h>
#include <linux/types.h>
#include <linux/spi/spidev.h> #include <linux/spi/spidev.h>
#include <linux/types.h>
#include <string.h>
#include <sys/ioctl.h>
#include <unistd.h>
// defines from the fpga // defines from the fpga
char ASIC_Driver_DriverFileName[MAX_STR_LENGTH]; char ASIC_Driver_DriverFileName[MAX_STR_LENGTH];
void ASIC_Driver_SetDefines(char *driverfname) {
void ASIC_Driver_SetDefines(char* driverfname) {
LOG(logINFOBLUE, ("Configuring ASIC Driver to %s\n", driverfname)); LOG(logINFOBLUE, ("Configuring ASIC Driver to %s\n", driverfname));
memset(ASIC_Driver_DriverFileName, 0, MAX_STR_LENGTH); memset(ASIC_Driver_DriverFileName, 0, MAX_STR_LENGTH);
strcpy(ASIC_Driver_DriverFileName, driverfname); strcpy(ASIC_Driver_DriverFileName, driverfname);
} }
int ASIC_Driver_Set (int index, int length, char* buffer) { int ASIC_Driver_Set(int index, int length, char *buffer) {
char temp[20]; char temp[20];
memset(temp, 0, sizeof(temp)); memset(temp, 0, sizeof(temp));
sprintf(temp, "%d", index + 1); sprintf(temp, "%d", index + 1);
char fname[MAX_STR_LENGTH]; char fname[MAX_STR_LENGTH];
strcpy(fname, ASIC_Driver_DriverFileName); strcpy(fname, ASIC_Driver_DriverFileName);
strcat(fname, temp); strcat(fname, temp);
LOG(logDEBUG2, ("\t[chip index: %d, length: %d, fname: %s]\n", index, length, fname)); LOG(logDEBUG2,
("\t[chip index: %d, length: %d, fname: %s]\n", index, length, fname));
{ {
LOG(logDEBUG2, ("\t[values: \n")); LOG(logDEBUG2, ("\t[values: \n"));
int i; int i;
@ -43,15 +43,17 @@ int ASIC_Driver_Set (int index, int length, char* buffer) {
} }
#ifndef VIRTUAL #ifndef VIRTUAL
int fd=open(fname, O_RDWR); int fd = open(fname, O_RDWR);
if (fd == -1) { if (fd == -1) {
LOG(logERROR, ("Could not open file %s for writing to control ASIC (%d)\n", fname, index)); LOG(logERROR,
("Could not open file %s for writing to control ASIC (%d)\n", fname,
index));
return FAIL; return FAIL;
} }
struct spi_ioc_transfer transfer; struct spi_ioc_transfer transfer;
memset(&transfer, 0, sizeof(transfer)); memset(&transfer, 0, sizeof(transfer));
transfer.tx_buf = (unsigned long) buffer; transfer.tx_buf = (unsigned long)buffer;
transfer.len = length; transfer.len = length;
transfer.cs_change = 0; transfer.cs_change = 0;

34
slsDetectorServers/slsDetectorServer/src/DAC6571.c Executable file → Normal file
View File

@ -6,51 +6,47 @@
#include "string.h" #include "string.h"
/* DAC6571 HV DEFINES */ /* DAC6571 HV DEFINES */
#define DAC6571_MIN_DAC_VAL (0x0) #define DAC6571_MIN_DAC_VAL (0x0)
#define DAC6571_MAX_DAC_VAL (0x3FF) #define DAC6571_MAX_DAC_VAL (0x3FF)
// defines from the hardware // defines from the hardware
int DAC6571_HardMaxVoltage = 0; int DAC6571_HardMaxVoltage = 0;
char DAC6571_DriverFileName[MAX_STR_LENGTH]; char DAC6571_DriverFileName[MAX_STR_LENGTH];
void DAC6571_SetDefines(int hardMaxV, char* driverfname) { void DAC6571_SetDefines(int hardMaxV, char *driverfname) {
LOG(logINFOBLUE, ("Configuring High Voltage to %s (hard max: %dV)\n", driverfname, hardMaxV)); LOG(logINFOBLUE, ("Configuring High Voltage to %s (hard max: %dV)\n",
driverfname, hardMaxV));
DAC6571_HardMaxVoltage = hardMaxV; DAC6571_HardMaxVoltage = hardMaxV;
memset(DAC6571_DriverFileName, 0, MAX_STR_LENGTH); memset(DAC6571_DriverFileName, 0, MAX_STR_LENGTH);
strcpy(DAC6571_DriverFileName, driverfname); strcpy(DAC6571_DriverFileName, driverfname);
} }
int DAC6571_Set (int val) { int DAC6571_Set(int val) {
LOG(logDEBUG1, ("Setting high voltage to %d\n", val)); LOG(logDEBUG1, ("Setting high voltage to %d\n", val));
if (val < 0) if (val < 0)
return FAIL; return FAIL;
int dacvalue = 0; int dacvalue = 0;
// convert value // convert value
ConvertToDifferentRange(0, DAC6571_HardMaxVoltage, ConvertToDifferentRange(0, DAC6571_HardMaxVoltage, DAC6571_MIN_DAC_VAL,
DAC6571_MIN_DAC_VAL, DAC6571_MAX_DAC_VAL, DAC6571_MAX_DAC_VAL, val, &dacvalue);
val, &dacvalue);
LOG(logINFO, ("\t%dV (dacval %d)\n", val, dacvalue)); LOG(logINFO, ("\t%dV (dacval %d)\n", val, dacvalue));
#ifndef VIRTUAL #ifndef VIRTUAL
//open file // open file
FILE* fd=fopen(DAC6571_DriverFileName,"w"); FILE *fd = fopen(DAC6571_DriverFileName, "w");
if (fd==NULL) { if (fd == NULL) {
LOG(logERROR, ("Could not open file %s for writing to set high voltage\n", DAC6571_DriverFileName)); LOG(logERROR,
("Could not open file %s for writing to set high voltage\n",
DAC6571_DriverFileName));
return FAIL; return FAIL;
} }
//convert to string, add 0 and write to file // convert to string, add 0 and write to file
fprintf(fd, "%d\n", dacvalue); fprintf(fd, "%d\n", dacvalue);
fclose(fd); fclose(fd);
#endif #endif
return OK; return OK;
} }

227
slsDetectorServers/slsDetectorServer/src/I2C.c Executable file → Normal file
View File

@ -2,7 +2,7 @@
#include "blackfin.h" #include "blackfin.h"
#include "clogger.h" #include "clogger.h"
#include <unistd.h> // usleep #include <unistd.h> // usleep
/** /**
* Intel: Embedded Peripherals IP User Guide * Intel: Embedded Peripherals IP User Guide
@ -23,69 +23,90 @@
* I2C_RX_DATA_FIFO_REG * I2C_RX_DATA_FIFO_REG
*/ */
#define I2C_DATA_RATE_KBPS (200)
#define I2C_DATA_RATE_KBPS (200)
/** Control Register */ /** Control Register */
#define I2C_CTRL_ENBLE_CORE_OFST (0) #define I2C_CTRL_ENBLE_CORE_OFST (0)
#define I2C_CTRL_ENBLE_CORE_MSK (0x00000001 << I2C_CTRL_ENBLE_CORE_OFST) #define I2C_CTRL_ENBLE_CORE_MSK (0x00000001 << I2C_CTRL_ENBLE_CORE_OFST)
#define I2C_CTRL_BUS_SPEED_OFST (1) #define I2C_CTRL_BUS_SPEED_OFST (1)
#define I2C_CTRL_BUS_SPEED_MSK (0x00000001 << I2C_CTRL_BUS_SPEED_OFST) #define I2C_CTRL_BUS_SPEED_MSK (0x00000001 << I2C_CTRL_BUS_SPEED_OFST)
#define I2C_CTRL_BUS_SPEED_STNDRD_100_VAL ((0x0 << I2C_CTRL_BUS_SPEED_OFST) & I2C_CTRL_BUS_SPEED_MSK) // standard mode (up to 100 kbps) #define I2C_CTRL_BUS_SPEED_STNDRD_100_VAL \
#define I2C_CTRL_BUS_SPEED_FAST_400_VAL ((0x1 << I2C_CTRL_BUS_SPEED_OFST) & I2C_CTRL_BUS_SPEED_MSK) // fast mode (up to 400 kbps) ((0x0 << I2C_CTRL_BUS_SPEED_OFST) & \
/** if actual level of transfer command fifo <= thd level, TX_READY interrupt asserted */ I2C_CTRL_BUS_SPEED_MSK) // standard mode (up to 100 kbps)
#define I2C_CTRL_TFR_CMD_FIFO_THD_OFST (2) #define I2C_CTRL_BUS_SPEED_FAST_400_VAL \
#define I2C_CTRL_TFR_CMD_FIFO_THD_MSK (0x00000003 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) ((0x1 << I2C_CTRL_BUS_SPEED_OFST) & \
#define I2C_CTRL_TFR_CMD_EMPTY_VAL ((0x0 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) I2C_CTRL_BUS_SPEED_MSK) // fast mode (up to 400 kbps)
#define I2C_CTRL_TFR_CMD_ONE_FOURTH_VAL ((0x1 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) /** if actual level of transfer command fifo <= thd level, TX_READY interrupt
#define I2C_CTRL_TFR_CMD_ONE_HALF_VAL ((0x2 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) * asserted */
#define I2C_CTRL_TFR_CMD_NOT_FULL_VAL ((0x3 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) #define I2C_CTRL_TFR_CMD_FIFO_THD_OFST (2)
/** if actual level of receive data fifo <= thd level, RX_READY interrupt asserted */ #define I2C_CTRL_TFR_CMD_FIFO_THD_MSK \
#define I2C_CTRL_RX_DATA_FIFO_THD_OFST (4) (0x00000003 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST)
#define I2C_CTRL_RX_DATA_FIFO_THD_MSK (0x00000003 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) #define I2C_CTRL_TFR_CMD_EMPTY_VAL \
#define I2C_CTRL_RX_DATA_1_VALID_ENTRY_VAL ((0x0 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) ((0x0 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
#define I2C_CTRL_RX_DATA_ONE_FOURTH_VAL ((0x1 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) #define I2C_CTRL_TFR_CMD_ONE_FOURTH_VAL \
#define I2C_CTRL_RX_DATA_ONE_HALF_VAL ((0x2 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) ((0x1 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
#define I2C_CTRL_RX_DATA_FULL_VAL ((0x3 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) #define I2C_CTRL_TFR_CMD_ONE_HALF_VAL \
((0x2 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
#define I2C_CTRL_TFR_CMD_NOT_FULL_VAL \
((0x3 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
/** if actual level of receive data fifo <= thd level, RX_READY interrupt
* asserted */
#define I2C_CTRL_RX_DATA_FIFO_THD_OFST (4)
#define I2C_CTRL_RX_DATA_FIFO_THD_MSK \
(0x00000003 << I2C_CTRL_RX_DATA_FIFO_THD_OFST)
#define I2C_CTRL_RX_DATA_1_VALID_ENTRY_VAL \
((0x0 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
#define I2C_CTRL_RX_DATA_ONE_FOURTH_VAL \
((0x1 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
#define I2C_CTRL_RX_DATA_ONE_HALF_VAL \
((0x2 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
#define I2C_CTRL_RX_DATA_FULL_VAL \
((0x3 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
/** Transfer Command Fifo register */ /** Transfer Command Fifo register */
#define I2C_TFR_CMD_RW_OFST (0) #define I2C_TFR_CMD_RW_OFST (0)
#define I2C_TFR_CMD_RW_MSK (0x00000001 << I2C_TFR_CMD_RW_OFST) #define I2C_TFR_CMD_RW_MSK (0x00000001 << I2C_TFR_CMD_RW_OFST)
#define I2C_TFR_CMD_RW_WRITE_VAL ((0x0 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK) #define I2C_TFR_CMD_RW_WRITE_VAL \
#define I2C_TFR_CMD_RW_READ_VAL ((0x1 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK) ((0x0 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK)
#define I2C_TFR_CMD_ADDR_OFST (1) #define I2C_TFR_CMD_RW_READ_VAL \
#define I2C_TFR_CMD_ADDR_MSK (0x0000007F << I2C_TFR_CMD_ADDR_OFST) ((0x1 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK)
#define I2C_TFR_CMD_ADDR_OFST (1)
#define I2C_TFR_CMD_ADDR_MSK (0x0000007F << I2C_TFR_CMD_ADDR_OFST)
/** when writing, rw and addr converts to data to be written mask */ /** when writing, rw and addr converts to data to be written mask */
#define I2C_TFR_CMD_DATA_FR_WR_OFST (0) #define I2C_TFR_CMD_DATA_FR_WR_OFST (0)
#define I2C_TFR_CMD_DATA_FR_WR_MSK (0x000000FF << I2C_TFR_CMD_DATA_FR_WR_OFST) #define I2C_TFR_CMD_DATA_FR_WR_MSK (0x000000FF << I2C_TFR_CMD_DATA_FR_WR_OFST)
#define I2C_TFR_CMD_STOP_OFST (8) #define I2C_TFR_CMD_STOP_OFST (8)
#define I2C_TFR_CMD_STOP_MSK (0x00000001 << I2C_TFR_CMD_STOP_OFST) #define I2C_TFR_CMD_STOP_MSK (0x00000001 << I2C_TFR_CMD_STOP_OFST)
#define I2C_TFR_CMD_RPTD_STRT_OFST (9) #define I2C_TFR_CMD_RPTD_STRT_OFST (9)
#define I2C_TFR_CMD_RPTD_STRT_MSK (0x00000001 << I2C_TFR_CMD_RPTD_STRT_OFST) #define I2C_TFR_CMD_RPTD_STRT_MSK (0x00000001 << I2C_TFR_CMD_RPTD_STRT_OFST)
/** Receive DataFifo register */ /** Receive DataFifo register */
#define I2C_RX_DATA_FIFO_RXDATA_OFST (0) #define I2C_RX_DATA_FIFO_RXDATA_OFST (0)
#define I2C_RX_DATA_FIFO_RXDATA_MSK (0x000000FF << I2C_RX_DATA_FIFO_RXDATA_OFST) #define I2C_RX_DATA_FIFO_RXDATA_MSK (0x000000FF << I2C_RX_DATA_FIFO_RXDATA_OFST)
/** Status register */ /** Status register */
#define I2C_STATUS_BUSY_OFST (0) #define I2C_STATUS_BUSY_OFST (0)
#define I2C_STATUS_BUSY_MSK (0x00000001 << I2C_STATUS_BUSY_OFST) #define I2C_STATUS_BUSY_MSK (0x00000001 << I2C_STATUS_BUSY_OFST)
/** SCL Low Count register */ /** SCL Low Count register */
#define I2C_SCL_LOW_COUNT_PERIOD_OFST (0) #define I2C_SCL_LOW_COUNT_PERIOD_OFST (0)
#define I2C_SCL_LOW_COUNT_PERIOD_MSK (0x0000FFFF << I2C_SCL_LOW_COUNT_PERIOD_OFST) #define I2C_SCL_LOW_COUNT_PERIOD_MSK \
(0x0000FFFF << I2C_SCL_LOW_COUNT_PERIOD_OFST)
/** SCL High Count register */ /** SCL High Count register */
#define I2C_SCL_HIGH_COUNT_PERIOD_OFST (0) #define I2C_SCL_HIGH_COUNT_PERIOD_OFST (0)
#define I2C_SCL_HIGH_COUNT_PERIOD_MSK (0x0000FFFF << I2C_SCL_HIGH_COUNT_PERIOD_OFST) #define I2C_SCL_HIGH_COUNT_PERIOD_MSK \
(0x0000FFFF << I2C_SCL_HIGH_COUNT_PERIOD_OFST)
/** SDA Hold Count register */ /** SDA Hold Count register */
#define I2C_SDA_HOLD_COUNT_PERIOD_OFST (0) #define I2C_SDA_HOLD_COUNT_PERIOD_OFST (0)
#define I2C_SDA_HOLD_COUNT_PERIOD_MSK (0x0000FFFF << I2C_SDA_HOLD_COUNT_PERIOD_OFST) #define I2C_SDA_HOLD_COUNT_PERIOD_MSK \
(0x0000FFFF << I2C_SDA_HOLD_COUNT_PERIOD_OFST)
/** Receive Data Fifo Level register */ /** Receive Data Fifo Level register */
//#define I2C_RX_DATA_FIFO_LVL_OFST (0) //#define I2C_RX_DATA_FIFO_LVL_OFST (0)
//#define I2C_RX_DATA_FIFO_LVL_MSK (0x000000FF << I2C_RX_DATA_FIFO_LVL_OFST) //#define I2C_RX_DATA_FIFO_LVL_MSK (0x000000FF <<
//I2C_RX_DATA_FIFO_LVL_OFST)
// defines in the fpga // defines in the fpga
uint32_t I2C_Control_Reg = 0x0; uint32_t I2C_Control_Reg = 0x0;
@ -97,15 +118,15 @@ uint32_t I2C_Scl_High_Count_Reg = 0x0;
uint32_t I2C_Sda_Hold_Reg = 0x0; uint32_t I2C_Sda_Hold_Reg = 0x0;
uint32_t I2C_Transfer_Command_Fifo_Reg = 0x0; uint32_t I2C_Transfer_Command_Fifo_Reg = 0x0;
void I2C_ConfigureI2CCore(uint32_t creg, uint32_t sreg, uint32_t rreg,
void I2C_ConfigureI2CCore(uint32_t creg, uint32_t sreg, uint32_t rlvlreg, uint32_t slreg, uint32_t shreg,
uint32_t rreg, uint32_t rlvlreg, uint32_t sdreg, uint32_t treg) {
uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) {
LOG(logINFO, ("\tConfiguring I2C Core for %d kbps:\n", I2C_DATA_RATE_KBPS)); LOG(logINFO, ("\tConfiguring I2C Core for %d kbps:\n", I2C_DATA_RATE_KBPS));
LOG(logDEBUG1,("controlreg,:0x%x, statusreg,:0x%x, " LOG(logDEBUG1, ("controlreg,:0x%x, statusreg,:0x%x, "
"rxrdatafiforeg: 0x%x, rxdatafifocountreg,:0x%x, " "rxrdatafiforeg: 0x%x, rxdatafifocountreg,:0x%x, "
"scllow,:0x%x, sclhighreg,:0x%x, sdaholdreg,:0x%x, transfercmdreg,:0x%x\n", "scllow,:0x%x, sclhighreg,:0x%x, sdaholdreg,:0x%x, "
creg, sreg, rreg, rlvlreg, slreg, shreg, sdreg, treg)); "transfercmdreg,:0x%x\n",
creg, sreg, rreg, rlvlreg, slreg, shreg, sdreg, treg));
I2C_Control_Reg = creg; I2C_Control_Reg = creg;
I2C_Status_Reg = sreg; I2C_Status_Reg = sreg;
@ -117,57 +138,77 @@ void I2C_ConfigureI2CCore(uint32_t creg, uint32_t sreg,
I2C_Transfer_Command_Fifo_Reg = treg; I2C_Transfer_Command_Fifo_Reg = treg;
// calculate scl low and high period count // calculate scl low and high period count
uint32_t sclPeriodNs = ((1000.00 * 1000.00 * 1000.00) / ((double)I2C_DATA_RATE_KBPS * 1000.00)); uint32_t sclPeriodNs = ((1000.00 * 1000.00 * 1000.00) /
((double)I2C_DATA_RATE_KBPS * 1000.00));
// scl low period same as high period // scl low period same as high period
uint32_t sclLowPeriodNs = sclPeriodNs / 2; uint32_t sclLowPeriodNs = sclPeriodNs / 2;
// convert to us, then to clock (defined in blackfin.h) // convert to us, then to clock (defined in blackfin.h)
uint32_t sclLowPeriodCount = (sclLowPeriodNs / 1000.00) * I2C_CLOCK_MHZ; uint32_t sclLowPeriodCount = (sclLowPeriodNs / 1000.00) * I2C_CLOCK_MHZ;
// calculate sda hold data count // calculate sda hold data count
uint32_t sdaDataHoldTimeNs = (sclLowPeriodNs / 2); // scl low period same as high period uint32_t sdaDataHoldTimeNs =
(sclLowPeriodNs / 2); // scl low period same as high period
// convert to us, then to clock (defined in blackfin.h) // convert to us, then to clock (defined in blackfin.h)
uint32_t sdaDataHoldCount = ((sdaDataHoldTimeNs / 1000.00) * I2C_CLOCK_MHZ); uint32_t sdaDataHoldCount = ((sdaDataHoldTimeNs / 1000.00) * I2C_CLOCK_MHZ);
LOG(logINFO, ("\tSetting SCL Low Period: %d ns (%d clocks)\n", sclLowPeriodNs, sclLowPeriodCount)); LOG(logINFO, ("\tSetting SCL Low Period: %d ns (%d clocks)\n",
bus_w(I2C_Scl_Low_Count_Reg, bus_r(I2C_Scl_Low_Count_Reg) | sclLowPeriodNs, sclLowPeriodCount));
((sclLowPeriodCount << I2C_SCL_LOW_COUNT_PERIOD_OFST) & I2C_SCL_LOW_COUNT_PERIOD_MSK)); bus_w(I2C_Scl_Low_Count_Reg,
bus_r(I2C_Scl_Low_Count_Reg) |
((sclLowPeriodCount << I2C_SCL_LOW_COUNT_PERIOD_OFST) &
I2C_SCL_LOW_COUNT_PERIOD_MSK));
LOG(logDEBUG1, ("SCL Low reg:0x%x\n", bus_r(I2C_Scl_Low_Count_Reg))); LOG(logDEBUG1, ("SCL Low reg:0x%x\n", bus_r(I2C_Scl_Low_Count_Reg)));
LOG(logINFO, ("\tSetting SCL High Period: %d ns (%d clocks)\n", sclLowPeriodNs, sclLowPeriodCount)); LOG(logINFO, ("\tSetting SCL High Period: %d ns (%d clocks)\n",
bus_w(I2C_Scl_High_Count_Reg, bus_r(I2C_Scl_High_Count_Reg) | sclLowPeriodNs, sclLowPeriodCount));
((sclLowPeriodCount << I2C_SCL_HIGH_COUNT_PERIOD_OFST) & I2C_SCL_HIGH_COUNT_PERIOD_MSK)); bus_w(I2C_Scl_High_Count_Reg,
bus_r(I2C_Scl_High_Count_Reg) |
((sclLowPeriodCount << I2C_SCL_HIGH_COUNT_PERIOD_OFST) &
I2C_SCL_HIGH_COUNT_PERIOD_MSK));
LOG(logDEBUG1, ("SCL High reg:0x%x\n", bus_r(I2C_Scl_High_Count_Reg))); LOG(logDEBUG1, ("SCL High reg:0x%x\n", bus_r(I2C_Scl_High_Count_Reg)));
LOG(logINFO, ("\tSetting SDA Hold Time: %d ns (%d clocks)\n", sdaDataHoldTimeNs, sdaDataHoldCount)); LOG(logINFO, ("\tSetting SDA Hold Time: %d ns (%d clocks)\n",
bus_w(I2C_Sda_Hold_Reg, bus_r(I2C_Sda_Hold_Reg) | sdaDataHoldTimeNs, sdaDataHoldCount));
((sdaDataHoldCount << I2C_SDA_HOLD_COUNT_PERIOD_OFST) & I2C_SDA_HOLD_COUNT_PERIOD_MSK)); bus_w(I2C_Sda_Hold_Reg,
bus_r(I2C_Sda_Hold_Reg) |
((sdaDataHoldCount << I2C_SDA_HOLD_COUNT_PERIOD_OFST) &
I2C_SDA_HOLD_COUNT_PERIOD_MSK));
LOG(logDEBUG1, ("SDA Hold reg:0x%x\n", bus_r(I2C_Sda_Hold_Reg))); LOG(logDEBUG1, ("SDA Hold reg:0x%x\n", bus_r(I2C_Sda_Hold_Reg)));
LOG(logINFO, ("\tEnabling core and bus speed to fast (up to 400 kbps)\n")); LOG(logINFO, ("\tEnabling core and bus speed to fast (up to 400 kbps)\n"));
bus_w(I2C_Control_Reg, bus_r(I2C_Control_Reg) | bus_w(I2C_Control_Reg,
I2C_CTRL_ENBLE_CORE_MSK | I2C_CTRL_BUS_SPEED_FAST_400_VAL);// fixme: (works?) bus_r(I2C_Control_Reg) | I2C_CTRL_ENBLE_CORE_MSK |
I2C_CTRL_BUS_SPEED_FAST_400_VAL); // fixme: (works?)
LOG(logDEBUG1, ("Control reg:0x%x\n", bus_r(I2C_Control_Reg))); LOG(logDEBUG1, ("Control reg:0x%x\n", bus_r(I2C_Control_Reg)));
//The INA226 supports the transmission protocol for fast mode (1 kHz to 400 kHz) and high-speed mode (1 kHz to 2.94 MHz). // The INA226 supports the transmission protocol for fast mode (1 kHz to 400
// kHz) and high-speed mode (1 kHz to 2.94 MHz).
} }
uint32_t I2C_Read(uint32_t devId, uint32_t addr) { uint32_t I2C_Read(uint32_t devId, uint32_t addr) {
LOG(logDEBUG2, (" ================================================\n")); LOG(logDEBUG2, (" ================================================\n"));
LOG(logDEBUG2, (" Reading from I2C device 0x%x and reg 0x%x\n", devId, addr)); LOG(logDEBUG2,
(" Reading from I2C device 0x%x and reg 0x%x\n", devId, addr));
// device Id mask // device Id mask
uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK); uint32_t devIdMask =
((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
LOG(logDEBUG2, (" devId:0x%x\n", devIdMask)); LOG(logDEBUG2, (" devId:0x%x\n", devIdMask));
// write I2C ID // write I2C ID
bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK))); bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
LOG(logDEBUG2, (" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK)))); LOG(logDEBUG2,
(" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK))));
// write register addr // write register addr
bus_w(I2C_Transfer_Command_Fifo_Reg, addr); bus_w(I2C_Transfer_Command_Fifo_Reg, addr);
LOG(logDEBUG2, (" write addr:0x%x\n", addr)); LOG(logDEBUG2, (" write addr:0x%x\n", addr));
// repeated start with read (repeated start needed here because it was in write operation mode earlier, for the device ID) // repeated start with read (repeated start needed here because it was in
bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL)); // write operation mode earlier, for the device ID)
LOG(logDEBUG2, (" repeated start:0x%x\n", (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL))); bus_w(I2C_Transfer_Command_Fifo_Reg,
(devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL));
LOG(logDEBUG2,
(" repeated start:0x%x\n",
(devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL)));
// continue reading // continue reading
bus_w(I2C_Transfer_Command_Fifo_Reg, 0x0); bus_w(I2C_Transfer_Command_Fifo_Reg, 0x0);
@ -180,10 +221,11 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr) {
// read value // read value
uint32_t retval = 0; uint32_t retval = 0;
//In case one wants to do something more general (INA226 receives only 2 bytes) // In case one wants to do something more general (INA226 receives only 2
// bytes)
// wait till status is idle // wait till status is idle
int status = 1; int status = 1;
while(status) { while (status) {
status = bus_r(I2C_Status_Reg) & I2C_STATUS_BUSY_MSK; status = bus_r(I2C_Status_Reg) & I2C_STATUS_BUSY_MSK;
LOG(logDEBUG2, (" status:%d\n", status)); LOG(logDEBUG2, (" status:%d\n", status));
usleep(0); usleep(0);
@ -196,7 +238,8 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr) {
// level bytes to read, read 1 byte at a time // level bytes to read, read 1 byte at a time
for (iloop = level - 1; iloop >= 0; --iloop) { for (iloop = level - 1; iloop >= 0; --iloop) {
u_int16_t byte = bus_r(I2C_Rx_Data_Fifo_Reg) & I2C_RX_DATA_FIFO_RXDATA_MSK; u_int16_t byte =
bus_r(I2C_Rx_Data_Fifo_Reg) & I2C_RX_DATA_FIFO_RXDATA_MSK;
LOG(logDEBUG2, (" byte nr %d:0x%x\n", iloop, byte)); LOG(logDEBUG2, (" byte nr %d:0x%x\n", iloop, byte));
// push by 1 byte at a time // push by 1 byte at a time
retval |= (byte << (8 * iloop)); retval |= (byte << (8 * iloop));
@ -208,33 +251,43 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr) {
void I2C_Write(uint32_t devId, uint32_t addr, uint16_t data) { void I2C_Write(uint32_t devId, uint32_t addr, uint16_t data) {
LOG(logDEBUG2, (" ================================================\n")); LOG(logDEBUG2, (" ================================================\n"));
LOG(logDEBUG2, (" Writing to I2C (Device:0x%x, reg:0x%x, data:%d)\n", devId, addr, data)); LOG(logDEBUG2, (" Writing to I2C (Device:0x%x, reg:0x%x, data:%d)\n", devId,
addr, data));
// device Id mask // device Id mask
uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK); uint32_t devIdMask =
((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
LOG(logDEBUG2, (" devId:0x%x\n", devId)); LOG(logDEBUG2, (" devId:0x%x\n", devId));
// write I2C ID // write I2C ID
bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK))); bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
LOG(logDEBUG2, (" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK)))); LOG(logDEBUG2,
(" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK))));
// write register addr // write register addr
bus_w(I2C_Transfer_Command_Fifo_Reg, addr); bus_w(I2C_Transfer_Command_Fifo_Reg, addr);
LOG(logDEBUG2, (" write addr:0x%x\n", addr)); LOG(logDEBUG2, (" write addr:0x%x\n", addr));
// do not do the repeated start as it is already in write operation mode (else it wont work) // do not do the repeated start as it is already in write operation mode
// (else it wont work)
uint8_t msb = (uint8_t)((data & 0xFF00) >> 8); uint8_t msb = (uint8_t)((data & 0xFF00) >> 8);
uint8_t lsb = (uint8_t)(data & 0x00FF); uint8_t lsb = (uint8_t)(data & 0x00FF);
LOG(logDEBUG2, (" msb:0x%02x, lsb:0x%02x\n", msb, lsb)); LOG(logDEBUG2, (" msb:0x%02x, lsb:0x%02x\n", msb, lsb));
// writing data MSB // writing data MSB
bus_w(I2C_Transfer_Command_Fifo_Reg, ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK)); bus_w(I2C_Transfer_Command_Fifo_Reg,
LOG(logDEBUG2, (" write msb:0x%02x\n", ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK))); ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK));
LOG(logDEBUG2,
(" write msb:0x%02x\n",
((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK)));
// writing data LSB and stop writing bit // writing data LSB and stop writing bit
bus_w(I2C_Transfer_Command_Fifo_Reg, ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK); bus_w(I2C_Transfer_Command_Fifo_Reg,
LOG(logDEBUG2, (" write lsb and stop writing:0x%x\n", ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK)); ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) |
I2C_TFR_CMD_STOP_MSK);
LOG(logDEBUG2,
(" write lsb and stop writing:0x%x\n",
((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) |
I2C_TFR_CMD_STOP_MSK));
LOG(logDEBUG2, (" ================================================\n")); LOG(logDEBUG2, (" ================================================\n"));
} }

101
slsDetectorServers/slsDetectorServer/src/INA226.c Executable file → Normal file
View File

@ -16,43 +16,46 @@
/** INA226 defines */ /** INA226 defines */
/** Register set */ /** Register set */
#define INA226_CONFIGURATION_REG (0x00) //R/W #define INA226_CONFIGURATION_REG (0x00) // R/W
#define INA226_SHUNT_VOLTAGE_REG (0x01) //R #define INA226_SHUNT_VOLTAGE_REG (0x01) // R
#define INA226_BUS_VOLTAGE_REG (0x02) //R #define INA226_BUS_VOLTAGE_REG (0x02) // R
#define INA226_POWER_REG (0x03) //R #define INA226_POWER_REG (0x03) // R
#define INA226_CURRENT_REG (0x04) //R #define INA226_CURRENT_REG (0x04) // R
#define INA226_CALIBRATION_REG (0x05) //R/W #define INA226_CALIBRATION_REG (0x05) // R/W
#define INA226_MASK_ENABLE_REG (0x06) //R/W #define INA226_MASK_ENABLE_REG (0x06) // R/W
#define INA226_ALERT_LIMIT_REG (0x07) //R/W #define INA226_ALERT_LIMIT_REG (0x07) // R/W
#define INA226_MANUFACTURER_ID_REG (0xFE) //R #define INA226_MANUFACTURER_ID_REG (0xFE) // R
#define INA226_DIE_ID_REG (0xFF) //R #define INA226_DIE_ID_REG (0xFF) // R
/** bus voltage register */ /** bus voltage register */
#define INA226_BUS_VOLTAGE_VMIN_UV (1250) // 1.25mV #define INA226_BUS_VOLTAGE_VMIN_UV (1250) // 1.25mV
#define INA226_BUS_VOLTAGE_MX_STPS (0x7FFF + 1) #define INA226_BUS_VOLTAGE_MX_STPS (0x7FFF + 1)
#define INA226_BUS_VOLTAGE_VMAX_UV (INA226_BUS_VOLTAGE_VMIN_UV * INA226_BUS_VOLTAGE_MX_STPS) // 40960000uV, 40.96V #define INA226_BUS_VOLTAGE_VMAX_UV \
(INA226_BUS_VOLTAGE_VMIN_UV * \
INA226_BUS_VOLTAGE_MX_STPS) // 40960000uV, 40.96V
/** shunt voltage register */ /** shunt voltage register */
#define INA226_SHUNT_VOLTAGE_VMIN_NV (2500) // 2.5uV #define INA226_SHUNT_VOLTAGE_VMIN_NV (2500) // 2.5uV
#define INA226_SHUNT_VOLTAGE_MX_STPS (0x7FFF + 1) #define INA226_SHUNT_VOLTAGE_MX_STPS (0x7FFF + 1)
#define INA226_SHUNT_VOLTAGE_VMAX_NV (INA226_SHUNT_VOLTAGE_VMIN_NV * INA226_SHUNT_VOLTAGE_MX_STPS) // 81920000nV, 81.92mV #define INA226_SHUNT_VOLTAGE_VMAX_NV \
#define INA226_SHUNT_NEGATIVE_MSK (1 << 15) (INA226_SHUNT_VOLTAGE_VMIN_NV * \
#define INA226_SHUNT_ABS_VALUE_MSK (0x7FFF) INA226_SHUNT_VOLTAGE_MX_STPS) // 81920000nV, 81.92mV
#define INA226_SHUNT_NEGATIVE_MSK (1 << 15)
#define INA226_SHUNT_ABS_VALUE_MSK (0x7FFF)
/** current precision for calibration register */ /** current precision for calibration register */
#define INA226_CURRENT_IMIN_UA (100) //100uA can be changed #define INA226_CURRENT_IMIN_UA (100) // 100uA can be changed
/** calibration register */ /** calibration register */
#define INA226_CALIBRATION_MSK (0x7FFF) #define INA226_CALIBRATION_MSK (0x7FFF)
/** get calibration register value to be set */ /** get calibration register value to be set */
#define INA226_getCalibrationValue(rOhm) (0.00512 /(INA226_CURRENT_IMIN_UA * 1e-6 * rOhm)) #define INA226_getCalibrationValue(rOhm) \
(0.00512 / (INA226_CURRENT_IMIN_UA * 1e-6 * rOhm))
/** get current unit */ /** get current unit */
#define INA226_getConvertedCurrentUnits(shuntV, calibReg) ((double)shuntV * (double)calibReg / (double)2048) #define INA226_getConvertedCurrentUnits(shuntV, calibReg) \
((double)shuntV * (double)calibReg / (double)2048)
// defines from the fpga // defines from the fpga
double INA226_Shunt_Resistor_Ohm = 0.0; double INA226_Shunt_Resistor_Ohm = 0.0;
@ -61,8 +64,8 @@ int INA226_Calibration_Register_Value = 0;
#define INA226_CALIBRATION_CURRENT_TOLERANCE (1.2268) #define INA226_CALIBRATION_CURRENT_TOLERANCE (1.2268)
void INA226_ConfigureI2CCore(double rOhm, uint32_t creg, uint32_t sreg, void INA226_ConfigureI2CCore(double rOhm, uint32_t creg, uint32_t sreg,
uint32_t rreg, uint32_t rlvlreg, uint32_t rreg, uint32_t rlvlreg, uint32_t slreg,
uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) { uint32_t shreg, uint32_t sdreg, uint32_t treg) {
LOG(logINFOBLUE, ("Configuring INA226\n")); LOG(logINFOBLUE, ("Configuring INA226\n"));
LOG(logDEBUG1, ("Shunt ohm resistor: %f\n", rOhm)); LOG(logDEBUG1, ("Shunt ohm resistor: %f\n", rOhm));
INA226_Shunt_Resistor_Ohm = rOhm; INA226_Shunt_Resistor_Ohm = rOhm;
@ -71,13 +74,19 @@ void INA226_ConfigureI2CCore(double rOhm, uint32_t creg, uint32_t sreg,
} }
void INA226_CalibrateCurrentRegister(uint32_t deviceId) { void INA226_CalibrateCurrentRegister(uint32_t deviceId) {
LOG(logINFO, ("Calibrating Current Register for Device ID: 0x%x\n", deviceId)); LOG(logINFO,
("Calibrating Current Register for Device ID: 0x%x\n", deviceId));
// get calibration value based on shunt resistor // get calibration value based on shunt resistor
uint16_t calVal = ((uint16_t)INA226_getCalibrationValue(INA226_Shunt_Resistor_Ohm)) & INA226_CALIBRATION_MSK; uint16_t calVal =
LOG(logINFO, ("\tCalculated calibration reg value: 0x%0x (%d)\n", calVal, calVal)); ((uint16_t)INA226_getCalibrationValue(INA226_Shunt_Resistor_Ohm)) &
INA226_CALIBRATION_MSK;
LOG(logINFO,
("\tCalculated calibration reg value: 0x%0x (%d)\n", calVal, calVal));
calVal = ((double)calVal / INA226_CALIBRATION_CURRENT_TOLERANCE) + 0.5; calVal = ((double)calVal / INA226_CALIBRATION_CURRENT_TOLERANCE) + 0.5;
LOG(logINFO, ("\tRealculated (for tolerance) calibration reg value: 0x%0x (%d)\n", calVal, calVal)); LOG(logINFO,
("\tRealculated (for tolerance) calibration reg value: 0x%0x (%d)\n",
calVal, calVal));
INA226_Calibration_Register_Value = calVal; INA226_Calibration_Register_Value = calVal;
// calibrate current register // calibrate current register
@ -86,7 +95,9 @@ void INA226_CalibrateCurrentRegister(uint32_t deviceId) {
// read back calibration register // read back calibration register
int retval = I2C_Read(deviceId, INA226_CALIBRATION_REG); int retval = I2C_Read(deviceId, INA226_CALIBRATION_REG);
if (retval != calVal) { if (retval != calVal) {
LOG(logERROR, ("Cannot set calibration register for I2C. Set 0x%x, read 0x%x\n", calVal, retval)); LOG(logERROR,
("Cannot set calibration register for I2C. Set 0x%x, read 0x%x\n",
calVal, retval));
} }
} }
@ -98,14 +109,15 @@ int INA226_ReadVoltage(uint32_t deviceId) {
// value in uV // value in uV
int voltageuV = 0; int voltageuV = 0;
ConvertToDifferentRange(0, INA226_BUS_VOLTAGE_MX_STPS, ConvertToDifferentRange(0, INA226_BUS_VOLTAGE_MX_STPS,
INA226_BUS_VOLTAGE_VMIN_UV, INA226_BUS_VOLTAGE_VMAX_UV, INA226_BUS_VOLTAGE_VMIN_UV,
regval, &voltageuV); INA226_BUS_VOLTAGE_VMAX_UV, regval, &voltageuV);
LOG(logDEBUG1, (" voltage: 0x%d uV\n", voltageuV)); LOG(logDEBUG1, (" voltage: 0x%d uV\n", voltageuV));
// value in mV // value in mV
int voltagemV = voltageuV / 1000; int voltagemV = voltageuV / 1000;
LOG(logDEBUG1, (" voltage: %d mV\n", voltagemV)); LOG(logDEBUG1, (" voltage: %d mV\n", voltagemV));
LOG(logINFO, ("Voltage via I2C (Device: 0x%x): %d mV\n", deviceId, voltagemV)); LOG(logINFO,
("Voltage via I2C (Device: 0x%x): %d mV\n", deviceId, voltagemV));
return voltagemV; return voltagemV;
} }
@ -122,13 +134,13 @@ int INA226_ReadCurrent(uint32_t deviceId) {
if (shuntVoltageRegVal == 0xFFFF) { if (shuntVoltageRegVal == 0xFFFF) {
LOG(logDEBUG1, (" Reading shunt voltage reg again\n")); LOG(logDEBUG1, (" Reading shunt voltage reg again\n"));
shuntVoltageRegVal = I2C_Read(deviceId, INA226_SHUNT_VOLTAGE_REG); shuntVoltageRegVal = I2C_Read(deviceId, INA226_SHUNT_VOLTAGE_REG);
LOG(logDEBUG1, (" shunt voltage reg: %d\n", shuntVoltageRegVal)); LOG(logDEBUG1, (" shunt voltage reg: %d\n", shuntVoltageRegVal));
} }
// value for current // value for current
int retval = INA226_getConvertedCurrentUnits(shuntVoltageRegVal, INA226_Calibration_Register_Value); int retval = INA226_getConvertedCurrentUnits(
shuntVoltageRegVal, INA226_Calibration_Register_Value);
LOG(logDEBUG1, (" current unit value: %d\n", retval)); LOG(logDEBUG1, (" current unit value: %d\n", retval));
// reading directly the current reg // reading directly the current reg
LOG(logDEBUG1, (" Reading current reg\n")); LOG(logDEBUG1, (" Reading current reg\n"));
int cuurentRegVal = I2C_Read(deviceId, INA226_CURRENT_REG); int cuurentRegVal = I2C_Read(deviceId, INA226_CURRENT_REG);
@ -137,20 +149,23 @@ int INA226_ReadCurrent(uint32_t deviceId) {
if (cuurentRegVal >= 0xFFF0) { if (cuurentRegVal >= 0xFFF0) {
LOG(logDEBUG1, (" Reading current reg again\n")); LOG(logDEBUG1, (" Reading current reg again\n"));
cuurentRegVal = I2C_Read(deviceId, INA226_CURRENT_REG); cuurentRegVal = I2C_Read(deviceId, INA226_CURRENT_REG);
LOG(logDEBUG1, (" current reg: %d\n", cuurentRegVal)); LOG(logDEBUG1, (" current reg: %d\n", cuurentRegVal));
} }
// should be the same // should be the same
LOG(logDEBUG1, (" ===============current reg: %d, current unit cal:%d=================================\n", cuurentRegVal, retval)); LOG(logDEBUG1, (" ===============current reg: %d, current unit "
"cal:%d=================================\n",
cuurentRegVal, retval));
// current in uA // current in uA
int currentuA = cuurentRegVal * INA226_CURRENT_IMIN_UA; int currentuA = cuurentRegVal * INA226_CURRENT_IMIN_UA;
LOG(logDEBUG1, (" current: %d uA\n", currentuA)); LOG(logDEBUG1, (" current: %d uA\n", currentuA));
// current in mA // current in mA
int currentmA = (currentuA / 1000.00) + 0.5; int currentmA = (currentuA / 1000.00) + 0.5;
LOG(logDEBUG1, (" current: %d mA\n", currentmA)); LOG(logDEBUG1, (" current: %d mA\n", currentmA));
LOG(logINFO, ("Current via I2C (Device: 0x%x): %d mA\n", deviceId, currentmA)); LOG(logINFO,
("Current via I2C (Device: 0x%x): %d mA\n", deviceId, currentmA));
return currentmA; return currentmA;
} }

169
slsDetectorServers/slsDetectorServer/src/LTC2620.c Executable file → Normal file
View File

@ -1,35 +1,46 @@
#include "LTC2620.h" #include "LTC2620.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "common.h"
#include "blackfin.h" #include "blackfin.h"
#include "clogger.h" #include "clogger.h"
#include "common.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "sls_detector_defs.h" #include "sls_detector_defs.h"
#include <string.h> #include <string.h>
/* LTC2620 DAC DEFINES */ /* LTC2620 DAC DEFINES */
// first 4 bits are 0 as this is a 12 bit dac // first 4 bits are 0 as this is a 12 bit dac
#define LTC2620_DAC_DATA_OFST (4) #define LTC2620_DAC_DATA_OFST (4)
#define LTC2620_DAC_DATA_MSK (0x00000FFF << LTC2620_DAC_DATA_OFST) #define LTC2620_DAC_DATA_MSK (0x00000FFF << LTC2620_DAC_DATA_OFST)
#define LTC2620_DAC_ADDR_OFST (16) #define LTC2620_DAC_ADDR_OFST (16)
#define LTC2620_DAC_ADDR_MSK (0x0000000F << LTC2620_DAC_ADDR_OFST) #define LTC2620_DAC_ADDR_MSK (0x0000000F << LTC2620_DAC_ADDR_OFST)
#define LTC2620_DAC_CMD_OFST (20) #define LTC2620_DAC_CMD_OFST (20)
#define LTC2620_DAC_CMD_MSK (0x0000000F << LTC2620_DAC_CMD_OFST) #define LTC2620_DAC_CMD_MSK (0x0000000F << LTC2620_DAC_CMD_OFST)
#define LTC2620_DAC_CMD_WR_IN_VAL ((0x0 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) // write to input register #define LTC2620_DAC_CMD_WR_IN_VAL \
#define LTC2620_DAC_CMD_UPDTE_DAC_VAL ((0x1 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) // update dac (power up) ((0x0 << LTC2620_DAC_CMD_OFST) & \
#define LTC2620_DAC_CMD_WR_IN_UPDTE_DAC_VAL ((0x2 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) // write to input register and update dac (power up) LTC2620_DAC_CMD_MSK) // write to input register
#define LTC2620_DAC_CMD_WR_UPDTE_DAC_VAL ((0x3 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) // write to and update dac (power up) #define LTC2620_DAC_CMD_UPDTE_DAC_VAL \
#define LTC2620_DAC_CMD_PWR_DWN_VAL ((0x4 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) ((0x1 << LTC2620_DAC_CMD_OFST) & \
#define LTC2620_DAC_CMD_NO_OPRTN_VAL ((0xF << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) LTC2620_DAC_CMD_MSK) // update dac (power up)
#define LTC2620_DAC_CMD_WR_IN_UPDTE_DAC_VAL \
((0x2 << LTC2620_DAC_CMD_OFST) & \
LTC2620_DAC_CMD_MSK) // write to input register and update dac (power up)
#define LTC2620_DAC_CMD_WR_UPDTE_DAC_VAL \
((0x3 << LTC2620_DAC_CMD_OFST) & \
LTC2620_DAC_CMD_MSK) // write to and update dac (power up)
#define LTC2620_DAC_CMD_PWR_DWN_VAL \
((0x4 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK)
#define LTC2620_DAC_CMD_NO_OPRTN_VAL \
((0xF << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK)
#define LTC2620_NUMBITS (24) #define LTC2620_NUMBITS (24)
#define LTC2620_DAISY_CHAIN_NUMBITS (32) // due to shift register FIXME: was 33 earlier #define LTC2620_DAISY_CHAIN_NUMBITS \
#define LTC2620_NUMCHANNELS (8) (32) // due to shift register FIXME: was 33 earlier
#define LTC2620_PWR_DOWN_VAL (-100) #define LTC2620_NUMCHANNELS (8)
#define LTC2620_MIN_VAL (0) #define LTC2620_PWR_DOWN_VAL (-100)
#define LTC2620_MAX_VAL (4095) // 12 bits #define LTC2620_MIN_VAL (0)
#define LTC2620_MAX_STEPS (LTC2620_MAX_VAL + 1) #define LTC2620_MAX_VAL (4095) // 12 bits
#define LTC2620_MAX_STEPS (LTC2620_MAX_VAL + 1)
#ifdef CHIPTESTBOARDD #ifdef CHIPTESTBOARDD
#include "slsDetectorServer_defs.h" #include "slsDetectorServer_defs.h"
@ -45,7 +56,9 @@ int LTC2620_Ndac = 0;
int LTC2620_MinVoltage = 0; int LTC2620_MinVoltage = 0;
int LTC2620_MaxVoltage = 0; int LTC2620_MaxVoltage = 0;
void LTC2620_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst, int nd, int minMV, int maxMV) { void LTC2620_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk,
uint32_t dmsk, int dofst, int nd, int minMV,
int maxMV) {
LTC2620_Reg = reg; LTC2620_Reg = reg;
LTC2620_CsMask = cmsk; LTC2620_CsMask = cmsk;
LTC2620_ClkMask = clkmsk; LTC2620_ClkMask = clkmsk;
@ -57,75 +70,68 @@ void LTC2620_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t d
} }
void LTC2620_Disable() { void LTC2620_Disable() {
bus_w(LTC2620_Reg, (bus_r(LTC2620_Reg) bus_w(LTC2620_Reg, (bus_r(LTC2620_Reg) | LTC2620_CsMask | LTC2620_ClkMask) &
| LTC2620_CsMask ~(LTC2620_DigMask));
| LTC2620_ClkMask)
& ~(LTC2620_DigMask));
} }
int LTC2620_GetPowerDownValue() { int LTC2620_GetPowerDownValue() { return LTC2620_PWR_DOWN_VAL; }
return LTC2620_PWR_DOWN_VAL;
}
int LTC2620_GetMinInput() { int LTC2620_GetMinInput() { return LTC2620_MIN_VAL; }
return LTC2620_MIN_VAL;
}
int LTC2620_GetMaxInput() { int LTC2620_GetMaxInput() { return LTC2620_MAX_VAL; }
return LTC2620_MAX_VAL;
}
int LTC2620_GetMaxNumSteps() { int LTC2620_GetMaxNumSteps() { return LTC2620_MAX_STEPS; }
return LTC2620_MAX_STEPS;
}
int LTC2620_VoltageToDac(int voltage, int* dacval) { int LTC2620_VoltageToDac(int voltage, int *dacval) {
return ConvertToDifferentRange(LTC2620_MinVoltage, LTC2620_MaxVoltage, return ConvertToDifferentRange(LTC2620_MinVoltage, LTC2620_MaxVoltage,
LTC2620_MIN_VAL, LTC2620_MAX_VAL, LTC2620_MIN_VAL, LTC2620_MAX_VAL, voltage,
voltage, dacval); dacval);
} }
int LTC2620_DacToVoltage(int dacval, int* voltage) { int LTC2620_DacToVoltage(int dacval, int *voltage) {
return ConvertToDifferentRange( LTC2620_MIN_VAL, LTC2620_MAX_VAL, return ConvertToDifferentRange(LTC2620_MIN_VAL, LTC2620_MAX_VAL,
LTC2620_MinVoltage, LTC2620_MaxVoltage, LTC2620_MinVoltage, LTC2620_MaxVoltage,
dacval, voltage); dacval, voltage);
} }
void LTC2620_SetSingle(int cmd, int data, int dacaddr) { void LTC2620_SetSingle(int cmd, int data, int dacaddr) {
LOG(logDEBUG2, ("(Single) dac addr:%d, dac value:%d, cmd:%d\n", dacaddr, data, cmd)); LOG(logDEBUG2,
("(Single) dac addr:%d, dac value:%d, cmd:%d\n", dacaddr, data, cmd));
uint32_t codata = (((data << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK) | uint32_t codata =
((dacaddr << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) | (((data << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK) |
cmd); ((dacaddr << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) | cmd);
LOG(logDEBUG2, ("codata: 0x%x\n", codata)); LOG(logDEBUG2, ("codata: 0x%x\n", codata));
serializeToSPI (LTC2620_Reg, codata, LTC2620_CsMask, LTC2620_NUMBITS, serializeToSPI(LTC2620_Reg, codata, LTC2620_CsMask, LTC2620_NUMBITS,
LTC2620_ClkMask, LTC2620_DigMask, LTC2620_DigOffset, 0); LTC2620_ClkMask, LTC2620_DigMask, LTC2620_DigOffset, 0);
} }
void LTC2620_SendDaisyData(uint32_t* valw, uint32_t val) { void LTC2620_SendDaisyData(uint32_t *valw, uint32_t val) {
sendDataToSPI(valw, LTC2620_Reg, val, LTC2620_DAISY_CHAIN_NUMBITS, sendDataToSPI(valw, LTC2620_Reg, val, LTC2620_DAISY_CHAIN_NUMBITS,
LTC2620_ClkMask, LTC2620_DigMask, LTC2620_DigOffset); LTC2620_ClkMask, LTC2620_DigMask, LTC2620_DigOffset);
} }
void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) { void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) {
int nchip = LTC2620_Ndac / LTC2620_NUMCHANNELS; int nchip = LTC2620_Ndac / LTC2620_NUMCHANNELS;
uint32_t valw = 0; uint32_t valw = 0;
int ichip = 0; int ichip = 0;
LOG(logDEBUG2, ("(Daisy) desired chip index:%d, nchip:%d, dac ch:%d, val:%d, cmd:0x%x \n", LOG(logDEBUG2, ("(Daisy) desired chip index:%d, nchip:%d, dac ch:%d, "
chipIndex, nchip, dacaddr, data, cmd)); "val:%d, cmd:0x%x \n",
chipIndex, nchip, dacaddr, data, cmd));
// data to be bit banged // data to be bit banged
uint32_t codata = (((data << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK) | uint32_t codata =
((dacaddr << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) | (((data << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK) |
cmd); ((dacaddr << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) | cmd);
LOG(logDEBUG2, ("codata: 0x%x\n", codata)); LOG(logDEBUG2, ("codata: 0x%x\n", codata));
// select all chips (ctb daisy chain; others 1 chip) // select all chips (ctb daisy chain; others 1 chip)
LOG(logDEBUG2, ("Selecting LTC2620\n")); LOG(logDEBUG2, ("Selecting LTC2620\n"));
SPIChipSelect (&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask, LTC2620_DigMask, 0); SPIChipSelect(&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask,
LTC2620_DigMask, 0);
// send same data to all // send same data to all
if (chipIndex < 0) { if (chipIndex < 0) {
@ -138,7 +144,8 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) {
// send to one chip, nothing to others // send to one chip, nothing to others
else { else {
// send nothing to subsequent ichips (daisy chain) (if any chips after desired chip) // send nothing to subsequent ichips (daisy chain) (if any chips after
// desired chip)
for (ichip = chipIndex + 1; ichip < nchip; ++ichip) { for (ichip = chipIndex + 1; ichip < nchip; ++ichip) {
LOG(logDEBUG2, ("Send nothing to ichip %d\n", ichip)); LOG(logDEBUG2, ("Send nothing to ichip %d\n", ichip));
LTC2620_SendDaisyData(&valw, LTC2620_DAC_CMD_NO_OPRTN_VAL); LTC2620_SendDaisyData(&valw, LTC2620_DAC_CMD_NO_OPRTN_VAL);
@ -148,7 +155,8 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) {
LOG(logDEBUG2, ("Send data (0x%x) to ichip %d\n", codata, chipIndex)); LOG(logDEBUG2, ("Send data (0x%x) to ichip %d\n", codata, chipIndex));
LTC2620_SendDaisyData(&valw, codata); LTC2620_SendDaisyData(&valw, codata);
// send nothing to preceding ichips (daisy chain) (if any chips in front of desired chip) // send nothing to preceding ichips (daisy chain) (if any chips in front
// of desired chip)
for (ichip = 0; ichip < chipIndex; ++ichip) { for (ichip = 0; ichip < chipIndex; ++ichip) {
LOG(logDEBUG2, ("Send nothing to ichip %d\n", ichip)); LOG(logDEBUG2, ("Send nothing to ichip %d\n", ichip));
LTC2620_SendDaisyData(&valw, LTC2620_DAC_CMD_NO_OPRTN_VAL); LTC2620_SendDaisyData(&valw, LTC2620_DAC_CMD_NO_OPRTN_VAL);
@ -157,11 +165,13 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) {
// deselect all chips (ctb daisy chain; others 1 chip) // deselect all chips (ctb daisy chain; others 1 chip)
LOG(logDEBUG2, ("Deselecting LTC2620\n")); LOG(logDEBUG2, ("Deselecting LTC2620\n"));
SPIChipDeselect(&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask, LTC2620_DigMask, 0); SPIChipDeselect(&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask,
LTC2620_DigMask, 0);
} }
void LTC2620_Set(int cmd, int data, int dacaddr, int chipIndex) { void LTC2620_Set(int cmd, int data, int dacaddr, int chipIndex) {
LOG(logDEBUG1, ("cmd:0x%x, data:%d, dacaddr:%d, chipIndex:%d\n", cmd, data, dacaddr, chipIndex)); LOG(logDEBUG1, ("cmd:0x%x, data:%d, dacaddr:%d, chipIndex:%d\n", cmd, data,
dacaddr, chipIndex));
LOG(logDEBUG2, (" ================================================\n")); LOG(logDEBUG2, (" ================================================\n"));
// ctb // ctb
if (LTC2620_Ndac > LTC2620_NUMCHANNELS) if (LTC2620_Ndac > LTC2620_NUMCHANNELS)
@ -172,7 +182,7 @@ void LTC2620_Set(int cmd, int data, int dacaddr, int chipIndex) {
LOG(logDEBUG2, (" ================================================\n")); LOG(logDEBUG2, (" ================================================\n"));
} }
void LTC2620_Configure(){ void LTC2620_Configure() {
LOG(logINFOBLUE, ("Configuring LTC2620\n")); LOG(logINFOBLUE, ("Configuring LTC2620\n"));
// dac channel - all channels // dac channel - all channels
@ -182,16 +192,17 @@ void LTC2620_Configure(){
int data = 0x6; int data = 0x6;
// command // command
int cmd = LTC2620_DAC_CMD_WR_IN_VAL; //FIXME: should be command update and not write(does not power up) int cmd = LTC2620_DAC_CMD_WR_IN_VAL; // FIXME: should be command update and
// not write(does not power up)
// also why do we need to power up (for jctb, we power down next) // also why do we need to power up (for jctb, we power down next)
LTC2620_Set(cmd, data, addr, -1); LTC2620_Set(cmd, data, addr, -1);
} }
void LTC2620_SetDAC (int dacnum, int data) { void LTC2620_SetDAC(int dacnum, int data) {
LOG(logDEBUG1, ("Setting dac %d to %d\n", dacnum, data)); LOG(logDEBUG1, ("Setting dac %d to %d\n", dacnum, data));
// LTC2620 index // LTC2620 index
int ichip = dacnum / LTC2620_NUMCHANNELS; int ichip = dacnum / LTC2620_NUMCHANNELS;
// dac channel // dac channel
int addr = dacnum % LTC2620_NUMCHANNELS; int addr = dacnum % LTC2620_NUMCHANNELS;
@ -204,17 +215,18 @@ void LTC2620_SetDAC (int dacnum, int data) {
cmd = LTC2620_DAC_CMD_PWR_DWN_VAL; cmd = LTC2620_DAC_CMD_PWR_DWN_VAL;
LOG(logDEBUG1, ("POWER DOWN\n")); LOG(logDEBUG1, ("POWER DOWN\n"));
} else { } else {
LOG(logDEBUG1,("Write to Input Register and Update\n")); LOG(logDEBUG1, ("Write to Input Register and Update\n"));
} }
LTC2620_Set(cmd, data, addr, ichip); LTC2620_Set(cmd, data, addr, ichip);
} }
int LTC2620_SetDACValue (int dacnum, int val, int mV, int* dacval) { int LTC2620_SetDACValue(int dacnum, int val, int mV, int *dacval) {
LOG(logDEBUG1, ("dacnum:%d, val:%d, ismV:%d\n", dacnum, val, mV)); LOG(logDEBUG1, ("dacnum:%d, val:%d, ismV:%d\n", dacnum, val, mV));
// validate index // validate index
if (dacnum < 0 || dacnum >= LTC2620_Ndac) { if (dacnum < 0 || dacnum >= LTC2620_Ndac) {
LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum, LTC2620_Ndac - 1)); LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum,
LTC2620_Ndac - 1));
return FAIL; return FAIL;
} }
@ -234,19 +246,22 @@ int LTC2620_SetDACValue (int dacnum, int val, int mV, int* dacval) {
ret = LTC2620_VoltageToDac(val, dacval); ret = LTC2620_VoltageToDac(val, dacval);
} else if (val >= 0 && dacnum <= ndacsonly) { } else if (val >= 0 && dacnum <= ndacsonly) {
// do not convert power down dac val // do not convert power down dac val
//(if not ndacsonly (pwr/vchip): dont need to print mV value as it will be wrong (wrong limits)) //(if not ndacsonly (pwr/vchip): dont need to print mV value as it will
//be wrong (wrong limits))
ret = LTC2620_DacToVoltage(val, &dacmV); ret = LTC2620_DacToVoltage(val, &dacmV);
} }
// conversion out of bounds // conversion out of bounds
if (ret == FAIL) { if (ret == FAIL) {
LOG(logERROR, ("Setting Dac %d %s is out of bounds\n", dacnum, (mV ? "mV" : "dac units"))); LOG(logERROR, ("Setting Dac %d %s is out of bounds\n", dacnum,
(mV ? "mV" : "dac units")));
return FAIL; return FAIL;
} }
// set // set
if ( (*dacval >= 0) || (*dacval == LTC2620_PWR_DOWN_VAL)) { if ((*dacval >= 0) || (*dacval == LTC2620_PWR_DOWN_VAL)) {
LOG(logINFO, ("Setting DAC %d: %d dac (%d mV)\n",dacnum, *dacval, dacmV)); LOG(logINFO,
("Setting DAC %d: %d dac (%d mV)\n", dacnum, *dacval, dacmV));
LTC2620_SetDAC(dacnum, *dacval); LTC2620_SetDAC(dacnum, *dacval);
} }
return OK; return OK;

61
slsDetectorServers/slsDetectorServer/src/LTC2620_Driver.c Executable file → Normal file
View File

@ -6,44 +6,44 @@
#include <string.h> #include <string.h>
/* LTC2620 DAC DEFINES */ /* LTC2620 DAC DEFINES */
#define LTC2620_D_PWR_DOWN_VAL (-100) #define LTC2620_D_PWR_DOWN_VAL (-100)
#define LTC2620_D_MAX_DAC_VAL (4095) // 12 bits #define LTC2620_D_MAX_DAC_VAL (4095) // 12 bits
#define LTC2620_D_MAX_STEPS (LTC2620_D_MAX_DAC_VAL + 1) #define LTC2620_D_MAX_STEPS (LTC2620_D_MAX_DAC_VAL + 1)
// defines from the fpga // defines from the fpga
int LTC2620_D_HardMaxVoltage = 0; int LTC2620_D_HardMaxVoltage = 0;
char LTC2620_D_DriverFileName[MAX_STR_LENGTH]; char LTC2620_D_DriverFileName[MAX_STR_LENGTH];
int LTC2620_D_NumDacs = 0; int LTC2620_D_NumDacs = 0;
void LTC2620_D_SetDefines(int hardMaxV, char* driverfname, int numdacs) { void LTC2620_D_SetDefines(int hardMaxV, char *driverfname, int numdacs) {
LOG(logINFOBLUE, ("Configuring DACs (LTC2620) to %s (numdacs:%d, hard max: %dmV)\n", driverfname, numdacs, hardMaxV)); LOG(logINFOBLUE,
("Configuring DACs (LTC2620) to %s (numdacs:%d, hard max: %dmV)\n",
driverfname, numdacs, hardMaxV));
LTC2620_D_HardMaxVoltage = hardMaxV; LTC2620_D_HardMaxVoltage = hardMaxV;
memset(LTC2620_D_DriverFileName, 0, MAX_STR_LENGTH); memset(LTC2620_D_DriverFileName, 0, MAX_STR_LENGTH);
strcpy(LTC2620_D_DriverFileName, driverfname); strcpy(LTC2620_D_DriverFileName, driverfname);
LTC2620_D_NumDacs = numdacs; LTC2620_D_NumDacs = numdacs;
} }
int LTC2620_D_GetMaxNumSteps() { int LTC2620_D_GetMaxNumSteps() { return LTC2620_D_MAX_STEPS; }
return LTC2620_D_MAX_STEPS;
int LTC2620_D_VoltageToDac(int voltage, int *dacval) {
return ConvertToDifferentRange(0, LTC2620_D_HardMaxVoltage, 0,
LTC2620_D_MAX_DAC_VAL, voltage, dacval);
} }
int LTC2620_D_VoltageToDac(int voltage, int* dacval) { int LTC2620_D_DacToVoltage(int dacval, int *voltage) {
return ConvertToDifferentRange(0, LTC2620_D_HardMaxVoltage, 0, LTC2620_D_MAX_DAC_VAL, return ConvertToDifferentRange(0, LTC2620_D_MAX_DAC_VAL, 0,
voltage, dacval); LTC2620_D_HardMaxVoltage, dacval, voltage);
} }
int LTC2620_D_DacToVoltage(int dacval, int* voltage) { int LTC2620_D_SetDACValue(int dacnum, int val, int mV, char *dacname,
return ConvertToDifferentRange( 0, LTC2620_D_MAX_DAC_VAL, 0, LTC2620_D_HardMaxVoltage, int *dacval) {
dacval, voltage);
}
int LTC2620_D_SetDACValue (int dacnum, int val, int mV, char* dacname, int* dacval) {
LOG(logDEBUG1, ("dacnum:%d, val:%d, ismV:%d\n", dacnum, val, mV)); LOG(logDEBUG1, ("dacnum:%d, val:%d, ismV:%d\n", dacnum, val, mV));
// validate index // validate index
if (dacnum < 0 || dacnum >= LTC2620_D_NumDacs) { if (dacnum < 0 || dacnum >= LTC2620_D_NumDacs) {
LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum, LTC2620_D_NumDacs - 1)); LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum,
LTC2620_D_NumDacs - 1));
return FAIL; return FAIL;
} }
@ -64,14 +64,15 @@ int LTC2620_D_SetDACValue (int dacnum, int val, int mV, char* dacname, int* dacv
// conversion out of bounds // conversion out of bounds
if (ret == FAIL) { if (ret == FAIL) {
LOG(logERROR, ("Setting Dac %d %s is out of bounds\n", dacnum, (mV ? "mV" : "dac units"))); LOG(logERROR, ("Setting Dac %d %s is out of bounds\n", dacnum,
(mV ? "mV" : "dac units")));
return FAIL; return FAIL;
} }
// set // set
if ( (*dacval >= 0) || (*dacval == LTC2620_D_PWR_DOWN_VAL)) { if ((*dacval >= 0) || (*dacval == LTC2620_D_PWR_DOWN_VAL)) {
LOG(logINFO, ("Setting DAC %2d [%-12s] : %d dac (%d mV)\n",dacnum, dacname, *dacval, dacmV)); LOG(logINFO, ("Setting DAC %2d [%-12s] : %d dac (%d mV)\n", dacnum,
dacname, *dacval, dacmV));
#ifndef VIRTUAL #ifndef VIRTUAL
char fname[MAX_STR_LENGTH]; char fname[MAX_STR_LENGTH];
@ -80,19 +81,19 @@ int LTC2620_D_SetDACValue (int dacnum, int val, int mV, char* dacname, int* dacv
memset(temp, 0, sizeof(temp)); memset(temp, 0, sizeof(temp));
sprintf(temp, "%d", dacnum); sprintf(temp, "%d", dacnum);
strcat(fname, temp); strcat(fname, temp);
LOG(logDEBUG1, ("fname %s\n",fname)); LOG(logDEBUG1, ("fname %s\n", fname));
//open file // open file
FILE* fd=fopen(fname,"w"); FILE *fd = fopen(fname, "w");
if (fd==NULL) { if (fd == NULL) {
LOG(logERROR, ("Could not open file %s for writing to set dac %d\n", fname, dacnum)); LOG(logERROR, ("Could not open file %s for writing to set dac %d\n",
fname, dacnum));
return FAIL; return FAIL;
} }
//convert to string, add 0 and write to file // convert to string, add 0 and write to file
fprintf(fd, "%d\n", *dacval); fprintf(fd, "%d\n", *dacval);
fclose(fd); fclose(fd);
#endif #endif
} }
return OK; return OK;
} }

36
slsDetectorServers/slsDetectorServer/src/MAX1932.c Executable file → Normal file
View File

@ -1,19 +1,19 @@
#include "MAX1932.h" #include "MAX1932.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "blackfin.h" #include "blackfin.h"
#include "clogger.h" #include "clogger.h"
#include "common.h" #include "common.h"
#include "commonServerFunctions.h" // blackfin.h, ansi.h
#include "sls_detector_defs.h" #include "sls_detector_defs.h"
/* MAX1932 HV DEFINES */ /* MAX1932 HV DEFINES */
#define MAX1932_HV_NUMBITS (8) #define MAX1932_HV_NUMBITS (8)
#define MAX1932_HV_DATA_OFST (0) #define MAX1932_HV_DATA_OFST (0)
#define MAX1932_HV_DATA_MSK (0x000000FF << MAX1932_HV_DATA_OFST) #define MAX1932_HV_DATA_MSK (0x000000FF << MAX1932_HV_DATA_OFST)
// higher voltage requires lower dac value, 0 is off // higher voltage requires lower dac value, 0 is off
#define MAX1932_MIN_DAC_VAL (0xFF) #define MAX1932_MIN_DAC_VAL (0xFF)
#define MAX1932_MAX_DAC_VAL (0x1) #define MAX1932_MAX_DAC_VAL (0x1)
#define MAX1932_POWER_OFF_DAC_VAL (0x0) #define MAX1932_POWER_OFF_DAC_VAL (0x0)
// defines from the fpga // defines from the fpga
uint32_t MAX1932_Reg = 0x0; uint32_t MAX1932_Reg = 0x0;
@ -24,8 +24,8 @@ int MAX1932_DigOffset = 0x0;
int MAX1932_MinVoltage = 0; int MAX1932_MinVoltage = 0;
int MAX1932_MaxVoltage = 0; int MAX1932_MaxVoltage = 0;
void MAX1932_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst, void MAX1932_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk,
int minMV, int maxMV) { uint32_t dmsk, int dofst, int minMV, int maxMV) {
LOG(logINFOBLUE, ("Configuring High Voltage\n")); LOG(logINFOBLUE, ("Configuring High Voltage\n"));
MAX1932_Reg = reg; MAX1932_Reg = reg;
MAX1932_CsMask = cmsk; MAX1932_CsMask = cmsk;
@ -37,13 +37,11 @@ void MAX1932_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t d
} }
void MAX1932_Disable() { void MAX1932_Disable() {
bus_w(MAX1932_Reg, (bus_r(MAX1932_Reg) bus_w(MAX1932_Reg, (bus_r(MAX1932_Reg) | MAX1932_CsMask | MAX1932_ClkMask) &
| MAX1932_CsMask ~(MAX1932_DigMask));
| MAX1932_ClkMask)
& ~(MAX1932_DigMask));
} }
int MAX1932_Set (int* val) { int MAX1932_Set(int *val) {
LOG(logDEBUG1, ("Setting high voltage to %d\n", *val)); LOG(logDEBUG1, ("Setting high voltage to %d\n", *val));
if (*val < 0) if (*val < 0)
return FAIL; return FAIL;
@ -64,17 +62,13 @@ int MAX1932_Set (int* val) {
else { else {
// no failure in conversion as limits handled (range from 0x1 to 0xFF) // no failure in conversion as limits handled (range from 0x1 to 0xFF)
ConvertToDifferentRange(MAX1932_MinVoltage, MAX1932_MaxVoltage, ConvertToDifferentRange(MAX1932_MinVoltage, MAX1932_MaxVoltage,
MAX1932_MIN_DAC_VAL, MAX1932_MAX_DAC_VAL, MAX1932_MIN_DAC_VAL, MAX1932_MAX_DAC_VAL, *val,
*val, &dacvalue); &dacvalue);
dacvalue &= MAX1932_HV_DATA_MSK; dacvalue &= MAX1932_HV_DATA_MSK;
} }
LOG(logINFO, ("\t%dV (dacval %d)\n", *val, dacvalue)); LOG(logINFO, ("\t%dV (dacval %d)\n", *val, dacvalue));
serializeToSPI(MAX1932_Reg, dacvalue, MAX1932_CsMask, MAX1932_HV_NUMBITS, serializeToSPI(MAX1932_Reg, dacvalue, MAX1932_CsMask, MAX1932_HV_NUMBITS,
MAX1932_ClkMask, MAX1932_DigMask, MAX1932_DigOffset, 0); MAX1932_ClkMask, MAX1932_DigMask, MAX1932_DigOffset, 0);
return OK; return OK;
} }

195
slsDetectorServers/slsDetectorServer/src/UDPPacketHeaderGenerator.c Executable file → Normal file
View File

@ -2,117 +2,122 @@
#include "clogger.h" #include "clogger.h"
#include "sls_detector_defs.h" #include "sls_detector_defs.h"
#include <stdio.h>
#include <stdlib.h>
#include <sys/types.h>
#include <sys/socket.h>
#include <arpa/inet.h> #include <arpa/inet.h>
#include <netinet/in.h>
#include <string.h>
#include <unistd.h>
#include <errno.h> #include <errno.h>
#include <netdb.h> #include <netdb.h>
#include <netinet/in.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/socket.h>
#include <sys/types.h>
#include <unistd.h>
#define UDP_PACKET_HEADER_VERSION (0x1) #define UDP_PACKET_HEADER_VERSION (0x1)
extern const enum detectorType myDetectorType; extern const enum detectorType myDetectorType;
extern int analogDataBytes; extern int analogDataBytes;
extern int digitalDataBytes; extern int digitalDataBytes;
extern char* analogData; extern char *analogData;
extern char* digitalData; extern char *digitalData;
int analogOffset = 0; int analogOffset = 0;
int digitalOffset = 0; int digitalOffset = 0;
uint32_t udpPacketNumber = 0; uint32_t udpPacketNumber = 0;
uint64_t udpFrameNumber = 0; uint64_t udpFrameNumber = 0;
uint32_t getUDPPacketNumber() { return udpPacketNumber; }
uint32_t getUDPPacketNumber() { uint64_t getUDPFrameNumber() { return udpFrameNumber; }
return udpPacketNumber;
void createUDPPacketHeader(char *buffer, uint16_t id) {
memset(buffer, 0, sizeof(sls_detector_header));
sls_detector_header *header = (sls_detector_header *)(buffer);
header->modId = id;
// row and column remains 0 (only used by ctb now)
// uint64_t timestamp FIXME: needed?
header->detType = (uint16_t)myDetectorType;
header->version = UDP_PACKET_HEADER_VERSION;
// reset offset
analogOffset = 0;
digitalOffset = 0;
// reset frame number
udpFrameNumber = 0;
} }
uint64_t getUDPFrameNumber() { int fillUDPPacket(char *buffer) {
return udpFrameNumber; LOG(logDEBUG2,
} ("Analog (databytes:%d, offset:%d)\n Digital (databytes:%d "
"offset:%d)\n",
void createUDPPacketHeader(char* buffer, uint16_t id) { analogDataBytes, analogOffset, digitalDataBytes, digitalOffset));
memset(buffer, 0, sizeof(sls_detector_header)); // reached end of data for one frame
sls_detector_header* header = (sls_detector_header*)(buffer); if (analogOffset >= analogDataBytes && digitalOffset >= digitalDataBytes) {
// reset offset
header->modId = id; analogOffset = 0;
// row and column remains 0 (only used by ctb now) digitalOffset = 0;
// uint64_t timestamp FIXME: needed? return 0;
header->detType = (uint16_t)myDetectorType; }
header->version = UDP_PACKET_HEADER_VERSION;
sls_detector_header *header = (sls_detector_header *)(buffer);
// reset offset
analogOffset = 0; // update frame number, starts at 1 (reset packet number)
digitalOffset = 0; if (analogOffset == 0 && digitalOffset == 0) {
// reset frame number ++udpFrameNumber;
udpFrameNumber = 0; header->frameNumber = udpFrameNumber;
} udpPacketNumber = -1;
}
int fillUDPPacket(char* buffer) {
LOG(logDEBUG2, ("Analog (databytes:%d, offset:%d)\n Digital (databytes:%d offset:%d)\n", // increment and copy udp packet number (starts at 0)
analogDataBytes, analogOffset, digitalDataBytes, digitalOffset)); ++udpPacketNumber;
// reached end of data for one frame header->packetNumber = udpPacketNumber;
if (analogOffset >= analogDataBytes && digitalOffset >= digitalDataBytes) { LOG(logDEBUG2, ("Creating packet number %d (fnum:%lld)\n", udpPacketNumber,
// reset offset (long long int)udpFrameNumber));
analogOffset = 0;
digitalOffset = 0; int freeBytes = UDP_PACKET_DATA_BYTES;
return 0;
} // analog data
int analogBytes = 0;
sls_detector_header* header = (sls_detector_header*)(buffer); if (analogOffset < analogDataBytes) {
// bytes to copy
// update frame number, starts at 1 (reset packet number) analogBytes = ((analogOffset + freeBytes) <= analogDataBytes)
if (analogOffset == 0 && digitalOffset == 0) { ? freeBytes
++udpFrameNumber; : (analogDataBytes - analogOffset);
header->frameNumber = udpFrameNumber; // copy
udpPacketNumber = -1; memcpy(buffer + sizeof(sls_detector_header), analogData + analogOffset,
} analogBytes);
// increment offset
// increment and copy udp packet number (starts at 0) analogOffset += analogBytes;
++udpPacketNumber; // decrement free bytes
header->packetNumber = udpPacketNumber; freeBytes -= analogBytes;
LOG(logDEBUG2, ("Creating packet number %d (fnum:%lld)\n", udpPacketNumber, (long long int) udpFrameNumber)); }
int freeBytes = UDP_PACKET_DATA_BYTES; // digital data
int digitalBytes = 0;
// analog data if (freeBytes && digitalOffset < digitalDataBytes) {
int analogBytes = 0; // bytes to copy
if (analogOffset < analogDataBytes) { digitalBytes = ((digitalOffset + freeBytes) <= digitalDataBytes)
// bytes to copy ? freeBytes
analogBytes = ((analogOffset + freeBytes) <= analogDataBytes) ? : (digitalDataBytes - digitalOffset);
freeBytes : (analogDataBytes - analogOffset); // copy
// copy memcpy(buffer + sizeof(sls_detector_header) + analogBytes,
memcpy(buffer + sizeof(sls_detector_header), analogData + analogOffset, analogBytes); digitalData + digitalOffset, digitalBytes);
// increment offset // increment offset
analogOffset += analogBytes; digitalOffset += digitalBytes;
// decrement free bytes // decrement free bytes
freeBytes -= analogBytes; freeBytes -= digitalBytes;
} }
// digital data // pad data
int digitalBytes = 0; if (freeBytes) {
if (freeBytes && digitalOffset < digitalDataBytes) { memset(buffer + sizeof(sls_detector_header) + analogBytes +
// bytes to copy digitalBytes,
digitalBytes = ((digitalOffset + freeBytes) <= digitalDataBytes) ? 0, freeBytes);
freeBytes : (digitalDataBytes - digitalOffset); LOG(logDEBUG1, ("Padding %d bytes for fnum:%lld pnum:%d\n", freeBytes,
// copy (long long int)udpFrameNumber, udpPacketNumber));
memcpy(buffer + sizeof(sls_detector_header) + analogBytes, digitalData + digitalOffset, digitalBytes); }
// increment offset
digitalOffset += digitalBytes; return UDP_PACKET_DATA_BYTES + sizeof(sls_detector_header);
// decrement free bytes
freeBytes -= digitalBytes;
}
// pad data
if (freeBytes) {
memset(buffer + sizeof(sls_detector_header) + analogBytes + digitalBytes, 0, freeBytes);
LOG(logDEBUG1, ("Padding %d bytes for fnum:%lld pnum:%d\n", freeBytes, (long long int)udpFrameNumber, udpPacketNumber));
}
return UDP_PACKET_DATA_BYTES + sizeof(sls_detector_header);
} }

159
slsDetectorServers/slsDetectorServer/src/blackfin.c Executable file → Normal file
View File

@ -1,85 +1,84 @@
#include "blackfin.h" #include "blackfin.h"
#include "RegisterDefs.h" #include "RegisterDefs.h"
#include "sls_detector_defs.h"
#include "ansi.h" #include "ansi.h"
#include "clogger.h" #include "clogger.h"
#include "sls_detector_defs.h"
#include <fcntl.h> // open #include <fcntl.h> // open
#include <sys/mman.h> // mmap #include <sys/mman.h> // mmap
/* global variables */ /* global variables */
u_int32_t* csp0base = 0; u_int32_t *csp0base = 0;
#define CSP0 0x20200000 #define CSP0 0x20200000
#define MEM_SIZE 0x100000 #define MEM_SIZE 0x100000
void bus_w16(u_int32_t offset, u_int16_t data) { void bus_w16(u_int32_t offset, u_int16_t data) {
volatile u_int16_t *ptr1; volatile u_int16_t *ptr1;
ptr1=(u_int16_t*)(csp0base + offset / 2); ptr1 = (u_int16_t *)(csp0base + offset / 2);
*ptr1=data; *ptr1 = data;
} }
u_int16_t bus_r16(u_int32_t offset){ u_int16_t bus_r16(u_int32_t offset) {
volatile u_int16_t *ptr1; volatile u_int16_t *ptr1;
ptr1=(u_int16_t*)(csp0base + offset / 2); ptr1 = (u_int16_t *)(csp0base + offset / 2);
return *ptr1; return *ptr1;
} }
void bus_w(u_int32_t offset, u_int32_t data) { void bus_w(u_int32_t offset, u_int32_t data) {
volatile u_int32_t *ptr1; volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(csp0base + offset / 2); ptr1 = (u_int32_t *)(csp0base + offset / 2);
*ptr1=data; *ptr1 = data;
} }
u_int32_t bus_r(u_int32_t offset) { u_int32_t bus_r(u_int32_t offset) {
volatile u_int32_t *ptr1; volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(csp0base + offset / 2); ptr1 = (u_int32_t *)(csp0base + offset / 2);
return *ptr1; return *ptr1;
} }
int64_t get64BitReg(int aLSB, int aMSB){ int64_t get64BitReg(int aLSB, int aMSB) {
int64_t v64; int64_t v64;
u_int32_t vLSB,vMSB; u_int32_t vLSB, vMSB;
vLSB=bus_r(aLSB); vLSB = bus_r(aLSB);
vMSB=bus_r(aMSB); vMSB = bus_r(aMSB);
v64=vMSB; v64 = vMSB;
v64=(v64<<32) | vLSB; v64 = (v64 << 32) | vLSB;
LOG(logDEBUG5, (" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, (long long unsigned int)v64)); LOG(logDEBUG5, (" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB,
return v64; (long long unsigned int)v64));
return v64;
} }
int64_t set64BitReg(int64_t value, int aLSB, int aMSB){ int64_t set64BitReg(int64_t value, int aLSB, int aMSB) {
int64_t v64; int64_t v64;
u_int32_t vLSB,vMSB; u_int32_t vLSB, vMSB;
if (value!=-1) { if (value != -1) {
vLSB=value&(0xffffffff); vLSB = value & (0xffffffff);
bus_w(aLSB,vLSB); bus_w(aLSB, vLSB);
v64=value>> 32; v64 = value >> 32;
vMSB=v64&(0xffffffff); vMSB = v64 & (0xffffffff);
bus_w(aMSB,vMSB); bus_w(aMSB, vMSB);
} }
return get64BitReg(aLSB, aMSB); return get64BitReg(aLSB, aMSB);
} }
uint64_t getU64BitReg(int aLSB, int aMSB){ uint64_t getU64BitReg(int aLSB, int aMSB) {
uint64_t retval = bus_r(aMSB); uint64_t retval = bus_r(aMSB);
retval = (retval << 32) | bus_r(aLSB); retval = (retval << 32) | bus_r(aLSB);
return retval; return retval;
} }
void setU64BitReg(uint64_t value, int aLSB, int aMSB){ void setU64BitReg(uint64_t value, int aLSB, int aMSB) {
bus_w(aLSB, value & (0xffffffff)); bus_w(aLSB, value & (0xffffffff));
bus_w(aMSB, (value >> 32) & (0xffffffff)); bus_w(aMSB, (value >> 32) & (0xffffffff));
} }
u_int32_t readRegister(u_int32_t offset) { u_int32_t readRegister(u_int32_t offset) {
return bus_r(offset << MEM_MAP_SHIFT); return bus_r(offset << MEM_MAP_SHIFT);
} }
u_int32_t writeRegister(u_int32_t offset, u_int32_t data) { u_int32_t writeRegister(u_int32_t offset, u_int32_t data) {
bus_w(offset << MEM_MAP_SHIFT, data); bus_w(offset << MEM_MAP_SHIFT, data);
return readRegister(offset); return readRegister(offset);
} }
u_int32_t readRegister16(u_int32_t offset) { u_int32_t readRegister16(u_int32_t offset) {
@ -92,39 +91,37 @@ u_int32_t writeRegister16(u_int32_t offset, u_int32_t data) {
} }
int mapCSP0(void) { int mapCSP0(void) {
// if not mapped // if not mapped
if (csp0base == 0) { if (csp0base == 0) {
LOG(logINFO, ("Mapping memory\n")); LOG(logINFO, ("Mapping memory\n"));
#ifdef VIRTUAL #ifdef VIRTUAL
csp0base = malloc(MEM_SIZE); csp0base = malloc(MEM_SIZE);
if (csp0base == NULL) { if (csp0base == NULL) {
LOG(logERROR, ("Could not allocate virtual memory.\n")); LOG(logERROR, ("Could not allocate virtual memory.\n"));
return FAIL; return FAIL;
} }
LOG(logINFO, ("memory allocated\n")); LOG(logINFO, ("memory allocated\n"));
#else #else
int fd; int fd;
fd = open("/dev/mem", O_RDWR | O_SYNC, 0); fd = open("/dev/mem", O_RDWR | O_SYNC, 0);
if (fd == -1) { if (fd == -1) {
LOG(logERROR, ("Can't find /dev/mem\n")); LOG(logERROR, ("Can't find /dev/mem\n"));
return FAIL; return FAIL;
} }
LOG(logDEBUG1, ("/dev/mem opened\n")); LOG(logDEBUG1, ("/dev/mem opened\n"));
csp0base = mmap(0, MEM_SIZE, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, fd, CSP0); csp0base = mmap(0, MEM_SIZE, PROT_READ | PROT_WRITE,
if (csp0base == MAP_FAILED) { MAP_FILE | MAP_SHARED, fd, CSP0);
LOG(logERROR, ("Can't map memmory area\n")); if (csp0base == MAP_FAILED) {
return FAIL; LOG(logERROR, ("Can't map memmory area\n"));
} return FAIL;
}
#endif #endif
LOG(logINFO, ("csp0base mapped from %p to %p\n", LOG(logINFO, ("csp0base mapped from %p to %p\n", csp0base,
csp0base, (csp0base + MEM_SIZE))); (csp0base + MEM_SIZE)));
LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG)));
}else } else
LOG(logINFO, ("Memory already mapped before\n")); LOG(logINFO, ("Memory already mapped before\n"));
return OK; return OK;
} }
uint32_t *Blackfin_getBaseAddress() { return csp0base; }
uint32_t* Blackfin_getBaseAddress() {
return csp0base;
}

19
slsDetectorServers/slsDetectorServer/src/common.c Executable file → Normal file
View File

@ -2,13 +2,14 @@
#include "clogger.h" #include "clogger.h"
#include "sls_detector_defs.h" #include "sls_detector_defs.h"
int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin, int outputMax, int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin,
int inputValue, int* outputValue) { int outputMax, int inputValue, int *outputValue) {
LOG(logDEBUG1, (" Input Value: %d (Input:(%d - %d), Output:(%d - %d))\n", LOG(logDEBUG1, (" Input Value: %d (Input:(%d - %d), Output:(%d - %d))\n",
inputValue, inputMin, inputMax, outputMin, outputMax)); inputValue, inputMin, inputMax, outputMin, outputMax));
// validate within bounds // validate within bounds
// eg. MAX1932 range is v(60 - 200) to dac(255 - 1), here inputMin > inputMax (when dac to voltage) // eg. MAX1932 range is v(60 - 200) to dac(255 - 1), here inputMin >
// inputMax (when dac to voltage)
int smaller = inputMin; int smaller = inputMin;
int bigger = inputMax; int bigger = inputMax;
if (smaller > bigger) { if (smaller > bigger) {
@ -16,13 +17,16 @@ int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin, int outpu
bigger = inputMin; bigger = inputMin;
} }
if ((inputValue < smaller) || (inputValue > bigger)) { if ((inputValue < smaller) || (inputValue > bigger)) {
LOG(logERROR, ("Input Value is outside bounds (%d to %d): %d\n", smaller, bigger, inputValue)); LOG(logERROR, ("Input Value is outside bounds (%d to %d): %d\n",
smaller, bigger, inputValue));
*outputValue = -1; *outputValue = -1;
return FAIL; return FAIL;
} }
double value = ((double)(inputValue - inputMin) * (double)(outputMax - outputMin)) double value =
/ (double)(inputMax - inputMin) + outputMin; ((double)(inputValue - inputMin) * (double)(outputMax - outputMin)) /
(double)(inputMax - inputMin) +
outputMin;
// double to integer conversion (if decimal places, round to integer) // double to integer conversion (if decimal places, round to integer)
if ((value - (int)value) > 0.0001) { if ((value - (int)value) > 0.0001) {
@ -33,4 +37,3 @@ int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin, int outpu
LOG(logDEBUG1, (" Converted Output Value: %d\n", *outputValue)); LOG(logDEBUG1, (" Converted Output Value: %d\n", *outputValue));
return OK; return OK;
} }

122
slsDetectorServers/slsDetectorServer/src/commonServerFunctions.c Executable file → Normal file
View File

@ -2,97 +2,114 @@
#include "blackfin.h" #include "blackfin.h"
#include "clogger.h" #include "clogger.h"
#include <unistd.h> // usleep #include <unistd.h> // usleep
void SPIChipSelect (uint32_t* valw, uint32_t addr, uint32_t csmask, uint32_t clkmask, uint32_t digoutmask, int convBit) { void SPIChipSelect(uint32_t *valw, uint32_t addr, uint32_t csmask,
LOG(logDEBUG2, ("SPI chip select. valw:0x%08x addr:0x%x csmask:0x%x, clkmask:0x%x digmask:0x%x convbit:%d\n", uint32_t clkmask, uint32_t digoutmask, int convBit) {
*valw, addr, csmask, clkmask, digoutmask, convBit)); LOG(logDEBUG2, ("SPI chip select. valw:0x%08x addr:0x%x csmask:0x%x, "
"clkmask:0x%x digmask:0x%x convbit:%d\n",
*valw, addr, csmask, clkmask, digoutmask, convBit));
// start point // start point
if (convBit) { if (convBit) {
// needed for the slow adcs for apprx 20 ns before and after rising of convbit (usleep val is vague assumption) // needed for the slow adcs for apprx 20 ns before and after rising of
usleep(20); // convbit (usleep val is vague assumption)
// clkmask has to be down for conversion to have correct value (for conv bit = 1) usleep(20);
(*valw) = (((bus_r(addr) | csmask) &(~clkmask)) &(~digoutmask)); // clkmask has to be down for conversion to have correct value (for conv
// bit = 1)
(*valw) = (((bus_r(addr) | csmask) & (~clkmask)) & (~digoutmask));
} else { } else {
(*valw) = ((bus_r(addr) | csmask | clkmask) &(~digoutmask)); (*valw) = ((bus_r(addr) | csmask | clkmask) & (~digoutmask));
} }
bus_w (addr, (*valw)); bus_w(addr, (*valw));
LOG(logDEBUG2, ("startpoint. valw:0x%08x\n", *valw)); LOG(logDEBUG2, ("startpoint. valw:0x%08x\n", *valw));
// needed for the slow adcs for apprx 10 ns before and after rising of convbit (usleep val is vague assumption) // needed for the slow adcs for apprx 10 ns before and after rising of
// convbit (usleep val is vague assumption)
if (convBit) if (convBit)
usleep(10); usleep(10);
// chip sel bar down // chip sel bar down
(*valw) &= ~csmask; (*valw) &= ~csmask;
bus_w (addr, (*valw)); bus_w(addr, (*valw));
LOG(logDEBUG2, ("chip sel bar down. valw:0x%08x\n", *valw)); LOG(logDEBUG2, ("chip sel bar down. valw:0x%08x\n", *valw));
} }
void SPIChipDeselect(uint32_t *valw, uint32_t addr, uint32_t csmask,
uint32_t clkmask, uint32_t digoutmask, int convBit) {
LOG(logDEBUG2, ("SPI chip deselect. valw:0x%08x addr:0x%x csmask:0x%x, "
"clkmask:0x%x digmask:0x%x convbit:%d\n",
*valw, addr, csmask, clkmask, digoutmask, convBit));
void SPIChipDeselect (uint32_t* valw, uint32_t addr, uint32_t csmask, uint32_t clkmask, uint32_t digoutmask, int convBit) { // needed for the slow adcs for apprx 20 ns before and after rising of
LOG(logDEBUG2, ("SPI chip deselect. valw:0x%08x addr:0x%x csmask:0x%x, clkmask:0x%x digmask:0x%x convbit:%d\n", // convbit (usleep val is vague assumption)
*valw, addr, csmask, clkmask, digoutmask, convBit));
// needed for the slow adcs for apprx 20 ns before and after rising of convbit (usleep val is vague assumption)
if (convBit) if (convBit)
usleep(20); usleep(20);
// chip sel bar up // chip sel bar up
(*valw) |= csmask; (*valw) |= csmask;
bus_w (addr, (*valw)); bus_w(addr, (*valw));
LOG(logDEBUG2, ("chip sel bar up. valw:0x%08x\n", *valw)); LOG(logDEBUG2, ("chip sel bar up. valw:0x%08x\n", *valw));
// needed for the slow adcs for apprx 10 ns before and after rising of convbit (usleep val is vague assumption) // needed for the slow adcs for apprx 10 ns before and after rising of
// convbit (usleep val is vague assumption)
if (convBit) if (convBit)
usleep(10); usleep(10);
//clk down // clk down
(*valw) &= ~clkmask; (*valw) &= ~clkmask;
bus_w (addr, (*valw)); bus_w(addr, (*valw));
LOG(logDEBUG2, ("clk down. valw:0x%08x\n", *valw)); LOG(logDEBUG2, ("clk down. valw:0x%08x\n", *valw));
// stop point = start point of course // stop point = start point of course
(*valw) &= ~digoutmask; (*valw) &= ~digoutmask;
// slow adcs use convBit (has to go high and then low) instead of csmask // slow adcs use convBit (has to go high and then low) instead of csmask
if (convBit) { if (convBit) {
(*valw) &= ~csmask; (*valw) &= ~csmask;
} else { } else {
(*valw) |= csmask; (*valw) |= csmask;
} }
bus_w (addr, (*valw)); //FIXME: for ctb slow adcs, might need to set it to low again bus_w(
addr,
(*valw)); // FIXME: for ctb slow adcs, might need to set it to low again
LOG(logDEBUG2, ("stop point. valw:0x%08x\n", *valw)); LOG(logDEBUG2, ("stop point. valw:0x%08x\n", *valw));
} }
void sendDataToSPI (uint32_t* valw, uint32_t addr, uint32_t val, int numbitstosend, uint32_t clkmask, uint32_t digoutmask, int digofset) { void sendDataToSPI(uint32_t *valw, uint32_t addr, uint32_t val,
LOG(logDEBUG2, ("SPI send data. valw:0x%08x addr:0x%x val:0x%x, numbitstosend:%d, clkmask:0x%x digmask:0x%x digofst:%d\n", int numbitstosend, uint32_t clkmask, uint32_t digoutmask,
*valw, addr, val, numbitstosend, clkmask, digoutmask, digofset)); int digofset) {
LOG(logDEBUG2,
("SPI send data. valw:0x%08x addr:0x%x val:0x%x, numbitstosend:%d, "
"clkmask:0x%x digmask:0x%x digofst:%d\n",
*valw, addr, val, numbitstosend, clkmask, digoutmask, digofset));
int i = 0; int i = 0;
for (i = 0; i < numbitstosend; ++i) { for (i = 0; i < numbitstosend; ++i) {
// clk down // clk down
(*valw) &= ~clkmask; (*valw) &= ~clkmask;
bus_w (addr, (*valw)); bus_w(addr, (*valw));
LOG(logDEBUG2, ("clk down. valw:0x%08x\n", *valw)); LOG(logDEBUG2, ("clk down. valw:0x%08x\n", *valw));
// write data (i) // write data (i)
(*valw) = (((*valw) & ~digoutmask) + // unset bit (*valw) = (((*valw) & ~digoutmask) + // unset bit
(((val >> (numbitstosend - 1 - i)) & 0x1) << digofset)); // each bit from val starting from msb (((val >> (numbitstosend - 1 - i)) & 0x1)
bus_w (addr, (*valw)); << digofset)); // each bit from val starting from msb
bus_w(addr, (*valw));
LOG(logDEBUG2, ("write data %d. valw:0x%08x\n", i, *valw)); LOG(logDEBUG2, ("write data %d. valw:0x%08x\n", i, *valw));
// clk up // clk up
(*valw) |= clkmask ; (*valw) |= clkmask;
bus_w (addr, (*valw)); bus_w(addr, (*valw));
LOG(logDEBUG2, ("clk up. valw:0x%08x\n", *valw)); LOG(logDEBUG2, ("clk up. valw:0x%08x\n", *valw));
} }
} }
uint32_t receiveDataFromSPI (uint32_t* valw, uint32_t addr, int numbitstoreceive, uint32_t clkmask, uint32_t readaddr) { uint32_t receiveDataFromSPI(uint32_t *valw, uint32_t addr, int numbitstoreceive,
LOG(logDEBUG2, ("SPI send data. valw:0x%08x addr:0x%x numbitstoreceive:%d, clkmask:0x%x readaddr:0x%x \n", uint32_t clkmask, uint32_t readaddr) {
*valw, addr, numbitstoreceive, clkmask, readaddr)); LOG(logDEBUG2, ("SPI send data. valw:0x%08x addr:0x%x numbitstoreceive:%d, "
"clkmask:0x%x readaddr:0x%x \n",
*valw, addr, numbitstoreceive, clkmask, readaddr));
uint32_t retval = 0; uint32_t retval = 0;
int i = 0; int i = 0;
@ -101,7 +118,7 @@ uint32_t receiveDataFromSPI (uint32_t* valw, uint32_t addr, int numbitstoreceive
// clk down // clk down
(*valw) &= ~clkmask; (*valw) &= ~clkmask;
bus_w (addr, (*valw)); bus_w(addr, (*valw));
LOG(logDEBUG2, ("clk down. valw:0x%08x\n", *valw)); LOG(logDEBUG2, ("clk down. valw:0x%08x\n", *valw));
// read data (i) // read data (i)
@ -111,8 +128,8 @@ uint32_t receiveDataFromSPI (uint32_t* valw, uint32_t addr, int numbitstoreceive
usleep(20); usleep(20);
// clk up // clk up
(*valw) |= clkmask ; (*valw) |= clkmask;
bus_w (addr, (*valw)); bus_w(addr, (*valw));
LOG(logDEBUG2, ("clk up. valw:0x%08x\n", *valw)); LOG(logDEBUG2, ("clk up. valw:0x%08x\n", *valw));
usleep(20); usleep(20);
@ -121,7 +138,9 @@ uint32_t receiveDataFromSPI (uint32_t* valw, uint32_t addr, int numbitstoreceive
return retval; return retval;
} }
void serializeToSPI(uint32_t addr, uint32_t val, uint32_t csmask, int numbitstosend, uint32_t clkmask, uint32_t digoutmask, int digofset, int convBit) { void serializeToSPI(uint32_t addr, uint32_t val, uint32_t csmask,
int numbitstosend, uint32_t clkmask, uint32_t digoutmask,
int digofset, int convBit) {
if (numbitstosend == 16) { if (numbitstosend == 16) {
LOG(logDEBUG2, ("Writing to SPI Register: 0x%04x\n", val)); LOG(logDEBUG2, ("Writing to SPI Register: 0x%04x\n", val));
} else { } else {
@ -129,23 +148,28 @@ void serializeToSPI(uint32_t addr, uint32_t val, uint32_t csmask, int numbitstos
} }
uint32_t valw; uint32_t valw;
SPIChipSelect (&valw, addr, csmask, clkmask, digoutmask, convBit); SPIChipSelect(&valw, addr, csmask, clkmask, digoutmask, convBit);
sendDataToSPI(&valw, addr, val, numbitstosend, clkmask, digoutmask, digofset); sendDataToSPI(&valw, addr, val, numbitstosend, clkmask, digoutmask,
digofset);
SPIChipDeselect(&valw, addr, csmask, clkmask, digoutmask, convBit); SPIChipDeselect(&valw, addr, csmask, clkmask, digoutmask, convBit);
} }
uint32_t serializeFromSPI(uint32_t addr, uint32_t csmask, int numbitstoreceive, uint32_t clkmask, uint32_t digoutmask, uint32_t readaddr, int convBit) { uint32_t serializeFromSPI(uint32_t addr, uint32_t csmask, int numbitstoreceive,
uint32_t clkmask, uint32_t digoutmask,
uint32_t readaddr, int convBit) {
uint32_t valw; uint32_t valw;
SPIChipSelect (&valw, addr, csmask, clkmask, digoutmask, convBit); SPIChipSelect(&valw, addr, csmask, clkmask, digoutmask, convBit);
uint32_t retval = receiveDataFromSPI(&valw, addr, numbitstoreceive, clkmask, readaddr); uint32_t retval =
receiveDataFromSPI(&valw, addr, numbitstoreceive, clkmask, readaddr);
// not needed for conv bit (not a chip select) // not needed for conv bit (not a chip select)
//SPIChipDeselect(&valw, addr, csmask, clkmask, digoutmask, convBit); // moving this before bringin up earlier changes temp of slow adc // SPIChipDeselect(&valw, addr, csmask, clkmask, digoutmask, convBit); //
// moving this before bringin up earlier changes temp of slow adc
if (numbitstoreceive == 16) { if (numbitstoreceive == 16) {
LOG(logDEBUG2, ("Read From SPI Register: 0x%04x\n", retval)); LOG(logDEBUG2, ("Read From SPI Register: 0x%04x\n", retval));

1006
slsDetectorServers/slsDetectorServer/src/communication_funcs.c Executable file → Normal file
View File

File diff suppressed because it is too large Load Diff

179
slsDetectorServers/slsDetectorServer/src/communication_funcs_UDP.c Executable file → Normal file
View File

@ -2,111 +2,122 @@
#include "clogger.h" #include "clogger.h"
#include "sls_detector_defs.h" #include "sls_detector_defs.h"
#include <stdio.h>
#include <stdlib.h>
#include <sys/types.h>
#include <sys/socket.h>
#include <arpa/inet.h> #include <arpa/inet.h>
#include <netinet/in.h>
#include <string.h>
#include <unistd.h>
#include <errno.h> #include <errno.h>
#include <netdb.h> #include <netdb.h>
#include <netinet/in.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/socket.h>
#include <sys/types.h>
#include <unistd.h>
int udpSockfd[2] = {-1, -1}; int udpSockfd[2] = {-1, -1};
struct addrinfo* udpServerAddrInfo[2] = {0, 0}; struct addrinfo *udpServerAddrInfo[2] = {0, 0};
unsigned short int udpDestinationPort[2] = {0, 0}; unsigned short int udpDestinationPort[2] = {0, 0};
char udpDestinationIp[2][INET_ADDRSTRLEN] = {"", ""}; char udpDestinationIp[2][INET_ADDRSTRLEN] = {"", ""};
//DEFAULT_TX_UDP_PORT;// src port // DEFAULT_TX_UDP_PORT;// src port
int getUdPSocketDescriptor(int index) { int getUdPSocketDescriptor(int index) { return udpSockfd[index]; }
return udpSockfd[index];
}
int setUDPDestinationDetails(int index, const char* ip, unsigned short int port) { int setUDPDestinationDetails(int index, const char *ip,
udpDestinationPort[index] = port; unsigned short int port) {
size_t len = strlen(ip); udpDestinationPort[index] = port;
memset(udpDestinationIp[index], 0, INET_ADDRSTRLEN); size_t len = strlen(ip);
strncpy(udpDestinationIp[index], ip, len > INET_ADDRSTRLEN ? INET_ADDRSTRLEN : len ); memset(udpDestinationIp[index], 0, INET_ADDRSTRLEN);
strncpy(udpDestinationIp[index], ip,
len > INET_ADDRSTRLEN ? INET_ADDRSTRLEN : len);
if (udpServerAddrInfo[index]) { if (udpServerAddrInfo[index]) {
freeaddrinfo(udpServerAddrInfo[index]); freeaddrinfo(udpServerAddrInfo[index]);
udpServerAddrInfo[index] = 0; udpServerAddrInfo[index] = 0;
} }
// convert ip to internet address // convert ip to internet address
struct addrinfo hints; struct addrinfo hints;
memset(&hints, 0, sizeof(hints)); memset(&hints, 0, sizeof(hints));
hints.ai_family = AF_INET; hints.ai_family = AF_INET;
hints.ai_socktype = SOCK_DGRAM; hints.ai_socktype = SOCK_DGRAM;
hints.ai_flags = 0; hints.ai_flags = 0;
hints.ai_protocol = 0; hints.ai_protocol = 0;
char sport[100]; char sport[100];
memset(sport, 0, 100); memset(sport, 0, 100);
sprintf(sport, "%d", udpDestinationPort[index]); sprintf(sport, "%d", udpDestinationPort[index]);
int err = getaddrinfo(udpDestinationIp[index], sport, &hints, &udpServerAddrInfo[index]); int err = getaddrinfo(udpDestinationIp[index], sport, &hints,
if (err != 0) { &udpServerAddrInfo[index]);
LOG(logERROR, ("Failed to resolve remote socket address %s at port %d. " if (err != 0) {
"(Error code:%d, %s)\n", udpDestinationIp[index], udpDestinationPort[index], err, gai_strerror(err))); LOG(logERROR, ("Failed to resolve remote socket address %s at port %d. "
return FAIL; "(Error code:%d, %s)\n",
} udpDestinationIp[index], udpDestinationPort[index], err,
if (udpServerAddrInfo[index] == NULL) { gai_strerror(err)));
LOG(logERROR, ("Failed to resolve remote socket address %s at port %d " return FAIL;
"(getaddrinfo returned NULL)\n", udpDestinationIp[index], udpDestinationPort[index])); }
udpServerAddrInfo[index] = 0; if (udpServerAddrInfo[index] == NULL) {
return FAIL; LOG(logERROR, ("Failed to resolve remote socket address %s at port %d "
} "(getaddrinfo returned NULL)\n",
udpDestinationIp[index], udpDestinationPort[index]));
udpServerAddrInfo[index] = 0;
return FAIL;
}
return OK; return OK;
} }
int createUDPSocket(int index) { int createUDPSocket(int index) {
LOG(logDEBUG2, ("Creating UDP Socket %d\n", index)); LOG(logDEBUG2, ("Creating UDP Socket %d\n", index));
if (!strlen(udpDestinationIp[index])) { if (!strlen(udpDestinationIp[index])) {
LOG(logERROR, ("No destination UDP ip specified.\n")); LOG(logERROR, ("No destination UDP ip specified.\n"));
return FAIL; return FAIL;
} }
if (udpSockfd[index] != -1) { if (udpSockfd[index] != -1) {
LOG(logERROR, ("Strange that Udp socket was still open. Closing it to create a new one\n")); LOG(logERROR, ("Strange that Udp socket was still open. Closing it to "
close(udpSockfd[index]); "create a new one\n"));
udpSockfd[index] = -1; close(udpSockfd[index]);
} udpSockfd[index] = -1;
}
// Creating socket file descriptor // Creating socket file descriptor
udpSockfd[index] = socket(udpServerAddrInfo[index]->ai_family, udpServerAddrInfo[index]->ai_socktype, udpServerAddrInfo[index]->ai_protocol); udpSockfd[index] = socket(udpServerAddrInfo[index]->ai_family,
if (udpSockfd[index] == -1 ) { udpServerAddrInfo[index]->ai_socktype,
LOG(logERROR, ("UDP socket at port %d failed. (Error code:%d, %s)\n", udpServerAddrInfo[index]->ai_protocol);
udpDestinationPort[index], errno, gai_strerror(errno))); if (udpSockfd[index] == -1) {
return FAIL; LOG(logERROR, ("UDP socket at port %d failed. (Error code:%d, %s)\n",
} udpDestinationPort[index], errno, gai_strerror(errno)));
LOG(logINFO, ("Udp client socket created for server (port %d, ip:%s)\n", return FAIL;
udpDestinationPort[index], udpDestinationIp[index])); }
LOG(logINFO, ("Udp client socket created for server (port %d, ip:%s)\n",
udpDestinationPort[index], udpDestinationIp[index]));
// Using connect expects that the receiver (udp server) exists to listen to these packets // Using connect expects that the receiver (udp server) exists to listen to
// connecting allows to use "send/write" instead of "sendto", avoiding checking for server address for each packet // these packets connecting allows to use "send/write" instead of "sendto",
// using write without a connect will end in segv // avoiding checking for server address for each packet using write without
LOG(logINFO, ("Udp client socket connected\n", // a connect will end in segv
udpDestinationPort[index], udpDestinationIp[index])); LOG(logINFO, ("Udp client socket connected\n", udpDestinationPort[index],
return OK; udpDestinationIp[index]));
return OK;
} }
int sendUDPPacket(int index, const char* buf, int length) { int sendUDPPacket(int index, const char *buf, int length) {
int n = sendto(udpSockfd[index], buf, length, 0, udpServerAddrInfo[index]->ai_addr, udpServerAddrInfo[index]->ai_addrlen); int n = sendto(udpSockfd[index], buf, length, 0,
// udp sends atomically, no need to handle partial data udpServerAddrInfo[index]->ai_addr,
if (n == -1) { udpServerAddrInfo[index]->ai_addrlen);
LOG(logERROR, ("Could not send udp packet for socket %d. (Error code:%d, %s)\n", // udp sends atomically, no need to handle partial data
index, n, errno, gai_strerror(errno))); if (n == -1) {
} else { LOG(logERROR,
LOG(logDEBUG2, ("%d bytes sent\n", n)); ("Could not send udp packet for socket %d. (Error code:%d, %s)\n",
} index, n, errno, gai_strerror(errno)));
return n; } else {
LOG(logDEBUG2, ("%d bytes sent\n", n));
}
return n;
} }
void closeUDPSocket(int index) { void closeUDPSocket(int index) {
if (udpSockfd[index] != -1) { if (udpSockfd[index] != -1) {
LOG(logINFO, ("Udp client socket closed\n")); LOG(logINFO, ("Udp client socket closed\n"));
close(udpSockfd[index]); close(udpSockfd[index]);
udpSockfd[index] = -1; udpSockfd[index] = -1;
} }
} }

83
slsDetectorServers/slsDetectorServer/src/communication_virtual.c Executable file → Normal file
View File

@ -3,118 +3,119 @@
#include "clogger.h" #include "clogger.h"
#include <string.h> #include <string.h>
#include <unistd.h> // usleep #include <unistd.h> // usleep
#define FILE_STATUS "/tmp/sls_virtual_server_status_" #define FILE_STATUS "/tmp/sls_virtual_server_status_"
#define FILE_STOP "/tmp/sls_virtual_server_stop_" #define FILE_STOP "/tmp/sls_virtual_server_stop_"
#define FD_STATUS 0 #define FD_STATUS 0
#define FD_STOP 1 #define FD_STOP 1
#define FILE_NAME_LENGTH 1000 #define FILE_NAME_LENGTH 1000
FILE* fd[2] = {NULL, NULL}; FILE *fd[2] = {NULL, NULL};
char fnameStatus[FILE_NAME_LENGTH]; char fnameStatus[FILE_NAME_LENGTH];
char fnameStop[FILE_NAME_LENGTH]; char fnameStop[FILE_NAME_LENGTH];
int portNumber = 0; int portNumber = 0;
int ComVirtual_createFiles(const int port) { int ComVirtual_createFiles(const int port) {
portNumber = port; portNumber = port;
// control server writign status file // control server writign status file
memset(fnameStatus, 0, FILE_NAME_LENGTH); memset(fnameStatus, 0, FILE_NAME_LENGTH);
sprintf(fnameStatus, "%s%d", FILE_STATUS, port); sprintf(fnameStatus, "%s%d", FILE_STATUS, port);
FILE* fd = NULL; FILE *fd = NULL;
if (NULL == (fd = fopen(fnameStatus, "w"))) { if (NULL == (fd = fopen(fnameStatus, "w"))) {
LOG(logERROR, ("Could not open the file %s for virtual communication\n", LOG(logERROR, ("Could not open the file %s for virtual communication\n",
fnameStatus)); fnameStatus));
return 0; return 0;
} }
fclose(fd); fclose(fd);
LOG(logINFOBLUE, ("Created status file %s\n", fnameStatus)); LOG(logINFOBLUE, ("Created status file %s\n", fnameStatus));
// stop server writing stop file // stop server writing stop file
memset(fnameStop, 0, FILE_NAME_LENGTH); memset(fnameStop, 0, FILE_NAME_LENGTH);
sprintf(fnameStop, "%s%d", FILE_STOP, port); sprintf(fnameStop, "%s%d", FILE_STOP, port);
if (NULL == (fd = fopen(fnameStop, "w"))) { if (NULL == (fd = fopen(fnameStop, "w"))) {
LOG(logERROR, ("Could not open the file %s for virtual communication\n", LOG(logERROR, ("Could not open the file %s for virtual communication\n",
fnameStop)); fnameStop));
return 0; return 0;
} }
fclose(fd); fclose(fd);
LOG(logINFOBLUE, ("Created stop file %s\n", fnameStop)); LOG(logINFOBLUE, ("Created stop file %s\n", fnameStop));
return 1; return 1;
} }
void ComVirtual_setFileNames(const int port) { void ComVirtual_setFileNames(const int port) {
portNumber = port; portNumber = port;
memset(fnameStatus, 0, FILE_NAME_LENGTH); memset(fnameStatus, 0, FILE_NAME_LENGTH);
memset(fnameStop, 0, FILE_NAME_LENGTH); memset(fnameStop, 0, FILE_NAME_LENGTH);
sprintf(fnameStatus, "%s%d", FILE_STATUS, port); sprintf(fnameStatus, "%s%d", FILE_STATUS, port);
sprintf(fnameStop, "%s%d", FILE_STOP, port); sprintf(fnameStop, "%s%d", FILE_STOP, port);
} }
void ComVirtual_setStatus(int value) { void ComVirtual_setStatus(int value) {
while (!ComVirtual_writeToFile(value, fnameStatus, "Control")) { while (!ComVirtual_writeToFile(value, fnameStatus, "Control")) {
usleep(100); usleep(100);
} }
} }
int ComVirtual_getStatus() { int ComVirtual_getStatus() {
int retval = 0; int retval = 0;
while (!ComVirtual_readFromFile(&retval, fnameStatus, "Stop")) { while (!ComVirtual_readFromFile(&retval, fnameStatus, "Stop")) {
usleep(100); usleep(100);
} }
return retval; return retval;
} }
void ComVirtual_setStop(int value) { void ComVirtual_setStop(int value) {
while (!ComVirtual_writeToFile(value, fnameStop, "Stop")) { while (!ComVirtual_writeToFile(value, fnameStop, "Stop")) {
usleep(100); usleep(100);
} }
} }
int ComVirtual_getStop() { int ComVirtual_getStop() {
int retval = 0; int retval = 0;
while (!ComVirtual_readFromFile(&retval, fnameStop, "Control")) { while (!ComVirtual_readFromFile(&retval, fnameStop, "Control")) {
usleep(100); usleep(100);
} }
return retval; return retval;
} }
int ComVirtual_writeToFile(int value, const char* fname, const char* serverName) { int ComVirtual_writeToFile(int value, const char *fname,
FILE* fd = NULL; const char *serverName) {
FILE *fd = NULL;
if (NULL == (fd = fopen(fname, "w"))) { if (NULL == (fd = fopen(fname, "w"))) {
LOG(logERROR, ("Vritual %s Server [%d] could not open " LOG(logERROR, ("Vritual %s Server [%d] could not open "
"the file %s for writing\n", "the file %s for writing\n",
serverName, portNumber, fname)); serverName, portNumber, fname));
return 0; return 0;
} }
while (fwrite(&value, sizeof(value), 1, fd) < 1) { while (fwrite(&value, sizeof(value), 1, fd) < 1) {
LOG(logERROR, ("Vritual %s Server [%d] could not write " LOG(logERROR, ("Vritual %s Server [%d] could not write "
"to file %s\n", "to file %s\n",
serverName, portNumber, fname)); serverName, portNumber, fname));
return 0; return 0;
} }
fclose(fd); fclose(fd);
return 1; return 1;
} }
int ComVirtual_readFromFile(int* value, const char* fname, const char* serverName) { int ComVirtual_readFromFile(int *value, const char *fname,
FILE* fd = NULL; const char *serverName) {
FILE *fd = NULL;
if (NULL == (fd = fopen(fname, "r"))) { if (NULL == (fd = fopen(fname, "r"))) {
LOG(logERROR, ("Vritual %s Server [%d] could not open " LOG(logERROR, ("Vritual %s Server [%d] could not open "
"the file %s for reading\n", "the file %s for reading\n",
serverName, portNumber, fname)); serverName, portNumber, fname));
return 0; return 0;
} }
while (fread(value, sizeof(int), 1, fd) < 1) { while (fread(value, sizeof(int), 1, fd) < 1) {
LOG(logERROR, ("Vritual %s Server [%d] could not read " LOG(logERROR, ("Vritual %s Server [%d] could not read "
"from file %s\n", "from file %s\n",
serverName, portNumber, fname)); serverName, portNumber, fname));
return 0; return 0;
} }
fclose(fd); fclose(fd);
return 1; return 1;
} }
#endif #endif

177
slsDetectorServers/slsDetectorServer/src/nios.c Executable file → Normal file
View File

@ -1,131 +1,130 @@
#include "nios.h" #include "nios.h"
#include "RegisterDefs.h" #include "RegisterDefs.h"
#include "sls_detector_defs.h"
#include "ansi.h" #include "ansi.h"
#include "clogger.h" #include "clogger.h"
#include "sls_detector_defs.h"
#include <fcntl.h> // open #include <fcntl.h> // open
#include <sys/mman.h> // mmap #include <sys/mman.h> // mmap
/* global variables */ /* global variables */
u_int32_t* csp0base = 0; u_int32_t *csp0base = 0;
#define CSP0 0x18060000 #define CSP0 0x18060000
#define MEM_SIZE 0x100000 //TODO (1804 0000 - 1804 07FF = 800 * 4 = 2000), (1806 0000 = 10000* 4 = 40000) #define MEM_SIZE \
0x100000 // TODO (1804 0000 - 1804 07FF = 800 * 4 = 2000), (1806 0000 =
// 10000* 4 = 40000)
u_int32_t* csp1base = 0; u_int32_t *csp1base = 0;
#define CSP1 0x18040000 #define CSP1 0x18040000
void bus_w_csp1(u_int32_t offset, u_int32_t data) { void bus_w_csp1(u_int32_t offset, u_int32_t data) {
volatile u_int32_t *ptr1; volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(csp1base + offset/(sizeof(u_int32_t))); ptr1 = (u_int32_t *)(csp1base + offset / (sizeof(u_int32_t)));
*ptr1=data; *ptr1 = data;
} }
u_int32_t bus_r_csp1(u_int32_t offset) { u_int32_t bus_r_csp1(u_int32_t offset) {
volatile u_int32_t *ptr1; volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(csp1base + offset/(sizeof(u_int32_t))); ptr1 = (u_int32_t *)(csp1base + offset / (sizeof(u_int32_t)));
return *ptr1; return *ptr1;
} }
void bus_w(u_int32_t offset, u_int32_t data) { void bus_w(u_int32_t offset, u_int32_t data) {
volatile u_int32_t *ptr1; volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(csp0base + offset/(sizeof(u_int32_t))); ptr1 = (u_int32_t *)(csp0base + offset / (sizeof(u_int32_t)));
*ptr1=data; *ptr1 = data;
} }
u_int32_t bus_r(u_int32_t offset) { u_int32_t bus_r(u_int32_t offset) {
volatile u_int32_t *ptr1; volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(csp0base + offset/(sizeof(u_int32_t))); ptr1 = (u_int32_t *)(csp0base + offset / (sizeof(u_int32_t)));
return *ptr1; return *ptr1;
} }
int64_t get64BitReg(int aLSB, int aMSB){ int64_t get64BitReg(int aLSB, int aMSB) {
int64_t v64; int64_t v64;
u_int32_t vLSB,vMSB; u_int32_t vLSB, vMSB;
vLSB=bus_r(aLSB); vLSB = bus_r(aLSB);
vMSB=bus_r(aMSB); vMSB = bus_r(aMSB);
v64=vMSB; v64 = vMSB;
v64=(v64<<32) | vLSB; v64 = (v64 << 32) | vLSB;
LOG(logDEBUG5, (" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, (long long unsigned int)v64)); LOG(logDEBUG5, (" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB,
return v64; (long long unsigned int)v64));
return v64;
} }
int64_t set64BitReg(int64_t value, int aLSB, int aMSB){ int64_t set64BitReg(int64_t value, int aLSB, int aMSB) {
int64_t v64; int64_t v64;
u_int32_t vLSB,vMSB; u_int32_t vLSB, vMSB;
if (value!=-1) { if (value != -1) {
vLSB=value&(0xffffffff); vLSB = value & (0xffffffff);
bus_w(aLSB,vLSB); bus_w(aLSB, vLSB);
v64=value>> 32; v64 = value >> 32;
vMSB=v64&(0xffffffff); vMSB = v64 & (0xffffffff);
bus_w(aMSB,vMSB); bus_w(aMSB, vMSB);
} }
return get64BitReg(aLSB, aMSB); return get64BitReg(aLSB, aMSB);
} }
uint64_t getU64BitReg(int aLSB, int aMSB){ uint64_t getU64BitReg(int aLSB, int aMSB) {
uint64_t retval = bus_r(aMSB); uint64_t retval = bus_r(aMSB);
retval = (retval << 32) | bus_r(aLSB); retval = (retval << 32) | bus_r(aLSB);
return retval; return retval;
} }
void setU64BitReg(uint64_t value, int aLSB, int aMSB){ void setU64BitReg(uint64_t value, int aLSB, int aMSB) {
bus_w(aLSB, value & (0xffffffff)); bus_w(aLSB, value & (0xffffffff));
bus_w(aMSB, (value >> 32) & (0xffffffff)); bus_w(aMSB, (value >> 32) & (0xffffffff));
} }
u_int32_t readRegister(u_int32_t offset) { u_int32_t readRegister(u_int32_t offset) { return bus_r(offset); }
return bus_r(offset);
}
u_int32_t writeRegister(u_int32_t offset, u_int32_t data) { u_int32_t writeRegister(u_int32_t offset, u_int32_t data) {
bus_w(offset, data); bus_w(offset, data);
return readRegister(offset); return readRegister(offset);
} }
int mapCSP0(void) { int mapCSP0(void) {
u_int32_t csps[2] = {CSP0, CSP1}; u_int32_t csps[2] = {CSP0, CSP1};
u_int32_t** cspbases[2] = {&csp0base, &csp1base}; u_int32_t **cspbases[2] = {&csp0base, &csp1base};
char names[2][10]={"csp0base","csp1base"}; char names[2][10] = {"csp0base", "csp1base"};
int i = 0; int i = 0;
for (i = 0; i < 2; ++i) { for (i = 0; i < 2; ++i) {
// if not mapped // if not mapped
if (*cspbases[i] == 0) { if (*cspbases[i] == 0) {
LOG(logINFO, ("Mapping memory for %s\n", names[i])); LOG(logINFO, ("Mapping memory for %s\n", names[i]));
#ifdef VIRTUAL #ifdef VIRTUAL
*cspbases[i] = malloc(MEM_SIZE); *cspbases[i] = malloc(MEM_SIZE);
if (*cspbases[i] == NULL) { if (*cspbases[i] == NULL) {
LOG(logERROR, ("Could not allocate virtual memory for %s.\n", names[i])); LOG(logERROR,
return FAIL; ("Could not allocate virtual memory for %s.\n", names[i]));
} return FAIL;
LOG(logINFO, ("memory allocated for %s\n", names[i])); }
LOG(logINFO, ("memory allocated for %s\n", names[i]));
#else #else
int fd = open("/dev/mem", O_RDWR | O_SYNC, 0); int fd = open("/dev/mem", O_RDWR | O_SYNC, 0);
if (fd == -1) { if (fd == -1) {
LOG(logERROR, ("Can't find /dev/mem for %s\n", names[i])); LOG(logERROR, ("Can't find /dev/mem for %s\n", names[i]));
return FAIL; return FAIL;
} }
LOG(logDEBUG1, ("/dev/mem opened for %s, (CSP:0x%x)\n", names[i], csps[i])); LOG(logDEBUG1,
*cspbases[i] = (u_int32_t*)mmap(0, MEM_SIZE, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, fd, csps[i]); ("/dev/mem opened for %s, (CSP:0x%x)\n", names[i], csps[i]));
if (*cspbases[i] == MAP_FAILED) { *cspbases[i] =
LOG(logERROR, ("Can't map memmory area for %s\n", names[i])); (u_int32_t *)mmap(0, MEM_SIZE, PROT_READ | PROT_WRITE,
return FAIL; MAP_FILE | MAP_SHARED, fd, csps[i]);
} if (*cspbases[i] == MAP_FAILED) {
LOG(logERROR, ("Can't map memmory area for %s\n", names[i]));
return FAIL;
}
#endif #endif
LOG(logINFO, ("%s mapped from %p to %p,(CSP:0x%x) \n", LOG(logINFO, ("%s mapped from %p to %p,(CSP:0x%x) \n", names[i],
names[i], *cspbases[i], *cspbases[i]+MEM_SIZE, csps[i])); *cspbases[i], *cspbases[i] + MEM_SIZE, csps[i]));
//LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); // LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG)));
} else } else
LOG(logINFO, ("Memory %s already mapped before\n", names[i])); LOG(logINFO, ("Memory %s already mapped before\n", names[i]));
} }
return OK; return OK;
} }
u_int32_t *Nios_getBaseAddress() { return csp0base; }
u_int32_t* Nios_getBaseAddress() {
return csp0base;
}

207
slsDetectorServers/slsDetectorServer/src/programFpgaBlackfin.c Executable file → Normal file
View File

@ -3,139 +3,142 @@
#include "clogger.h" #include "clogger.h"
#include "slsDetectorServer_defs.h" #include "slsDetectorServer_defs.h"
#include <unistd.h> // usleep
#include <string.h> #include <string.h>
#include <unistd.h> // usleep
/* global variables */ /* global variables */
#define MTDSIZE 10 #define MTDSIZE 10
int gpioDefined = 0; int gpioDefined = 0;
char mtdvalue[MTDSIZE] = {0}; char mtdvalue[MTDSIZE] = {0};
void defineGPIOpins(){ void defineGPIOpins() {
if (!gpioDefined) { if (!gpioDefined) {
//define the gpio pins // define the gpio pins
system("echo 7 > /sys/class/gpio/export"); system("echo 7 > /sys/class/gpio/export");
system("echo 9 > /sys/class/gpio/export"); system("echo 9 > /sys/class/gpio/export");
//define their direction // define their direction
system("echo in > /sys/class/gpio/gpio7/direction"); system("echo in > /sys/class/gpio/gpio7/direction");
system("echo out > /sys/class/gpio/gpio9/direction"); system("echo out > /sys/class/gpio/gpio9/direction");
LOG(logINFO, ("gpio pins defined\n")); LOG(logINFO, ("gpio pins defined\n"));
gpioDefined = 1; gpioDefined = 1;
}else LOG(logDEBUG1, ("gpio pins already defined earlier\n")); } else
LOG(logDEBUG1, ("gpio pins already defined earlier\n"));
} }
void FPGAdontTouchFlash(){ void FPGAdontTouchFlash() {
//tell FPGA to not touch flash // tell FPGA to not touch flash
system("echo 0 > /sys/class/gpio/gpio9/value"); system("echo 0 > /sys/class/gpio/gpio9/value");
//usleep(100*1000); // usleep(100*1000);
} }
void FPGATouchFlash(){ void FPGATouchFlash() {
//tell FPGA to touch flash to program itself // tell FPGA to touch flash to program itself
system("echo 1 > /sys/class/gpio/gpio9/value"); system("echo 1 > /sys/class/gpio/gpio9/value");
} }
void resetFPGA(){ void resetFPGA() {
LOG(logINFOBLUE, ("Reseting FPGA\n")); LOG(logINFOBLUE, ("Reseting FPGA\n"));
FPGAdontTouchFlash(); FPGAdontTouchFlash();
FPGATouchFlash(); FPGATouchFlash();
usleep(CTRL_SRVR_INIT_TIME_US); usleep(CTRL_SRVR_INIT_TIME_US);
} }
void eraseFlash(){ void eraseFlash() {
LOG(logDEBUG1, ("Erasing Flash\n")); LOG(logDEBUG1, ("Erasing Flash\n"));
char command[255]; char command[255];
memset(command, 0, 255); memset(command, 0, 255);
sprintf(command,"flash_eraseall %s",mtdvalue); sprintf(command, "flash_eraseall %s", mtdvalue);
system(command); system(command);
LOG(logINFO, ("Flash erased\n")); LOG(logINFO, ("Flash erased\n"));
} }
int startWritingFPGAprogram(FILE** filefp){ int startWritingFPGAprogram(FILE **filefp) {
LOG(logDEBUG1, ("Start Writing of FPGA program\n")); LOG(logDEBUG1, ("Start Writing of FPGA program\n"));
//getting the drive // getting the drive
//root:/> cat /proc/mtd // root:/> cat /proc/mtd
//dev: size erasesize name // dev: size erasesize name
//mtd0: 00040000 00020000 "bootloader(nor)" // mtd0: 00040000 00020000 "bootloader(nor)"
//mtd1: 00100000 00020000 "linux kernel(nor)" // mtd1: 00100000 00020000 "linux kernel(nor)"
//mtd2: 002c0000 00020000 "file system(nor)" // mtd2: 002c0000 00020000 "file system(nor)"
//mtd3: 01000000 00010000 "bitfile(spi)" // mtd3: 01000000 00010000 "bitfile(spi)"
char output[255]; char output[255];
memset(output, 0, 255); memset(output, 0, 255);
FILE* fp = popen("awk \'$4== \"\\\"bitfile(spi)\\\"\" {print $1}\' /proc/mtd", "r"); FILE *fp = popen(
if (fp == NULL) { "awk \'$4== \"\\\"bitfile(spi)\\\"\" {print $1}\' /proc/mtd", "r");
LOG(logERROR, ("popen returned NULL. Need that to get mtd drive.\n")); if (fp == NULL) {
return 1; LOG(logERROR, ("popen returned NULL. Need that to get mtd drive.\n"));
} return 1;
if (fgets(output, sizeof(output), fp) == NULL) { }
LOG(logERROR, ("fgets returned NULL. Need that to get mtd drive.\n")); if (fgets(output, sizeof(output), fp) == NULL) {
return 1; LOG(logERROR, ("fgets returned NULL. Need that to get mtd drive.\n"));
} return 1;
pclose(fp); }
memset(mtdvalue, 0, MTDSIZE); pclose(fp);
strcpy(mtdvalue,"/dev/"); memset(mtdvalue, 0, MTDSIZE);
char* pch = strtok(output,":"); strcpy(mtdvalue, "/dev/");
if(pch == NULL){ char *pch = strtok(output, ":");
LOG(logERROR, ("Could not get mtd value\n")); if (pch == NULL) {
return 1; LOG(logERROR, ("Could not get mtd value\n"));
} return 1;
strcat(mtdvalue,pch); }
LOG(logINFO, ("Flash drive found: %s\n", mtdvalue)); strcat(mtdvalue, pch);
LOG(logINFO, ("Flash drive found: %s\n", mtdvalue));
FPGAdontTouchFlash(); FPGAdontTouchFlash();
//writing the program to flash // writing the program to flash
*filefp = fopen(mtdvalue, "w"); *filefp = fopen(mtdvalue, "w");
if(*filefp == NULL){ if (*filefp == NULL) {
LOG(logERROR, ("Unable to open %s in write mode\n", mtdvalue)); LOG(logERROR, ("Unable to open %s in write mode\n", mtdvalue));
return 1; return 1;
} }
LOG(logINFO, ("Flash ready for writing\n")); LOG(logINFO, ("Flash ready for writing\n"));
return 0; return 0;
} }
void stopWritingFPGAprogram(FILE* filefp){ void stopWritingFPGAprogram(FILE *filefp) {
LOG(logDEBUG1, ("Stopping of writing FPGA program\n")); LOG(logDEBUG1, ("Stopping of writing FPGA program\n"));
int wait = 0; int wait = 0;
if(filefp!= NULL){ if (filefp != NULL) {
fclose(filefp); fclose(filefp);
wait = 1; wait = 1;
} }
//touch and program // touch and program
FPGATouchFlash(); FPGATouchFlash();
if(wait){ if (wait) {
LOG(logDEBUG1, ("Waiting for FPGA to program from flash\n")); LOG(logDEBUG1, ("Waiting for FPGA to program from flash\n"));
//waiting for success or done // waiting for success or done
char output[255]; char output[255];
int res=0; int res = 0;
while(res == 0){ while (res == 0) {
FILE* sysFile = popen("cat /sys/class/gpio/gpio7/value", "r"); FILE *sysFile = popen("cat /sys/class/gpio/gpio7/value", "r");
fgets(output, sizeof(output), sysFile); fgets(output, sizeof(output), sysFile);
pclose(sysFile); pclose(sysFile);
sscanf(output,"%d",&res); sscanf(output, "%d", &res);
LOG(logDEBUG1, ("gpi07 returned %d\n", res)); LOG(logDEBUG1, ("gpi07 returned %d\n", res));
} }
} }
LOG(logINFO, ("FPGA has picked up the program from flash\n")); LOG(logINFO, ("FPGA has picked up the program from flash\n"));
} }
int writeFPGAProgram(char* fpgasrc, uint64_t fsize, FILE* filefp){ int writeFPGAProgram(char *fpgasrc, uint64_t fsize, FILE *filefp) {
LOG(logDEBUG1, ("Writing of FPGA Program\n" LOG(logDEBUG1,
"\taddress of fpgasrc:%p\n" ("Writing of FPGA Program\n"
"\tfsize:%llu\n\tpointer:%p\n", "\taddress of fpgasrc:%p\n"
(void *)fpgasrc, (long long unsigned int)fsize, (void*)filefp)); "\tfsize:%llu\n\tpointer:%p\n",
(void *)fpgasrc, (long long unsigned int)fsize, (void *)filefp));
if(fwrite((void*)fpgasrc , sizeof(char) , fsize , filefp )!= fsize){ if (fwrite((void *)fpgasrc, sizeof(char), fsize, filefp) != fsize) {
LOG(logERROR, ("Could not write FPGA source to flash (size:%llu)\n", (long long unsigned int)fsize)); LOG(logERROR, ("Could not write FPGA source to flash (size:%llu)\n",
return 1; (long long unsigned int)fsize));
} return 1;
LOG(logDEBUG1, ("program written to flash\n")); }
return 0; LOG(logDEBUG1, ("program written to flash\n"));
return 0;
} }

222
slsDetectorServers/slsDetectorServer/src/programFpgaNios.c Executable file → Normal file
View File

@ -3,150 +3,154 @@
#include "clogger.h" #include "clogger.h"
#include "slsDetectorServer_defs.h" #include "slsDetectorServer_defs.h"
#include <unistd.h> // usleep
#include <string.h> #include <string.h>
#include <unistd.h> // usleep
/* global variables */ /* global variables */
#define MTDSIZE 10 #define MTDSIZE 10
char mtdvalue[MTDSIZE] = {0}; char mtdvalue[MTDSIZE] = {0};
#define NOTIFICATION_FILE "/tmp/block_shutdown" #define NOTIFICATION_FILE "/tmp/block_shutdown"
#define MICROCONTROLLER_FILE "/dev/ttyAL0" #define MICROCONTROLLER_FILE "/dev/ttyAL0"
void NotifyServerStartSuccess() { void NotifyServerStartSuccess() {
LOG(logINFOBLUE, ("Server started successfully\n")); LOG(logINFOBLUE, ("Server started successfully\n"));
char command[255]; char command[255];
memset(command, 0, 255); memset(command, 0, 255);
sprintf(command,"echo r > %s",MICROCONTROLLER_FILE); sprintf(command, "echo r > %s", MICROCONTROLLER_FILE);
system(command); system(command);
} }
void CreateNotificationForCriticalTasks() { void CreateNotificationForCriticalTasks() {
FILE* fd = fopen(NOTIFICATION_FILE, "r"); FILE *fd = fopen(NOTIFICATION_FILE, "r");
if (fd == NULL) { if (fd == NULL) {
fd = fopen(NOTIFICATION_FILE, "w"); fd = fopen(NOTIFICATION_FILE, "w");
if (fd == NULL) { if (fd == NULL) {
LOG(logERROR, ("Could not create notication file: %s\n", NOTIFICATION_FILE)); LOG(logERROR,
return; ("Could not create notication file: %s\n", NOTIFICATION_FILE));
} return;
LOG(logINFOBLUE, ("Created notification file: %s\n", NOTIFICATION_FILE)); }
} LOG(logINFOBLUE,
fclose(fd); ("Created notification file: %s\n", NOTIFICATION_FILE));
NotifyCriticalTaskDone(); }
fclose(fd);
NotifyCriticalTaskDone();
} }
void NotifyCriticalTask() { void NotifyCriticalTask() {
LOG(logINFO, ("\tNotifying Critical Task Ongoing\n")); LOG(logINFO, ("\tNotifying Critical Task Ongoing\n"));
char command[255]; char command[255];
memset(command, 0, 255); memset(command, 0, 255);
sprintf(command,"echo 1 > %s",NOTIFICATION_FILE); sprintf(command, "echo 1 > %s", NOTIFICATION_FILE);
system(command); system(command);
} }
void NotifyCriticalTaskDone() { void NotifyCriticalTaskDone() {
LOG(logINFO, ("\tNotifying Critical Task Done\n")); LOG(logINFO, ("\tNotifying Critical Task Done\n"));
char command[255]; char command[255];
memset(command, 0, 255); memset(command, 0, 255);
sprintf(command,"echo 0 > %s",NOTIFICATION_FILE); sprintf(command, "echo 0 > %s", NOTIFICATION_FILE);
system(command); system(command);
} }
void rebootControllerAndFPGA() { void rebootControllerAndFPGA() {
LOG(logDEBUG1, ("Reseting FPGA...\n")); LOG(logDEBUG1, ("Reseting FPGA...\n"));
char command[255]; char command[255];
memset(command, 0, 255); memset(command, 0, 255);
sprintf(command,"echo z > %s",MICROCONTROLLER_FILE); sprintf(command, "echo z > %s", MICROCONTROLLER_FILE);
system(command); system(command);
} }
int findFlash(char* mess) { int findFlash(char *mess) {
LOG(logDEBUG1, ("Finding flash drive...\n")); LOG(logDEBUG1, ("Finding flash drive...\n"));
//getting the drive // getting the drive
// # cat /proc/mtd // # cat /proc/mtd
// dev: size erasesize name // dev: size erasesize name
// mtd0: 00580000 00010000 "qspi BootInfo + Factory Image" // mtd0: 00580000 00010000 "qspi BootInfo + Factory Image"
// mtd1: 00580000 00010000 "qspi Application Image" // mtd1: 00580000 00010000 "qspi Application Image"
// mtd2: 00800000 00010000 "qspi Linux Kernel with initramfs" // mtd2: 00800000 00010000 "qspi Linux Kernel with initramfs"
// mtd3: 00800000 00010000 "qspi Linux Kernel with initramfs Backup" // mtd3: 00800000 00010000 "qspi Linux Kernel with initramfs Backup"
// mtd4: 02500000 00010000 "qspi ubi filesystem" // mtd4: 02500000 00010000 "qspi ubi filesystem"
// mtd5: 04000000 00010000 "qspi Complete Flash" // mtd5: 04000000 00010000 "qspi Complete Flash"
char output[255]; char output[255];
memset(output, 0, 255); memset(output, 0, 255);
FILE* fp = popen("awk \'$5== \"Application\" {print $1}\' /proc/mtd", "r"); FILE *fp = popen("awk \'$5== \"Application\" {print $1}\' /proc/mtd", "r");
if (fp == NULL) { if (fp == NULL) {
strcpy(mess, "popen returned NULL. Need that to get mtd drive.\n"); strcpy(mess, "popen returned NULL. Need that to get mtd drive.\n");
LOG(logERROR, (mess)); LOG(logERROR, (mess));
return RO_TRIGGER_IN_FALLING_EDGE; return RO_TRIGGER_IN_FALLING_EDGE;
} }
if (fgets(output, sizeof(output), fp) == NULL) { if (fgets(output, sizeof(output), fp) == NULL) {
strcpy(mess, "fgets returned NULL. Need that to get mtd drive.\n"); strcpy(mess, "fgets returned NULL. Need that to get mtd drive.\n");
LOG(logERROR, (mess)); LOG(logERROR, (mess));
return FAIL; return FAIL;
} }
pclose(fp); pclose(fp);
memset(mtdvalue, 0, MTDSIZE); memset(mtdvalue, 0, MTDSIZE);
strcpy(mtdvalue, "/dev/"); strcpy(mtdvalue, "/dev/");
char* pch = strtok(output, ":"); char *pch = strtok(output, ":");
if (pch == NULL){ if (pch == NULL) {
strcpy (mess, "Could not get mtd value\n"); strcpy(mess, "Could not get mtd value\n");
LOG(logERROR, (mess)); LOG(logERROR, (mess));
return FAIL; return FAIL;
} }
strcat(mtdvalue, pch); strcat(mtdvalue, pch);
LOG(logINFO, ("\tFlash drive found: %s\n", mtdvalue)); LOG(logINFO, ("\tFlash drive found: %s\n", mtdvalue));
return OK; return OK;
} }
void eraseFlash() { void eraseFlash() {
LOG(logDEBUG1, ("Erasing Flash...\n")); LOG(logDEBUG1, ("Erasing Flash...\n"));
char command[255]; char command[255];
memset(command, 0, 255); memset(command, 0, 255);
sprintf(command,"flash_erase %s 0 0",mtdvalue); sprintf(command, "flash_erase %s 0 0", mtdvalue);
system(command); system(command);
LOG(logINFO, ("\tFlash erased\n")); LOG(logINFO, ("\tFlash erased\n"));
} }
int eraseAndWriteToFlash(char* mess, char* fpgasrc, uint64_t fsize) { int eraseAndWriteToFlash(char *mess, char *fpgasrc, uint64_t fsize) {
if (findFlash(mess) == FAIL) { if (findFlash(mess) == FAIL) {
return FAIL; return FAIL;
} }
NotifyCriticalTask(); NotifyCriticalTask();
eraseFlash(); eraseFlash();
// open file pointer to flash // open file pointer to flash
FILE *filefp = fopen(mtdvalue, "w"); FILE *filefp = fopen(mtdvalue, "w");
if(filefp == NULL){ if (filefp == NULL) {
NotifyCriticalTaskDone(); NotifyCriticalTaskDone();
sprintf (mess, "Unable to open %s in write mode\n", mtdvalue); sprintf(mess, "Unable to open %s in write mode\n", mtdvalue);
LOG(logERROR, (mess)); LOG(logERROR, (mess));
return FAIL; return FAIL;
} }
LOG(logINFO, ("\tFlash ready for writing\n")); LOG(logINFO, ("\tFlash ready for writing\n"));
// write to flash // write to flash
if (writeFPGAProgram(mess, fpgasrc, fsize, filefp) == FAIL) { if (writeFPGAProgram(mess, fpgasrc, fsize, filefp) == FAIL) {
NotifyCriticalTaskDone(); NotifyCriticalTaskDone();
fclose(filefp); fclose(filefp);
return FAIL; return FAIL;
} }
fclose(filefp); fclose(filefp);
NotifyCriticalTaskDone(); NotifyCriticalTaskDone();
return OK; return OK;
} }
int writeFPGAProgram(char* mess, char* fpgasrc, uint64_t fsize, FILE* filefp) { int writeFPGAProgram(char *mess, char *fpgasrc, uint64_t fsize, FILE *filefp) {
LOG(logDEBUG1, ("Writing to flash...\n" LOG(logDEBUG1, ("Writing to flash...\n"
"\taddress of fpgasrc:%p\n" "\taddress of fpgasrc:%p\n"
"\tfsize:%lu\n\tpointer:%p\n", "\tfsize:%lu\n\tpointer:%p\n",
(void *)fpgasrc, fsize, (void*)filefp)); (void *)fpgasrc, fsize, (void *)filefp));
uint64_t retval = fwrite((void*)fpgasrc , sizeof(char) , fsize , filefp); uint64_t retval = fwrite((void *)fpgasrc, sizeof(char), fsize, filefp);
if (retval != fsize) { if (retval != fsize) {
sprintf (mess, "Could not write FPGA source to flash (size:%llu), write %llu\n", (long long unsigned int) fsize, (long long unsigned int)retval); sprintf(
LOG(logERROR, (mess)); mess,
return FAIL; "Could not write FPGA source to flash (size:%llu), write %llu\n",
} (long long unsigned int)fsize, (long long unsigned int)retval);
LOG(logINFO, ("\tProgram written to flash\n")); LOG(logERROR, (mess));
return OK; return FAIL;
}
LOG(logINFO, ("\tProgram written to flash\n"));
return OK;
} }

415
slsDetectorServers/slsDetectorServer/src/readDefaultPattern.c Executable file → Normal file
View File

@ -1,8 +1,8 @@
#include "readDefaultPattern.h" #include "readDefaultPattern.h"
#include "sls_detector_defs.h"
#include "slsDetectorServer_defs.h"
#include "ansi.h" #include "ansi.h"
#include "clogger.h" #include "clogger.h"
#include "slsDetectorServer_defs.h"
#include "sls_detector_defs.h"
#include <string.h> #include <string.h>
@ -14,24 +14,23 @@ extern uint64_t writePatternClkControl(uint64_t word);
extern uint64_t writePatternWord(int addr, uint64_t word); extern uint64_t writePatternWord(int addr, uint64_t word);
extern int setPatternWaitAddress(int level, int addr); extern int setPatternWaitAddress(int level, int addr);
extern uint64_t setPatternWaitTime(int level, uint64_t t); extern uint64_t setPatternWaitTime(int level, uint64_t t);
extern void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop); extern void setPatternLoop(int level, int *startAddr, int *stopAddr,
int *nLoop);
int loadDefaultPattern(char *fname) {
if (initError == FAIL) {
return initError;
}
int loadDefaultPattern(char* fname) { FILE *fd = fopen(fname, "r");
if (initError == FAIL) { if (fd == NULL) {
return initError; sprintf(initErrorMessage, "Could not open pattern file [%s].\n", fname);
} initError = FAIL;
LOG(logERROR, ("%s\n\n", initErrorMessage));
FILE* fd = fopen(fname, "r");
if(fd == NULL) {
sprintf(initErrorMessage, "Could not open pattern file [%s].\n", fname);
initError = FAIL;
LOG(logERROR, ("%s\n\n", initErrorMessage));
return FAIL; return FAIL;
} }
LOG(logINFOBLUE, ("Reading default pattern file %s\n", fname)); LOG(logINFOBLUE, ("Reading default pattern file %s\n", fname));
// Initialization // Initialization
const size_t LZ = 256; const size_t LZ = 256;
char line[LZ]; char line[LZ];
@ -41,61 +40,63 @@ int loadDefaultPattern(char* fname) {
// keep reading a line // keep reading a line
while (fgets(line, LZ, fd)) { while (fgets(line, LZ, fd)) {
// ignore comments // ignore comments
if (line[0] == '#') { if (line[0] == '#') {
LOG(logDEBUG1, ("Ignoring Comment\n")); LOG(logDEBUG1, ("Ignoring Comment\n"));
continue; continue;
} }
// ignore empty lines // ignore empty lines
if (strlen(line) <= 1) { if (strlen(line) <= 1) {
LOG(logDEBUG1, ("Ignoring Empty line\n")); LOG(logDEBUG1, ("Ignoring Empty line\n"));
continue; continue;
} }
// removing leading spaces // removing leading spaces
if (line[0] == ' ' || line[0] == '\t') { if (line[0] == ' ' || line[0] == '\t') {
int len = strlen(line); int len = strlen(line);
// find first valid character // find first valid character
int i = 0; int i = 0;
for (i = 0; i < len; ++i) { for (i = 0; i < len; ++i) {
if (line[i] != ' ' && line[i] != '\t') { if (line[i] != ' ' && line[i] != '\t') {
break; break;
} }
} }
// ignore the line full of spaces (last char \n) // ignore the line full of spaces (last char \n)
if (i >= len - 1) { if (i >= len - 1) {
LOG(logDEBUG1, ("Ignoring line full of spaces\n")); LOG(logDEBUG1, ("Ignoring line full of spaces\n"));
continue; continue;
} }
// copying only valid char // copying only valid char
char temp[LZ]; char temp[LZ];
memset(temp, 0, LZ); memset(temp, 0, LZ);
memcpy(temp, line + i, strlen(line) - i); memcpy(temp, line + i, strlen(line) - i);
memset(line, 0, LZ); memset(line, 0, LZ);
memcpy(line, temp, strlen(temp)); memcpy(line, temp, strlen(temp));
LOG(logDEBUG1, ("Removing leading spaces.\n")); LOG(logDEBUG1, ("Removing leading spaces.\n"));
} }
LOG(logDEBUG1, ("Command to process: (size:%d) %.*s\n", LOG(logDEBUG1, ("Command to process: (size:%d) %.*s\n", strlen(line),
strlen(line), strlen(line) -1, line)); strlen(line) - 1, line));
memset(command, 0, LZ); memset(command, 0, LZ);
// patword // patword
if (!strncmp(line, "patword", strlen("patword"))) { if (!strncmp(line, "patword", strlen("patword"))) {
uint32_t addr = 0; uint32_t addr = 0;
uint64_t word = 0; uint64_t word = 0;
// cannot scan values // cannot scan values
#ifdef VIRTUAL #ifdef VIRTUAL
if (sscanf(line, "%s 0x%x 0x%lx", command, &addr, &word) != 3) { if (sscanf(line, "%s 0x%x 0x%lx", command, &addr, &word) != 3) {
#else #else
if (sscanf(line, "%s 0x%x 0x%llx", command, &addr, &word) != 3) { if (sscanf(line, "%s 0x%x 0x%llx", command, &addr, &word) != 3) {
#endif #endif
sprintf(initErrorMessage, "Could not scan patword arguments from default " sprintf(initErrorMessage,
"pattern file. Line:[%s].\n", line); "Could not scan patword arguments from default "
break; "pattern file. Line:[%s].\n",
} line);
break;
}
if (default_writePatternWord(line, addr, word) == FAIL) { if (default_writePatternWord(line, addr, word) == FAIL) {
break; break;
@ -103,19 +104,21 @@ int loadDefaultPattern(char* fname) {
} }
// patioctrl // patioctrl
if (!strncmp(line, "patioctrl", strlen("patioctrl"))) { if (!strncmp(line, "patioctrl", strlen("patioctrl"))) {
uint64_t arg = 0; uint64_t arg = 0;
// cannot scan values // cannot scan values
#ifdef VIRTUAL #ifdef VIRTUAL
if (sscanf(line, "%s 0x%lx", command, &arg) != 2) { if (sscanf(line, "%s 0x%lx", command, &arg) != 2) {
#else #else
if (sscanf(line, "%s 0x%llx", command, &arg) != 2) { if (sscanf(line, "%s 0x%llx", command, &arg) != 2) {
#endif #endif
sprintf(initErrorMessage, "Could not scan patioctrl arguments from default " sprintf(initErrorMessage,
"pattern file. Line:[%s].\n", line); "Could not scan patioctrl arguments from default "
break; "pattern file. Line:[%s].\n",
} line);
break;
}
if (default_writePatternIOControl(line, arg) == FAIL) { if (default_writePatternIOControl(line, arg) == FAIL) {
break; break;
@ -123,19 +126,21 @@ int loadDefaultPattern(char* fname) {
} }
// patclkctrl // patclkctrl
if (!strncmp(line, "patclkctrl", strlen("patclkctrl"))) { if (!strncmp(line, "patclkctrl", strlen("patclkctrl"))) {
uint64_t arg = 0; uint64_t arg = 0;
// cannot scan values // cannot scan values
#ifdef VIRTUAL #ifdef VIRTUAL
if (sscanf(line, "%s 0x%lx", command, &arg) != 2) { if (sscanf(line, "%s 0x%lx", command, &arg) != 2) {
#else #else
if (sscanf(line, "%s 0x%llx", command, &arg) != 2) { if (sscanf(line, "%s 0x%llx", command, &arg) != 2) {
#endif #endif
sprintf(initErrorMessage, "Could not scan patclkctrl arguments from default " sprintf(initErrorMessage,
"pattern file. Line:[%s].\n", line); "Could not scan patclkctrl arguments from default "
break; "pattern file. Line:[%s].\n",
} line);
break;
}
if (default_writePatternClkControl(line, arg) == FAIL) { if (default_writePatternClkControl(line, arg) == FAIL) {
break; break;
@ -143,24 +148,28 @@ int loadDefaultPattern(char* fname) {
} }
// patlimits // patlimits
if (!strncmp(line, "patlimits", strlen("patlimits"))) { if (!strncmp(line, "patlimits", strlen("patlimits"))) {
uint32_t startAddr = 0; uint32_t startAddr = 0;
uint32_t stopAddr = 0; uint32_t stopAddr = 0;
// cannot scan values // cannot scan values
if (sscanf(line, "%s 0x%x 0x%x", command, &startAddr, &stopAddr) != 3) { if (sscanf(line, "%s 0x%x 0x%x", command, &startAddr, &stopAddr) !=
sprintf(initErrorMessage, "Could not scan patlimits arguments from default " 3) {
"pattern file. Line:[%s].\n", line); sprintf(initErrorMessage,
break; "Could not scan patlimits arguments from default "
} "pattern file. Line:[%s].\n",
line);
break;
}
if (default_setPatternLoopLimits(line, startAddr, stopAddr) == FAIL) { if (default_setPatternLoopLimits(line, startAddr, stopAddr) ==
FAIL) {
break; break;
} }
} }
// patloop // patloop
if ((!strncmp(line, "patloop0", strlen("patloop0"))) || if ((!strncmp(line, "patloop0", strlen("patloop0"))) ||
(!strncmp(line, "patloop1", strlen("patloop1"))) || (!strncmp(line, "patloop1", strlen("patloop1"))) ||
(!strncmp(line, "patloop2", strlen("patloop2")))) { (!strncmp(line, "patloop2", strlen("patloop2")))) {
@ -176,20 +185,24 @@ int loadDefaultPattern(char* fname) {
uint32_t startAddr = 0; uint32_t startAddr = 0;
uint32_t stopAddr = 0; uint32_t stopAddr = 0;
// cannot scan values // cannot scan values
if (sscanf(line, "%s 0x%x 0x%x", command, &startAddr, &stopAddr) != 3) { if (sscanf(line, "%s 0x%x 0x%x", command, &startAddr, &stopAddr) !=
sprintf(initErrorMessage, "Could not scan patloop%d arguments from default " 3) {
"pattern file. Line:[%s].\n", level, line); sprintf(initErrorMessage,
break; "Could not scan patloop%d arguments from default "
} "pattern file. Line:[%s].\n",
level, line);
break;
}
if (default_setPatternLoopAddresses(line, level, startAddr, stopAddr) == FAIL) { if (default_setPatternLoopAddresses(line, level, startAddr,
stopAddr) == FAIL) {
break; break;
} }
} }
// patnloop // patnloop
if ((!strncmp(line, "patnloop0", strlen("patnloop0"))) || if ((!strncmp(line, "patnloop0", strlen("patnloop0"))) ||
(!strncmp(line, "patnloop1", strlen("patnloop1"))) || (!strncmp(line, "patnloop1", strlen("patnloop1"))) ||
(!strncmp(line, "patnloop2", strlen("patnloop2")))) { (!strncmp(line, "patnloop2", strlen("patnloop2")))) {
@ -204,12 +217,14 @@ int loadDefaultPattern(char* fname) {
} }
int numLoops = -1; int numLoops = -1;
// cannot scan values // cannot scan values
if (sscanf(line, "%s %d", command, &numLoops) != 2) { if (sscanf(line, "%s %d", command, &numLoops) != 2) {
sprintf(initErrorMessage, "Could not scan patnloop%d arguments from default " sprintf(initErrorMessage,
"pattern file. Line:[%s].\n", level, line); "Could not scan patnloop%d arguments from default "
break; "pattern file. Line:[%s].\n",
} level, line);
break;
}
if (default_setPatternLoopCycles(line, level, numLoops) == FAIL) { if (default_setPatternLoopCycles(line, level, numLoops) == FAIL) {
break; break;
@ -217,7 +232,7 @@ int loadDefaultPattern(char* fname) {
} }
// patwait // patwait
if ((!strncmp(line, "patwait0", strlen("patwait0"))) || if ((!strncmp(line, "patwait0", strlen("patwait0"))) ||
(!strncmp(line, "patwait1", strlen("patwait1"))) || (!strncmp(line, "patwait1", strlen("patwait1"))) ||
(!strncmp(line, "patwait2", strlen("patwait2")))) { (!strncmp(line, "patwait2", strlen("patwait2")))) {
@ -232,12 +247,14 @@ int loadDefaultPattern(char* fname) {
} }
uint32_t addr = 0; uint32_t addr = 0;
// cannot scan values // cannot scan values
if (sscanf(line, "%s 0x%x", command, &addr) != 2) { if (sscanf(line, "%s 0x%x", command, &addr) != 2) {
sprintf(initErrorMessage, "Could not scan patwait%d arguments from default " sprintf(initErrorMessage,
"pattern file. Line:[%s].\n", level, line); "Could not scan patwait%d arguments from default "
break; "pattern file. Line:[%s].\n",
} level, line);
break;
}
if (default_setPatternWaitAddresses(line, level, addr) == FAIL) { if (default_setPatternWaitAddresses(line, level, addr) == FAIL) {
break; break;
@ -245,7 +262,7 @@ int loadDefaultPattern(char* fname) {
} }
// patwaittime // patwaittime
if ((!strncmp(line, "patwaittime0", strlen("patwaittime0"))) || if ((!strncmp(line, "patwaittime0", strlen("patwaittime0"))) ||
(!strncmp(line, "patwaittime1", strlen("patwaittime1"))) || (!strncmp(line, "patwaittime1", strlen("patwaittime1"))) ||
(!strncmp(line, "patwaittime2", strlen("patwaittime2")))) { (!strncmp(line, "patwaittime2", strlen("patwaittime2")))) {
@ -261,16 +278,18 @@ int loadDefaultPattern(char* fname) {
uint64_t waittime = 0; uint64_t waittime = 0;
// cannot scan values // cannot scan values
#ifdef VIRTUAL #ifdef VIRTUAL
if (sscanf(line, "%s %ld", command, &waittime) != 2) { if (sscanf(line, "%s %ld", command, &waittime) != 2) {
#else #else
if (sscanf(line, "%s %lld", command, &waittime) != 2) { if (sscanf(line, "%s %lld", command, &waittime) != 2) {
#endif #endif
sprintf(initErrorMessage, "Could not scan patwaittime%d arguments from default " sprintf(initErrorMessage,
"pattern file. Line:[%s].\n", level, line); "Could not scan patwaittime%d arguments from default "
break; "pattern file. Line:[%s].\n",
} level, line);
break;
}
if (default_setPatternWaitTime(line, level, waittime) == FAIL) { if (default_setPatternWaitTime(line, level, waittime) == FAIL) {
break; break;
@ -281,22 +300,22 @@ int loadDefaultPattern(char* fname) {
} }
fclose(fd); fclose(fd);
if (strlen(initErrorMessage)) { if (strlen(initErrorMessage)) {
initError = FAIL; initError = FAIL;
LOG(logERROR, ("%s\n\n", initErrorMessage)); LOG(logERROR, ("%s\n\n", initErrorMessage));
} else { } else {
LOG(logINFOBLUE, ("Successfully read default pattern file\n")); LOG(logINFOBLUE, ("Successfully read default pattern file\n"));
} }
return initError; return initError;
} }
int default_writePatternWord(char *line, uint32_t addr, uint64_t word) {
int default_writePatternWord(char* line, uint32_t addr, uint64_t word) { // validations
//validations
if ((int32_t)addr < 0 || addr >= MAX_PATTERN_LENGTH) { if ((int32_t)addr < 0 || addr >= MAX_PATTERN_LENGTH) {
sprintf(initErrorMessage, "Cannot set pattern word from default " sprintf(initErrorMessage,
"pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n", "Cannot set pattern word from default "
MAX_PATTERN_LENGTH, line); "pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n",
MAX_PATTERN_LENGTH, line);
return FAIL; return FAIL;
} }
writePatternWord(addr, word); writePatternWord(addr, word);
@ -304,44 +323,53 @@ int default_writePatternWord(char* line, uint32_t addr, uint64_t word) {
return OK; return OK;
} }
int default_writePatternIOControl(char* line, uint64_t arg) { int default_writePatternIOControl(char *line, uint64_t arg) {
uint64_t retval = writePatternIOControl(arg); uint64_t retval = writePatternIOControl(arg);
if (retval != arg) { if (retval != arg) {
#ifdef VIRTUAL #ifdef VIRTUAL
sprintf(initErrorMessage, "Could not set patioctrl from default pattern " sprintf(initErrorMessage,
"file. Set 0x%lx, read 0x%lx. Line:[%s]\n", arg, retval, line); "Could not set patioctrl from default pattern "
"file. Set 0x%lx, read 0x%lx. Line:[%s]\n",
arg, retval, line);
#else #else
sprintf(initErrorMessage, "Could not set patioctrl from default pattern " sprintf(initErrorMessage,
"file. Set 0x%llx, read 0x%llx. Line:[%s]\n", arg, retval, line); "Could not set patioctrl from default pattern "
"file. Set 0x%llx, read 0x%llx. Line:[%s]\n",
arg, retval, line);
#endif #endif
return FAIL; return FAIL;
} }
return OK; return OK;
} }
int default_writePatternClkControl(char *line, uint64_t arg) {
int default_writePatternClkControl(char* line, uint64_t arg) {
uint64_t retval = writePatternClkControl(arg); uint64_t retval = writePatternClkControl(arg);
if (retval != arg) { if (retval != arg) {
#ifdef VIRTUAL #ifdef VIRTUAL
sprintf(initErrorMessage, "Could not set patclkctrl from default pattern " sprintf(initErrorMessage,
"file. Set 0x%lx, read 0x%lx. Line:[%s]\n", arg, retval, line); "Could not set patclkctrl from default pattern "
"file. Set 0x%lx, read 0x%lx. Line:[%s]\n",
arg, retval, line);
#else #else
sprintf(initErrorMessage, "Could not set patclkctrl from default pattern " sprintf(initErrorMessage,
"file. Set 0x%llx, read 0x%llx. Line:[%s]\n", arg, retval, line); "Could not set patclkctrl from default pattern "
"file. Set 0x%llx, read 0x%llx. Line:[%s]\n",
arg, retval, line);
#endif #endif
return FAIL; return FAIL;
} }
return OK; return OK;
} }
int default_setPatternLoopLimits(char* line, uint32_t startAddr, uint32_t stopAddr) { int default_setPatternLoopLimits(char *line, uint32_t startAddr,
//validations uint32_t stopAddr) {
// validations
if ((int32_t)startAddr < 0 || startAddr >= MAX_PATTERN_LENGTH || if ((int32_t)startAddr < 0 || startAddr >= MAX_PATTERN_LENGTH ||
(int32_t)stopAddr < 0 || stopAddr >= MAX_PATTERN_LENGTH) { (int32_t)stopAddr < 0 || stopAddr >= MAX_PATTERN_LENGTH) {
sprintf(initErrorMessage, "Cannot set patlimits from default " sprintf(initErrorMessage,
"pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n", "Cannot set patlimits from default "
MAX_PATTERN_LENGTH, line); "pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n",
MAX_PATTERN_LENGTH, line);
return FAIL; return FAIL;
} }
int numLoops = -1; int numLoops = -1;
@ -350,27 +378,31 @@ int default_setPatternLoopLimits(char* line, uint32_t startAddr, uint32_t stopAd
// validate // validate
if (r_startAddr != (int)startAddr || r_stopAddr != (int)stopAddr) { if (r_startAddr != (int)startAddr || r_stopAddr != (int)stopAddr) {
sprintf(initErrorMessage, "Could not set patlimits from default pattern " sprintf(initErrorMessage,
"file. Read start addr:0x%x, stop addr: 0x%x. Line:[%s]\n", "Could not set patlimits from default pattern "
r_startAddr, r_stopAddr, line); "file. Read start addr:0x%x, stop addr: 0x%x. Line:[%s]\n",
r_startAddr, r_stopAddr, line);
return FAIL; return FAIL;
} }
return OK; return OK;
} }
int default_setPatternLoopAddresses(char* line, int level, uint32_t startAddr, uint32_t stopAddr) { int default_setPatternLoopAddresses(char *line, int level, uint32_t startAddr,
//validations uint32_t stopAddr) {
// validations
if (level < 0 || level > 2) { if (level < 0 || level > 2) {
sprintf(initErrorMessage, "Cannot set patloop from default " sprintf(initErrorMessage,
"pattern file. Level must be between 0 and 2. Line:[%s]\n", "Cannot set patloop from default "
line); "pattern file. Level must be between 0 and 2. Line:[%s]\n",
line);
return FAIL; return FAIL;
} }
if ((int32_t)startAddr < 0 || startAddr >= MAX_PATTERN_LENGTH || if ((int32_t)startAddr < 0 || startAddr >= MAX_PATTERN_LENGTH ||
(int32_t)stopAddr < 0 || stopAddr >= MAX_PATTERN_LENGTH) { (int32_t)stopAddr < 0 || stopAddr >= MAX_PATTERN_LENGTH) {
sprintf(initErrorMessage, "Cannot set patloop (level: %d) from default " sprintf(initErrorMessage,
"pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n", "Cannot set patloop (level: %d) from default "
level, MAX_PATTERN_LENGTH, line); "pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n",
level, MAX_PATTERN_LENGTH, line);
return FAIL; return FAIL;
} }
int numLoops = -1; int numLoops = -1;
@ -379,55 +411,62 @@ int default_setPatternLoopAddresses(char* line, int level, uint32_t startAddr, u
// validate // validate
if (r_startAddr != (int)startAddr || r_stopAddr != (int)stopAddr) { if (r_startAddr != (int)startAddr || r_stopAddr != (int)stopAddr) {
sprintf(initErrorMessage, "Could not set patloop (level: %d) from default " sprintf(
"pattern file. Read start addr:0x%x, stop addr: 0x%x. Line:[%s]\n", initErrorMessage,
level, r_startAddr, r_stopAddr, line); "Could not set patloop (level: %d) from default "
"pattern file. Read start addr:0x%x, stop addr: 0x%x. Line:[%s]\n",
level, r_startAddr, r_stopAddr, line);
return FAIL; return FAIL;
} }
return OK; return OK;
} }
int default_setPatternLoopCycles(char* line, int level, int numLoops) { int default_setPatternLoopCycles(char *line, int level, int numLoops) {
//validations // validations
if (level < 0 || level > 2) { if (level < 0 || level > 2) {
sprintf(initErrorMessage, "Cannot set patnloop from default " sprintf(initErrorMessage,
"pattern file. Level must be between 0 and 2. Line:[%s]\n", "Cannot set patnloop from default "
line); "pattern file. Level must be between 0 and 2. Line:[%s]\n",
line);
return FAIL; return FAIL;
} }
if (numLoops < 0) { if (numLoops < 0) {
sprintf(initErrorMessage, "Cannot set patnloop from default " sprintf(initErrorMessage,
"pattern file. Iterations must be between > 0. Line:[%s]\n", "Cannot set patnloop from default "
line); "pattern file. Iterations must be between > 0. Line:[%s]\n",
line);
return FAIL; return FAIL;
} }
int startAddr = -1; int startAddr = -1;
int stopAddr = -1; int stopAddr = -1;
int r_numLoops = numLoops; int r_numLoops = numLoops;
setPatternLoop(level, &startAddr, &stopAddr, &r_numLoops); setPatternLoop(level, &startAddr, &stopAddr, &r_numLoops);
// validate // validate
if (r_numLoops != numLoops) { if (r_numLoops != numLoops) {
sprintf(initErrorMessage, "Could not set patnloop (level: %d) from default " sprintf(initErrorMessage,
"pattern file. Read %d loops. Line:[%s]\n", "Could not set patnloop (level: %d) from default "
level, r_numLoops, line); "pattern file. Read %d loops. Line:[%s]\n",
level, r_numLoops, line);
return FAIL; return FAIL;
} }
return OK; return OK;
} }
int default_setPatternWaitAddresses(char* line, int level, uint32_t addr) { int default_setPatternWaitAddresses(char *line, int level, uint32_t addr) {
//validations // validations
if (level < 0 || level > 2) { if (level < 0 || level > 2) {
sprintf(initErrorMessage, "Cannot set patwait address from default " sprintf(initErrorMessage,
"pattern file. Level must be between 0 and 2. Line:[%s]\n", "Cannot set patwait address from default "
line); "pattern file. Level must be between 0 and 2. Line:[%s]\n",
line);
return FAIL; return FAIL;
} }
if ((int32_t)addr < 0 || addr >= MAX_PATTERN_LENGTH) { if ((int32_t)addr < 0 || addr >= MAX_PATTERN_LENGTH) {
sprintf(initErrorMessage, "Cannot set patwait address (level: %d) from default " sprintf(initErrorMessage,
"pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n", "Cannot set patwait address (level: %d) from default "
level, MAX_PATTERN_LENGTH, line); "pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n",
level, MAX_PATTERN_LENGTH, line);
return FAIL; return FAIL;
} }
@ -435,20 +474,22 @@ int default_setPatternWaitAddresses(char* line, int level, uint32_t addr) {
// validate // validate
if (retval != addr) { if (retval != addr) {
sprintf(initErrorMessage, "Could not set patwait address (level: %d) from default " sprintf(initErrorMessage,
"pattern file. Read addr: 0x%x. Line:[%s]\n", "Could not set patwait address (level: %d) from default "
level, retval, line); "pattern file. Read addr: 0x%x. Line:[%s]\n",
level, retval, line);
return FAIL; return FAIL;
} }
return OK; return OK;
} }
int default_setPatternWaitTime(char* line, int level, uint64_t waittime) { int default_setPatternWaitTime(char *line, int level, uint64_t waittime) {
//validations // validations
if (level < 0 || level > 2) { if (level < 0 || level > 2) {
sprintf(initErrorMessage, "Cannot set patwaittime from default " sprintf(initErrorMessage,
"pattern file. Level must be between 0 and 2. Line:[%s]\n", "Cannot set patwaittime from default "
line); "pattern file. Level must be between 0 and 2. Line:[%s]\n",
line);
return FAIL; return FAIL;
} }
uint64_t retval = setPatternWaitTime(level, waittime); uint64_t retval = setPatternWaitTime(level, waittime);
@ -456,13 +497,15 @@ int default_setPatternWaitTime(char* line, int level, uint64_t waittime) {
// validate // validate
if (retval != waittime) { if (retval != waittime) {
#ifdef VIRTUAL #ifdef VIRTUAL
sprintf(initErrorMessage, "Could not set patwaittime (level: %d) from default " sprintf(initErrorMessage,
"pattern file. Read %ld wait time. Line:[%s]\n", "Could not set patwaittime (level: %d) from default "
level, retval, line); "pattern file. Read %ld wait time. Line:[%s]\n",
level, retval, line);
#else #else
sprintf(initErrorMessage, "Could not set patwaittime (level: %d) from default " sprintf(initErrorMessage,
"pattern file. Read %lld wait time. Line:[%s]\n", "Could not set patwaittime (level: %d) from default "
level, retval, line); "pattern file. Read %lld wait time. Line:[%s]\n",
level, retval, line);
#endif #endif
return FAIL; return FAIL;
} }

236
slsDetectorServers/slsDetectorServer/src/slsDetectorServer.c Executable file → Normal file
View File

@ -1,11 +1,11 @@
/* A simple server in the internet domain using TCP /* A simple server in the internet domain using TCP
The port number is passed as an argument */ The port number is passed as an argument */
#include "sls_detector_defs.h"
#include "clogger.h" #include "clogger.h"
#include "communication_funcs.h" #include "communication_funcs.h"
#include "slsDetectorServer_funcs.h"
#include "slsDetectorServer_defs.h" #include "slsDetectorServer_defs.h"
#include "slsDetectorServer_funcs.h"
#include "sls_detector_defs.h"
#include "versionAPI.h" #include "versionAPI.h"
#ifdef VIRTUAL #ifdef VIRTUAL
#include "communication_virtual.h" #include "communication_virtual.h"
@ -24,166 +24,162 @@ extern int sockfd;
extern int debugflag; extern int debugflag;
extern int checkModuleFlag; extern int checkModuleFlag;
// Global variables from slsDetectorFunctionList // Global variables from slsDetectorFunctionList
#ifdef GOTTHARDD #ifdef GOTTHARDD
extern int phaseShift; extern int phaseShift;
#endif #endif
void error(char *msg){ void error(char *msg) { perror(msg); }
perror(msg);
}
int main(int argc, char *argv[]) { int main(int argc, char *argv[]) {
// print version // print version
if (argc > 1 && !strcasecmp(argv[1], "-version")) { if (argc > 1 && !strcasecmp(argv[1], "-version")) {
int version = 0; int version = 0;
#ifdef GOTTHARDD #ifdef GOTTHARDD
version = APIGOTTHARD; version = APIGOTTHARD;
#elif EIGERD #elif EIGERD
version = APIEIGER; version = APIEIGER;
#elif JUNGFRAUD #elif JUNGFRAUD
version = APIJUNGFRAU; version = APIJUNGFRAU;
#elif CHIPTESTBOARDD #elif CHIPTESTBOARDD
version = APICTB; version = APICTB;
#elif MOENCHD #elif MOENCHD
version = APIMOENCH; version = APIMOENCH;
#endif #endif
LOG(logINFO, ("SLS Detector Server %s (0x%x)\n", GITBRANCH, version)); LOG(logINFO, ("SLS Detector Server %s (0x%x)\n", GITBRANCH, version));
} }
int portno = DEFAULT_PORTNO; int portno = DEFAULT_PORTNO;
isControlServer = 1; isControlServer = 1;
debugflag = 0; debugflag = 0;
checkModuleFlag = 1; checkModuleFlag = 1;
// if socket crash, ignores SISPIPE, prevents global signal handler // if socket crash, ignores SISPIPE, prevents global signal handler
// subsequent read/write to socket gives error - must handle locally // subsequent read/write to socket gives error - must handle locally
signal(SIGPIPE, SIG_IGN); signal(SIGPIPE, SIG_IGN);
// circumvent the basic tests // circumvent the basic tests
{ {
int i; int i;
for (i = 1; i < argc; ++i) { for (i = 1; i < argc; ++i) {
if(!strcasecmp(argv[i],"-stopserver")) { if (!strcasecmp(argv[i], "-stopserver")) {
LOG(logINFO, ("Detected stop server\n")); LOG(logINFO, ("Detected stop server\n"));
isControlServer = 0; isControlServer = 0;
} } else if (!strcasecmp(argv[i], "-devel")) {
else if(!strcasecmp(argv[i],"-devel")){
LOG(logINFO, ("Detected developer mode\n")); LOG(logINFO, ("Detected developer mode\n"));
debugflag = 1; debugflag = 1;
} } else if (!strcasecmp(argv[i], "-nomodule")) {
else if(!strcasecmp(argv[i],"-nomodule")){
LOG(logINFO, ("Detected No Module mode\n")); LOG(logINFO, ("Detected No Module mode\n"));
checkModuleFlag = 0; checkModuleFlag = 0;
} } else if (!strcasecmp(argv[i], "-port")) {
else if(!strcasecmp(argv[i],"-port")){ if ((i + 1) >= argc) {
if ((i + 1) >= argc) { LOG(logERROR, ("no port value given. Exiting.\n"));
LOG(logERROR, ("no port value given. Exiting.\n")); return -1;
return -1; }
} if (sscanf(argv[i + 1], "%d", &portno) == 0) {
if (sscanf(argv[i + 1], "%d", &portno) == 0) { LOG(logERROR, ("cannot decode port value %s. Exiting.\n",
LOG(logERROR, ("cannot decode port value %s. Exiting.\n", argv[i + 1])); argv[i + 1]));
return -1; return -1;
} }
LOG(logINFO, ("Detected port: %d\n", portno)); LOG(logINFO, ("Detected port: %d\n", portno));
} }
#ifdef GOTTHARDD #ifdef GOTTHARDD
else if(!strcasecmp(argv[i],"-phaseshift")){ else if (!strcasecmp(argv[i], "-phaseshift")) {
if ((i + 1) >= argc) { if ((i + 1) >= argc) {
LOG(logERROR, ("no phase shift value given. Exiting.\n")); LOG(logERROR, ("no phase shift value given. Exiting.\n"));
return -1; return -1;
} }
if (sscanf(argv[i + 1], "%d", &phaseShift) == 0) { if (sscanf(argv[i + 1], "%d", &phaseShift) == 0) {
LOG(logERROR, ("cannot decode phase shift value %s. Exiting.\n", argv[i + 1])); LOG(logERROR,
return -1; ("cannot decode phase shift value %s. Exiting.\n",
} argv[i + 1]));
LOG(logINFO, ("Detected phase shift of %d\n", phaseShift)); return -1;
} }
LOG(logINFO, ("Detected phase shift of %d\n", phaseShift));
}
#endif #endif
} }
} }
// control server // control server
if (isControlServer) { if (isControlServer) {
#ifdef STOP_SERVER #ifdef STOP_SERVER
// start stop server process // start stop server process
char cmd[MAX_STR_LENGTH]; char cmd[MAX_STR_LENGTH];
memset(cmd, 0, MAX_STR_LENGTH); memset(cmd, 0, MAX_STR_LENGTH);
{ {
int i; int i;
for (i = 0; i < argc; ++i) { for (i = 0; i < argc; ++i) {
if (!strcasecmp(argv[i], "-port")) { if (!strcasecmp(argv[i], "-port")) {
i +=2; i += 2;
continue; continue;
} }
if (i > 0) { if (i > 0) {
strcat(cmd, " "); strcat(cmd, " ");
} }
strcat(cmd, argv[i]); strcat(cmd, argv[i]);
} }
char temp[50]; char temp[50];
memset(temp, 0, sizeof(temp)); memset(temp, 0, sizeof(temp));
sprintf(temp, " -stopserver -port %d &", portno + 1); sprintf(temp, " -stopserver -port %d &", portno + 1);
strcat(cmd, temp); strcat(cmd, temp);
LOG(logDEBUG1, ("Command to start stop server:%s\n", cmd)); LOG(logDEBUG1, ("Command to start stop server:%s\n", cmd));
system(cmd); system(cmd);
} }
LOG(logINFOBLUE, ("Control Server [%d]\n", portno)); LOG(logINFOBLUE, ("Control Server [%d]\n", portno));
#ifdef VIRTUAL #ifdef VIRTUAL
// creating files for virtual servers to communicate with each other // creating files for virtual servers to communicate with each other
if (!ComVirtual_createFiles(portno)) { if (!ComVirtual_createFiles(portno)) {
return -1; return -1;
} }
#endif #endif
#endif #endif
} }
// stop server // stop server
else { else {
LOG(logINFOBLUE, ("Stop Server [%d]\n", portno)); LOG(logINFOBLUE, ("Stop Server [%d]\n", portno));
#ifdef VIRTUAL #ifdef VIRTUAL
ComVirtual_setFileNames(portno - 1); ComVirtual_setFileNames(portno - 1);
#endif #endif
} }
init_detector();
// bind socket
sockfd = bindSocket(portno);
if (ret == FAIL)
return -1;
// assign function table
function_table();
init_detector(); if (isControlServer) {
// bind socket LOG(logINFOBLUE, ("Control Server Ready...\n\n"));
sockfd = bindSocket(portno); } else {
if (ret == FAIL) LOG(logINFOBLUE, ("Stop Server Ready...\n\n"));
return -1; }
// assign function table
function_table();
if (isControlServer) { // waits for connection
LOG(logINFOBLUE, ("Control Server Ready...\n\n")); int retval = OK;
} else { while (retval != GOODBYE && retval != REBOOT) {
LOG(logINFOBLUE, ("Stop Server Ready...\n\n")); int fd = acceptConnection(sockfd);
} if (fd > 0) {
retval = decode_function(fd);
closeConnection(fd);
}
}
// waits for connection exitServer(sockfd);
int retval = OK;
while(retval != GOODBYE && retval != REBOOT) {
int fd = acceptConnection(sockfd);
if (fd > 0) {
retval = decode_function(fd);
closeConnection(fd);
}
}
exitServer(sockfd); if (retval == REBOOT) {
LOG(logINFORED, ("Rebooting!\n"));
if (retval == REBOOT) { fflush(stdout);
LOG(logINFORED,("Rebooting!\n"));
fflush(stdout);
#if defined(MYTHEN3D) || defined(GOTTHARD2D) #if defined(MYTHEN3D) || defined(GOTTHARD2D)
rebootNiosControllerAndFPGA(); rebootNiosControllerAndFPGA();
#else #else
system("reboot"); system("reboot");
#endif #endif
} }
LOG(logINFO,("Goodbye!\n")); LOG(logINFO, ("Goodbye!\n"));
return 0; return 0;
} }

10229
slsDetectorServers/slsDetectorServer/src/slsDetectorServer_funcs.c Executable file → Normal file
View File

File diff suppressed because it is too large Load Diff