detectors/slsDetectorPackage
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maliakal_d
2018-12-12 11:20:27 +01:00
parent 87f7563035
commit 79693a38f5
27 changed files with 1044 additions and 730 deletions
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22
slsDetectorServers/ctbDetectorServer/slsDetectorServer_defs.h
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@ -77,11 +77,7 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7, D8, D9,
#define WAIT_TIME_US_STP_ACQ (100)
#define WAIT_TIME_CONFIGURE_MAC (500 * 1000)
#define SLOW_ADC_START_INDEX (1000)
#define SLOW_ADC_END_INDEX (1008)
#define MAX_DAC_VOLTAGE_VALUE (2500)
#define MAX_DAC_UNIT_VALUE (4096)
#define DAC_MAX_VOLTAGE_MV (2500)
#define VCHIP_MAX_MV (2700)
#define VCHIP_MIN_MV (1700)
@ -103,24 +99,6 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7, D8, D9,
#define LSB_OF_64_BIT_REG_OFST (0)
#define BIT_32_MSK (0xFFFFFFFF)
/* LTC2620 DAC DEFINES */
#define LTC2620_DAC_CMD_OFST (20)
#define LTC2620_DAC_CMD_MSK (0x0000000F << LTC2620_DAC_CMD_OFST)
#define LTC2620_DAC_ADDR_OFST (16)
#define LTC2620_DAC_ADDR_MSK (0x0000000F << LTC2620_DAC_ADDR_OFST)
#define LTC2620_DAC_DATA_OFST (4)
#define LTC2620_DAC_DATA_MSK (0x00000FFF << LTC2620_DAC_DATA_OFST)
#define LTC2620_DAC_CMD_WRITE (0x00000000 << LTC2620_DAC_CMD_OFST)
#define LTC2620_DAC_CMD_SET (0x00000003 << LTC2620_DAC_CMD_OFST)
#define LTC2620_DAC_CMD_POWER_DOWN (0x00000004 << LTC2620_DAC_CMD_OFST)
#define LTC2620_DAC_NUMBITS (24)
/* MAX1932 HV DEFINES */
#define MAX1932_HV_NUMBITS (8)
#define MAX1932_HV_DATA_OFST (0)
#define MAX1932_HV_DATA_MSK (0x000000FF << MAX1932_HV_DATA_OFST)
/** PLL Reconfiguration Registers */
//https://www.altera.com/documentation/mcn1424769382940.html
#define PLL_MODE_REG (0x00)