triggersl and print fix for acq

This commit is contained in:
Erik Frojdh 2020-09-03 16:21:15 +02:00
parent 22f14cacb0
commit 7048a75808
3 changed files with 116 additions and 4 deletions

View File

@ -14,3 +14,4 @@ g = Gotthard2()
# j = Jungfrau() # j = Jungfrau()
# m = Mythen3() # m = Mythen3()
m = Moench() m = Moench()

View File

@ -15,11 +15,60 @@ pycmd += ['vrf', 'vtr', 'vrs', 'vtgstv', 'vsvn', 'vtrim',
'vpreamp', 'vref_comp', 'vref_comp_fe vref_ds', 'vref_h_adc', 'vpreamp', 'vref_comp', 'vref_comp_fe vref_ds', 'vref_h_adc',
'vref_l_adc', 'iodelay', 'list', 'vref_ds', 'vis', 'vpl', 'vref_l_adc', 'iodelay', 'list', 'vref_ds', 'vis', 'vpl',
'vref_comp_fe', 'vph', 'vout_cm', 'vcp', 'vcn', 'vcmp_ll', 'vcmp_lr' 'vref_comp_fe', 'vph', 'vout_cm', 'vcp', 'vcn', 'vcmp_ll', 'vcmp_lr'
, 'vcmp_rl', 'vcmp_rr', 'vcal', 'vcas', 'vipre',
'vin_com', 'vin_cm', 'vrshaper', 'vrshaper_n', 'vrpreamp', 'vishaper',
'vicin', 'vcassh', 'vcal_n', 'vcal_p']
# command : reason ]
# dacs are in general not included in the python commands and we expect to
# set them from the specialized class or using an enum
dacs = [
'vicin',
'vcassh',
'vcal_n',
'vcal_p'
'vipre_out',
'vipre_cds',
'vdd_prot',
'vcmp_rl',
'vcmp_rr',
'vcal', 'vcas',
'vipre',
'vin_com',
'vin_cm',
'vrshaper',
'vrshaper_n',
'vrpreamp',
'vishaper',
'vipre_out',
'vcom_adc1',
'vcom_adc2',
'vcom_cds',
'vdcsh',
'v_chip',
'vb_comp',
'vb_comp_adc',
'vb_comp_fe',
'vb_cs',
'vb_ds',
'vb_opa_1st',
'vb_opa_fd',
'vb_pixbuf',
'vb_sda',
'vbp_colbuf',
'vcal_p',
'vcasc_out',
'vcasc_sfp',
'vcascn_pb',
'vcascp_pb',
'vchip_comp_adc',
'vchip_comp_fe',
'vchip_cs',
'vchip_opa_1st',
'vchip_opa_fd',
'vchip_ref_comp_fe',
]
intentionally_missing = [ intentionally_missing = [
'temp_10ge', #temperatures already available from enum or specialized class 'temp_10ge', #temperatures already available from enum or specialized class
'temp_adc', 'temp_adc',
@ -32,9 +81,13 @@ intentionally_missing = [
'temp_sodl', 'temp_sodl',
'temp_sodr', 'temp_sodr',
'trigger', #use sendSoftwareTrigger 'trigger', #use sendSoftwareTrigger
'update', #use updateServerAndFirmare
'udp_validate', #use validateUdpConfiguration
'udp_reconfigure', #use reconfigureUdpDestination
] ]
pycmd += intentionally_missing pycmd += intentionally_missing
pycmd += dacs
missing = [] missing = []
for c in cmd: for c in cmd:
if c not in pycmd: if c not in pycmd:

View File

@ -929,6 +929,18 @@ class Detector(CppDetectorApi):
fname = ut.make_string_path(fname) fname = ut.make_string_path(fname)
self.loadTrimbits(fname) self.loadTrimbits(fname)
@property
@element
def trimval(self):
"""
[Eiger][Mythen3] Set all trimbits to this value. Returns -1 if all trimbits are different values.
"""
return self.getAllTrimbits()
@trimval.setter
def trimval(self, value):
self.setAllTrimbits(value)
@property @property
def lock(self): def lock(self):
"""Lock detector to one client IP, 1 locks, 0 unlocks. Default is unlocked.""" """Lock detector to one client IP, 1 locks, 0 unlocks. Default is unlocked."""
@ -1009,6 +1021,16 @@ class Detector(CppDetectorApi):
""" """
return self._adc_register return self._adc_register
@property
@element
def triggersl(self):
return self.getNumberOfTriggersLeft()
@property
@element
def timestamp(self):
return self.getMeasurementTime()
@property @property
def led(self): def led(self):
"""[Ctb] Switches on/off all LEDs. Default is enabled. """ """[Ctb] Switches on/off all LEDs. Default is enabled. """
@ -1018,6 +1040,13 @@ class Detector(CppDetectorApi):
def led(self, value): def led(self, value):
self.setLEDEnable(value) self.setLEDEnable(value)
def acquire(self):
"""
Run the configured measurement
"""
super().acquire()
print('\n', end = '')
@property @property
def versions(self): def versions(self):
@ -1464,6 +1493,35 @@ class Detector(CppDetectorApi):
self.setVetoFile(chip_index, fname) self.setVetoFile(chip_index, fname)
@property
def vetophoton(self):
raise NotImplementedError('vetofile is set only')
@vetophoton.setter
def vetophoton(self, args):
chip_index, n_photons, photon_energy, fname = args
self.setVetoPhoton(chip_index, n_photons, photon_energy, fname)
@property
@element
def vetoref(self):
"""
[Gotthard2] Set veto reference for all 128 channels for all chips.
Examples:
----------
>>> d.vetoref = chip, value
"""
raise NotImplementedError('vetoref is set only')
@vetoref.setter
def vetoref(self, args):
gain_index, value = args
self.setVetoReference(gain_index, value)
""" """
Mythen3 specific Mythen3 specific
""" """