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triggersl and print fix for acq

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This commit is contained in:
Erik Frojdh
2020-09-03 16:21:15 +02:00
parent 22f14cacb0
commit 7048a75808
3 changed files with 116 additions and 4 deletions
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1
python/scripts/basic.py
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@ -14,3 +14,4 @@ g = Gotthard2()
# j = Jungfrau()
# m = Mythen3()
m = Moench()

61
python/scripts/cmd_python.py
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@ -15,11 +15,60 @@ pycmd += ['vrf', 'vtr', 'vrs', 'vtgstv', 'vsvn', 'vtrim',
'vpreamp', 'vref_comp', 'vref_comp_fe vref_ds', 'vref_h_adc',
'vref_l_adc', 'iodelay', 'list', 'vref_ds', 'vis', 'vpl',
'vref_comp_fe', 'vph', 'vout_cm', 'vcp', 'vcn', 'vcmp_ll', 'vcmp_lr'
, 'vcmp_rl', 'vcmp_rr', 'vcal', 'vcas', 'vipre',
'vin_com', 'vin_cm', 'vrshaper', 'vrshaper_n', 'vrpreamp', 'vishaper',
'vicin', 'vcassh', 'vcal_n', 'vcal_p']
# command : reason
]
# dacs are in general not included in the python commands and we expect to
# set them from the specialized class or using an enum
dacs = [
'vicin',
'vcassh',
'vcal_n',
'vcal_p'
'vipre_out',
'vipre_cds',
'vdd_prot',
'vcmp_rl',
'vcmp_rr',
'vcal', 'vcas',
'vipre',
'vin_com',
'vin_cm',
'vrshaper',
'vrshaper_n',
'vrpreamp',
'vishaper',
'vipre_out',
'vcom_adc1',
'vcom_adc2',
'vcom_cds',
'vdcsh',
'v_chip',
'vb_comp',
'vb_comp_adc',
'vb_comp_fe',
'vb_cs',
'vb_ds',
'vb_opa_1st',
'vb_opa_fd',
'vb_pixbuf',
'vb_sda',
'vbp_colbuf',
'vcal_p',
'vcasc_out',
'vcasc_sfp',
'vcascn_pb',
'vcascp_pb',
'vchip_comp_adc',
'vchip_comp_fe',
'vchip_cs',
'vchip_opa_1st',
'vchip_opa_fd',
'vchip_ref_comp_fe',
]
intentionally_missing = [
'temp_10ge', #temperatures already available from enum or specialized class
'temp_adc',
@ -32,9 +81,13 @@ intentionally_missing = [
'temp_sodl',
'temp_sodr',
'trigger', #use sendSoftwareTrigger
'update', #use updateServerAndFirmare
'udp_validate', #use validateUdpConfiguration
'udp_reconfigure', #use reconfigureUdpDestination
]
pycmd += intentionally_missing
pycmd += dacs
missing = []
for c in cmd:
if c not in pycmd: