mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-23 01:58:00 +02:00
gotthard2: first edit
This commit is contained in:
@ -144,10 +144,22 @@
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#define ASIC_INT_EXPTIME_MSB_REG (0x05 * REG_OFFSET + BASE_ASIC)
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/* Packetizer -------------------------------------------------------------*/
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/* Packetizer Config Register*/
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#define PKT_CONFIG_REG (0x00 * REG_OFFSET + BASE_PKT)
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#define PKT_CONFIG_NRXR_MAX_OFST (0)
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#define PKT_CONFIG_NRXR_MAX_MSK (0x0000003F << PKT_CONFIG_NRXR_MAX_OFST)
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#define PKT_CONFIG_RXR_START_ID_OFST (8)
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#define PKT_CONFIG_RXR_START_ID_MSK (0x0000003F << PKT_CONFIG_RXR_START_ID_OFST)
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/* Flow control registers --------------------------------------------------*/
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/* Flow status Register*/
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#define FLOW_STATUS_REG (0x00 * REG_OFFSET + BASE_FLOW_CONTROL)
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#define FLOW_STATUS_RUN_BUSY_OFST (0)
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#define FLOW_STATUS_RUN_BUSY_MSK (0x00000001 << FLOW_STATUS_RUN_BUSY_OFST)
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#define FLOW_STATUS_WAIT_FOR_TRGGR_OFST (3)
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Binary file not shown.
@ -22,6 +22,7 @@
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// Global variable from slsDetectorServer_funcs
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extern int debugflag;
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extern int checkModuleFlag;
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extern udpStruct udpDetails;
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int initError = OK;
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@ -44,6 +45,7 @@ int injectedChannelsIncrement = 0;
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int vetoReference[NCHIP][NCHAN];
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uint8_t adcConfiguration[NCHIP][NADC];
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int burstMode = 0;
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enum burstModeType burstType = INTERNAL;
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int64_t exptime_ns = 0;
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int64_t period_ns = 0;
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int64_t nframes = 0;
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@ -345,7 +347,10 @@ void setupDetector() {
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injectedChannelsOffset = 0;
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injectedChannelsIncrement = 0;
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burstMode = 0;
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burstType = INTERNAL;
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exptime_ns = 0;
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period_ns = 0;
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nframes = 0;
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{
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int i, j;
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for (i = 0; i < NUM_CLOCKS; ++i) {
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@ -385,11 +390,45 @@ void setupDetector() {
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// Default values
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setHighVoltage(DEFAULT_HIGH_VOLTAGE);
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// also sets default dac and on chip dac values
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// check module type attached if not in debug mode
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{
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int ret = checkDetectorType();
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if (checkModuleFlag) {
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switch (ret) {
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case -1:
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sprintf(initErrorMessage, "Could not get the module type attached.\n");
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initError = FAIL;
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FILE_LOG(logERROR, ("Aborting startup!\n\n", initErrorMessage));
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return;
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case -2:
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sprintf(initErrorMessage, "No Module attached! Run server with -nomodule.\n");
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initError = FAIL;
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FILE_LOG(logERROR, ("Aborting startup!\n\n", initErrorMessage));
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return;
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case FAIL:
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sprintf(initErrorMessage, "Wrong Module (Not Gotthard2) attached!\n");
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initError = FAIL;
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FILE_LOG(logERROR, ("Aborting startup!\n\n", initErrorMessage));
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return;
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default:
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break;
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}
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} else {
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FILE_LOG(logINFOBLUE, ("In No-Module mode: Ignoring module type. Continuing.\n"));
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}
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}
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// power on chip
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powerChip(1);
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// also sets default dac and on chip dac values
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if (readConfigFile() == FAIL) {
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return;
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}
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setBurstMode(1);
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// set burst mode will take in burstType and also set it
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burstType = DEFAULT_BURST_TYPE;
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setBurstMode(DEFAULT_BURST_MODE);
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// Initialization of acquistion parameters
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setNumFrames(DEFAULT_NUM_FRAMES);
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@ -406,6 +445,10 @@ int readConfigFile() {
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return initError;
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}
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// inform FPGA that onchip dacs will be configured soon
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FILE_LOG(logINFO, ("Setting configuration starting bit\n"));
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bus_w(ASIC_CONFIG_REG, bus_r(ASIC_CONFIG_REG) | ASIC_CONFIG_RST_DAC_MSK);
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FILE* fd = fopen(CONFIG_FILE, "r");
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if(fd == NULL) {
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sprintf(initErrorMessage, "Could not open on-board detector server config file [%s].\n", CONFIG_FILE);
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@ -623,7 +666,7 @@ int readConfigFile() {
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int i = 0, j = 0;
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for (i = 0; i < NCHIP; ++i) {
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for (j = 0; j < NADC; ++j) {
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FILE_LOG(logDEBUG1, ("adc read %d %d: 0x%02hhx\n", i, j, adcConfiguration[i][j]));
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FILE_LOG(logDEBUG2, ("adc read %d %d: 0x%02hhx\n", i, j, adcConfiguration[i][j]));
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}
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}
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}
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@ -633,6 +676,10 @@ int readConfigFile() {
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FILE_LOG(logERROR, ("%s\n\n", initErrorMessage));
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} else {
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FILE_LOG(logINFOBLUE, ("Successfully read config file\n"));
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// inform FPGA that onchip dacs will be configured soon
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FILE_LOG(logINFO, ("Setting configuration done bit\n"));
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bus_w(ASIC_CONFIG_REG, bus_r(ASIC_CONFIG_REG) | ASIC_CONFIG_DONE_MSK);
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}
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return initError;
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}
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@ -723,6 +770,7 @@ int64_t getPeriod() {
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void setNumFramesBurst(int64_t val) {
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FILE_LOG(logINFO, ("Setting number of frames %d [Burst mode]\n", (int)val));
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bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) &~ ASIC_INT_FRAMES_MSK);
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bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) | (((int)val << ASIC_INT_FRAMES_OFST) & ASIC_INT_FRAMES_MSK));
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}
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@ -750,12 +798,12 @@ int setExptimeCont(int64_t val) {
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}
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int setExptimeBoth(int64_t val) {
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val *= (1E-9 * SYSTEM_C0);
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val *= (1E-9 * clkFrequency[SYSTEM_C0]);
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set64BitReg(val, ASIC_INT_EXPTIME_LSB_REG, ASIC_INT_EXPTIME_MSB_REG);
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// validate for tolerance
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int64_t retval = getExptimeBoth();
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val /= (1E-9 * SYSTEM_C0);
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val /= (1E-9 * clkFrequency[SYSTEM_C0]);
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if (val != retval) {
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return FAIL;
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}
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@ -763,18 +811,18 @@ int setExptimeBoth(int64_t val) {
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}
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int64_t getExptimeBoth() {
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return get64BitReg(ASIC_INT_EXPTIME_LSB_REG, ASIC_INT_EXPTIME_MSB_REG) / (1E-9 * SYSTEM_C0);
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return get64BitReg(ASIC_INT_EXPTIME_LSB_REG, ASIC_INT_EXPTIME_MSB_REG) / (1E-9 * clkFrequency[SYSTEM_C0]);
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}
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int setPeriodBurst(int64_t val) {
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FILE_LOG(logINFO, ("Setting period %lld ns [Burst mode]\n", (long long int)val));
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val *= (1E-9 * SYSTEM_C0);
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val *= (1E-9 * clkFrequency[SYSTEM_C0]);
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set64BitReg(val, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG);
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// validate for tolerance
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int64_t retval = getPeriod();
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val /= (1E-9 * SYSTEM_C0);
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int64_t retval = getPeriodBurst();
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val /= (1E-9 * clkFrequency[SYSTEM_C0]);
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if (val != retval) {
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return FAIL;
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}
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@ -782,16 +830,16 @@ int setPeriodBurst(int64_t val) {
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}
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int64_t getPeriodBurst() {
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return get64BitReg(ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG)/ (1E-9 * SYSTEM_C0);
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return get64BitReg(ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG)/ (1E-9 * clkFrequency[SYSTEM_C0]);
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}
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int setPeriodCont(int64_t val) {
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FILE_LOG(logINFO, ("Setting period %lld ns [Continuous mode]\n", (long long int)val));
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val *= (1E-9 * FIXED_PLL_FREQUENCY);
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set64BitReg(val, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG);
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set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
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// validate for tolerance
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int64_t retval = getPeriod();
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int64_t retval = getPeriodCont();
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val /= (1E-9 * FIXED_PLL_FREQUENCY);
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if (val != retval) {
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return FAIL;
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@ -800,7 +848,7 @@ int setPeriodCont(int64_t val) {
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}
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int64_t getPeriodCont() {
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return get64BitReg(ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG)/ (1E-9 * FIXED_PLL_FREQUENCY);
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return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/ (1E-9 * FIXED_PLL_FREQUENCY);
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}
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int setDelayAfterTrigger(int64_t val) {
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@ -1018,7 +1066,7 @@ int configureMAC() {
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return OK;
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#endif
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FILE_LOG(logINFOBLUE, ("Configuring MAC\n"));
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FILE_LOG(logINFO, ("\tSource IP : %d.%d.%d.%d \t\t(0x%08x)\n",
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(srcip>>24)&0xff,(srcip>>16)&0xff,(srcip>>8)&0xff,(srcip)&0xff, srcip));
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FILE_LOG(logINFO, ("\tSource MAC : %02x:%02x:%02x:%02x:%02x:%02x \t(0x%010llx)\n",
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@ -1424,11 +1472,11 @@ int setVetoPhoton(int chipIndex, int gainIndex, int* values) {
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FILE_LOG(logERROR, ("Unknown gain index %d\n", gainIndex));
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return FAIL;
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}
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FILE_LOG(logDEBUG1, ("Adding gain bits\n"));
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FILE_LOG(logDEBUG2, ("Adding gain bits\n"));
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int i = 0;
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for (i = 0; i < NCHAN; ++i) {
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values[i] |= gainValue;
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FILE_LOG(logDEBUG1, ("Value %d: 0x%x\n", i, values[i]));
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FILE_LOG(logDEBUG2, ("Value %d: 0x%x\n", i, values[i]));
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}
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}
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@ -1606,6 +1654,10 @@ int configureADC() {
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int setBurstMode(int burst) {
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FILE_LOG(logINFO, ("Setting %s Mode\n", burst == 1 ? "Burst" : "Continuous"));
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burstMode = burst;
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setBurstType(burstType);
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FILE_LOG(logINFO, ("\tSetting %s Mode in Chip\n", burst == 1 ? "Burst" : "Continuous"));
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int value = burst ? ASIC_GLOBAL_BURST_VALUE : ASIC_GLOBAL_CONT_VALUE;
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const int padding = 6; // due to address (4) to make it byte aligned
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@ -1644,22 +1696,59 @@ int setBurstMode(int burst) {
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return FAIL;
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}
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burstMode = burst;
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return configureADC();
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}
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int getBurstMode() {
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return burstMode;
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uint32_t addr = ASIC_CONFIG_REG;
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int runmode = bus_r (addr) & ASIC_CONFIG_RUN_MODE_MSK;
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switch (runmode) {
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case ASIC_CONFIG_RUN_MODE_INT_BURST_VAL:
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case ASIC_CONFIG_RUN_MODE_EXT_BURST_VAL:
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return 1;
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default:
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return 0;
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}
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}
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void setBurstType(enum burstModeType val) {
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uint32_t addr = ASIC_CONFIG_REG;
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uint32_t runmode = ASIC_CONFIG_RUN_MODE_CONT_VAL;
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if (burstMode) {
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switch (val) {
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case INTERNAL:
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runmode = ASIC_CONFIG_RUN_MODE_INT_BURST_VAL;
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break;
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case EXTERNAL:
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runmode = ASIC_CONFIG_RUN_MODE_EXT_BURST_VAL;
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break;
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default:
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FILE_LOG(logERROR, ("Unknown burst type %d\n", val));
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return;
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}
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FILE_LOG(logDEBUG1, ("Run mode: %d\n", runmode));
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bus_w(addr, bus_r(addr) &~ ASIC_CONFIG_RUN_MODE_MSK);
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bus_w(addr, bus_r(addr) | ((runmode << ASIC_CONFIG_RUN_MODE_OFST) & ASIC_CONFIG_RUN_MODE_MSK));
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}
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}
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enum burstModeType getBurstType() {
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uint32_t addr = ASIC_CONFIG_REG;
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int runmode = bus_r (addr) & ASIC_CONFIG_RUN_MODE_MSK;
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switch (runmode) {
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case ASIC_CONFIG_RUN_MODE_INT_BURST_VAL:
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return INTERNAL;
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case ASIC_CONFIG_RUN_MODE_EXT_BURST_VAL:
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return EXTERNAL;
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default:
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FILE_LOG(logERROR, ("Unknown burst type read from FPGA: %d\n", runmode));
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return -1;
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}
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}
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/* aquisition */
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int updateAcquisitionRegisters(char* mess) {
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int64_t exptime_ns = 0;
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int64_t period_ns = 0;
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int64_t nframes = 0;
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// burst mode
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if (burstMode) {
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// validate #frames in burst mode
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@ -1680,7 +1769,18 @@ int64_t nframes = 0;
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sprintf(mess, "Could not start acquisition because period could not be set in burst mode. Set %lld ns, got %lld ns.\n", (long long unsigned int)period_ns, getPeriodBurst());
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FILE_LOG(logERROR,(mess));
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return FAIL;
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}
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}
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// set continuous values to default (exptime same register)
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FILE_LOG(logINFO, ("Setting continuous mode registers to defaults\n"));
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// frames
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setNumFramesCont(1);
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// period
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if (setPeriodCont(0) == FAIL) {
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sprintf(mess, "Could not start acquisition because period could not be set in continuous mode. Set 0 ns, got %lld ns.\n", getPeriodCont());
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FILE_LOG(logERROR,(mess));
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return FAIL;
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}
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}
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// continuous
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else {
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@ -1698,6 +1798,16 @@ int64_t nframes = 0;
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FILE_LOG(logERROR,(mess));
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return FAIL;
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}
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// set burst values to default (exptime same register)
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FILE_LOG(logINFO, ("Setting burst mode registers to defaults\n"));
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setNumFramesBurst(1);
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// period
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if (setPeriodBurst(0) == FAIL) {
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sprintf(mess, "Could not start acquisition because period could not be set in burst mode. Set 0 ns, got %lld ns.\n", getPeriodBurst());
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FILE_LOG(logERROR,(mess));
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return FAIL;
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}
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}
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return OK;
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}
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@ -29,6 +29,8 @@
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#define TYPE_NO_MODULE_STARTING_VAL (800)
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/** Default Parameters */
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#define DEFAULT_BURST_MODE (1)
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#define DEFAULT_BURST_TYPE (INTERNAL)
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#define DEFAULT_NUM_FRAMES (1)
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#define DEFAULT_NUM_CYCLES (1)
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#define DEFAULT_EXPTIME (1 * 1000 * 1000) // 1 ms
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