From 6c329cffe0d0cb733ba2a8a3b4dc81142ba7bafd Mon Sep 17 00:00:00 2001 From: Martin Mueller Date: Thu, 10 Apr 2025 13:54:48 +0200 Subject: [PATCH] ctb: added altchip_id read register --- slsDetectorServers/ctbDetectorServer/RegisterDefs.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/slsDetectorServers/ctbDetectorServer/RegisterDefs.h b/slsDetectorServers/ctbDetectorServer/RegisterDefs.h index 61a1d74ea..2d5f65cc3 100644 --- a/slsDetectorServers/ctbDetectorServer/RegisterDefs.h +++ b/slsDetectorServers/ctbDetectorServer/RegisterDefs.h @@ -223,6 +223,9 @@ #define DBIT_INJECT_COUNTER_CLKDIV_OFST (8) // Additional clock divider for fake-data injection #define DBIT_INJECT_COUNTER_CLKDIV_MSK (0x000000FF << DBIT_INJECT_COUNTER_CLKDIV_OFST) +/* 64-bit FPGA chip ID. Unique for every device. read-only */ +#define FPGA_chipID_0_REG (0x48 << MEM_MAP_SHIFT) +#define FPGA_chipID_1_REG (0x49 << MEM_MAP_SHIFT) /* FIFO Transceiver In 64 bit RO register */ #define FIFO_TIN_LSB_REG (0x31 << MEM_MAP_SHIFT)