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changed speed to readoutspeed, added g2 speeds (108, 144)

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This commit is contained in:
maliakal_d
2021-10-07 18:39:18 +02:00
parent e2aa426966
commit 6b0e6a72df
18 changed files with 299 additions and 173 deletions
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17
slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c
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@ -690,7 +690,7 @@ void setupDetector() {
eiger_photonenergy = DEFAULT_PHOTON_ENERGY;
setParallelMode(DEFAULT_PARALLEL_MODE);
setOverFlowMode(DEFAULT_READOUT_OVERFLOW32_MODE);
setClockDivider(RUN_CLK, DEFAULT_CLK_SPEED); // clk_devider,half speed
setReadoutSpeed(DEFAULT_CLK_SPEED);
setIODelay(DEFAULT_IO_DELAY);
setTiming(DEFAULT_TIMING_MODE);
setNextFrameNumber(DEFAULT_STARTING_FRAME_NUMBER);
@ -1712,11 +1712,7 @@ int enableTenGigabitEthernet(int val) {
}
/* eiger specific - iodelay, pulse, rate, temp, activate, delay nw parameter */
int setClockDivider(enum CLKINDEX ind, int val) {
if (ind != RUN_CLK) {
LOG(logERROR, ("Unknown clock index: %d\n", ind));
return FAIL;
}
int setReadoutSpeed(int val) {
if (val >= 0) {
LOG(logINFO, ("Setting Read out Speed: %d\n", val));
#ifndef VIRTUAL
@ -1732,12 +1728,9 @@ int setClockDivider(enum CLKINDEX ind, int val) {
return OK;
}
int getClockDivider(enum CLKINDEX ind) {
if (ind != RUN_CLK) {
LOG(logERROR, ("Unknown clock index: %d\n", ind));
return FAIL;
}
return eiger_readoutspeed;
int getReadoutSpeed(int* retval) {
*retval = eiger_readoutspeed;
return OK;
}
int setIODelay(int val) {

26
slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c
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@ -2083,6 +2083,32 @@ int getVCOFrequency(enum CLKINDEX ind) {
return ALTERA_PLL_C10_GetVCOFrequency(pllIndex);
}
int setReadoutSpeed(int val) {
switch (val)
}
int getReadoutSpeed(int* retval) {
//TODO ASIC and ADIFreg need to check????
// clkdiv 2, 3, 4, 5?
if (clkDivider[READOUT_C0] == SPEED_108_CLKDIV_0 &&
clkDivider[READOUT_C1] == SPEED_108_CLKDIV_1 &&
getPhase(READOUT_C0, 1) == SPEED_108_CLKPHASE_DEG_1) {
*retval = G_108MHZ;
}
else if (clkDivider[READOUT_C0] == SPEED_144_CLKDIV_0 &&
clkDivider[READOUT_C1] == SPEED_144_CLKDIV_1 &&
getPhase(READOUT_C0, 1) == SPEED_144_CLKPHASE_DEG_1) {
*retval = G_144MHZ;
}
else {
*retval = -1;
return FAIL;
}
return OK;
}
int getMaxClockDivider() { return ALTERA_PLL_C10_GetMaxClockDivider(); }
int setClockDivider(enum CLKINDEX ind, int val) {

8
slsDetectorServers/gotthard2DetectorServer/slsDetectorServer_defs.h
View File

@ -59,6 +59,14 @@
#define DEFAULT_SYSTEM_C2 (5) //(144444448) // sync_clk, 144 MHz
#define DEFAULT_SYSTEM_C3 (5) //(144444448) // str_clk, 144 MHz
#define DEFAULT_READOUT_SPEED (G_108MHz)
#define SPEED_144_CLKDIV_0 (6)
#define SPEED_144_CLKDIV_1 (6)
#define SPEED_144_CLKPHASE_DEG_1 (125)
#define SPEED_108_CLKDIV_0 (8)
#define SPEED_108_CLKDIV_1 (8)
#define SPEED_108_CLKPHASE_DEG_1 (270)
/* Firmware Definitions */
#define FIXED_PLL_FREQUENCY (20000000) // 20MHz
#define INT_SYSTEM_C0_FREQUENCY (144000000) // 144 MHz

26
slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c
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@ -457,7 +457,7 @@ void setupDetector() {
return;
}
setClockDivider(RUN_CLK, HALF_SPEED);
setReadoutSpeed(HALF_SPEED);
cleanFifos();
resetCore();
@ -487,8 +487,6 @@ void setupDetector() {
// not applicable for chipv1.1
setStorageCellDelay(DEFAULT_STRG_CLL_DLY);
}
/*setClockDivider(RUN_CLK, HALF_SPEED); depends if all the previous stuff
* works*/
setTiming(DEFAULT_TIMING_MODE);
setNextFrameNumber(DEFAULT_STARTING_FRAME_NUMBER);
@ -1823,11 +1821,7 @@ void configureASICTimer() {
ASIC_CTRL_DS_TMR_VAL);
}
int setClockDivider(enum CLKINDEX ind, int val) {
if (ind != RUN_CLK) {
LOG(logERROR, ("Unknown clock index %d to set speed\n", ind));
return FAIL;
}
int setReadoutSpeed(int val) {
// stop state machine if running
if (runBusy()) {
stopStateMachine();
@ -1923,23 +1917,21 @@ int setClockDivider(enum CLKINDEX ind, int val) {
return OK;
}
int getClockDivider(enum CLKINDEX ind) {
if (ind != RUN_CLK) {
LOG(logERROR, ("Unknown clock index %d to get speed\n", ind));
return -1;
}
int getReadoutSpeed(int* retval) {
u_int32_t speed = bus_r(CONFIG_REG) & CONFIG_READOUT_SPEED_MSK;
switch (speed) {
case CONFIG_FULL_SPEED_40MHZ_VAL:
return FULL_SPEED;
*retval = FULL_SPEED;
case CONFIG_HALF_SPEED_20MHZ_VAL:
return HALF_SPEED;
*retval = HALF_SPEED;
case CONFIG_QUARTER_SPEED_10MHZ_VAL:
return QUARTER_SPEED;
retval = QUARTER_SPEED;
default:
LOG(logERROR, ("Unknown speed val: %d\n", speed));
return -1;
*retval == -1;
return FAIL;
}
return OK;
}
int setPhase(enum CLKINDEX ind, int val, int degrees) {

10
slsDetectorServers/slsDetectorServer/include/slsDetectorFunctionList.h
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@ -470,8 +470,8 @@ int autoCompDisable(int on);
int setComparatorDisableTime(int64_t val);
int64_t getComparatorDisableTime();
void configureASICTimer();
int setClockDivider(enum CLKINDEX ind, int val);
int getClockDivider(enum CLKINDEX ind);
int setReadoutSpeed(int val);
int getReadoutSpeed(int* retval);
int setPhase(enum CLKINDEX ind, int val, int degrees);
int getPhase(enum CLKINDEX ind, int degrees);
int getMaxPhase(enum CLKINDEX ind);
@ -495,8 +495,8 @@ uint64_t getSelectCurrentSource();
// eiger specific - iodelay, pulse, rate, temp, activate, delay nw parameter
#elif EIGERD
int setClockDivider(enum CLKINDEX ind, int val);
int getClockDivider(enum CLKINDEX ind);
int setReadoutSpeed(int val);
int getReadoutSpeed(int* retval);
int setIODelay(int val);
int setCounterBit(int val);
int pulsePixel(int n, int x, int y);
@ -548,6 +548,8 @@ int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval);
// void setFrequency(enum CLKINDEX ind, int val);
int getFrequency(enum CLKINDEX ind);
int getVCOFrequency(enum CLKINDEX ind);
int setReadoutSpeed(int val);
int getReadoutSpeed(int* retval);
int getMaxClockDivider();
int setClockDivider(enum CLKINDEX ind, int val);
int getClockDivider(enum CLKINDEX ind);

4
slsDetectorServers/slsDetectorServer/include/slsDetectorServer_funcs.h
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@ -272,4 +272,6 @@ int set_dest_udp_list(int);
int get_num_dest_list(int);
int clear_all_udp_dst(int);
int get_udp_first_dest(int);
int set_udp_first_dest(int);
int set_udp_first_dest(int);
int get_readout_speed(int);
int set_readout_speed(int);

164
slsDetectorServers/slsDetectorServer/src/slsDetectorServer_funcs.c
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@ -410,7 +410,8 @@ void function_table() {
flist[F_CLEAR_ALL_UDP_DEST] = &clear_all_udp_dst;
flist[F_GET_UDP_FIRST_DEST] = &get_udp_first_dest;
flist[F_SET_UDP_FIRST_DEST] = &set_udp_first_dest;
flist[F_GET_READOUT_SPEED] = &get_readout_speed;
flist[F_SET_READOUT_SPEED] = &set_readout_speed;
// check
if (NUM_DET_FUNCTIONS >= RECEIVER_ENUM_START) {
LOG(logERROR, ("The last detector function enum has reached its "
@ -6010,46 +6011,21 @@ int set_clock_divider(int file_des) {
return printSocketReadError();
LOG(logDEBUG1, ("Setting clock (%d) divider: %u\n", args[0], args[1]));
#if !defined(EIGERD) && !defined(JUNGFRAUD) && !defined(GOTTHARD2D) && \
!defined(MYTHEN3D)
#if !defined(GOTTHARD2D) && !defined(MYTHEN3D)
functionNotImplemented();
#else
// only set
if (Server_VerifyLock() == OK) {
int ind = args[0];
int val = args[1];
enum CLKINDEX c = 0;
switch (ind) {
// specific clock index
#if defined(EIGERD) || defined(JUNGFRAUD)
case RUN_CLOCK:
c = RUN_CLK;
break;
#endif
default:
// any clock index
#if defined(GOTTHARD2D) || defined(MYTHEN3D)
if (ind < NUM_CLOCKS) {
c = (enum CLKINDEX)ind;
break;
}
#endif
modeNotImplemented("clock index (divider set)", ind);
break;
}
// validate val range
if (ret != FAIL) {
#ifdef JUNGFRAUD
if (val == (int)FULL_SPEED && isHardwareVersion2()) {
ret = FAIL;
strcpy(mess,
"Full speed not implemented for this board version.\n");
LOG(logERROR, (mess));
} else
#endif
#if defined(GOTTHARD2D) || defined(MYTHEN3D)
if (val < 2 || val > getMaxClockDivider()) {
if (args[0] >= NUM_CLOCKS) {
modeNotImplemented("clock index (divider set)", args[0]);
}
if (ret == OK) {
enum CLKINDEX c = (enum CLKINDEX)args[0];
int val = args[1];
// validate val range
if (val < 2 || val > getMaxClockDivider()) {
char *clock_names[] = {CLK_NAMES};
ret = FAIL;
sprintf(mess,
@ -6058,24 +6034,12 @@ int set_clock_divider(int file_des) {
clock_names[c], (int)c, val, getMaxClockDivider());
LOG(logERROR, (mess));
}
#else
if (val < (int)FULL_SPEED || val > (int)QUARTER_SPEED) {
ret = FAIL;
sprintf(mess,
"Cannot set speed to %d. Value should be in range "
"[%d-%d]\n",
val, (int)FULL_SPEED, (int)QUARTER_SPEED);
LOG(logERROR, (mess));
}
#endif
}
if (ret != FAIL) {
char modeName[50] = "speed";
#if defined(GOTTHARD2D) || defined(MYTHEN3D)
char modeName[50];
char *clock_names[] = {CLK_NAMES};
sprintf(modeName, "%s clock (%d) divider", clock_names[c], (int)c);
#endif
if (getClockDivider(c) == val) {
LOG(logINFO, ("Same %s: %d\n", modeName, val));
} else {
@ -6105,29 +6069,15 @@ int get_clock_divider(int file_des) {
return printSocketReadError();
LOG(logDEBUG1, ("Getting clock (%d) divider\n", arg));
#if !defined(EIGERD) && !defined(JUNGFRAUD) && !defined(GOTTHARD2D) && \
!defined(MYTHEN3D)
#if !defined(GOTTHARD2D) && !defined(MYTHEN3D)
functionNotImplemented();
#else
// get only
enum CLKINDEX c = 0;
switch (arg) {
#if defined(EIGERD) || defined(JUNGFRAUD)
case RUN_CLOCK:
c = RUN_CLK;
break;
#endif
default:
#if defined(GOTTHARD2D) || defined(MYTHEN3D)
if (arg < NUM_CLOCKS) {
c = (enum CLKINDEX)arg;
break;
}
#endif
modeNotImplemented("clock index (divider get)", arg);
break;
}
if (arg >= NUM_CLOCKS) {
modeNotImplemented("clock index (divider set)", arg);
}
if (ret == OK) {
enum CLKINDEX c = (enum CLKINDEX)arg;
retval = getClockDivider(c);
char *clock_names[] = {CLK_NAMES};
LOG(logDEBUG1, ("retval %s clock (%d) divider: %d\n", clock_names[c],
@ -9288,3 +9238,81 @@ int set_udp_first_dest(int file_des) {
#endif
return Server_SendResult(file_des, INT32, NULL, 0);
}
int get_readout_speed(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int retval = -1;
LOG(logDEBUG1, ("Getting readout speed\n"));
#if !defined(JUNGFRAU) && !defined(EIGER) && !defined(GOTTHARD2D)
functionNotImplemented();
#else
// get only
ret = getReadoutSpeed(&retval);
LOG(logDEBUG1, ("retval readout speed: %d\n", retval));
if (ret == FAIL) {
strcpy(mess, "Could not get readout speed\n");
LOG(logERROR, (mess));
}
#endif
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
}
int set_readout_speed(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int arg = -1;
if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
return printSocketReadError();
LOG(logDEBUG1, ("Setting readout speed : %u\n", arg));
#if !defined(JUNGFRAU) && !defined(EIGER) && !defined(GOTTHARD2D)
functionNotImplemented();
#else
// only set
if (Server_VerifyLock() == OK) {
#ifdef JUNGFRAUD
if (arg == (int)FULL_SPEED && isHardwareVersion2()) {
ret = FAIL;
strcpy(mess,
"Full speed not implemented for this board version (v1.0).\n");
LOG(logERROR, (mess));
}
#endif
if (ret == OK) {
switch (arg) {
#if defined(EIGERD) || !defined(JUNGFRAUD)
case FULL_SPEED:
case HALF_SPEED:
case QUARTER_SPEED:
#elif GOTTHARD2D
case G_108MHZ:
case G_144MHZ:
#endif
break;
default:
modeNotImplemented("readout speed index", arg);
break;
}
ret = setReadoutSpeed(arg);
if (ret == FAIL) {
sprintf(mess, "Could not set readout speed to %d.\n", arg);
LOG(logERROR, (mess));
} else {
ret = getReadoutSpeed(&retval);
LOG(logDEBUG1, ("retval readout speed: %d\n", retval));
if (ret == FAIL) {
strcpy(mess, "Could not get readout speed\n");
LOG(logERROR, (mess));
}
validate(&ret, mess, arg, retval, "set readout speed", DEC);
}
}
}
#endif
return Server_SendResult(file_des, INT32, NULL, 0);
}