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ctb moench server update: (fw update): det id changed, status reg looks at anyfifofull instead of somefifofull, datapresent looks at corresponding analog/digital fifo empty, usleep after read strobe to sync different clock
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@ -29,9 +29,7 @@ enum CLKINDEX {RUN_CLK, ADC_CLK, SYNC_CLK, DBIT_CLK, NUM_CLOCKS};
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enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7};
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/* Hardware Definitions */
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#define NCHAN (36)
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#define NCHAN_ANALOG (32)
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#define NCHAN_DIGITAL (4)
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#define NCHAN (32)
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#define NCHIP (1)
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#define NDAC (8)
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#define DYNAMIC_RANGE (16)
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@ -65,11 +63,12 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7};
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#define DIGITAL_IO_DELAY_MAXIMUM_PS ((OUTPUT_DELAY_0_OTPT_STTNG_MSK >> OUTPUT_DELAY_0_OTPT_STTNG_OFST) * OUTPUT_DELAY_0_OTPT_STTNG_STEPS)
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#define WAIT_TME_US_FR_LK_AT_ME_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo
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#define WAIT_TME_US_FR_ACQDONE_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo
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#define WAIT_TIME_US_PLL (10 * 1000)
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#define WAIT_TIME_US_STP_ACQ (100)
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#define WAIT_TIME_CONFIGURE_MAC (500 * 1000)
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#define WAIT_TIME_PATTERN_READ (10)
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#define WAIT_TIME_FIFO_RD_STROBE (10)
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/* MSB & LSB DEFINES */
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#define MSB_OF_64_BIT_REG_OFST (32)
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