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Dac (#67)
* dac WIP * dacs WIP * DACs are working with names * namechanges of vrfsh->vshaper, vrfshnpol->vshaperneg * pattern for MY3, configure MAC for MY3
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committed by
Dhanya Thattil

parent
16f7b42533
commit
5f94b5c246
@ -428,7 +428,6 @@ format
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TEMPERATURE_FPGA2, /**< temperature sensor (fpga2 (eiger:febl) */
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TEMPERATURE_FPGA3, /**< temperature sensor (fpga3 (eiger:febr) */
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M_vIpre, /**< mythen 3 >*/
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M_vIbias, /**< mythen 3 >*/
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M_vIinSh, /**< mythen 3 >*/
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M_VdcSh, /**< mythen 3 >*/
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M_Vth2, /**< mythen 3 >*/
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@ -436,7 +435,6 @@ format
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M_Vth3, /**< mythen 3 >*/
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M_casSh, /**< mythen 3 >*/
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M_cas, /**< mythen 3 >*/
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M_vIbiasSh, /**< mythen 3 >*/
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M_vIcin, /**< mythen 3 >*/
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M_vIpreOut, /**< mythen 3 >*/
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V_POWER_A = 100, /**new chiptest board */
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