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Added 100 read writes to test fpga

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git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@45 951219d9-93cf-4727-9268-0efd64621fa3
This commit is contained in:
l_maliakal_d 2011-11-09 14:49:05 +00:00
parent dfcb43b330
commit 55ab200dbd
2 changed files with 43 additions and 33 deletions
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74
slsDetectorSoftware/gotthardDetectorServer/firmware_funcs.c
View File

@ -131,42 +131,52 @@ int setDummyRegister() {
valw=((valw&(~(0x1<<ddx)))+(((codata>>(24-i))&0x1)<<ddx));bus_w(offw,valw);//write data (i) valw=((valw&(~(0x1<<ddx)))+(((codata>>(24-i))&0x1)<<ddx));bus_w(offw,valw);//write data (i)
// printf("%d ", ((codata>>(24-i))&0x1)); // printf("%d ", ((codata>>(24-i))&0x1));
valw=((valw&(~(0x1<<cdx)))+(0x1<<cdx));bus_w(offw,valw);//clkup valw=((valw&(~(0x1<<cdx)))+(0x1<<cdx));bus_w(offw,valw);//clkup
} }
valw=((valw&(~(0x1<<csdx)))+(0x1<<csdx));bus_w(offw,valw); //csup valw=((valw&(~(0x1<<csdx)))+(0x1<<csdx));bus_w(offw,valw); //csup
valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
valw=0xffff; bus_w(offw,(valw)); // stop point =start point of course valw=0xffff; bus_w(offw,(valw)); // stop point =start point of course
printf("Writing %d in DAC(0-7) %d \n",dacvalue,dacnum); printf("Writing %d in DAC(0-7) %d \n",dacvalue,dacnum);
} }
*/ */
u_int32_t val,addr; u_int32_t val,addr;
addr = DUMMY_REG; addr = DUMMY_REG;
// (else use bs_w16) // (else use bs_w16)
int i;
for(i=0;i<100;i++)
//dummy register if(result==OK)
val=45; {
bus_w(addr, val); //dummy register
val=bus_r(addr); val=45;
if (val==45) { bus_w(addr, val);
printf("FPGA dummy register ok!! %x\n",val); val=bus_r(addr);
} else { if (val!=45) {
printf("FPGA dummy register wrong!! %x instead of 0xF0F0F0F0 \n",val); printf("ATTEMPT:%d:\tFPGA dummy register wrong!! %x instead of 0xF0F0F0F0 \n",i,val);
result=FAIL; result=FAIL;
// return FAIL; }
} //dummy register
//dummy register val=0x0F0F0F0F;
val=0x0F0F0F0F; bus_w(addr, val);
bus_w(addr, val); val=bus_r(addr);
val=bus_r(addr); if (val!=0x0F0F0F0F) {
if (val==0x0F0F0F0F) { printf("ATTEMPT:%d:\tFPGA dummy register wrong!! %x instead of 0x0F0F0F0F \n",i,val);
printf("FPGA dummy register ok!! %x\n",val); result=FAIL;
} else { }
printf("FPGA dummy register wrong!! %x instead of 0x0F0F0F0F \n",val); //dummy register
result=FAIL; val=0xF0F0F0F0;
// return FAIL; bus_w(DUMMY_REG, val);
} val=bus_r(DUMMY_REG);
if (val!=0xF0F0F0F0) {
printf("ATTEMPT:%d:\tFPGA dummy register wrong!! %x instead of 0xF0F0F0F0 \n",i,val);
result=FAIL;
}
}
if(result==OK)
{
printf("\n\n----------------------------------------------------------------------------------------------");
printf("\nATTEMPT 100: FPGA DUMMY REGISTER OK!!\n");
printf("----------------------------------------------------------------------------------------------\n\n");
}
return result; return result;
} }

2
slsDetectorSoftware/gotthardDetectorServer/registers_g.h
View File

@ -97,7 +97,7 @@
#define STOP_EXPOSURE_BIT 0x00000080 #define STOP_EXPOSURE_BIT 0x00000080
#define START_TRAIN_BIT 0x00000100 #define START_TRAIN_BIT 0x00000100
#define STOP_TRAIN_BIT 0x00000200 #define STOP_TRAIN_BIT 0x00000200
#define SYNC_RESET 0x80000000 #define SYNC_RESET 0x00000400
/* for status register */ /* for status register */
#define RUN_BUSY_BIT 0x00000001 #define RUN_BUSY_BIT 0x00000001