diff --git a/README.md b/README.md
index e142ff84b..98d313540 100755
--- a/README.md
+++ b/README.md
@@ -2,90 +2,67 @@
Detailed documentation can be found on the [official site.](https://www.psi.ch/detectors/users-support)
### Binaries
-Documentation to obtain the binaries via the conda package is available for [lib](https://github.com/slsdetectorgroup/sls_detector_lib) and [gui](https://github.com/slsdetectorgroup/sls_detector_gui)
+Binaries for the slsDetectorPackage are available through conda.
+```
+#Add conda channels
+conda config --add channels conda-forge
+conda config --add channels slsdetectorgroup
+
+conda install slsdetlib #only shared lib and command line
+conda install slsdet #python bindings (includes slsdetlib)
+conda install slsdetgui #gui (includes qt4)
+
+#Install specific version
+conda install slsdet=2020.03.02.dev0 #developer version from 3 March 2020
+
+```
### Source code
-One can also obtain the source code from this repository and compile while realizing the setup dependencies as required.
+One can also obtain the source code from this repository and compile.
```
git clone https://github.com/slsdetectorgroup/slsDetectorPackage.git
```
-#### Setup dependencies
-* Gui Client
-Requirements: Qt 4.8 and Qwt 6.0
-```
- export QTDIR=/usr/local/Trolltech/
- export QWTDIR=/usr/local/qwt-6.0.1/
-```
-If either of them does not exist, the GUI client will not be built.
+#### Dependencies
+* Lib: c++11 compiler (gcc=>4.8), ZeroMQ 4
+* Gui: Qt 4.8 and Qwt 6.0
+* Calibration wizards and ctbGUI: ROOT
+* Optional: HDF5
-* Advanced user Calibration wizards
-Requirements: ROOT
-```
- export ROOTSYS=/usr/local/root-5.34
-```
#### Compilation
-Compiling can be done in two ways.
+Compiling can be done in two ways. Either with the convenience script
+cmk.sh or directly with cmake for more control.
**1. Compile using script cmk.sh**
After compiling, the libraries and executables will be found in `slsDetectorPackage/build/bin` directory
-Usage: [-c] [-b] [-h] [-d HDF5 directory] [-j]
- * -[no option]: only make
- * -c: Clean
- * -b: Builds/Rebuilds CMake files normal mode
- * -h: Builds/Rebuilds Cmake files with HDF5 package
- * -d: HDF5 Custom Directory
- * -t: Build/Rebuilds only text client
- * -r: Build/Rebuilds only receiver
- * -g: Build/Rebuilds only gui
- * -j: Number of threads to compile through
- * -e: Debug mode
-
-Basic Option:
-./cmk.sh -b
-
-For only make:
-./cmk.sh
-
-For make clean;make:
-./cmk.sh -c
-
-For using hdf5 without custom dir /blabla:
-./cmk.sh -h -d /blabla
-
-For rebuilding cmake without hdf5
-./cmk.sh -b
-
-For using multiple cores to compile faster:
-./cmk.sh -j9
-
-
-For rebuilding only certain sections
-./cmk.sh -tg #only text client and gui
-./cmk.sh -r #only receiver
-
+Usage: [-c] [-b] [-p] [e] [t] [r] [g] [s] [u] [i] [-h] [-d ] [-j]
+ -[no option]: only make
+ -c: Clean
+ -b: Builds/Rebuilds CMake files normal mode
+ -p: Builds/Rebuilds Python API
+ -h: Builds/Rebuilds Cmake files with HDF5 package
+ -d: HDF5 Custom Directory
+ -t: Build/Rebuilds only text client
+ -r: Build/Rebuilds only receiver
+ -g: Build/Rebuilds only gui
+ -s: Simulator
+ -u: Chip Test Gui
+ -j: Number of threads to compile through
+ -e: Debug mode
+ -i: Builds tests
+
+eg. Rebuild when you switch to a new build and compile in parallel:
+./cmk.sh -bj5
**2. Compile without script**
-Use cmake to create out-of-source builds, by creating a build folder parallel to source directory.
+Use cmake to create out-of-source builds, by creating a build folder parallel to source directory. This would create a debug build with address sanitizers.
```
- $ cd ..
- $ mkdir slsDetectorPackage-build
- $ cd slsDetectorPackage-build
- $ cmake ../slsDetectorPackage -DCMAKE_BUILD_TYPE=Debug -DSLS_USE_HDF5=OFF
- $ make
-```
-
-Use the following as an example to compile statically and using specific hdf5 folder
-```
- $ HDF5_ROOT=/opt/hdf5v1.10.0 cmake ../slsDetectorPackage -DCMAKE_BUILD_TYPE=Debug -DSLS_USE_HDF5=ON
- ```
-After compiling, the libraries and executables will be found at `bin` directory
-```
- $ ls bin/
- gui_client libSlsDetector.a libSlsDetector.so libSlsReceiver.a libSlsReceiver.so
- sls_detector_acquire sls_detector_get slsDetectorGui sls_detector_help sls_detector_put slsReceiver slsMultiReceiver
+ $ mkdir build
+ $ cd build
+ $ cmake ../slsDetectorPackage -DCMAKE_BUILD_TYPE=Debug -DSLS_USE_SANITIZER=ON
+ $ make -j12 #or whatever number of threads wanted
```
diff --git a/slsDetectorServers/gotthard2DetectorServer/RegisterDefs.h b/slsDetectorServers/gotthard2DetectorServer/RegisterDefs.h
index 1cf6c46ba..e9ad5e392 100644
--- a/slsDetectorServers/gotthard2DetectorServer/RegisterDefs.h
+++ b/slsDetectorServers/gotthard2DetectorServer/RegisterDefs.h
@@ -228,7 +228,7 @@
#define SET_DELAY_LSB_REG (0x22 * REG_OFFSET + BASE_FLOW_CONTROL)
#define SET_DELAY_MSB_REG (0x23 * REG_OFFSET + BASE_FLOW_CONTROL)
-/* Cylces 64bit Write-register */
+/* Cylces (also #bursts) 64bit Write-register */
#define SET_CYCLES_LSB_REG (0x24 * REG_OFFSET + BASE_FLOW_CONTROL)
#define SET_CYCLES_MSB_REG (0x25 * REG_OFFSET + BASE_FLOW_CONTROL)
@@ -236,7 +236,7 @@
#define SET_FRAMES_LSB_REG (0x26 * REG_OFFSET + BASE_FLOW_CONTROL)
#define SET_FRAMES_MSB_REG (0x27 * REG_OFFSET + BASE_FLOW_CONTROL)
-/* Period 64bit Write-register */
+/* Period (also burst period) 64bit Write-register */
#define SET_PERIOD_LSB_REG (0x28 * REG_OFFSET + BASE_FLOW_CONTROL)
#define SET_PERIOD_MSB_REG (0x29 * REG_OFFSET + BASE_FLOW_CONTROL)
diff --git a/slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServer_developer b/slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServer_developer
index 2bdf2b037..83d731e55 100755
Binary files a/slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServer_developer and b/slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServer_developer differ
diff --git a/slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c
index 59773421c..8d2143b59 100644
--- a/slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c
+++ b/slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c
@@ -39,6 +39,7 @@ int virtual_stop = 0;
enum detectorSettings thisSettings = UNINITIALIZED;
int32_t clkPhase[NUM_CLOCKS] = {};
uint32_t clkFrequency[NUM_CLOCKS] = {};
+uint32_t systemFrequency = 0;
int highvoltage = 0;
int dacValues[NDAC] = {0};
int onChipdacValues[ONCHIP_NDAC][NCHIP] = {0};
@@ -49,7 +50,6 @@ uint8_t adcConfiguration[NCHIP][NADC];
int burstMode = BURST_INTERNAL;
int64_t numTriggers = 1;
int64_t numBursts = 1;
-int64_t delayAfterTriggerNs = 0;
int64_t burstPeriodNs = 0;
int detPos[2] = {};
@@ -346,6 +346,7 @@ void setupDetector() {
clkFrequency[SYSTEM_C1] = DEFAULT_SYSTEM_C1;
clkFrequency[SYSTEM_C2] = DEFAULT_SYSTEM_C2;
clkFrequency[SYSTEM_C3] = DEFAULT_SYSTEM_C3;
+ systemFrequency = INT_SYSTEM_C0_FREQUENCY;
detPos[0] = 0;
detPos[1] = 0;
@@ -356,7 +357,6 @@ void setupDetector() {
burstMode = BURST_INTERNAL;
numTriggers = 1;
numBursts = 1;
- delayAfterTriggerNs = 0;
burstPeriodNs = 0;
{
int i, j;
@@ -394,6 +394,7 @@ void setupDetector() {
// on chip dacs
ASIC_Driver_SetDefines(ONCHIP_DAC_DRIVER_FILE_NAME);
#endif
+ setTimingSource(DEFAULT_TIMING_SOURCE);
// Default values
setHighVoltage(DEFAULT_HIGH_VOLTAGE);
@@ -448,7 +449,6 @@ void setupDetector() {
setBurstPeriod(DEFAULT_BURST_PERIOD);
setTiming(DEFAULT_TIMING_MODE);
setCurrentSource(DEFAULT_CURRENT_SOURCE);
- setTimingSource(DEFAULT_TIMING_SOURCE);
}
int readConfigFile() {
@@ -867,12 +867,12 @@ int setExptimeCont(int64_t val) {
}
int setExptimeBoth(int64_t val) {
- val *= (1E-9 * clkFrequency[SYSTEM_C0]);
+ val *= (1E-9 * systemFrequency);
set64BitReg(val, ASIC_INT_EXPTIME_LSB_REG, ASIC_INT_EXPTIME_MSB_REG);
// validate for tolerance
int64_t retval = getExptimeBoth();
- val /= (1E-9 * clkFrequency[SYSTEM_C0]);
+ val /= (1E-9 * systemFrequency);
if (val != retval) {
return FAIL;
}
@@ -880,18 +880,18 @@ int setExptimeBoth(int64_t val) {
}
int64_t getExptimeBoth() {
- return get64BitReg(ASIC_INT_EXPTIME_LSB_REG, ASIC_INT_EXPTIME_MSB_REG) / (1E-9 * clkFrequency[SYSTEM_C0]);
+ return get64BitReg(ASIC_INT_EXPTIME_LSB_REG, ASIC_INT_EXPTIME_MSB_REG) / (1E-9 * systemFrequency);
}
int setPeriodBurst(int64_t val) {
FILE_LOG(logINFO, ("Setting period %lld ns [Burst mode]\n", val));
- val *= (1E-9 * clkFrequency[SYSTEM_C0]);
+ val *= (1E-9 * systemFrequency);
set64BitReg(val, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG);
// validate for tolerance
int64_t retval = getPeriodBurst();
- val /= (1E-9 * clkFrequency[SYSTEM_C0]);
+ val /= (1E-9 * systemFrequency);
if (val != retval) {
return FAIL;
}
@@ -900,17 +900,17 @@ int setPeriodBurst(int64_t val) {
int64_t getPeriodBurst() {
FILE_LOG(logDEBUG, ("Getting period [Burst mode]\n"));
- return get64BitReg(ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG)/ (1E-9 * clkFrequency[SYSTEM_C0]);
+ return get64BitReg(ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG)/ (1E-9 * systemFrequency);
}
int setPeriodCont(int64_t val) {
FILE_LOG(logINFO, ("Setting period %lld ns [Continuous mode]\n", val));
- val *= (1E-9 * FIXED_PLL_FREQUENCY);
+ val *= (1E-9 * systemFrequency);
set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
// validate for tolerance
int64_t retval = getPeriodCont();
- val /= (1E-9 * FIXED_PLL_FREQUENCY);
+ val /= (1E-9 * systemFrequency);
if (val != retval) {
return FAIL;
}
@@ -919,7 +919,7 @@ int setPeriodCont(int64_t val) {
int64_t getPeriodCont() {
FILE_LOG(logDEBUG, ("Getting period [Continuous mode]\n"));
- return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/ (1E-9 * FIXED_PLL_FREQUENCY);
+ return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/ (1E-9 * systemFrequency);
}
int setDelayAfterTrigger(int64_t val) {
@@ -928,17 +928,12 @@ int setDelayAfterTrigger(int64_t val) {
return FAIL;
}
FILE_LOG(logINFO, ("Setting delay after trigger %lld ns\n", val));
- delayAfterTriggerNs = val;
- val *= (1E-9 * FIXED_PLL_FREQUENCY);
- if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) {
- FILE_LOG(logINFO, ("\tBurst and Auto mode: not writing delay to register\n"));
- } else {
- set64BitReg(val, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG);
- }
+ val *= (1E-9 * systemFrequency);
+ set64BitReg(val, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG);
// validate for tolerance
int64_t retval = getDelayAfterTrigger();
- val /= (1E-9 * FIXED_PLL_FREQUENCY);
+ val /= (1E-9 * systemFrequency);
if (val != retval) {
return FAIL;
}
@@ -946,10 +941,7 @@ int setDelayAfterTrigger(int64_t val) {
}
int64_t getDelayAfterTrigger() {
- if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) {
- return delayAfterTriggerNs;
- }
- return get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY);
+ return get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG) / (1E-9 * systemFrequency);
}
int setBurstPeriod(int64_t val) {
@@ -959,16 +951,16 @@ int setBurstPeriod(int64_t val) {
}
FILE_LOG(logINFO, ("Setting burst period %lld ns\n", val));
burstPeriodNs = val;
- val *= (1E-9 * FIXED_PLL_FREQUENCY);
- if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) {
- set64BitReg(val, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG);
+ val *= (1E-9 * systemFrequency);
+ if (burstMode != BURST_OFF) {
+ set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
} else {
- FILE_LOG(logINFO, ("\tNot (Burst and Auto mode): not writing burst period to register\n"));
+ FILE_LOG(logINFO, ("\t(Continuous mode): not writing burst period to register\n"));
}
// validate for tolerance
int64_t retval = getBurstPeriod();
- val /= (1E-9 * FIXED_PLL_FREQUENCY);
+ val /= (1E-9 * systemFrequency);
if (val != retval) {
return FAIL;
}
@@ -976,8 +968,8 @@ int setBurstPeriod(int64_t val) {
}
int64_t getBurstPeriod() {
- if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) {
- return get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY);
+ if (burstMode != BURST_OFF) {
+ return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG) / (1E-9 * systemFrequency);
}
return burstPeriodNs;
}
@@ -991,11 +983,11 @@ int64_t getNumTriggersLeft() {
}
int64_t getDelayAfterTriggerLeft() {
- return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY);
+ return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) / (1E-9 * systemFrequency);
}
int64_t getPeriodLeft() {
- return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY);
+ return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) / (1E-9 * systemFrequency);
}
int64_t getFramesFromStart() {
@@ -1210,8 +1202,6 @@ void setTiming( enum timingMode arg){
FILE_LOG(logINFO, ("\tUpdating trigger/burst and delay/burst period registers\n"))
setNumTriggers(numTriggers);
setNumBursts(numBursts);
- setDelayAfterTrigger(delayAfterTriggerNs);
- setBurstPeriod(burstPeriodNs);
}
enum timingMode getTiming() {
@@ -1574,6 +1564,10 @@ int setClockDivider(enum CLKINDEX ind, int val) {
ALTERA_PLL_C10_SetOuputFrequency (pllIndex, clkIndex, newfreq);
clkFrequency[ind] = newfreq;
FILE_LOG(logINFO, ("\t%s clock (%d) divider set to %d (%d Hz)\n", clock_names[ind], ind, val, clkFrequency[ind]));
+ // update system frequency
+ if (ind == SYSTEM_C0) {
+ setTimingSource(getTimingSource());
+ }
// phase is reset by pll (when setting output frequency)
if (ind >= READOUT_C0) {
@@ -1890,10 +1884,9 @@ int setBurstMode(enum burstMode burst) {
return FAIL;
}
- FILE_LOG(logINFO, ("\tUpdating trigger/burst and delay/burst period registers\n"))
+ FILE_LOG(logINFO, ("\tUpdating trigger/burst and burst period registers\n"))
setNumTriggers(numTriggers);
setNumBursts(numBursts);
- setDelayAfterTrigger(delayAfterTriggerNs);
setBurstPeriod(burstPeriodNs);
// set number of frames and period again (set registers according to timing mode)
@@ -1982,10 +1975,12 @@ void setTimingSource(enum timingSourceType value) {
case TIMING_INTERNAL:
FILE_LOG(logINFO, ("Setting timing source to internal\n"));
bus_w(addr, (bus_r(addr) &~ CONTROL_TIMING_SOURCE_EXT_MSK));
+ systemFrequency = INT_SYSTEM_C0_FREQUENCY;
break;
case TIMING_EXTERNAL:
FILE_LOG(logINFO, ("Setting timing source to exernal\n"));
bus_w(addr, (bus_r(addr) | CONTROL_TIMING_SOURCE_EXT_MSK));
+ systemFrequency = clkFrequency[SYSTEM_C0];
break;
default:
FILE_LOG(logERROR, ("Unknown timing source %d\n", value));
diff --git a/slsDetectorServers/gotthard2DetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/gotthard2DetectorServer/slsDetectorServer_defs.h
index 0104a0ee3..27ad9568f 100644
--- a/slsDetectorServers/gotthard2DetectorServer/slsDetectorServer_defs.h
+++ b/slsDetectorServers/gotthard2DetectorServer/slsDetectorServer_defs.h
@@ -54,6 +54,7 @@
/* Firmware Definitions */
#define IP_HEADER_SIZE (20)
#define FIXED_PLL_FREQUENCY (20000000) // 20MHz
+#define INT_SYSTEM_C0_FREQUENCY (144000000) //144 MHz
#define READOUT_PLL_VCO_FREQ_HZ (866666688) // 866 MHz
#define SYSTEM_PLL_VCO_FREQ_HZ (722222224) // 722 MHz
diff --git a/slsSupportLib/include/versionAPI.h b/slsSupportLib/include/versionAPI.h
index 8f6161275..7707ef4fe 100644
--- a/slsSupportLib/include/versionAPI.h
+++ b/slsSupportLib/include/versionAPI.h
@@ -8,5 +8,5 @@
#define APIRECEIVER 0x200227
#define APIGUI 0x200227
#define APICTB 0x200227
-#define APIGOTTHARD2 0x200228
+#define APIGOTTHARD2 0x200303
#define APIMOENCH 0x200303