gotthard server works, fine tuning left

This commit is contained in:
2019-01-08 06:52:28 +01:00
parent 06a6d53a3f
commit 4b007b003a
7 changed files with 31 additions and 174 deletions

View File

@ -204,9 +204,13 @@ void AD9257_Configure(){
FILE_LOG(logINFO, ("\tBinary offset\n"));
AD9257_Set(AD9257_OUT_MODE_REG, AD9257_OUT_BINARY_OFST_VAL);
//output clock phase
FILE_LOG(logINFO, ("\tOutput clock phase\n")); //FIXME:??
//output clock phase
#ifdef GOTTHARDD
FILE_LOG(logINFO, ("\tOutput clock phase is at default: 180\n"));
#else
FILE_LOG(logINFO, ("\tOutput clock phase: 60\n"));
AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_60_VAL);
#endif
// lvds-iee reduced , binary offset
FILE_LOG(logINFO, ("\tLvds-iee reduced, binary offset\n"));
@ -216,18 +220,18 @@ void AD9257_Configure(){
FILE_LOG(logINFO, ("\tAll devices on chip to receive next command\n"));
AD9257_Set(AD9257_DEV_IND_2_REG,
AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK | AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK);
#ifdef GOTTHARDD
AD9257_Set(AD9257_DEV_IND_1_REG,
AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK );// FIXME: gotthard setting dco and ifco to off??
#else
AD9257_Set(AD9257_DEV_IND_1_REG,
AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK |
AD9257_CLK_CH_DCO_MSK | AD9257_CLK_CH_IFCO_MSK);
#endif
// vref 1.33
FILE_LOG(logINFO, ("\tVref 1.33\n"));// FIXME: needed for Gottthard? earlier not set (default 3.0 v)
// vref
#ifdef GOTTHARDD
FILE_LOG(logINFO, ("\tVref default at 2.0\n"));
#else
FILE_LOG(logINFO, ("\tVref 1.33\n"));
AD9257_Set(AD9257_VREF_REG, AD9257_VREF_1_33_VAL);
#endif
// no test mode
FILE_LOG(logINFO, ("\tNo test mode\n"));

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@ -4,6 +4,7 @@
#include "common.h"
#include "math.h"
#include <string.h>
/* LTC2620 DAC DEFINES */
// first 4 bits are 0 as this is a 12 bit dac
@ -190,6 +191,7 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) {
* @param chipIndex the chip to be set
*/
void LTC2620_Set(int cmd, int data, int dacaddr, int chipIndex) {
FILE_LOG(logDEBUG1, ("\tcmd:%d data:%d dacaddr:%d chipIndex:%d\n", cmd, data, dacaddr, chipIndex));
// ctb
if (LTC2620_Ndac > LTC2620_NUMCHANNELS)
LTC2620_SetDaisy(cmd, data, dacaddr, chipIndex);
@ -243,10 +245,9 @@ void LTC2620_SetDAC (int dacnum, int data) {
FILE_LOG(logDEBUG1,("\tWrite to Input Register and Update\n"));
}
LTC2620_Set(data, addr, cmd, ichip);
LTC2620_Set(cmd, data, addr, ichip);
}
/**
* Set dac in dac units or mV
* @param dacnum dac index
@ -256,6 +257,7 @@ void LTC2620_SetDAC (int dacnum, int data) {
* @returns OK or FAIL for success of operation
*/
int LTC2620_SetDACValue (int dacnum, int val, int mV, int* dacval) {
FILE_LOG(logDEBUG1, ("\tdacnum:%d, val:%d, mV:%d\n", dacnum, val, mV));
// validate index
if (dacnum < 0 || dacnum >= LTC2620_Ndac) {
FILE_LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum, LTC2620_Ndac - 1));
@ -289,5 +291,3 @@ int LTC2620_SetDACValue (int dacnum, int val, int mV, int* dacval) {
}
return OK;
}

View File

@ -89,7 +89,6 @@ void resetPeripheral();
#elif GOTTHARDD
void setPhaseShiftOnce();
void setPhaseShift(int numphaseshift);
void configureADC();
void cleanFifos();
void setADCSyncRegister();
void setDAQRegister();