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Revert "J9compdisable"

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This commit is contained in:
Dhanya Thattil
2021-08-02 17:11:03 +02:00
committed by GitHub
parent 35251da015
commit 4a2d76164f
23 changed files with 34 additions and 355 deletions
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33
slsDetectorServers/jungfrauDetectorServer/RegisterDefs.h
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@@ -98,21 +98,6 @@
#define TEMPERATURE_POLARITY_BIT (11)
#define TEMPERATURE_POLARITY_MSK (0x00000001 << TEMPERATURE_POLARITY_BIT)
/* Config Status Register for chip 1.1 */
#define CONFIG_V11_STATUS_REG (0x1D << MEM_MAP_SHIFT)
#define CONFIG_V11_STATUS_FLTR_CLL_OFST (0)
#define CONFIG_V11_STATUS_FLTR_CLL_MSK (0x00000FFF << CONFIG_V11_STATUS_FLTR_CLL_OFST)
#define CONFIG_V11_STATUS_STRG_CLL_OFST (12)
#define CONFIG_V11_STATUS_STRG_CLL_MSK (0x0000000F << CONFIG_V11_STATUS_STRG_CLL_OFST)
// CSM mode = high current (100%), low current (16%)
#define CONFIG_V11_STATUS_CRRNT_SRC_MODE_OFST (19)
#define CONFIG_V11_STATUS_CRRNT_SRC_MODE_MSK (0x00000001 << CONFIG_V11_STATUS_CRRNT_SRC_MODE_OFST)
#define CONFIG_V11_STATUS_FLTR_RSSTR_OFST (21)
#define CONFIG_V11_STATUS_FLTR_RSSTR_MSK (0x00000001 << CONFIG_V11_STATUS_FLTR_RSSTR_OFST)
#define CONFIG_V11_STATUS_AUTO_MODE_OVRRD_OFST (23)
#define CONFIG_V11_STATUS_AUTO_MODE_OVRRD_MSK (0x00000001 << CONFIG_V11_STATUS_AUTO_MODE_OVRRD_OFST)
/* Get Frames from Start 64 bit register (frames from last reset using
* CONTROL_CRST) */
#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT)
@@ -174,10 +159,8 @@
// (RDT + 1) * 25ns
#define CONFIG_RDT_TMR_OFST (0)
#define CONFIG_RDT_TMR_MSK (0x0000FFFF << CONFIG_RDT_TMR_OFST)
// if 0, outer is the primary interface
// bottom via port 0 (outer)
#define CONFIG_OPRTN_MDE_2_X_10GbE_OFST (16)
#define CONFIG_OPRTN_MDE_2_X_10GbE_MSK (0x00000001 << CONFIG_OPRTN_MDE_2_X_10GbE_OFST)
#define CONFIG_OPRTN_MDE_2_X_10GbE_MSK (0x00000001 << CONFIG_OPRTN_MDE_2_X_10GbE_OFST) // if 0, outer is the primary interface
#define CONFIG_INNR_PRIMRY_INTRFCE_OFST (17)
#define CONFIG_INNR_PRIMRY_INTRFCE_MSK (0x00000001 << CONFIG_INNR_PRIMRY_INTRFCE_OFST)
#define CONFIG_READOUT_SPEED_OFST (20)
@@ -189,8 +172,6 @@
#define CONFIG_TDMA_ENABLE_MSK (0x00000001 << CONFIG_TDMA_ENABLE_OFST)
#define CONFIG_TDMA_TIMESLOT_OFST (25) // 1ms
#define CONFIG_TDMA_TIMESLOT_MSK (0x0000001F << CONFIG_TDMA_TIMESLOT_OFST)
#define CONFIG_BOTTOM_INVERT_STREAM_OFST (30)
#define CONFIG_BOTTOM_INVERT_STREAM_MSK (0x0000001F << CONFIG_BOTTOM_INVERT_STREAM_OFST)
#define CONFIG_ETHRNT_FLW_CNTRL_OFST (31)
#define CONFIG_ETHRNT_FLW_CNTRL_MSK (0x00000001 << CONFIG_ETHRNT_FLW_CNTRL_OFST)
@@ -253,6 +234,8 @@
#define CONFIG_V11_FLTR_RSSTR_MSK (0x00000001 << CONFIG_V11_FLTR_RSSTR_OFST)
#define CONFIG_V11_AUTO_MODE_OVRRD_OFST (23)
#define CONFIG_V11_AUTO_MODE_OVRRD_MSK (0x00000001 << CONFIG_V11_AUTO_MODE_OVRRD_OFST)
#define CONFIG_V11_WR_CHIP_CNFG_OFST (31)
#define CONFIG_V11_WR_CHIP_CNFG_MSK (0x00000001 << CONFIG_V11_WR_CHIP_CNFG_OFST)
/* Sample Register */
#define SAMPLE_REG (0x59 << MEM_MAP_SHIFT)
@@ -325,9 +308,11 @@
/** DAQ Register */
#define DAQ_REG (0x5D << MEM_MAP_SHIFT)
// dynamic gain (default)
#define DAQ_SETTINGS_MSK (DAQ_HIGH_GAIN_MSK | DAQ_FIX_GAIN_MSK | DAQ_FRCE_SWTCH_GAIN_MSK)
#define DAQ_HIGH_GAIN_OFST (0)
#define DAQ_HIGH_GAIN_MSK (0x00000001 << DAQ_HIGH_GAIN_OFST)
#define DAQ_FIX_GAIN_DYNMC_VAL ((0x0 << DAQ_HIGH_GAIN_OFST) & DAQ_HIGH_GAIN_MSK)
#define DAQ_FIX_GAIN_HIGHGAIN_VAL ((0x1 << DAQ_HIGH_GAIN_OFST) & DAQ_HIGH_GAIN_MSK)
#define DAQ_FIX_GAIN_OFST (1)
#define DAQ_FIX_GAIN_MSK (0x00000003 << DAQ_FIX_GAIN_OFST)
#define DAQ_FIX_GAIN_STG_1_VAL ((0x1 << DAQ_FIX_GAIN_OFST) & DAQ_FIX_GAIN_MSK)
@@ -338,7 +323,6 @@
#define DAQ_STRG_CELL_SLCT_MSK (0x0000000F << DAQ_STRG_CELL_SLCT_OFST)
#define DAQ_FRCE_SWTCH_GAIN_OFST (12)
#define DAQ_FRCE_SWTCH_GAIN_MSK (0x00000003 << DAQ_FRCE_SWTCH_GAIN_OFST)
#define DAQ_FRCE_GAIN_STG_0_VAL ((0x0 << DAQ_FRCE_SWTCH_GAIN_OFST) & DAQ_FRCE_SWTCH_GAIN_MSK)
#define DAQ_FRCE_GAIN_STG_1_VAL ((0x1 << DAQ_FRCE_SWTCH_GAIN_OFST) & DAQ_FRCE_SWTCH_GAIN_MSK)
#define DAQ_FRCE_GAIN_STG_2_VAL ((0x3 << DAQ_FRCE_SWTCH_GAIN_OFST) & DAQ_FRCE_SWTCH_GAIN_MSK)
#define DAQ_ELCTRN_CLLCTN_MDE_OFST (14)
@@ -395,11 +379,6 @@
#define FRAME_NUMBER_LSB_REG (0x6A << MEM_MAP_SHIFT)
#define FRAME_NUMBER_MSB_REG (0x6B << MEM_MAP_SHIFT)
/* Comparator disable time (chipv1.1) 32 bit register tT = T x 25 ns
Time before end of exposure when comparator is disabled */
#define COMP_DSBLE_TIME_REG (0x6C << MEM_MAP_SHIFT)
/* Trigger Delay 32 bit register */
#define SET_TRIGGER_DELAY_LSB_REG (0x70 << MEM_MAP_SHIFT)
#define SET_TRIGGER_DELAY_MSB_REG (0x71 << MEM_MAP_SHIFT)

BIN
slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServer_developer
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Binary file not shown.

73
slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c
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@@ -794,16 +794,6 @@ int selectStoragecellStart(int pos) {
bus_w(addr, bus_r(addr) & ~mask);
bus_w(addr, bus_r(addr) | ((value << offset) & mask));
}
// read value back
// chipv1.1, writing and reading registers are different
#ifndef VIRTUAL
if (getChipVersion() == 11) {
addr = CONFIG_V11_STATUS_REG;
mask = CONFIG_V11_STATUS_STRG_CLL_MSK;
offset = CONFIG_V11_STATUS_STRG_CLL_OFST;
}
#endif
int retval = ((bus_r(addr) & mask) >> offset);
if (getChipVersion() == 11) {
// get which bit
@@ -1046,19 +1036,21 @@ enum detectorSettings setSettings(enum detectorSettings sett) {
// set settings
switch (sett) {
case DYNAMICGAIN:
bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_HIGH_GAIN_MSK);
bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_SETTINGS_MSK);
LOG(logINFO,
("Set settings - Dyanmic Gain [DAQ Reg:0x%x]\n", bus_r(DAQ_REG)));
("Set settings - Dyanmic Gain, DAQ Reg: 0x%x\n", bus_r(DAQ_REG)));
dacVals = defaultDacValue_G0;
break;
case DYNAMICHG0:
bus_w(DAQ_REG, bus_r(DAQ_REG) | DAQ_HIGH_GAIN_MSK);
LOG(logINFO, ("Set settings - Dyanmic High Gain 0 [DAQ Reg:0x%x]\n",
bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_SETTINGS_MSK);
bus_w(DAQ_REG, bus_r(DAQ_REG) | DAQ_FIX_GAIN_HIGHGAIN_VAL);
LOG(logINFO, ("Set settings - Dyanmic High Gain 0, DAQ Reg: 0x%x\n",
bus_r(DAQ_REG)));
dacVals = defaultDacValue_HG0;
break;
default:
LOG(logERROR, ("This settings %d is not defined\n", (int)sett));
LOG(logERROR,
("This settings is not defined for this detector %d\n", (int)sett));
return -1;
}
@@ -1115,53 +1107,6 @@ void validateSettings() {
enum detectorSettings getSettings() { return thisSettings; }
enum gainMode getGainMode() {
uint32_t retval = bus_r(DAQ_REG) & DAQ_FRCE_SWTCH_GAIN_MSK;
switch (retval) {
case DAQ_FRCE_GAIN_STG_0_VAL:
return NORMAL_GAIN_MODE;
case DAQ_FRCE_GAIN_STG_1_VAL:
return FORCE_SWITCH_G1;
case DAQ_FRCE_GAIN_STG_2_VAL:
return FORCE_SWITCH_G2;
default:
LOG(logERROR, ("This gain mode %d is not defined [DAQ reg: %d]\n",
(retval << DAQ_FRCE_SWTCH_GAIN_OFST), retval));
return -1;
}
}
void setGainMode(enum gainMode mode) {
uint32_t addr = DAQ_REG;
uint32_t value = bus_r(addr);
switch (mode) {
case NORMAL_GAIN_MODE:
value &= ~(DAQ_FRCE_SWTCH_GAIN_MSK);
bus_w(addr, value);
LOG(logINFO, ("Set gain mode - Normal Gain Mode [DAQ Reg:0x%x]\n",
bus_r(DAQ_REG)));
break;
case FORCE_SWITCH_G1:
value &= ~(DAQ_FRCE_SWTCH_GAIN_MSK);
value |= DAQ_FRCE_GAIN_STG_1_VAL;
bus_w(addr, value);
LOG(logINFO, ("Set gain mode - Force Switch G1 [DAQ Reg:0x%x]\n",
bus_r(DAQ_REG)));
break;
case FORCE_SWITCH_G2:
value &= ~(DAQ_FRCE_SWTCH_GAIN_MSK);
value |= DAQ_FRCE_GAIN_STG_2_VAL;
bus_w(addr, value);
LOG(logINFO, ("Set gain mode - Force Switch G2 [DAQ Reg:0x%x]\n",
bus_r(DAQ_REG)));
break;
default:
LOG(logERROR, ("This gain mode %d is not defined\n", (int)mode));
}
}
/* parameters - dac, adc, hv */
void setDAC(enum DACINDEX ind, int val, int mV) {
if (val < 0)
@@ -1637,9 +1582,7 @@ void configureChip() {
// only for chipv1.1
if (chipVersion == 11) {
LOG(logINFOBLUE, ("Configuring chip\n"));
// write same register values back to configure chip
uint32_t val = bus_r(CONFIG_V11_REG);
bus_w(CONFIG_V11_REG, val);
bus_w(CONFIG_V11_REG, bus_r(CONFIG_V11_REG) & CONFIG_V11_WR_CHIP_CNFG_MSK);
chipConfigured = 1;
}
}

2
slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h
View File

@@ -65,7 +65,7 @@ enum DACINDEX {
#define NUMSETTINGS (2)
#define NSPECIALDACS (3)
#define SPECIALDACINDEX {J_VREF_PRECH, J_VREF_DS, J_VREF_COMP};
#define SPECIALDACINDEX {J_VB_COMP, J_VREF_DS, J_VREF_COMP};
#define SPECIAL_DEFAULT_DYNAMIC_GAIN_VALS \
{ 1000, 500, 400 }
#define SPECIAL_DEFAULT_DYNAMICHG0_GAIN_VALS \

4
slsDetectorServers/slsDetectorServer/include/slsDetectorFunctionList.h
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@@ -301,10 +301,6 @@ enum detectorSettings setSettings(enum detectorSettings sett);
void validateSettings();
#endif
enum detectorSettings getSettings();
#ifdef JUNGFRAUD
enum gainMode getGainMode();
void setGainMode(enum gainMode mode);
#endif
// parameters - threshold
#ifdef EIGERD

2
slsDetectorServers/slsDetectorServer/include/slsDetectorServer_funcs.h
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@@ -257,5 +257,3 @@ int set_veto_algorithm(int);
int get_chip_version(int);
int get_default_dac(int);
int set_default_dac(int);
int get_gain_mode(int);
int set_gain_mode(int);

63
slsDetectorServers/slsDetectorServer/src/slsDetectorServer_funcs.c
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@@ -382,8 +382,6 @@ void function_table() {
flist[F_GET_CHIP_VERSION] = &get_chip_version;
flist[F_GET_DEFAULT_DAC] = &get_default_dac;
flist[F_SET_DEFAULT_DAC] = &set_default_dac;
flist[F_GET_GAIN_MODE] = &get_gain_mode;
flist[F_SET_GAIN_MODE] = &set_gain_mode;
// check
if (NUM_DET_FUNCTIONS >= RECEIVER_ENUM_START) {
@@ -8553,63 +8551,4 @@ int set_default_dac(int file_des) {
}
#endif
return Server_SendResult(file_des, INT32, NULL, 0);
}
int get_gain_mode(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
enum gainMode retval = NORMAL_GAIN_MODE;
LOG(logDEBUG1, ("Getting gain mode\n"));
#ifndef JUNGFRAUD
functionNotImplemented();
#else
// get only
retval = getGainMode();
LOG(logDEBUG1, ("gainmode retval: %u\n", retval));
if ((int)retval == -1) {
ret = FAIL;
strcpy(mess, "Could not get gain mode.\n");
LOG(logERROR, (mess));
}
#endif
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
}
int set_gain_mode(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int arg = -1;
if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
return printSocketReadError();
enum gainMode gainmode = arg;
LOG(logINFO, ("Setting gain mode %d\n", (int)gainmode));
#ifndef JUNGFRAUD
functionNotImplemented();
#else
// only set
if (Server_VerifyLock() == OK) {
switch (gainmode) {
case NORMAL_GAIN_MODE:
case FORCE_SWITCH_G1:
case FORCE_SWITCH_G2:
break;
default:
modeNotImplemented("Gain Mode Index", (int)gainmode);
break;
}
setGainMode(gainmode);
int retval = getGainMode();
LOG(logDEBUG1, ("gainmode retval: %u\n", retval));
if (retval == -1) {
ret = FAIL;
strcpy(mess, "Could not get gain mode.\n");
LOG(logERROR, (mess));
}
validate(&ret, mess, arg, retval, "set gain mode", DEC);
}
#endif
return Server_SendResult(file_des, INT32, NULL, 0);
}
}