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https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-05-01 10:20:04 +02:00
gotthard2: burst mode fix for all the registers
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@ -47,10 +47,10 @@ int injectedChannelsIncrement = 0;
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int vetoReference[NCHIP][NCHAN];
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uint8_t adcConfiguration[NCHIP][NADC];
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int burstMode = BURST_INTERNAL;
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int64_t numTriggers = 1;
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int64_t delayNs = 0;
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int64_t numBursts = 1;
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int64_t burstPeriodNs = 0;
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int64_t numTriggersReg = 1;
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int64_t delayReg = 0;
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int64_t numBurstsReg = 1;
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int64_t burstPeriodReg = 0;
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int detPos[2] = {};
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int isInitCheckDone() {
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@ -355,9 +355,10 @@ void setupDetector() {
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injectedChannelsOffset = 0;
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injectedChannelsIncrement = 0;
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burstMode = BURST_INTERNAL;
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numTriggers = 1;
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numBursts = 1;
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burstPeriodNs = 0;
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numTriggersReg = 1;
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delayReg = 0;
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numBurstsReg = 1;
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burstPeriodReg = 0;
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{
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int i, j;
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for (i = 0; i < NUM_CLOCKS; ++i) {
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@ -761,7 +762,7 @@ void setNumTriggers(int64_t val) {
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LOG(logINFO, ("Setting number of triggers %lld\n", val));
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if (getTiming() == AUTO_TIMING) {
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LOG(logINFO, ("\tNot trigger mode: not writing to register\n"));
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numTriggers = val;
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numTriggersReg = val;
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} else {
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set64BitReg(val, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG);
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}
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@ -770,7 +771,7 @@ void setNumTriggers(int64_t val) {
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int64_t getNumTriggers() {
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if (getTiming() == AUTO_TIMING) {
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return numTriggers;
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return numTriggersReg;
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}
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return get64BitReg(SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG);
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}
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@ -779,19 +780,19 @@ void setNumBursts(int64_t val) {
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if (val > 0) {
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LOG(logINFO, ("Setting number of bursts %lld\n", val));
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if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) {
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set64BitReg(val, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG);
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set64BitReg(val, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
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} else {
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LOG(logINFO, ("\tNot (Burst and Auto mode): not writing to register\n"));
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numBursts = val;
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numBurstsReg = val;
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}
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}
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}
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int64_t getNumBursts() {
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if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) {
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return get64BitReg(SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG);
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return get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
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}
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return numBursts;
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return numBurstsReg;
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}
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int setExpTime(int64_t val) {
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@ -855,8 +856,7 @@ int setDelayAfterTrigger(int64_t val) {
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val *= (1E-9 * systemFrequency);
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if (getTiming() == AUTO_TIMING) {
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LOG(logINFO, ("\tNot trigger mode: not writing to register\n"));
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// tolerance
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delayNs = val/ (1E-9 * systemFrequency);
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delayReg = val;
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} else {
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set64BitReg(val, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG);
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}
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@ -871,7 +871,7 @@ int setDelayAfterTrigger(int64_t val) {
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int64_t getDelayAfterTrigger() {
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if (getTiming() == AUTO_TIMING) {
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return delayNs;
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return delayReg / (1E-9 * systemFrequency);
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}
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return get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG) / (1E-9 * systemFrequency);
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}
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@ -887,8 +887,7 @@ int setBurstPeriod(int64_t val) {
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set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
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} else {
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LOG(logINFO, ("\tNot (Burst and Auto mode): not writing to register\n"));
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// tolerance
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burstPeriodNs = val/ (1E-9 * systemFrequency);
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burstPeriodReg = val;
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}
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// validate for tolerance
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@ -904,7 +903,7 @@ int64_t getBurstPeriod() {
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if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) {
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return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG) / (1E-9 * systemFrequency);
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}
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return burstPeriodNs;
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return burstPeriodReg / (1E-9 * systemFrequency);
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}
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int64_t getNumFramesLeft() {
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@ -1120,10 +1119,16 @@ int setHighVoltage(int val){
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/* parameters - timing */
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void setTiming( enum timingMode arg){
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// update
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numTriggers = getNumTriggers();
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delayNs = getDelayAfterTrigger();
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numBursts = getNumBursts();
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burstPeriodNs = getBurstPeriod();
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// trigger
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if (getTiming() == TRIGGER_EXPOSURE) {
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numTriggersReg = get64BitReg(SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG);
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delayReg = get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG);
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}
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// auto and burst
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else if (burstMode != BURST_OFF) {
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numBurstsReg = get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
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burstPeriodReg = get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
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}
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switch(arg){
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case AUTO_TIMING:
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@ -1139,22 +1144,30 @@ void setTiming( enum timingMode arg){
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}
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LOG(logINFO, ("\tUpdating registers\n"))
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setNumTriggers(numTriggers);
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setDelayAfterTrigger(delayNs);
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setNumBursts(numBursts);
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setBurstPeriod(burstPeriodNs);
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// auto
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if (getTiming() == AUTO_TIMING) {
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LOG(logINFO, ("\tTrigger reg: 1, Delay reg: 0\n"))
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set64BitReg(1, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG);
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set64BitReg(0, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG);
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}
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// burst and trigger
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if (burstMode != BURST_OFF && getTiming() == TRIGGER_EXPOSURE) {
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// trigger
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if (getTiming() == TRIGGER_EXPOSURE) {
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set64BitReg(numTriggersReg, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG);
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set64BitReg(delayReg, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG);
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LOG(logINFO, ("\tTriggers reg: %lld, Delay reg: %lldns\n", getNumTriggers(), getDelayAfterTrigger()));
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// burst
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if (burstMode != BURST_OFF) {
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LOG(logINFO, ("\tFrame reg: 1, Period reg: 0\n"))
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set64BitReg(1, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
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set64BitReg(0, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
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}
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}
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// auto
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else {
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LOG(logINFO, ("\tTrigger reg: 1, Delay reg: 0\n"))
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set64BitReg(1, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG);
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set64BitReg(0, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG);
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// burst
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if (burstMode != BURST_OFF) {
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set64BitReg(numBurstsReg, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
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set64BitReg(burstPeriodReg, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
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LOG(logINFO, ("\tFrames reg (bursts): %lld, Period reg(burst period): %lldns\n", getNumBursts(), getBurstPeriod()));
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}
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}
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LOG(logINFO, ("\tDone Updating registers\n"))
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}
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@ -1831,33 +1844,60 @@ int setBurstMode(enum burstMode burst) {
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LOG(logINFO, ("Setting burst mode to %s\n", burst == BURST_OFF ? "off" : (burst == BURST_INTERNAL ? "internal" : "external")));
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// update
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int64_t frames = getNumFrames();
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int64_t period = getPeriod();
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numBursts = getNumBursts();
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burstPeriodNs = getBurstPeriod();
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int64_t framesReg = 0;
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int64_t periodReg = 0;
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// burst
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if (burstMode != BURST_OFF) {
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framesReg = ((bus_r(ASIC_INT_FRAMES_REG) & ASIC_INT_FRAMES_MSK) >> ASIC_INT_FRAMES_OFST);
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periodReg = get64BitReg(ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG);
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// auto
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if (getTiming() == AUTO_TIMING) {
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numBurstsReg = get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
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burstPeriodReg = get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
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}
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}
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// continuous
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else {
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framesReg = get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
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periodReg = get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
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}
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if (setBurstModeinFPGA(burst) == FAIL) {
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return FAIL;
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}
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LOG(logINFO, ("\tUpdating registers\n"));
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setNumFrames(frames);
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setPeriod(period);
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setNumBursts(numBursts);
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setBurstPeriod(burstPeriodNs);
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// continuous
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if (burstMode == BURST_OFF) {
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set64BitReg(framesReg, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
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set64BitReg(periodReg, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
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LOG(logINFO, ("\tFrames reg: %lld, Period reg: %lldns\n", getNumFrames(), getPeriod()));
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LOG(logINFO, ("\tInt. Frame reg: 1, Int. Period reg: 0\n"))
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bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) &~ ASIC_INT_FRAMES_MSK);
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bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) | ((1 << ASIC_INT_FRAMES_OFST) & ASIC_INT_FRAMES_MSK));
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set64BitReg(0, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG);
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}
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// burst and trigger
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if (burstMode != BURST_OFF && getTiming() == TRIGGER_EXPOSURE) {
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// burst
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else {
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bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) &~ ASIC_INT_FRAMES_MSK);
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bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) | (((int)framesReg << ASIC_INT_FRAMES_OFST) & ASIC_INT_FRAMES_MSK));
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set64BitReg(periodReg, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG);
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LOG(logINFO, ("\tInt. Frames reg: %lld, Int. Period reg: %lldns\n", getNumFrames(), getPeriod()));
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// trigger
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if (getTiming() == TRIGGER_EXPOSURE) {
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LOG(logINFO, ("\tFrame reg: 1, Period reg: 0\n"))
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set64BitReg(1, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
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set64BitReg(0, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
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}
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//auto
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else {
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set64BitReg(numBurstsReg, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
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set64BitReg(burstPeriodReg, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
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LOG(logINFO, ("\tFrames reg (bursts): %lld, Period reg(burst period): %lldns\n", getNumBursts(), getBurstPeriod()));
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}
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}
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LOG(logINFO, ("\tDone Updating registers\n"))
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LOG(logINFO, ("\tSetting %s Mode in Chip\n", burstMode == BURST_OFF ? "Continuous" : "Burst"));
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