diff --git a/slsDetectorServers/jungfrauDetectorServer/RegisterDefs.h b/slsDetectorServers/jungfrauDetectorServer/RegisterDefs.h index 1ac6c2139..562f065f8 100644 --- a/slsDetectorServers/jungfrauDetectorServer/RegisterDefs.h +++ b/slsDetectorServers/jungfrauDetectorServer/RegisterDefs.h @@ -16,6 +16,8 @@ /* Fix pattern register */ #define FIX_PATT_REG (0x01 << MEM_MAP_SHIFT) +#define FIX_PATT_VAL (0xACDC2014) + /* Status register */ #define STATUS_REG (0x02 << MEM_MAP_SHIFT) @@ -86,20 +88,21 @@ #define GET_FRAMES_LSB_REG (0x16 << MEM_MAP_SHIFT) #define GET_FRAMES_MSB_REG (0x17 << MEM_MAP_SHIFT) -/* Get Period 64 bit register */ +/* Get Period 64 bit register tT = T x 50 ns */ #define GET_PERIOD_LSB_REG (0x18 << MEM_MAP_SHIFT) #define GET_PERIOD_MSB_REG (0x19 << MEM_MAP_SHIFT) /** Get Temperature Carlos, incorrectl as get gates */ #define GET_TEMPERATURE_TMP112_REG (0x1c << MEM_MAP_SHIFT) // (after multiplying by 625) in 10ths of millidegrees of TMP112 -#define TEMPERATURE_POLARITY_BIT (15) +#define TEMPERATURE_VALUE_BIT (0) +#define TEMPERATURE_VALUE_MSK (0x000007FF << TEMPERATURE_VALUE_BIT) +#define TEMPERATURE_POLARITY_BIT (11) #define TEMPERATURE_POLARITY_MSK (0x00000001 << TEMPERATURE_POLARITY_BIT) -#define TEMPERATURE_VALUE_BIT (0) -#define TEMPERATURE_VALUE_MSK (0x00007FFF << TEMPERATURE_VALUE_BIT) -/* Get Frames from Start 64 bit register (frames from start Run Control) */ + +/* Get Frames from Start 64 bit register (frames from last reset using CONTROL_CRST) */ #define FRAMES_FROM_START_PG_LSB_REG (0x24 << MEM_MAP_SHIFT) #define FRAMES_FROM_START_PG_MSB_REG (0x25 << MEM_MAP_SHIFT) @@ -139,6 +142,15 @@ /* ADC Port Invert Register */ #define ADC_PORT_INVERT_REG (0x43 << MEM_MAP_SHIFT) +#define ADC_PORT_INVERT_ADC_0_OFST (0) +#define ADC_PORT_INVERT_ADC_0_MSK (0x000000FF << ADC_PORT_INVERT_ADC_0_OFST) +#define ADC_PORT_INVERT_ADC_1_OFST (8) +#define ADC_PORT_INVERT_ADC_1_MSK (0x000000FF << ADC_PORT_INVERT_ADC_1_OFST) +#define ADC_PORT_INVERT_ADC_2_OFST (16) +#define ADC_PORT_INVERT_ADC_2_MSK (0x000000FF << ADC_PORT_INVERT_ADC_2_OFST) +#define ADC_PORT_INVERT_ADC_3_OFST (24) +#define ADC_PORT_INVERT_ADC_3_MSK (0x000000FF << ADC_PORT_INVERT_ADC_3_OFST) + /* Receiver IP Address Register */ #define RX_IP_REG (0x45 << MEM_MAP_SHIFT) @@ -180,10 +192,12 @@ /* Configuration Register */ #define CONFIG_REG (0x4D << MEM_MAP_SHIFT) -#define CONFIG_OPERATION_MODE_OFST (16) -#define CONFIG_OPERATION_MODE_MSK (0x00000001 << CONFIG_OPERATION_MODE_OFST) -#define CONFIG_MODE_1_X_10GBE_VAL ((0x0 << CONFIG_OPERATION_MODE_OFST) & CONFIG_OPERATION_MODE_MSK) -#define CONFIG_MODE_2_X_10GBE_VAL ((0x1 << CONFIG_OPERATION_MODE_OFST) & CONFIG_OPERATION_MODE_MSK) +// readout timer (from chip) to stabilize (esp in burst acquisition mode) tRDT = (RDT + 1) * 25ns +#define CONFIG_RDT_TMR_OFST (0) +#define CONFIG_RDT_TMR_MSK (0x0000FFFF << CONFIG_RDT_TMR_OFST) +#define CONFIG_OPRTN_MDE_2_X_10GbE_OFST (16) +#define CONFIG_OPRTN_MDE_2_X_10GbE_MSK (0x00000001 << CONFIG_OPRTN_MDE_2_X_10GbE_OFST) +#define CONFIG_OPRTN_MDE_1_X_10GBE_VAL ((0x0 << CONFIG_OPRTN_MDE_2_X_10GbE_OFST) & CONFIG_OPRTN_MDE_2_X_10GbE_MSK) #define CONFIG_READOUT_SPEED_OFST (20) #define CONFIG_READOUT_SPEED_MSK (0x00000003 << CONFIG_READOUT_SPEED_OFST) #define CONFIG_QUARTER_SPEED_10MHZ_VAL ((0x0 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) @@ -191,17 +205,17 @@ #define CONFIG_FULL_SPEED_40MHZ_VAL ((0x2 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) #define CONFIG_TDMA_OFST (24) #define CONFIG_TDMA_MSK (0x00000001 << CONFIG_TDMA_OFST) -#define CONFIG_TDMA_DISABLE_VAL ((0x0 << CONFIG_TDMA_OFST) & CONFIG_TDMA_MSK) -#define CONFIG_TDMA_ENABLE_VAL ((0x1 << CONFIG_TDMA_OFST) & CONFIG_TDMA_MSK) -#define CONFIG_TDMA_TIMESLOT_OFST (25) +#define CONFIG_TDMA_DISABLE_VAL ((0x0 << CONFIG_TDMA_OFST) & CONFIG_TDMA_MSK) +#define CONFIG_TDMA_TIMESLOT_OFST (25) // 1ms #define CONFIG_TDMA_TIMESLOT_MSK (0x0000001F << CONFIG_TDMA_TIMESLOT_OFST) - +#define CONFIG_ETHRNT_FLW_CNTRL_OFST (31) +#define CONFIG_ETHRNT_FLW_CNTRL_MSK (0x00000001 << CONFIG_ETHRNT_FLW_CNTRL_OFST) /* External Signal Register */ #define EXT_SIGNAL_REG (0x4E << MEM_MAP_SHIFT) #define EXT_SIGNAL_OFST (0) -#define EXT_SIGNAL_MSK (0x00000003 << EXT_SIGNAL_OFST) //enabled when both bits high +#define EXT_SIGNAL_MSK (0x00000001 << EXT_SIGNAL_OFST) /* Control Register */ #define CONTROL_REG (0x4F << MEM_MAP_SHIFT) @@ -249,7 +263,7 @@ #define SAMPLE_ADC_SAMPLE_5_VAL ((0x5 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) #define SAMPLE_ADC_SAMPLE_6_VAL ((0x6 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) #define SAMPLE_ADC_SAMPLE_7_VAL ((0x7 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) - +// Decimation = ADF + 1 #define SAMPLE_ADC_DECMT_FACTOR_OFST (4) #define SAMPLE_ADC_DECMT_FACTOR_MSK (0x00000007 << SAMPLE_ADC_DECMT_FACTOR_OFST) #define SAMPLE_ADC_DECMT_FACTOR_0_VAL ((0x0 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) @@ -282,6 +296,7 @@ #define SAMPLE_DGTL_DECMT_FACTOR_OFST (12) #define SAMPLE_DGTL_DECMT_FACTOR_MSK (0x00000003 << SAMPLE_DGTL_DECMT_FACTOR_OFST) +// 1 = full speed, 2 = half speed, 4 = quarter speed #define SAMPLE_DECMT_FACTOR_1_VAL ((0x0 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK) #define SAMPLE_DECMT_FACTOR_2_VAL ((0x1 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK) #define SAMPLE_DECMT_FACTOR_4_VAL ((0x2 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK) @@ -292,7 +307,7 @@ #define VREF_COMP_MOD_OFST (0) #define VREF_COMP_MOD_MSK (0x00000FFF << VREF_COMP_MOD_OFST) #define VREF_COMP_MOD_ENABLE_OFST (31) -#define VREF_COMP_MOD_ENABLE_MSK (0x00000FFF << VREF_COMP_MOD_ENABLE_OFST) +#define VREF_COMP_MOD_ENABLE_MSK (0x00000001 << VREF_COMP_MOD_ENABLE_OFST) /** DAQ Register */ @@ -342,9 +357,9 @@ #define TEMP_CTRL_PROTCT_THRSHLD_MSK (0x000007FF << TEMP_CTRL_PROTCT_THRSHLD_OFST) #define TEMP_CTRL_PROTCT_ENABLE_OFST (16) #define TEMP_CTRL_PROTCT_ENABLE_MSK (0x00000001 << TEMP_CTRL_PROTCT_ENABLE_OFST) +// set when temp higher than over threshold, write 1 to clear it #define TEMP_CTRL_OVR_TMP_EVNT_OFST (31) #define TEMP_CTRL_OVR_TMP_EVNT_MSK (0x00000001 << TEMP_CTRL_OVR_TMP_EVNT_OFST) -#define TEMP_CTRL_CLR_OVR_TMP_EVNT_VAL ((0x1 << TEMP_CTRL_OVR_TMP_EVNT_OFST) & TEMP_CTRL_OVR_TMP_EVNT_MSK) /* Set Delay 64 bit register */ @@ -359,11 +374,11 @@ #define SET_FRAMES_LSB_REG (0x64 << MEM_MAP_SHIFT) #define SET_FRAMES_MSB_REG (0x65 << MEM_MAP_SHIFT) -/* Set Period 64 bit register */ +/* Set Period 64 bit register tT = T x 50 ns */ #define SET_PERIOD_LSB_REG (0x66 << MEM_MAP_SHIFT) #define SET_PERIOD_MSB_REG (0x67 << MEM_MAP_SHIFT) -/* Set Exptime 64 bit register */ +/* Set Exptime 64 bit register eEXP = Exp x 25 ns */ #define SET_EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) #define SET_EXPTIME_MSB_REG (0x69 << MEM_MAP_SHIFT) @@ -387,14 +402,17 @@ /* ASIC Control Register */ #define ASIC_CTRL_REG (0x7F << MEM_MAP_SHIFT) - +// tPC = (PCT + 1) * 25ns #define ASIC_CTRL_PRCHRG_TMR_OFST (0) #define ASIC_CTRL_PRCHRG_TMR_MSK (0x000000FF << ASIC_CTRL_PRCHRG_TMR_OFST) #define ASIC_CTRL_PRCHRG_TMR_VAL ((0x1F << ASIC_CTRL_PRCHRG_TMR_OFST) & ASIC_CTRL_PRCHRG_TMR_MSK) +// tDS = (DST + 1) * 25ns #define ASIC_CTRL_DS_TMR_OFST (8) #define ASIC_CTRL_DS_TMR_MSK (0x000000FF << ASIC_CTRL_DS_TMR_OFST) #define ASIC_CTRL_DS_TMR_VAL ((0x1F << ASIC_CTRL_DS_TMR_OFST) & ASIC_CTRL_DS_TMR_MSK) - +// tET = (ET + 1) * 25ns (increase timeout range between 2 consecutive storage cells) +#define ASIC_CTRL_EXPSRE_TMR_OFST (16) +#define ASIC_CTRL_EXPSRE_TMR_MSK (0x0000FFFF << ASIC_CTRL_EXPSRE_TMR_OFST) diff --git a/slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServer_refactor b/slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServer_refactor index 49afdb448..bc9469f9d 100755 Binary files a/slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServer_refactor and b/slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServer_refactor differ diff --git a/slsDetectorServers/jungfrauDetectorServer/common.h b/slsDetectorServers/jungfrauDetectorServer/common.h new file mode 120000 index 000000000..6776eb607 --- /dev/null +++ b/slsDetectorServers/jungfrauDetectorServer/common.h @@ -0,0 +1 @@ +../slsDetectorServer/common.h \ No newline at end of file diff --git a/slsDetectorServers/jungfrauDetectorServer/gitInfo.txt b/slsDetectorServers/jungfrauDetectorServer/gitInfo.txt index d5eb8a88a..620a09911 100644 --- a/slsDetectorServers/jungfrauDetectorServer/gitInfo.txt +++ b/slsDetectorServers/jungfrauDetectorServer/gitInfo.txt @@ -1,9 +1,9 @@ Path: slsDetectorPackage/slsDetectorServers/jungfrauDetectorServer URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git -Repsitory UUID: 91dd176a0fb314f583ca6e29140053f1eb742896 -Revision: 11 +Repsitory UUID: b5b5ce5c3782a201b449141448ebe99c69515c18 +Revision: 21 Branch: refactor Last Changed Author: Dhanya_Thattil -Last Changed Rev: 4166 -Last Changed Date: 2018-11-08 17:17:22.000000002 +0100 ./RegisterDefs.h +Last Changed Rev: 4214 +Last Changed Date: 2019-01-10 11:46:27.000000002 +0100 ./RegisterDefs.h diff --git a/slsDetectorServers/jungfrauDetectorServer/gitInfoJungfrau.h b/slsDetectorServers/jungfrauDetectorServer/gitInfoJungfrau.h index 07e4aa9c6..a11ead5e1 100644 --- a/slsDetectorServers/jungfrauDetectorServer/gitInfoJungfrau.h +++ b/slsDetectorServers/jungfrauDetectorServer/gitInfoJungfrau.h @@ -1,6 +1,6 @@ #define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git" -#define GITREPUUID "91dd176a0fb314f583ca6e29140053f1eb742896" +#define GITREPUUID "b5b5ce5c3782a201b449141448ebe99c69515c18" #define GITAUTH "Dhanya_Thattil" -#define GITREV 0x4166 -#define GITDATE 0x20181108 +#define GITREV 0x4214 +#define GITDATE 0x20190110 #define GITBRANCH "refactor" diff --git a/slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c index bc7873a2e..bddf781ac 100644 --- a/slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c +++ b/slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c @@ -1122,7 +1122,7 @@ void configureASICTimer() { bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_DS_TMR_MSK) | ASIC_CTRL_DS_TMR_VAL); } -int setClockDivider(int val) { +void setClockDivider(int val) { // setting if(val >= 0) { @@ -1470,6 +1470,7 @@ enum runStatus getRunStatus(){ //not running else { + // stopped or error if (retval & STOPPED_MSK) { FILE_LOG(logINFOBLUE, ("Status: STOPPED\n")); s = STOPPED; diff --git a/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h index 096a132ec..067239d7f 100644 --- a/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h +++ b/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h @@ -5,7 +5,7 @@ #define GOODBYE (-200) #define MIN_REQRD_VRSN_T_RD_API 0x171220 -#define REQRD_FRMWR_VRSN 0x180615 +#define REQRD_FRMWR_VRSN 0x181206 // temp bug fix from last version, timing mode is backwards compatible #define PROGRAMMING_MODE (0x2) #define BOARD_JUNGFRAU_TYPE (8) @@ -72,8 +72,6 @@ enum NETWORKINDEX { TXN_FRAME }; #define DAC_MAX_MV (2500) /* Defines in the Firmware */ -#define FIX_PATT_VAL (0xACDC2014) -#define ADC_PORT_INVERT_VAL (0x453b2a9c) #define MAX_TIMESLOT_VAL (0x1F) #define MAX_THRESHOLD_TEMP_VAL (127999) //millidegrees #define MAX_STORAGE_CELL_VAL (15) //0xF @@ -81,8 +79,8 @@ enum NETWORKINDEX { TXN_FRAME }; #define SAMPLE_ADC_HALF_SPEED (SAMPLE_DECMT_FACTOR_2_VAL + SAMPLE_DGTL_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_ADC_SAMPLE_0_VAL) /* 0x1000 */ #define SAMPLE_ADC_QUARTER_SPEED (SAMPLE_DECMT_FACTOR_4_VAL + SAMPLE_DGTL_SAMPLE_8_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_ADC_SAMPLE_0_VAL) /* 0x2810 */ -#define CONFIG_HALF_SPEED (CONFIG_TDMA_DISABLE_VAL + CONFIG_HALF_SPEED_20MHZ_VAL + CONFIG_MODE_1_X_10GBE_VAL) -#define CONFIG_QUARTER_SPEED (CONFIG_TDMA_DISABLE_VAL + CONFIG_QUARTER_SPEED_10MHZ_VAL + CONFIG_MODE_1_X_10GBE_VAL) +#define CONFIG_HALF_SPEED (CONFIG_TDMA_DISABLE_VAL + CONFIG_HALF_SPEED_20MHZ_VAL + CONFIG_OPRTN_MDE_1_X_10GBE_VAL) +#define CONFIG_QUARTER_SPEED (CONFIG_TDMA_DISABLE_VAL + CONFIG_QUARTER_SPEED_10MHZ_VAL + CONFIG_OPRTN_MDE_1_X_10GBE_VAL) #define ADC_OFST_HALF_SPEED_VAL (0x1f) //(0x20) #define ADC_OFST_QUARTER_SPEED_VAL (0x0f) //(0x0f) #define ADC_PHASE_HALF_SPEED (0x2D) //45 diff --git a/slsDetectorServers/slsDetectorServer/MAX1932.h b/slsDetectorServers/slsDetectorServer/MAX1932.h index 533fbd3a4..215836c32 100755 --- a/slsDetectorServers/slsDetectorServer/MAX1932.h +++ b/slsDetectorServers/slsDetectorServer/MAX1932.h @@ -57,13 +57,14 @@ void MAX1932_Disable() { /** * Set value * @param val value to set + * @return OK or FAIL */ -void MAX1932_Set (int val) { +int MAX1932_Set (int val) { FILE_LOG(logDEBUG1, ("\tSetting high voltage to %d\n", val)); if (val < 0) return FAIL; - uint32_t dacvalue = 0; + int dacvalue = 0; // limit values (normally < 60 => 0 (off)) if (val < MAX1932_MinVoltage) { @@ -87,6 +88,7 @@ void MAX1932_Set (int val) { FILE_LOG(logINFO, ("\t%dV (dacval %d)\n", val, dacvalue)); serializeToSPI(MAX1932_Reg, dacvalue, MAX1932_CsMask, MAX1932_HV_NUMBITS, MAX1932_ClkMask, MAX1932_DigMask, MAX1932_DigOffset); + return OK; } diff --git a/slsDetectorServers/slsDetectorServer/slsDetectorFunctionList.h b/slsDetectorServers/slsDetectorServer/slsDetectorFunctionList.h index ea097ee33..940b28079 100644 --- a/slsDetectorServers/slsDetectorServer/slsDetectorFunctionList.h +++ b/slsDetectorServers/slsDetectorServer/slsDetectorFunctionList.h @@ -253,7 +253,7 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop int powerChip (int on); int autoCompDisable(int on); void configureASICTimer(); -int setClockDivider(int val); +void setClockDivider(int val); int getClockDivider(); int setAdcPhase(int st); int getPhase();