mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-14 05:47:14 +02:00
Merge branch 'refactor' of github.com:slsdetectorgroup/slsDetectorPackage into refactor
This commit is contained in:
9
slsDetectorServers/ctbDetectorServer/gitInfo.txt
Normal file
9
slsDetectorServers/ctbDetectorServer/gitInfo.txt
Normal file
@ -0,0 +1,9 @@
|
|||||||
|
Path: slsDetectorPackage/slsDetectorServers/ctbDetectorServer
|
||||||
|
URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
|
||||||
|
Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
|
||||||
|
Repsitory UUID: 9d9251293d1a0b5300b8d7191949cf01de1c7b81
|
||||||
|
Revision: 11
|
||||||
|
Branch: refactor
|
||||||
|
Last Changed Author: Dhanya_Thattil
|
||||||
|
Last Changed Rev: 4255
|
||||||
|
Last Changed Date: 2019-01-15 19:51:41.000000002 +0100 ./RegisterDefs.h
|
@ -1,6 +1,6 @@
|
|||||||
#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
|
#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
|
||||||
#define GITREPUUID "91dd176a0fb314f583ca6e29140053f1eb742896"
|
#define GITREPUUID "9d9251293d1a0b5300b8d7191949cf01de1c7b81"
|
||||||
#define GITAUTH "Dhanya_Thattil"
|
#define GITAUTH "Dhanya_Thattil"
|
||||||
#define GITREV 0x4166
|
#define GITREV 0x4255
|
||||||
#define GITDATE 0x20181108
|
#define GITDATE 0x20190115
|
||||||
#define GITBRANCH "refactor"
|
#define GITBRANCH "refactor"
|
||||||
|
@ -487,7 +487,7 @@ void setupDetector() {
|
|||||||
|
|
||||||
// power regulators
|
// power regulators
|
||||||
// I2C
|
// I2C
|
||||||
INA226_ConfigureI2CCore();
|
INA226_ConfigureI2CCore(I2C_SHUNT_RESISTER_OHMS, I2C_CONTROL_REG, I2C_RX_DATA_FIFO_LEVEL_REG, I2C_SCL_LOW_COUNT_REG, I2C_SCL_HIGH_COUNT_REG, I2C_SDA_HOLD_REG, I2C_TRANSFER_COMMAND_FIFO_REG);
|
||||||
INA226_CalibrateCurrentRegister(I2C_POWER_VIO_DEVICE_ID);
|
INA226_CalibrateCurrentRegister(I2C_POWER_VIO_DEVICE_ID);
|
||||||
INA226_CalibrateCurrentRegister(I2C_POWER_VA_DEVICE_ID);
|
INA226_CalibrateCurrentRegister(I2C_POWER_VA_DEVICE_ID);
|
||||||
INA226_CalibrateCurrentRegister(I2C_POWER_VB_DEVICE_ID);
|
INA226_CalibrateCurrentRegister(I2C_POWER_VB_DEVICE_ID);
|
||||||
@ -495,7 +495,7 @@ void setupDetector() {
|
|||||||
INA226_CalibrateCurrentRegister(I2C_POWER_VD_DEVICE_ID);
|
INA226_CalibrateCurrentRegister(I2C_POWER_VD_DEVICE_ID);
|
||||||
// switch off
|
// switch off
|
||||||
powerChip(0);
|
powerChip(0);
|
||||||
setvchip(VCHIP_MIN_MV);
|
setVchip(VCHIP_MIN_MV);
|
||||||
|
|
||||||
// adcs
|
// adcs
|
||||||
AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_OFST);
|
AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_OFST);
|
||||||
@ -1146,10 +1146,10 @@ int getVChipToSet(enum DACINDEX ind, int val) {
|
|||||||
|
|
||||||
int ipwr = 0;
|
int ipwr = 0;
|
||||||
// loop through the adcs
|
// loop through the adcs
|
||||||
for (ipwr = 0; ipwr < PWR -1; ++ipwr) {
|
for (ipwr = 0; ipwr < NPWR -1; ++ipwr) {
|
||||||
|
|
||||||
// get the dac values for each adc
|
// get the dac values for each adc
|
||||||
int dacVal = dacValues[getDACIndexFromADCIndex(i)];
|
int dacVal = dacValues[getDACIndexFromADCIndex(ipwr)];
|
||||||
|
|
||||||
// if current index, replace with value to be set
|
// if current index, replace with value to be set
|
||||||
if (ipwr == adcIndex)
|
if (ipwr == adcIndex)
|
||||||
@ -1252,6 +1252,7 @@ int getPower(enum DACINDEX ind) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
// convert dac to voltage
|
// convert dac to voltage
|
||||||
|
int retval = -1;
|
||||||
ConvertToDifferentRange(LTC2620_MIN_VAL, LTC2620_MAX_VAL, POWER_RGLTR_MIN, (getVchip() - VCHIP_POWER_INCRMNT),
|
ConvertToDifferentRange(LTC2620_MIN_VAL, LTC2620_MAX_VAL, POWER_RGLTR_MIN, (getVchip() - VCHIP_POWER_INCRMNT),
|
||||||
dacValues[ind], &retval);
|
dacValues[ind], &retval);
|
||||||
return retval;
|
return retval;
|
||||||
@ -1261,7 +1262,7 @@ void setPower(enum DACINDEX ind, int val) {
|
|||||||
// validate index & get adc index
|
// validate index & get adc index
|
||||||
int adcIndex = getADCIndexFromDACIndex(ind);
|
int adcIndex = getADCIndexFromDACIndex(ind);
|
||||||
if (adcIndex == -1) {
|
if (adcIndex == -1) {
|
||||||
return -1;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
uint32_t addr = POWER_REG;
|
uint32_t addr = POWER_REG;
|
||||||
@ -1274,7 +1275,7 @@ void setPower(enum DACINDEX ind, int val) {
|
|||||||
|
|
||||||
// validate value (already checked at tcp)
|
// validate value (already checked at tcp)
|
||||||
if (!isPowerValid(val)) {
|
if (!isPowerValid(val)) {
|
||||||
FILE_LOG(logERROR, ("\Invalid value of %d mV for Power %d. Is not between %d and %d mV\n", val, ind, POWER_RGLTR_MIN, POWER_RGLTR_MAX));
|
FILE_LOG(logERROR, ("Invalid value of %d mV for Power %d. Is not between %d and %d mV\n", val, ind, POWER_RGLTR_MIN, POWER_RGLTR_MAX));
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1289,13 +1290,14 @@ void setPower(enum DACINDEX ind, int val) {
|
|||||||
|
|
||||||
// set vchip
|
// set vchip
|
||||||
setVchip(vchip);
|
setVchip(vchip);
|
||||||
if (getvchip() != vchip) {
|
if (getVchip() != vchip) {
|
||||||
FILE_LOG(logERROR, ("Weird, Could not set vchip. Set %d, read %d\n.", vchip, getvchip()));
|
FILE_LOG(logERROR, ("Weird, Could not set vchip. Set %d, read %d\n.", vchip, getVchip()));
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
// convert it to dac
|
// convert it to dac
|
||||||
if (val != LTC2620_PWR_DOWN_VAL) {
|
if (val != LTC2620_PWR_DOWN_VAL) {
|
||||||
|
int dacval = -1;
|
||||||
// convert voltage to dac
|
// convert voltage to dac
|
||||||
if (ConvertToDifferentRange(POWER_RGLTR_MIN, vchip - VCHIP_POWER_INCRMNT, LTC2620_MIN_VAL, LTC2620_MAX_VAL,
|
if (ConvertToDifferentRange(POWER_RGLTR_MIN, vchip - VCHIP_POWER_INCRMNT, LTC2620_MIN_VAL, LTC2620_MAX_VAL,
|
||||||
val, &dacval) == FAIL) {
|
val, &dacval) == FAIL) {
|
||||||
@ -1318,22 +1320,19 @@ int getADC(enum ADCINDEX ind){
|
|||||||
#ifdef VIRTUAL
|
#ifdef VIRTUAL
|
||||||
return 0;
|
return 0;
|
||||||
#endif
|
#endif
|
||||||
int idac = (int)ind;
|
|
||||||
switch(ind) {
|
switch(ind) {
|
||||||
case V_PWR_IO:
|
case V_PWR_IO:
|
||||||
case V_PWR_A:
|
case V_PWR_A:
|
||||||
case V_PWR_B:
|
case V_PWR_B:
|
||||||
case V_PWR_C:
|
case V_PWR_C:
|
||||||
case V_PWR_D:
|
case V_PWR_D:
|
||||||
return INA226_ReadVoltage(I2C_TRANSFER_COMMAND_FIFO_REG, I2C_RX_DATA_FIFO_LEVEL_REG,
|
return INA226_ReadVoltage(I2C_POWER_VIO_DEVICE_ID + (int)ind);
|
||||||
I2C_POWER_VIO_DEVICE_ID + (int)ind);
|
|
||||||
case I_PWR_IO:
|
case I_PWR_IO:
|
||||||
case I_PWR_A:
|
case I_PWR_A:
|
||||||
case I_PWR_B:
|
case I_PWR_B:
|
||||||
case I_PWR_C:
|
case I_PWR_C:
|
||||||
case I_PWR_D:
|
case I_PWR_D:
|
||||||
return INA226_ReadCurrent(I2C_TRANSFER_COMMAND_FIFO_REG, I2C_RX_DATA_FIFO_LEVEL_REG,
|
return INA226_ReadCurrent(I2C_POWER_VIO_DEVICE_ID + (int)(ind - I_PWR_IO));
|
||||||
I2C_POWER_VIO_DEVICE_ID + (int)(ind - I_PWR_IO));
|
|
||||||
|
|
||||||
// slow adcs
|
// slow adcs
|
||||||
case SLOW_ADC_TEMP:
|
case SLOW_ADC_TEMP:
|
||||||
@ -1346,7 +1345,7 @@ int getADC(enum ADCINDEX ind){
|
|||||||
case SLOW_ADC5:
|
case SLOW_ADC5:
|
||||||
case SLOW_ADC6:
|
case SLOW_ADC6:
|
||||||
case SLOW_ADC7:
|
case SLOW_ADC7:
|
||||||
return AD7689_GetChannel(ind - SLOW_ADC0);
|
return AD7689_GetChannel((int)ind - SLOW_ADC0);
|
||||||
default:
|
default:
|
||||||
FILE_LOG(logERROR, ("Adc Index %d not defined \n", (int)ind));
|
FILE_LOG(logERROR, ("Adc Index %d not defined \n", (int)ind));
|
||||||
return -1;
|
return -1;
|
||||||
@ -1845,15 +1844,19 @@ uint64_t setPatternWaitTime(int level, uint64_t t) {
|
|||||||
void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) {
|
void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) {
|
||||||
|
|
||||||
// level 0-2, addr upto patternlength + 1 (checked at tcp)
|
// level 0-2, addr upto patternlength + 1 (checked at tcp)
|
||||||
if ((level != -1) && (*startAddr > (MAX_PATTERN_LENGTH + 1) || *stopAddr > (MAX_PATTERN_LENGTH + 1))) {
|
if ((level != -1) &&
|
||||||
FILE_LOG(logERROR, ("Cannot set Pattern (Pattern Loop, level:%d, addr:%d). Addr must be less than %d\n",
|
(*startAddr >= 0 || *stopAddr > (MAX_PATTERN_LENGTH + 1))) {
|
||||||
level, addr, MAX_PATTERN_LENGTH + 1));
|
FILE_LOG(logERROR, ("Cannot set Pattern (Pattern Loop, level:%d, startaddr:%d, stopaddr:%d). "
|
||||||
|
"Addr must be less than %d\n",
|
||||||
|
level, *startAddr, *stopAddr, MAX_PATTERN_LENGTH + 1));
|
||||||
}
|
}
|
||||||
|
|
||||||
//level -1, addr upto patternlength (checked at tcp)
|
//level -1, addr upto patternlength (checked at tcp)
|
||||||
else if ((level == -1) && (*startAddr > MAX_PATTERN_LENGTH || *stopAddr > MAX_PATTERN_LENGTH)) {
|
else if ((level == -1) &&
|
||||||
FILE_LOG(logERROR, ("Cannot set Pattern (Pattern Loop, complete pattern, addr:%d). Addr must be less than %d\n",
|
(*startAddr >= 0 || *stopAddr > MAX_PATTERN_LENGTH)) {
|
||||||
addr, MAX_PATTERN_LENGTH));
|
FILE_LOG(logERROR, ("Cannot set Pattern (Pattern Loop, complete pattern, stopaddr:%d). "
|
||||||
|
"Addr must be less than %d\n",
|
||||||
|
*startAddr, *stopAddr, MAX_PATTERN_LENGTH));
|
||||||
}
|
}
|
||||||
|
|
||||||
uint32_t addr = 0;
|
uint32_t addr = 0;
|
||||||
|
@ -1,9 +1,9 @@
|
|||||||
Path: slsDetectorPackage/slsDetectorServers/eigerDetectorServer
|
Path: slsDetectorPackage/slsDetectorServers/eigerDetectorServer
|
||||||
URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
|
URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
|
||||||
Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
|
Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
|
||||||
Repsitory UUID: 55c57e4c3ff61010f12f0b5a1b9a080e103f2ef3
|
Repsitory UUID: 9d9251293d1a0b5300b8d7191949cf01de1c7b81
|
||||||
Revision: 20
|
Revision: 21
|
||||||
Branch: refactor
|
Branch: refactor
|
||||||
Last Changed Author: Dhanya_Thattil
|
Last Changed Author: Dhanya_Thattil
|
||||||
Last Changed Rev: 4213
|
Last Changed Rev: 4255
|
||||||
Last Changed Date: 2019-01-07 12:06:28.000000002 +0100 ./xparameters.h
|
Last Changed Date: 2019-01-15 10:22:16.000000002 +0100 ./xparameters.h
|
||||||
|
@ -1,6 +1,6 @@
|
|||||||
#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
|
#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
|
||||||
#define GITREPUUID "55c57e4c3ff61010f12f0b5a1b9a080e103f2ef3"
|
#define GITREPUUID "9d9251293d1a0b5300b8d7191949cf01de1c7b81"
|
||||||
#define GITAUTH "Dhanya_Thattil"
|
#define GITAUTH "Dhanya_Thattil"
|
||||||
#define GITREV 0x4213
|
#define GITREV 0x4255
|
||||||
#define GITDATE 0x20190107
|
#define GITDATE 0x20190115
|
||||||
#define GITBRANCH "refactor"
|
#define GITBRANCH "refactor"
|
||||||
|
@ -1,9 +1,9 @@
|
|||||||
Path: slsDetectorPackage/slsDetectorServers/gotthardDetectorServer
|
Path: slsDetectorPackage/slsDetectorServers/gotthardDetectorServer
|
||||||
URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
|
URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
|
||||||
Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
|
Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
|
||||||
Repsitory UUID: 553633651a7549b13ea314c887c49dd296c075d5
|
Repsitory UUID: 9d9251293d1a0b5300b8d7191949cf01de1c7b81
|
||||||
Revision: 18
|
Revision: 21
|
||||||
Branch: refactor
|
Branch: refactor
|
||||||
Last Changed Author: Dhanya_Thattil
|
Last Changed Author: Dhanya_Thattil
|
||||||
Last Changed Rev: 4203
|
Last Changed Rev: 4255
|
||||||
Last Changed Date: 2019-01-08 06:54:17.000000002 +0100 ./RegisterDefs.h
|
Last Changed Date: 2019-01-15 10:22:16.000000002 +0100 ./.target-makefrag
|
||||||
|
@ -1,6 +1,6 @@
|
|||||||
#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
|
#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
|
||||||
#define GITREPUUID "553633651a7549b13ea314c887c49dd296c075d5"
|
#define GITREPUUID "9d9251293d1a0b5300b8d7191949cf01de1c7b81"
|
||||||
#define GITAUTH "Dhanya_Thattil"
|
#define GITAUTH "Dhanya_Thattil"
|
||||||
#define GITREV 0x4203
|
#define GITREV 0x4255
|
||||||
#define GITDATE 0x20190108
|
#define GITDATE 0x20190115
|
||||||
#define GITBRANCH "refactor"
|
#define GITBRANCH "refactor"
|
||||||
|
@ -21,6 +21,7 @@
|
|||||||
#define I2C_DATA_RATE_KBPS (200)
|
#define I2C_DATA_RATE_KBPS (200)
|
||||||
#define I2C_SCL_PERIOD_NS ((1000 * 1000) / I2C_DATA_RATE_KBPS)
|
#define I2C_SCL_PERIOD_NS ((1000 * 1000) / I2C_DATA_RATE_KBPS)
|
||||||
#define I2C_SCL_LOW_PERIOD_NS (I2C_SCL_PERIOD_NS / 2)
|
#define I2C_SCL_LOW_PERIOD_NS (I2C_SCL_PERIOD_NS / 2)
|
||||||
|
#define I2C_SCL_HIGH_PERIOD_NS (I2C_SCL_PERIOD_NS / 2)
|
||||||
#define I2C_SDA_DATA_HOLD_TIME_NS (I2C_SCL_HIGH_PERIOD_NS / 2)
|
#define I2C_SDA_DATA_HOLD_TIME_NS (I2C_SCL_HIGH_PERIOD_NS / 2)
|
||||||
#define I2C_SCL_LOW_COUNT ((I2C_SCL_LOW_PERIOD_NS / 1000) * I2C_CLOCK_MHZ) // convert to us, then to clock (defined in blackfin.h)
|
#define I2C_SCL_LOW_COUNT ((I2C_SCL_LOW_PERIOD_NS / 1000) * I2C_CLOCK_MHZ) // convert to us, then to clock (defined in blackfin.h)
|
||||||
#define I2C_SDA_DATA_HOLD_COUNT ((I2C_SDA_DATA_HOLD_TIME_NS / 1000) * I2C_CLOCK_MHZ) // convert to us, then to clock (defined in blackfin.h)
|
#define I2C_SDA_DATA_HOLD_COUNT ((I2C_SDA_DATA_HOLD_TIME_NS / 1000) * I2C_CLOCK_MHZ) // convert to us, then to clock (defined in blackfin.h)
|
||||||
@ -63,25 +64,45 @@
|
|||||||
#define I2C_TFR_CMD_RPTD_STRT_MSK (0x00000001 << I2C_TFR_CMD_RPTD_STRT_OFST)
|
#define I2C_TFR_CMD_RPTD_STRT_MSK (0x00000001 << I2C_TFR_CMD_RPTD_STRT_OFST)
|
||||||
|
|
||||||
|
|
||||||
|
uint32_t I2C_Control_Reg = 0x0;
|
||||||
|
uint32_t I2C_Rx_Data_Fifo_Level_Reg = 0x0;
|
||||||
|
uint32_t I2C_Scl_Low_Count_Reg = 0x0;
|
||||||
|
uint32_t I2C_Scl_High_Count_Reg = 0x0;
|
||||||
|
uint32_t I2C_Sda_Hold_Reg = 0x0;
|
||||||
|
uint32_t I2C_Transfer_Command_Fifo_Reg = 0x0;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Configure the I2C core,
|
* Configure the I2C core,
|
||||||
* Enable core and
|
* Enable core and
|
||||||
* Calibrate the calibration register for current readout
|
* Calibrate the calibration register for current readout
|
||||||
|
* @param creg control register (defined in RegisterDefs.h)
|
||||||
|
* @param rreg rx data fifo level register (defined in RegisterDefs.h)
|
||||||
|
* @param slreg scl low count register (defined in RegisterDefs.h)
|
||||||
|
* @param shreg scl high count register (defined in RegisterDefs.h)
|
||||||
|
* @param sdreg sda hold register (defined in RegisterDefs.h)
|
||||||
|
* @param treg transfer command fifo register (defined in RegisterDefs.h)
|
||||||
*/
|
*/
|
||||||
void I2C_ConfigureI2CCore() {
|
void I2C_ConfigureI2CCore(uint32_t creg, uint32_t rreg, uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) {
|
||||||
FILE_LOG(logINFOBLUE, ("\tConfiguring I2C Core for %d kbps:\n", I2C_DATA_RATE_KBPS));
|
FILE_LOG(logINFOBLUE, ("\tConfiguring I2C Core for %d kbps:\n", I2C_DATA_RATE_KBPS));
|
||||||
|
|
||||||
|
I2C_Control_Reg = creg;
|
||||||
|
I2C_Rx_Data_Fifo_Level_Reg = rreg;
|
||||||
|
I2C_Scl_Low_Count_Reg = slreg;
|
||||||
|
I2C_Scl_High_Count_Reg = shreg;
|
||||||
|
I2C_Sda_Hold_Reg = sdreg;
|
||||||
|
I2C_Transfer_Command_Fifo_Reg = treg;
|
||||||
|
|
||||||
FILE_LOG(logINFOBLUE, ("\tSetting SCL Low Period: %d ns (0x%x clocks)\n", I2C_SCL_LOW_PERIOD_NS, I2C_SCL_LOW_COUNT));
|
FILE_LOG(logINFOBLUE, ("\tSetting SCL Low Period: %d ns (0x%x clocks)\n", I2C_SCL_LOW_PERIOD_NS, I2C_SCL_LOW_COUNT));
|
||||||
bus_w(I2C_SCL_LOW_COUNT_REG, (uint32_t)I2C_SCL_LOW_COUNT);
|
bus_w(I2C_Scl_Low_Count_Reg, (uint32_t)I2C_SCL_LOW_COUNT);
|
||||||
|
|
||||||
FILE_LOG(logINFOBLUE, ("\tSetting SCL High Period: %d ns (0x%x clocks)\n", I2C_SCL_HIGH_PERIOD_NS, I2C_SCL_LOW_COUNT));
|
FILE_LOG(logINFOBLUE, ("\tSetting SCL High Period: %d ns (0x%x clocks)\n", I2C_SCL_HIGH_PERIOD_NS, I2C_SCL_LOW_COUNT));
|
||||||
bus_w(I2C_SCL_HIGH_COUNT_REG, (uint32_t)I2C_SCL_LOW_COUNT);
|
bus_w(I2C_Scl_High_Count_Reg, (uint32_t)I2C_SCL_LOW_COUNT);
|
||||||
|
|
||||||
FILE_LOG(logINFOBLUE, ("\tSetting SDA Hold Time: %d ns (0x%x clocks)\n", I2C_SDA_DATA_HOLD_TIME_NS, I2C_SDA_DATA_HOLD_COUNT));
|
FILE_LOG(logINFOBLUE, ("\tSetting SDA Hold Time: %d ns (0x%x clocks)\n", I2C_SDA_DATA_HOLD_TIME_NS, I2C_SDA_DATA_HOLD_COUNT));
|
||||||
bus_w(I2C_SDA_HOLD_REG, (uint32_t)I2C_SDA_DATA_HOLD_COUNT);
|
bus_w(I2C_Sda_Hold_Reg, (uint32_t)I2C_SDA_DATA_HOLD_COUNT);
|
||||||
|
|
||||||
FILE_LOG(logINFOBLUE, ("\tEnabling core\n"));
|
FILE_LOG(logINFOBLUE, ("\tEnabling core\n"));
|
||||||
bus_w(I2C_CONTROL_REG, I2C_CTRL_ENBLE_CORE_MSK | I2C_CTRL_BUS_SPEED_FAST_400_VAL);// fixme: (works?)
|
bus_w(I2C_Control_Reg, I2C_CTRL_ENBLE_CORE_MSK | I2C_CTRL_BUS_SPEED_FAST_400_VAL);// fixme: (works?)
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -96,22 +117,22 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr) {
|
|||||||
uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
|
uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
|
||||||
|
|
||||||
// write I2C ID
|
// write I2C ID
|
||||||
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
|
bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
|
||||||
|
|
||||||
// write register addr
|
// write register addr
|
||||||
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, addr);
|
bus_w(I2C_Transfer_Command_Fifo_Reg, addr);
|
||||||
|
|
||||||
// repeated start with read
|
// repeated start with read
|
||||||
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL));
|
bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL));
|
||||||
|
|
||||||
// continue reading
|
// continue reading
|
||||||
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, 0x0);
|
bus_w(I2C_Transfer_Command_Fifo_Reg, 0x0);
|
||||||
|
|
||||||
// stop reading
|
// stop reading
|
||||||
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, I2C_TFR_CMD_STOP_MSK);
|
bus_w(I2C_Transfer_Command_Fifo_Reg, I2C_TFR_CMD_STOP_MSK);
|
||||||
|
|
||||||
// read value
|
// read value
|
||||||
return bus_r(I2C_RX_DATA_FIFO_LEVEL_REG);
|
return bus_r(I2C_Rx_Data_Fifo_Level_Reg);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -126,22 +147,22 @@ void I2C_Write(uint32_t devId, uint32_t addr, uint16_t data) {
|
|||||||
uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
|
uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
|
||||||
|
|
||||||
// write I2C ID
|
// write I2C ID
|
||||||
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
|
bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
|
||||||
|
|
||||||
// write register addr
|
// write register addr
|
||||||
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, addr);
|
bus_w(I2C_Transfer_Command_Fifo_Reg, addr);
|
||||||
|
|
||||||
// repeated start with write
|
// repeated start with write
|
||||||
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK & ~(I2C_TFR_CMD_RW_MSK)));
|
bus_w(I2C_Transfer_Command_Fifo_Reg, ((devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK) & ~(I2C_TFR_CMD_RW_MSK)));
|
||||||
|
|
||||||
uint8_t msb = data & 0xFF00;
|
uint8_t msb = (uint8_t)((data & 0xFF00) >> 8);
|
||||||
uint8_t lsb = data & 0x00FF;
|
uint8_t lsb = (uint8_t)(data & 0x00FF);
|
||||||
|
|
||||||
// writing data MSB
|
// writing data MSB
|
||||||
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK));
|
bus_w(I2C_Transfer_Command_Fifo_Reg, ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK));
|
||||||
|
|
||||||
// writing data LSB and stop writing bit
|
// writing data LSB and stop writing bit
|
||||||
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK);
|
bus_w(I2C_Transfer_Command_Fifo_Reg, ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -38,33 +38,44 @@
|
|||||||
#define INA226_CALIBRATION_MSK (0x7FFF)
|
#define INA226_CALIBRATION_MSK (0x7FFF)
|
||||||
|
|
||||||
/** get calibration register value to be set */
|
/** get calibration register value to be set */
|
||||||
#define INA226_getCalibrationValue(rOhm) (0.00512 /(INA226_CURRENT_IMIN_UA * 1e-6 * rohm))
|
#define INA226_getCalibrationValue(rOhm) (0.00512 /(INA226_CURRENT_IMIN_UA * 1e-6 * rOhm))
|
||||||
|
|
||||||
/** get current unit */
|
/** get current unit */
|
||||||
#define INA226_getConvertedCurrentUnits(shuntVReg, calibReg) (shuntVReg * calibReg / 2048)
|
#define INA226_getConvertedCurrentUnits(shuntVReg, calibReg) (shuntVReg * calibReg / 2048)
|
||||||
|
|
||||||
|
double INA226_Shunt_Resistor_Ohm = 0.0;
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Configure the I2C core and Enable core
|
* Configure the I2C core and Enable core
|
||||||
|
* @param rOhm shunt resister value in Ohms (defined in slsDetectorServer_defs.h)
|
||||||
|
* @param creg control register (defined in RegisterDefs.h)
|
||||||
|
* @param rreg rx data fifo level register (defined in RegisterDefs.h)
|
||||||
|
* @param slreg scl low count register (defined in RegisterDefs.h)
|
||||||
|
* @param shreg scl high count register (defined in RegisterDefs.h)
|
||||||
|
* @param sdreg sda hold register (defined in RegisterDefs.h)
|
||||||
|
* @param treg transfer command fifo register (defined in RegisterDefs.h)
|
||||||
*/
|
*/
|
||||||
void INA226_ConfigureI2CCore() {
|
void INA226_ConfigureI2CCore(double rOhm, uint32_t creg, uint32_t rreg, uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) {
|
||||||
FILE_LOG(logINFO, ("Configuring INA226\n"));
|
FILE_LOG(logINFO, ("Configuring INA226\n"));
|
||||||
I2C_ConfigureI2CCore();
|
|
||||||
|
INA226_Shunt_Resistor_Ohm = rOhm;
|
||||||
|
|
||||||
|
I2C_ConfigureI2CCore(creg, rreg, slreg, shreg, sdreg, treg);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Calibrate resolution of current register
|
* Calibrate resolution of current register
|
||||||
* @param shuntResisterOhm shunt resister value in Ohms
|
|
||||||
* @param transferCommandReg transfer command fifo register (defined in RegisterDefs.h)
|
|
||||||
* @param deviceId device Id (defined in slsDetectorServer_defs.h)
|
* @param deviceId device Id (defined in slsDetectorServer_defs.h)
|
||||||
*/
|
*/
|
||||||
void INA226_CalibrateCurrentRegister(uint32_t deviceId) {
|
void INA226_CalibrateCurrentRegister(uint32_t deviceId) {
|
||||||
|
|
||||||
// get calibration value based on shunt resistor
|
// get calibration value based on shunt resistor
|
||||||
uint16_t calVal = INA226_getCalibrationValue(I2C_SHUNT_RESISTER_OHMS) & INA226_CALIBRATION_MSK;
|
uint16_t calVal = ((uint16_t)INA226_getCalibrationValue(INA226_Shunt_Resistor_Ohm)) & INA226_CALIBRATION_MSK;
|
||||||
FILE_LOG(logINFO, ("\tWriting to Calibration reg: 0x%0x\n", calVal));
|
FILE_LOG(logINFO, ("\tWriting to Calibration reg: 0x%0x\n", calVal));
|
||||||
|
|
||||||
// calibrate current register
|
// calibrate current register
|
||||||
I2C_Write(INA226_TRANSFER_COMMAND_FIFO_REG, deviceId, INA226_CALIBRATION_REG, calVal);
|
I2C_Write(deviceId, INA226_CALIBRATION_REG, calVal);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -104,12 +115,12 @@ int INA226_ReadCurrent(uint32_t deviceId) {
|
|||||||
// read shunt voltage register
|
// read shunt voltage register
|
||||||
FILE_LOG(logDEBUG1, ("\tReading shunt voltage reg\n"));
|
FILE_LOG(logDEBUG1, ("\tReading shunt voltage reg\n"));
|
||||||
uint32_t shuntVoltageRegVal = I2C_Read(deviceId, INA226_SHUNT_VOLTAGE_REG);
|
uint32_t shuntVoltageRegVal = I2C_Read(deviceId, INA226_SHUNT_VOLTAGE_REG);
|
||||||
FILE_LOG(logDEBUG1, ("\tshunt voltage reg: 0x%08x\n", regval));
|
FILE_LOG(logDEBUG1, ("\tshunt voltage reg: 0x%08x\n", shuntVoltageRegVal));
|
||||||
|
|
||||||
// read calibration register
|
// read calibration register
|
||||||
FILE_LOG(logDEBUG1, ("\tReading calibration reg\n"));
|
FILE_LOG(logDEBUG1, ("\tReading calibration reg\n"));
|
||||||
uint32_t calibrationRegVal = I2C_Read(deviceId, INA226_CALIBRATION_REG);
|
uint32_t calibrationRegVal = I2C_Read(deviceId, INA226_CALIBRATION_REG);
|
||||||
FILE_LOG(logDEBUG1, ("\tcalibration reg: 0x%08x\n", regval));
|
FILE_LOG(logDEBUG1, ("\tcalibration reg: 0x%08x\n", calibrationRegVal));
|
||||||
|
|
||||||
// value for current
|
// value for current
|
||||||
uint32_t retval = INA226_getConvertedCurrentUnits(shuntVoltageRegVal, calibrationRegVal);
|
uint32_t retval = INA226_getConvertedCurrentUnits(shuntVoltageRegVal, calibrationRegVal);
|
||||||
|
@ -180,7 +180,7 @@ int getDACIndexFromADCIndex(enum ADCINDEX ind);
|
|||||||
int getADCIndexFromDACIndex(enum DACINDEX ind);
|
int getADCIndexFromDACIndex(enum DACINDEX ind);
|
||||||
int isPowerValid(int val);
|
int isPowerValid(int val);
|
||||||
int getPower();
|
int getPower();
|
||||||
void setPower(DACINDEX ind, int val);
|
void setPower(enum DACINDEX ind, int val);
|
||||||
#endif
|
#endif
|
||||||
/*#ifdef GOTTHARDD
|
/*#ifdef GOTTHARDD
|
||||||
void initDAC(int dac_addr, int value);
|
void initDAC(int dac_addr, int value);
|
||||||
@ -192,12 +192,6 @@ u_int32_t putout(char *s);
|
|||||||
#ifndef MOENCHD
|
#ifndef MOENCHD
|
||||||
int getADC(enum ADCINDEX ind);
|
int getADC(enum ADCINDEX ind);
|
||||||
#endif
|
#endif
|
||||||
#ifdef CHIPTESTBOARDD
|
|
||||||
extern int INA226_ReadVoltage(uint32_t transferCommandReg, uint32_t rxDataFifoLevelReg, uint32_t deviceId); // INA226.h
|
|
||||||
extern int INA226_ReadCurrent(uint32_t transferCommandReg, uint32_t rxDataFifoLevelReg, uint32_t deviceId); // INA226.h
|
|
||||||
extern int AD7689_GetTemperature(); // AD7689.h
|
|
||||||
extern int AD7689_GetChannel(int ichan); // AD7689.h
|
|
||||||
#endif
|
|
||||||
|
|
||||||
int setHighVoltage(int val);
|
int setHighVoltage(int val);
|
||||||
|
|
||||||
|
@ -794,7 +794,7 @@ int set_dac(int file_des) {
|
|||||||
FILE_LOG(logERROR,(mess));
|
FILE_LOG(logERROR,(mess));
|
||||||
} else if (!isPowerValid(val)) {
|
} else if (!isPowerValid(val)) {
|
||||||
ret = FAIL;
|
ret = FAIL;
|
||||||
sprintf(mess,"Could not set power. Power regulator %d should be between %d and %d mV\n", POWER_RGLTR_MIN, POWER_RGLTR_MAX);
|
sprintf(mess,"Could not set power. Power regulator %d should be between %d and %d mV\n", ind, POWER_RGLTR_MIN, POWER_RGLTR_MAX);
|
||||||
FILE_LOG(logERROR,(mess));
|
FILE_LOG(logERROR,(mess));
|
||||||
} else {
|
} else {
|
||||||
if (val != -1)
|
if (val != -1)
|
||||||
@ -989,7 +989,7 @@ int get_adc(int file_des) {
|
|||||||
#endif
|
#endif
|
||||||
default:
|
default:
|
||||||
#ifdef CHIPTESTBOARDD
|
#ifdef CHIPTESTBOARDD
|
||||||
if (ind >= SLOW_ADC_START_INDEX && ind <= SLOW_ADC_END_INDEX) {
|
if (ind >= SLOW_ADC0 && ind <= SLOW_ADC_TEMP) {
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
@ -203,9 +203,10 @@ int Listener::CreateUDPSockets() {
|
|||||||
ShutDownUDPSocket();
|
ShutDownUDPSocket();
|
||||||
|
|
||||||
try{
|
try{
|
||||||
udpSocket = new genericSocket(*udpPortNumber, genericSocket::UDP,
|
genericSocket* g = new genericSocket(*udpPortNumber, genericSocket::UDP,
|
||||||
generalData->packetSize, (strlen(eth)?eth:NULL), generalData->headerPacketSize,
|
generalData->packetSize, (strlen(eth)?eth:NULL), generalData->headerPacketSize,
|
||||||
*udpSocketBufferSize);
|
*udpSocketBufferSize);
|
||||||
|
udpSocket = g;
|
||||||
FILE_LOG(logINFO) << index << ": UDP port opened at port " << *udpPortNumber;
|
FILE_LOG(logINFO) << index << ": UDP port opened at port " << *udpPortNumber;
|
||||||
} catch (...) {
|
} catch (...) {
|
||||||
FILE_LOG(logERROR) << "Could not create UDP socket on port " << *udpPortNumber;
|
FILE_LOG(logERROR) << "Could not create UDP socket on port " << *udpPortNumber;
|
||||||
|
Reference in New Issue
Block a user