diff --git a/python/src/frequency.cpp b/python/src/frequency.cpp index 5cbf30cfb..ff08cf878 100644 --- a/python/src/frequency.cpp +++ b/python/src/frequency.cpp @@ -25,7 +25,26 @@ void init_freq(py::module &m) { Hz.def("__str__", [](const slsDetectorDefs::Hz &f) { return sls::ToString(f); }); + Hz.def(py::self == py::self); + Hz.def("__mul__", [](const slsDetectorDefs::Hz &h, int x) { + return slsDetectorDefs::Hz(h.value * x); + }, py::is_operator()); + Hz.def("__rmul__", [](const slsDetectorDefs::Hz &h, int x) { + return slsDetectorDefs::Hz(h.value * x); + }, py::is_operator()); + Hz.def("__truediv__", [](const slsDetectorDefs::Hz &h, int x) { + return slsDetectorDefs::Hz(h.value / x); + }, py::is_operator()); + Hz.def("__add__", [](const slsDetectorDefs::Hz &a, + const slsDetectorDefs::Hz &b) { + return slsDetectorDefs::Hz(a.value + b.value); + }, py::is_operator()); + Hz.def("__sub__", [](const slsDetectorDefs::Hz &a, + const slsDetectorDefs::Hz &b) { + return slsDetectorDefs::Hz(a.value - b.value); + }, py::is_operator()); + m.def("kHz", [](double v) { return slsDetectorDefs::Hz(static_cast(std::round(v * kHz))); }); diff --git a/python/tests/test_det_api.py b/python/tests/test_det_api.py index 0cd5ff4be..af0d7a9f4 100644 --- a/python/tests/test_det_api.py +++ b/python/tests/test_det_api.py @@ -442,6 +442,11 @@ def test_runclk(session_simulator, request): with pytest.raises(Exception) as exc_info: d.runclk = MHz(9) + c = MHz(2) + for rc in [5, 10, 15, 20]: + d.runclk = rc * c + assert d.runclk.value == 40_000_000 + for i in range(len(d)): d.setRUNClock(prev_runclk[i], [i]) @@ -492,6 +497,11 @@ def test_adcclk(session_simulator, request): with pytest.raises(Exception) as exc_info: d.adcclk = MHz(9) + c = MHz(2) + for rc in [5, 10, 15, 20]: + d.adcclk = rc * c + assert d.adcclk.value == 40_000_000 + for i in range(len(d)): d.setADCClock(prev_adcclk[i], [i]) @@ -543,6 +553,11 @@ def test_dbitclk(session_simulator, request): with pytest.raises(Exception) as exc_info: d.dbitclk = MHz(9) + c = MHz(2) + for rc in [5, 10, 15, 20]: + d.dbitclk = rc * c + assert d.dbitclk.value == 40_000_000 + for i in range(len(d)): d.setDBITClock(prev_dbitclk[i], [i]) diff --git a/python/tests/test_freq.py b/python/tests/test_freq.py index c065aa31d..c9a1c4649 100644 --- a/python/tests/test_freq.py +++ b/python/tests/test_freq.py @@ -18,3 +18,31 @@ def test_rounding_exact(): f = MHz(1.234) assert f.value == round(1.234 * 1_000_000) + +def test_mul(): + c = MHz(1) + assert (c * 2).value == 2_000_000 + assert (c * 4).value == 4_000_000 + + +def test_rmul(): + c = MHz(1) + assert (2 * c).value == 2_000_000 + assert (4 * c).value == 4_000_000 + + c = c * 2 + assert c.value == 2_000_000 + + for rc in [1, 2, 4, 8]: + c = rc * c + assert c.value == 128_000_000 + + +def test_div(): + c = MHz(1) + assert (c / 2).value == 500_000 + +def test_eq(): + assert MHz(1) == MHz(1) + assert MHz(1) != MHz(2) + assert MHz(1) == kHz(1000) \ No newline at end of file