diff --git a/slsDetectorServers/xilinx_ctbDetectorServer/chip_config_xilinx.txt b/slsDetectorServers/xilinx_ctbDetectorServer/chip_config_xilinx.txt
index 0d9a5e05b..3f48ea84c 100644
--- a/slsDetectorServers/xilinx_ctbDetectorServer/chip_config_xilinx.txt
+++ b/slsDetectorServers/xilinx_ctbDetectorServer/chip_config_xilinx.txt
@@ -1,24 +1,24 @@
 # Prepare MH02 configuration
-reg 0xB1B0 0x00000041
-reg 0xB1B4 0x01200004
+reg 0xC00C 0x00000041
+reg 0xC010 0x01200004
 
 # configure Matterhorn SPI
-setbit 0xB1B8 0
+setbit 0xC014 0
 
 # wait till config is done
-pollbit 0xB1B8 3 0
+pollbit 0xC014 3 0
 
 # reset transceiver
-reg 0xB820 0x0
-reg 0xB820 0x1
-reg 0xB820 0x0
+reg 0xC120 0x0
+reg 0xC120 0x1
+reg 0xC120 0x0
 
 # set MSB LSB inversions and polarity for transceiver
-reg 0xB820 0x61e0
+reg 0xC120 0x61e0
 
 # Enable MH02 PLL clock
 pattern enable_clock_pattern.pyat
 # start the flow
-setbit 0xB004 0
-clearbit 0xB004 0
+setbit 0xB030 0
+clearbit 0xB030 0
 sleep 1
diff --git a/slsDetectorServers/xilinx_ctbDetectorServer/reset_chip_xilinx.txt b/slsDetectorServers/xilinx_ctbDetectorServer/reset_chip_xilinx.txt
index 769cdea10..d79f3e9da 100644
--- a/slsDetectorServers/xilinx_ctbDetectorServer/reset_chip_xilinx.txt
+++ b/slsDetectorServers/xilinx_ctbDetectorServer/reset_chip_xilinx.txt
@@ -1,30 +1,30 @@
 
 # turn off clock
-setbit 0xB1B0 16 
-setbit 0xB1B8 0
+setbit 0xC00C 16 
+setbit 0xC014 0
 sleep 1
 
 # reset Matterhorn periphery
-setbit 0xB1B8 1
+setbit 0xC014 1
 sleep 1
 
 # turn on clock
-clearbit 0xB1B0 16
-setbit 0xB1B8 0
+clearbit 0xC00C 16
+setbit 0xC014 0
 sleep 1
 
 # reset rx transceiver datapath
-setbit 0xB820 4
+setbit 0xC120 4
 sleep 1
 
 # reset 8b10b counters
-setbit 0xB820 9
-setbit 0xB820 10
-setbit 0xB820 11
-setbit 0xB820 12
+setbit 0xC120 9
+setbit 0xC120 10
+setbit 0xC120 11
+setbit 0xC120 12
 sleep 1
-clearbit 0xB820 9
-clearbit 0xB820 10
+clearbit 0xC120 9
+clearbit 0xC120 10
 
 # reset buffer fifos
 reg 0x9024 0xFFFFFFFF