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gotthard compiles

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This commit is contained in:
maliakal_d
2018-11-08 18:09:11 +01:00
parent a37be4b2e3
commit 2e37eda9d9
10 changed files with 72 additions and 77 deletions
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12
slsDetectorServers/eigerDetectorServer/HardwareIO.h
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@ -1,9 +1,6 @@
//Class initially from Gerd and was called mmap_test.c //Class initially from Gerd and was called mmap_test.c
#pragma once
#ifndef HARDWAREIO_H
#define HARDWAREIO_H
#include "xfs_types.h" #include "xfs_types.h"
@ -17,10 +14,3 @@
void HWIO_xfs_out16(xfs_u32 OutAddress, xfs_u16 Value); void HWIO_xfs_out16(xfs_u32 OutAddress, xfs_u16 Value);
void HWIO_xfs_out32(xfs_u32 OutAddress, xfs_u32 Value); void HWIO_xfs_out32(xfs_u32 OutAddress, xfs_u32 Value);
#endif

6
slsDetectorServers/eigerDetectorServer/xfs_types.h
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@ -1,5 +1,4 @@
#ifndef __XFS_TYPES_H__ #pragma once
#define __XFS_TYPES_H__
//#include "types.h" //#include "types.h"
#include <stdint.h> #include <stdint.h>
@ -47,6 +46,3 @@ struct udp_header_type
#endif // __XFS_TYPES_H__

1
slsDetectorServers/gotthardDetectorServer/Makefile
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@ -1,6 +1,5 @@
CROSS = bfin-uclinux- CROSS = bfin-uclinux-
CC = $(CROSS)gcc CC = $(CROSS)gcc
CFLAGS += -Wall -DGOTTHARDD -DSTOP_SERVER # -DVERBOSE CFLAGS += -Wall -DGOTTHARDD -DSTOP_SERVER # -DVERBOSE
LDLIBS += -lm -lstdc++ LDLIBS += -lm -lstdc++

6
slsDetectorServers/gotthardDetectorServer/RegisterDefs.h
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@ -158,10 +158,10 @@
/* Fix Pattern register */ /* Fix Pattern register */
#define FIX_PATT_REG (0x23 << MEM_MAP_SHIFT) #define FIX_PATT_REG (0x23 << MEM_MAP_SHIFT)
#define FIXED_PATT_VAL (0xACDC1980) #define FIX_PATT_VAL (0xACDC1980)
/** Config register */ /** Config register */
#define Config_REG (0x26 << MEM_MAP_SHIFT) #define CONFIG_REG (0x26 << MEM_MAP_SHIFT)
#define CONFIG_SLAVE_OFST (0) // Not used in FW & SW #define CONFIG_SLAVE_OFST (0) // Not used in FW & SW
#define CONFIG_SLAVE_MSK (0x00000001 << CONFIG_SLAVE_OFST) #define CONFIG_SLAVE_MSK (0x00000001 << CONFIG_SLAVE_OFST)
@ -266,7 +266,7 @@
#define DETECTOR_TYPE_MOENCH_VAL (2) #define DETECTOR_TYPE_MOENCH_VAL (2)
/* 16 bit Fifo Data register */ /* 16 bit Fifo Data register */
//#define FIFO_DATA_REG (0x50 << MEM_MAP_SHIFT) // Not used in FW and SW (16bit) #define FIFO_DATA_REG (0x50 << MEM_MAP_SHIFT) // Not used in FW and SW (16bit)
/* /*
#define MOD_DACS1_REG 0x65<<11 #define MOD_DACS1_REG 0x65<<11

88
slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c
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@ -2,6 +2,7 @@
#include "gitInfoGotthard.h" #include "gitInfoGotthard.h"
#include "versionAPI.h" #include "versionAPI.h"
#include "logger.h" #include "logger.h"
#include "RegisterDefs.h"
#ifndef VIRTUAL #ifndef VIRTUAL
#include "AD9257.h" // commonServerFunctions.h, blackfin.h, ansi.h #include "AD9257.h" // commonServerFunctions.h, blackfin.h, ansi.h
@ -11,6 +12,8 @@
#include <time.h> #include <time.h>
#endif #endif
#include "string.h"
// Variables that will be exported // Variables that will be exported
int phaseShift = DEFAULT_PHASE_SHIFT; int phaseShift = DEFAULT_PHASE_SHIFT;
@ -27,7 +30,7 @@ int highvoltage = 0;
int detectorFirstServer = 1; int detectorFirstServer = 1;
int dacValues[NDAC] = {0}; int dacValues[NDAC] = {0};
enum detectorSettings thisSettings = UNITIALIZED; enum detectorSettings thisSettings = UNINITIALIZED;
enum externalSignalFlag signalMode = 0; enum externalSignalFlag signalMode = 0;
int digitalTestBit = 0; int digitalTestBit = 0;
@ -129,7 +132,7 @@ int checkType() {
#ifdef VIRTUAL #ifdef VIRTUAL
return OK; return OK;
#endif #endif
volatile u_int32_t type = ((bus_r(BOARD_REVISION_REG) & DETECTOR_TYPE_MASK) >> DETECTOR_TYPE_OFFSET); volatile u_int32_t type = ((bus_r(BOARD_REVISION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST);
if (type == DETECTOR_TYPE_MOENCH_VAL){ if (type == DETECTOR_TYPE_MOENCH_VAL){
FILE_LOG(logERROR, ("This is not a Gotthard Server (read %d, expected ?)\n", type)); FILE_LOG(logERROR, ("This is not a Gotthard Server (read %d, expected ?)\n", type));
return FAIL; return FAIL;
@ -342,7 +345,7 @@ u_int32_t getBoardRevision() {
#ifdef VIRTUAL #ifdef VIRTUAL
return 0; return 0;
#endif #endif
return ((bus_r(BOARD_REVISION_REG) & BOARD_REVISION_MASK) >> BOARD_REVISION_OFST); return ((bus_r(BOARD_REVISION_REG) & BOARD_REVISION_MSK) >> BOARD_REVISION_OFST);
} }
@ -425,7 +428,7 @@ uint32_t readRegister16And32(uint32_t offset) {
if ((addr == CONTROL_REG) || (addr == FIFO_DATA_REG)) { if ((addr == CONTROL_REG) || (addr == FIFO_DATA_REG)) {
return (u_int32_t)bus_r16(addr); return (u_int32_t)bus_r16(addr);
} else } else
readRegister(offset); return readRegister(offset);
} }
/* firmware functions (resets) */ /* firmware functions (resets) */
@ -553,10 +556,13 @@ int readConfigFile() {
// Initialization // Initialization
const size_t lineSize = 256; const size_t lineSize = 256;
char line[lineSize] = {0}; char line[lineSize];
memset(line, 0, lineSize);
const size_t keySize = lineSize / 2; const size_t keySize = lineSize / 2;
char key[keySize] = {0}; char key[keySize];
char value[keySize] = {0}; memset(key, 0, keySize);
char value[keySize];
memset(value, 0, keySize);
int scan = OK; int scan = OK;
// keep reading a line // keep reading a line
@ -655,10 +661,10 @@ void setMasterSlaveConfiguration() {
// master configuration // master configuration
if (masterflags == IS_MASTER) { if (masterflags == IS_MASTER) {
// master default delay set, so reset delay // master default delay set, so reset delay
setDelay(0); setTimer(DELAY_AFTER_TRIGGER, 0);
// Set pattern phase for the master module // Set pattern phase for the master module
val = (bus_r(MULTI_PURPOSE_REG) & (~(PLL_CLK_SL_MSK))); // unset mask u_int32_t val = (bus_r(MULTI_PURPOSE_REG) & (~(PLL_CLK_SL_MSK))); // unset mask
bus_w(MULTI_PURPOSE_REG, val | PLL_CLK_SL_MSTR_VAL); bus_w(MULTI_PURPOSE_REG, val | PLL_CLK_SL_MSTR_VAL);
setPhaseShift(patternphase); setPhaseShift(patternphase);
@ -685,7 +691,7 @@ void setMasterSlaveConfiguration() {
} }
// all configuration - Set RST to SW1 delay // all configuration - Set RST to SW1 delay
val = (bus_r(MULTI_PURPOSE_REG) & (~(RST_TO_SW1_DLY_MSK))); // unset mask u_int32_t val = (bus_r(MULTI_PURPOSE_REG) & (~(RST_TO_SW1_DLY_MSK))); // unset mask
val = val | ((rsttosw1delay << RST_TO_SW1_DLY_OFST) & RST_TO_SW1_DLY_MSK); // set val val = val | ((rsttosw1delay << RST_TO_SW1_DLY_OFST) & RST_TO_SW1_DLY_MSK); // set val
bus_w(MULTI_PURPOSE_REG, val); bus_w(MULTI_PURPOSE_REG, val);
FILE_LOG(logDEBUG1, ("\tMultipurpose reg: 0x%x\n", val)); FILE_LOG(logDEBUG1, ("\tMultipurpose reg: 0x%x\n", val));
@ -833,8 +839,8 @@ int64_t setTimer(enum timerIndex ind, int64_t val) {
if(val >= 0){ if(val >= 0){
FILE_LOG(logINFO, ("Setting delay: %lldns\n", (long long int)val)); FILE_LOG(logINFO, ("Setting delay: %lldns\n", (long long int)val));
if (masterflags == IS_MASTER) { if (masterflags == IS_MASTER) {
value += masterdefaultdelay; val += masterdefaultdelay;
FILE_LOG(logINFO, ("\tActual delay (master): %lld\n", (long long int) value)); FILE_LOG(logINFO, ("\tActual delay (master): %lld\n", (long long int) val));
} }
val = (val * 1E-3 * CLK_FREQ) + 0.5; val = (val * 1E-3 * CLK_FREQ) + 0.5;
} }
@ -987,7 +993,7 @@ enum detectorSettings setSettings(enum detectorSettings sett){
// set conf gain // set conf gain
bus_w(addr, bus_r(addr) & ~GAIN_CONFGAIN_MSK); bus_w(addr, bus_r(addr) & ~GAIN_CONFGAIN_MSK);
bus_w(addr, bus_r(addr) | GAIN_CONFGAIN_DYNMC_GAIN_VAL); bus_w(addr, bus_r(addr) | GAIN_CONFGAIN_DYNMC_GAIN_VAL);
FILE_LOG(logINFO, ("\Gain Reg: 0x%x\n", bus_r(addr))); FILE_LOG(logINFO, ("\tGain Reg: 0x%x\n", bus_r(addr)));
thisSettings = sett; thisSettings = sett;
} }
@ -995,10 +1001,7 @@ enum detectorSettings setSettings(enum detectorSettings sett){
} }
enum detectorSettings getSettings(){ enum detectorSettings getSettings(){
uint32_t regval = bus_r(GAIN_REG); uint32_t regval = bus_r(GAIN_REG);
FILE_LOG(logDEBUG1, ("Getting Settings\n Read Gain Register :0x%x\n", val));
uint32_t val = regval & GAIN_CONFGAIN_MSK; uint32_t val = regval & GAIN_CONFGAIN_MSK;
switch(val) { switch(val) {
case GAIN_CONFGAIN_DYNMC_GAIN_VAL: case GAIN_CONFGAIN_DYNMC_GAIN_VAL:
@ -1302,7 +1305,6 @@ void setTiming( enum externalCommunicationMode arg){
FILE_LOG(logERROR, ("Unknown timing mode %d for this detector\n", (int)arg)); FILE_LOG(logERROR, ("Unknown timing mode %d for this detector\n", (int)arg));
return; return;
} }
timingMode = arg;
} }
} }
@ -1350,11 +1352,11 @@ void calcChecksum(mac_conf* mac, int sourceip, int destip) {
mac->ip.ip_chksum = 0x0000 ; // pseudo mac->ip.ip_chksum = 0x0000 ; // pseudo
mac->ip.ip_sourceip = sourceip; mac->ip.ip_sourceip = sourceip;
mac->ip.ip_destip = destip; mac->ip.ip_destip = destip;
FILE_log(logDEBUG1, ("\tIP TTL: 0x%x\n", mac_conf_regs->ip.ip_ttl)); FILE_LOG(logDEBUG1, ("\tIP TTL: 0x%x\n", mac->ip.ip_ttl));
int count = sizeof(ip); int count = sizeof(mac->ip);
unsigned short *addr; unsigned short *addr;
addr = (unsigned short*)(&ip); /* warning: assignment from incompatible pointer type */ addr = (unsigned short*)(&(mac->ip)); /* warning: assignment from incompatible pointer type */
long int sum = 0; long int sum = 0;
while( count > 1 ) { while( count > 1 ) {
@ -1370,7 +1372,7 @@ void calcChecksum(mac_conf* mac, int sourceip, int destip) {
mac->ip.ip_chksum = checksum; mac->ip.ip_chksum = checksum;
} }
int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t sourceip, uint32_t udpport, uint32_t udpport2, int ival) { int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t sourceip, uint32_t udpport, uint32_t udpport2) {
#ifdef VIRTUAL #ifdef VIRTUAL
return OK; return OK;
#endif #endif
@ -1405,35 +1407,35 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
FILE_LOG(logINFO, ("\tDest. Port : %d \t\t\t(0x%08x)\n",udpport, udpport)); FILE_LOG(logINFO, ("\tDest. Port : %d \t\t\t(0x%08x)\n",udpport, udpport));
// set/ unset the digital test bit // set/ unset the digital test bit
if (ival) if (digitalTestBit)
bus_w (addr, bus_r(addr) | DGTL_TST_MSK); bus_w (addr, bus_r(addr) | DGTL_TST_MSK);
else else
bus_w (addr, bus_r(addr) & ~DGTL_TST_MSK); bus_w (addr, bus_r(addr) & ~DGTL_TST_MSK);
FILE_log(logDEBUG1, ("\tDigital Test Bit. MultiPurpose reg: 0x%x\n", bus_r(addr))); FILE_LOG(logDEBUG1, ("\tDigital Test Bit. MultiPurpose reg: 0x%x\n", bus_r(addr)));
//reset mac //reset mac
bus_w (addr, bus_r(addr) | RST_MSK); bus_w (addr, bus_r(addr) | RST_MSK);
FILE_log(logDEBUG1, ("\tReset Mac. MultiPurpose reg: 0x%x\n", bus_r(addr))); FILE_LOG(logDEBUG1, ("\tReset Mac. MultiPurpose reg: 0x%x\n", bus_r(addr)));
usleep(500000); usleep(500000);
// release reset // release reset
bus_w(addr, bus_r(addr) &(~ RST_MSK)); bus_w(addr, bus_r(addr) &(~ RST_MSK));
FILE_log(logDEBUG1, ("\tReset released. MultiPurpose reg: 0x%x\n", bus_r(addr))); FILE_LOG(logDEBUG1, ("\tReset released. MultiPurpose reg: 0x%x\n", bus_r(addr)));
// write shadow regs // write shadow regs
bus_w(addr, bus_r(addr) | (ENT_RSTN_MSK | WRT_BCK_MSK)); bus_w(addr, bus_r(addr) | (ENT_RSTN_MSK | WRT_BCK_MSK));
FILE_log(logDEBUG1, ("\tWrite shadow regs. MultiPurpose reg: 0x%x\n", bus_r(addr))); FILE_LOG(logDEBUG1, ("\tWrite shadow regs. MultiPurpose reg: 0x%x\n", bus_r(addr)));
// release write back // release write back
bus_w(addr, bus_r(addr) &(~WRT_BCK_MSK)); bus_w(addr, bus_r(addr) &(~WRT_BCK_MSK));
FILE_log(logDEBUG1, ("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr))); FILE_LOG(logDEBUG1, ("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr)));
// nreset phy /*FIXME: is this needed ?? */ // nreset phy /*FIXME: is this needed ?? */
bus_w(addr, bus_r(addr) | ENT_RSTN_MSK); bus_w(addr, bus_r(addr) | ENT_RSTN_MSK);
FILE_log(logDEBUG1, ("\tNreset phy. MultiPurpose reg: 0x%x\n", bus_r(addr))); FILE_LOG(logDEBUG1, ("\tNreset phy. MultiPurpose reg: 0x%x\n", bus_r(addr)));
FILE_log(logDEBUG1, ("\tConfiguring MAC CONF\n")); FILE_LOG(logDEBUG1, ("\tConfiguring MAC CONF\n"));
mac_conf *mac_conf_regs = (mac_conf*)(CSP0BASE + ENET_CONF_REG * 2); // direct write mac_conf *mac_conf_regs = (mac_conf*)(CSP0BASE + ENET_CONF_REG * 2); // direct write
mac_conf_regs->mac.mac_dest_mac1 = ((destmac >> (8 * 5)) & 0xFF); mac_conf_regs->mac.mac_dest_mac1 = ((destmac >> (8 * 5)) & 0xFF);
mac_conf_regs->mac.mac_dest_mac2 = ((destmac >> (8 * 4)) & 0xFF); mac_conf_regs->mac.mac_dest_mac2 = ((destmac >> (8 * 4)) & 0xFF);
@ -1441,7 +1443,7 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
mac_conf_regs->mac.mac_dest_mac4 = ((destmac >> (8 * 2)) & 0xFF); mac_conf_regs->mac.mac_dest_mac4 = ((destmac >> (8 * 2)) & 0xFF);
mac_conf_regs->mac.mac_dest_mac5 = ((destmac >> (8 * 1)) & 0xFF); mac_conf_regs->mac.mac_dest_mac5 = ((destmac >> (8 * 1)) & 0xFF);
mac_conf_regs->mac.mac_dest_mac6 = ((destmac >> (8 * 0)) & 0xFF); mac_conf_regs->mac.mac_dest_mac6 = ((destmac >> (8 * 0)) & 0xFF);
FILE_log(logDEBUG1, ("\tDestination Mac: %llx %x:%x:%x:%x:%x:%x\n", FILE_LOG(logDEBUG1, ("\tDestination Mac: %llx %x:%x:%x:%x:%x:%x\n",
destmac, destmac,
mac_conf_regs->mac.mac_dest_mac1, mac_conf_regs->mac.mac_dest_mac1,
mac_conf_regs->mac.mac_dest_mac2, mac_conf_regs->mac.mac_dest_mac2,
@ -1455,7 +1457,7 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
mac_conf_regs->mac.mac_src_mac4 = ((sourcemac >> (8 * 2)) & 0xFF); mac_conf_regs->mac.mac_src_mac4 = ((sourcemac >> (8 * 2)) & 0xFF);
mac_conf_regs->mac.mac_src_mac5 = ((sourcemac >> (8 * 1)) & 0xFF); mac_conf_regs->mac.mac_src_mac5 = ((sourcemac >> (8 * 1)) & 0xFF);
mac_conf_regs->mac.mac_src_mac6 = ((sourcemac >> (8 * 0)) & 0xFF); mac_conf_regs->mac.mac_src_mac6 = ((sourcemac >> (8 * 0)) & 0xFF);
FILE_log(logDEBUG1, ("\tSource Mac: %llx %x:%x:%x:%x:%x:%x\n", FILE_LOG(logDEBUG1, ("\tSource Mac: %llx %x:%x:%x:%x:%x:%x\n",
sourcemac, sourcemac,
mac_conf_regs->mac.mac_src_mac1, mac_conf_regs->mac.mac_src_mac1,
mac_conf_regs->mac.mac_src_mac2, mac_conf_regs->mac.mac_src_mac2,
@ -1471,7 +1473,7 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
mac_conf_regs->udp.udp_len = udpPacketSize; mac_conf_regs->udp.udp_len = udpPacketSize;
mac_conf_regs->udp.udp_chksum = 0x0000; mac_conf_regs->udp.udp_chksum = 0x0000;
FILE_log(logDEBUG1, ("\tConfiguring TSE\n")); FILE_LOG(logDEBUG1, ("\tConfiguring TSE\n"));
tse_conf *tse_conf_regs = (tse_conf*)(CSP0BASE + TSE_CONF_REG * 2); // direct write tse_conf *tse_conf_regs = (tse_conf*)(CSP0BASE + TSE_CONF_REG * 2); // direct write
tse_conf_regs->rev = 0xA00; tse_conf_regs->rev = 0xA00;
tse_conf_regs->scratch = 0xCCCCCCCC; tse_conf_regs->scratch = 0xCCCCCCCC;
@ -1491,22 +1493,22 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
tse_conf_regs->mdio_addr0 = 0x12; tse_conf_regs->mdio_addr0 = 0x12;
tse_conf_regs->mdio_addr1 = 0x0; tse_conf_regs->mdio_addr1 = 0x0;
FILE_log(logDEBUG1, ("\tConfigure Mac Done")); FILE_LOG(logDEBUG1, ("\tConfigure Mac Done"));
mac_conf_regs->cdone = 0xFFFFFFFF; mac_conf_regs->cdone = 0xFFFFFFFF;
// write shadow regs /* FIXME: Only INT_RSTN_MSK | WRT_BCK_MSK */ // write shadow regs /* FIXME: Only INT_RSTN_MSK | WRT_BCK_MSK */
bus_w(addr, bus_r(addr) | (INT_RSTN_MSK | ENT_RSTN_MSK| WRT_BCK_MSK)); bus_w(addr, bus_r(addr) | (INT_RSTN_MSK | ENT_RSTN_MSK| WRT_BCK_MSK));
FILE_log(logDEBUG1, ("\tWrite shadow regs with int reset. MultiPurpose reg: 0x%x\n", bus_r(addr))); FILE_LOG(logDEBUG1, ("\tWrite shadow regs with int reset. MultiPurpose reg: 0x%x\n", bus_r(addr)));
usleep(100000); usleep(100000);
// release write back // release write back
bus_w(addr, bus_r(addr) &(~WRT_BCK_MSK)); bus_w(addr, bus_r(addr) &(~WRT_BCK_MSK));
FILE_log(logDEBUG1, ("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr))); FILE_LOG(logDEBUG1, ("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr)));
// sw1 /* FIXME: Only SW1_MSK */ // sw1 /* FIXME: Only SW1_MSK */
bus_w(addrr, bus_r(addrr) | (INT_RSTN_MSK | ENT_RSTN_MSK | SW1_MSK)); bus_w(addr, bus_r(addr) | (INT_RSTN_MSK | ENT_RSTN_MSK | SW1_MSK));
FILE_log(logDEBUG1, ("\tSw1. MultiPurpose reg: 0x%x\n", bus_r(addr))); FILE_LOG(logDEBUG1, ("\tSw1. MultiPurpose reg: 0x%x\n", bus_r(addr)));
usleep(1000 * 1000); usleep(1000 * 1000);
return OK; return OK;
@ -1528,12 +1530,12 @@ void loadImage(enum imageType index, short int imageVals[]){
volatile u_int16_t *ptr = (u_int16_t*)(CSP0BASE + addr * 2); volatile u_int16_t *ptr = (u_int16_t*)(CSP0BASE + addr * 2);
memcpy((char*)ptr, (char*)imageVals, dataBytes); memcpy((char*)ptr, (char*)imageVals, dataBytes);
FILE_log(logINFO, ("Loaded %s image at 0x%p\n", FILE_LOG(logINFO, ("Loaded %s image at 0x%p\n",
(index == GAIN_IMAGE) ? "Gain" : "Dark", (void*) ptr)); (index == GAIN_IMAGE) ? "Gain" : "Dark", (void*) ptr));
} }
int readCounterBlock(int startACQ, short int counterVals[]){ int readCounterBlock(int startACQ, short int counterVals[]){
FILE_log(logINFO, ("Reading Counter Block with start Acq :%d\n", startACQ)); FILE_LOG(logINFO, ("Reading Counter Block with start Acq :%d\n", startACQ));
// stop any current acquisition // stop any current acquisition
if (runBusy()) { if (runBusy()) {
@ -1542,11 +1544,11 @@ int readCounterBlock(int startACQ, short int counterVals[]){
// waiting for the last frame read to be done // waiting for the last frame read to be done
while(runBusy()) while(runBusy())
usleep(500); usleep(500);
FILE_log(logDEBUG1, ("State machine stopped\n")); FILE_LOG(logDEBUG1, ("State machine stopped\n"));
} }
// copy memory // copy memory
addr = COUNTER_MEMORY_REG; u_int32_t addr = COUNTER_MEMORY_REG;
volatile u_int16_t *ptr = (u_int16_t*)(CSP0BASE + addr * 2); volatile u_int16_t *ptr = (u_int16_t*)(CSP0BASE + addr * 2);
int dataBytes = calculateDataBytes(); int dataBytes = calculateDataBytes();
memcpy((char*)counterVals, (char*)ptr, dataBytes); memcpy((char*)counterVals, (char*)ptr, dataBytes);
@ -1569,7 +1571,7 @@ int readCounterBlock(int startACQ, short int counterVals[]){
} }
int resetCounterBlock(int startACQ){ int resetCounterBlock(int startACQ){
FILE_log(logINFO, ("Resetting Counter Block with start Acq :%d\n", startACQ)); FILE_LOG(logINFO, ("Resetting Counter Block with start Acq :%d\n", startACQ));
// stop any current acquisition // stop any current acquisition
if (runBusy()) { if (runBusy()) {
@ -1578,7 +1580,7 @@ int resetCounterBlock(int startACQ){
// waiting for the last frame read to be done // waiting for the last frame read to be done
while(runBusy()) while(runBusy())
usleep(500); usleep(500);
FILE_log(logDEBUG1, ("State machine stopped\n")); FILE_LOG(logDEBUG1, ("State machine stopped\n"));
} }
// reset counter // reset counter

3
slsDetectorServers/gotthardDetectorServer/slsDetectorServer_defs.h
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@ -1,5 +1,6 @@
#pragma once #pragma once
#include "sls_detector_defs.h" //default dynamicgain in settings #include "sls_detector_defs.h"
#include <stdlib.h>
#define GOODBYE (-200) #define GOODBYE (-200)

2
slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h
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@ -1,5 +1,5 @@
#pragma once #pragma once
#include "sls_detector_defs.h" //default dynamicgain in settings #include "sls_detector_defs.h"
#include "RegisterDefs.h" #include "RegisterDefs.h"

3
slsDetectorServers/slsDetectorServer/AD9257.h
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@ -1,6 +1,9 @@
#pragma once #pragma once
#include "commonServerFunctions.h" // blackfin.h, ansi.h #include "commonServerFunctions.h" // blackfin.h, ansi.h
#ifdef GOTTHARDD
#include <unistd.h>
#endif
/* AD9257 ADC DEFINES */ /* AD9257 ADC DEFINES */
#define AD9257_ADC_NUMBITS (24) #define AD9257_ADC_NUMBITS (24)

6
slsDetectorServers/slsDetectorServer/slsDetectorFunctionList.h
View File

@ -18,7 +18,7 @@ int isFirmwareCheckDone();
int getFirmwareCheckResult(char** mess); int getFirmwareCheckResult(char** mess);
#endif #endif
void basictests(); void basictests();
#ifdef JUNGFRAUD #if defined(GOTTHARDD) || defined(JUNGFRAUD)
int checkType(); int checkType();
u_int32_t testFpga(void); u_int32_t testFpga(void);
int testBus(void); int testBus(void);
@ -101,7 +101,7 @@ void setMasterSlaveConfiguration();
// parameters - dr, roi // parameters - dr, roi
int setDynamicRange(int dr); int setDynamicRange(int dr);
#ifdef GOTTHARD #ifdef GOTTHARDD
ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret); ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret);
#endif #endif
@ -187,7 +187,7 @@ int setDetectorPosition(int pos[]);
// gotthard specific - image, pedestal // gotthard specific - image, pedestal
#ifdef GOTTHARDD #ifdef GOTTHARDD
void loadImage(enum imageType index, short int imageVals[]); void loadImage(enum imageType index, short int imageVals[]);
int readCounterBlock(int startACQ, char *counterVals); int readCounterBlock(int startACQ, short int counterVals[]);
int resetCounterBlock(int startACQ); int resetCounterBlock(int startACQ);
// jungfrau specific - pll, flashing firmware // jungfrau specific - pll, flashing firmware

22
slsDetectorServers/slsDetectorServer/slsDetectorServer_funcs.c
View File

@ -389,15 +389,18 @@ int set_external_signal_flag(int file_des) {
#ifndef GOTTHARDD #ifndef GOTTHARDD
functionNotImplemented(); functionNotImplemented();
#else #else
// set if (signalindex > 0)
if ((flag != GET_EXTERNAL_SIGNAL_FLAG) && (Server_VerifyLock() == OK)) { modeNotImplemented("Signal index", signalindex);
setExtSignal(signalindex, flag); else {
// set
if ((flag != GET_EXTERNAL_SIGNAL_FLAG) && (Server_VerifyLock() == OK)) {
setExtSignal(flag);
}
// get
retval = getExtSignal();
validate((int)flag, (int)retval, "set external signal flag", DEC);
FILE_LOG(logDEBUG1, ("External Signal Flag: %d\n", retval));
} }
// get
retval = getExtSignal(signalindex);
validate((int)flag, (int)retval, "set external signal flag", DEC);
FILE_LOG(logDEBUG1, ("External Signal Flag: %d\n", retval));
}
#endif #endif
return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval)); return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval));
} }
@ -2319,12 +2322,13 @@ int set_network_parameter(int file_des) {
return printSocketReadError(); return printSocketReadError();
enum networkParameter mode = args[0]; enum networkParameter mode = args[0];
int value = args[1]; int value = args[1];
enum NETWORKINDEX serverIndex = 0;
FILE_LOG(logDEBUG1, ("Set network parameter index %d to %d\n", mode, value)); FILE_LOG(logDEBUG1, ("Set network parameter index %d to %d\n", mode, value));
#ifdef GOTTHARDD #ifdef GOTTHARDD
functionNotImplemented(); functionNotImplemented();
#else #else
enum NETWORKINDEX serverIndex = 0;
// set & get // set & get
if ((value == -1) || ((value != -1) && (Server_VerifyLock() == OK))) { if ((value == -1) || ((value != -1) && (Server_VerifyLock() == OK))) {
// check index // check index