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https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2026-01-22 20:18:32 +01:00
ctb: add patternstart command, xilinx: fix frequency (#1307)
* add patternstart command for CTB, block end of execution udp packets if pattern was started by patternstart command * update docs * Dhanya's comments * more Dhanya comments * refactored * fixed tests for startpatttern, also clkfrequency not properly used in server * xilinx: fixed setfrequency, tick clock (with sync clock), clkfrequency set from getfrequency to get the exact value * xilinx freq in kHz, updated default values and prints --------- Co-authored-by: Martin Mueller <martin.mueller@psi.ch> Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
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@@ -72,14 +72,14 @@
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// clang-format on
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// freq in kHz !!
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void XILINX_PLL_setFrequency(uint32_t clk_index, uint32_t freq) {
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int XILINX_PLL_setFrequency(uint32_t clk_index, uint32_t freq) {
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if (clk_index >= XILINX_PLL_NUM_CLKS) {
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LOG(logERROR, ("XILINX_PLL: Invalid clock index %d\n", clk_index));
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return;
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return 1;
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}
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if (freq < XILINX_PLL_MIN_FREQ || freq > XILINX_PLL_MAX_FREQ) {
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LOG(logERROR, ("XILINX_PLL: Frequency %d kHz is out of range\n", freq));
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return;
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return 1;
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}
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// calculate base clock frequency
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@@ -103,7 +103,7 @@ void XILINX_PLL_setFrequency(uint32_t clk_index, uint32_t freq) {
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if (clk_div < 1 || clk_div > XILINX_PLL_MAX_CLK_DIV) {
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LOG(logERROR,
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("XILINX_PLL: Invalid clock divider, need to change base clock\n"));
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return;
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return 1;
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}
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uint32_t clk_div_frac = 0;
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@@ -140,18 +140,19 @@ void XILINX_PLL_setFrequency(uint32_t clk_index, uint32_t freq) {
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// wait for firmware to measure the actual frequency
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usleep(2 * 1000 * 1000);
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return 0;
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}
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uint32_t XILINX_PLL_getFrequency(uint32_t clk_index) {
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if (clk_index >= XILINX_PLL_NUM_CLKS) {
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LOG(logERROR, ("XILINX_PLL: Invalid clock index %d\n", clk_index));
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return 0;
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return -1;
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}
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if (clk_index > XILINX_PLL_MAX_NUM_CLKS_FOR_GET) {
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LOG(logERROR,
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("XILINX_PLL: get frequency not implemented for this clock %d\n",
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clk_index));
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return 0;
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return -1;
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}
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uint32_t base_addr = XILINX_PLL_MEASURE_BASE_ADDR0;
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@@ -623,28 +623,43 @@ uint64_t getPatternBitMask() {
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return getU64BitReg(PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG);
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}
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#ifdef MYTHEN3D
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void startPattern() {
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LOG(logINFOBLUE, ("Starting Pattern\n"));
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#ifdef MYTHEN3D
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bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_PATTERN_MSK);
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usleep(1);
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while (bus_r(PAT_STATUS_REG) & PAT_STATUS_RUN_BUSY_MSK) {
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usleep(1);
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}
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LOG(logINFOBLUE, ("Pattern done\n"));
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}
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#endif
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#ifdef XILINX_CHIPTESTBOARDD
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void startPattern() {
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LOG(logINFOBLUE, ("Starting Pattern\n"));
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#elif CHIPTESTBOARDD
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// we only want to run the pattern here. No acquisition, no UDP packets
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// disable 10G UDP temporarily
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// except if the pattern explicitly contains udp trigger points
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uint32_t conf_reg_tmp = bus_r(CONFIG_REG);
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if ((bus_r(STREAMING_CTRL_REG) & STREAMING_CTRL_ENA_MSK) == 0) {
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bus_w(CONFIG_REG, conf_reg_tmp & ~CONFIG_GB10_SND_UDP_MSK);
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}
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// run the pattern, wait till done
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bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_ACQSTN_MSK);
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bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STRT_ACQSTN_MSK);
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usleep(1);
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while (bus_r(STATUS_REG) & STATUS_RN_BSY_MSK) {
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usleep(1);
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}
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// go back to original config
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bus_w(CONFIG_REG, conf_reg_tmp);
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#elif XILINX_CHIPTESTBOARDD
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bus_w(FLOW_CONTROL_REG, bus_r(FLOW_CONTROL_REG) | START_F_MSK);
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usleep(1);
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while (bus_r(FLOW_CONTROL_REG) & RSM_BUSY_MSK) {
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usleep(1);
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}
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#endif
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LOG(logINFOBLUE, ("Pattern done\n"));
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}
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#endif
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char *getPatternFileName() { return clientPatternfile; }
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@@ -5839,15 +5839,24 @@ int set_clock_frequency(int file_des) {
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LOG(logINFO, ("Same %s: %d %s\n", modeName, val,
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myDetectorType == GOTTHARD2 ? "Hz" : "MHz"));
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} else {
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setFrequency(c, val);
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int retval = getFrequency(c);
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LOG(logDEBUG1, ("retval %s: %d %s\n", modeName, retval,
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myDetectorType == GOTTHARD2 ? "Hz" : "MHz"));
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#if !defined( \
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XILINX_CHIPTESTBOARDD) // XCTB will give the actual frequency, which is not
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// 100% identical to the set frequency
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validate(&ret, mess, val, retval, modeName, DEC);
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int ret = setFrequency(c, val);
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if (ret == FAIL) {
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sprintf(mess, "Could not set %s to %d %s\n", modeName, val,
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myDetectorType == XILINX_CHIPTESTBOARD ? "kHz"
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: "MHz");
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LOG(logERROR, (mess));
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} else {
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int retval = getFrequency(c);
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LOG(logDEBUG1,
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("retval %s: %d %s\n", modeName, retval,
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myDetectorType == XILINX_CHIPTESTBOARD ? "kHz"
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: "MHz"));
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#if !defined(XILINX_CHIPTESTBOARDD)
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// XCTB will give the actual frequency, which is not
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// 100% identical to the set frequency
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validate(&ret, mess, val, retval, modeName, DEC);
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#endif
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}
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}
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}
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}
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@@ -5902,8 +5911,11 @@ int get_clock_frequency(int file_des) {
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LOG(logDEBUG1,
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("retval %s clock (%d) frequency: %d %s\n", clock_names[c], (int)c,
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retval,
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myDetectorType == GOTTHARD2 || myDetectorType == MYTHEN3 ? "Hz"
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: "MHz"));
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myDetectorType == XILINX_CHIPTESTBOARD
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? "kHz"
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: (myDetectorType == GOTTHARD2 || myDetectorType == MYTHEN3
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? "Hz"
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: "MHz")));
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}
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#endif
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return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
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@@ -7468,7 +7480,8 @@ int start_pattern(int file_des) {
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memset(mess, 0, sizeof(mess));
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LOG(logDEBUG1, ("Starting Pattern\n"));
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#if !defined(MYTHEN3D) && !defined(XILINX_CHIPTESTBOARDD)
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#if !defined(MYTHEN3D) && !defined(XILINX_CHIPTESTBOARDD) && \
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!defined(CHIPTESTBOARDD)
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functionNotImplemented();
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#else
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// only set
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