mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-23 18:17:59 +02:00
filter cell (only chipv1.1)
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@ -475,7 +475,10 @@ void setupDetector() {
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setThresholdTemperature(DEFAULT_TMP_THRSHLD);
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setTemperatureEvent(0);
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setFlipRows(DEFAULT_FLIP_ROWS);
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setFilterResistor(DEFAULT_FILTER_RESISTOR);
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if (getChipVersion() == 11) {
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setFilterResistor(DEFAULT_FILTER_RESISTOR);
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setFilterCell(DEFAULT_FILTER_CELL);
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}
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}
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int resetToDefaultDacs(int hardReset) {
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@ -2055,6 +2058,32 @@ int setFilterResistor(int value) {
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return FAIL;
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}
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int getFilterCell() {
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#ifdef VIRTUAL
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uint32_t addr = CONFIG_V11_REG;
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#else
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uint32_t addr = CONFIG_V11_STATUS_REG;
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#endif
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uint32_t value = (bus_r(addr) & CONFIG_V11_FLTR_CLL_MSK) >> CONFIG_V11_FLTR_CLL_OFST;
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// count number of bits = which icell
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return (__builtin_popcount(value));
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}
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void setFilterCell(int iCell) {
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uint32_t value = 0;
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// sets the corresponding cell and the cells before it
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if (iCell != 0) {
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value = iCell;
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if (value > 1) {
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value += (value - 1);
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}
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}
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uint32_t addr = CONFIG_V11_REG;
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bus_w(addr, bus_r(addr) &~ CONFIG_V11_FLTR_CLL_MSK);
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bus_w(addr, bus_r(addr) | ((value << CONFIG_V11_FLTR_CLL_OFST) & CONFIG_V11_FLTR_CLL_MSK));
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LOG(logINFO, ("Setting Filter Cell to %d [Reg:0x%x]\n", iCell, bus_r(addr)));
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}
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int getTenGigaFlowControl() {
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return ((bus_r(CONFIG_REG) & CONFIG_ETHRNT_FLW_CNTRL_MSK) >>
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CONFIG_ETHRNT_FLW_CNTRL_OFST);
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@ -107,11 +107,13 @@ enum CLKINDEX { RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS };
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#define DEFAULT_STRG_CLL_DLY (0)
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#define DEFAULT_FLIP_ROWS (0)
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#define DEFAULT_FILTER_RESISTOR (1) // higher resistor
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#define DEFAULT_FILTER_CELL (0)
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#define HIGHVOLTAGE_MIN (60)
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#define HIGHVOLTAGE_MAX (200)
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#define DAC_MIN_MV (0)
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#define DAC_MAX_MV (2500)
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#define MAX_FILTER_CELL_VAL (12)
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/* Defines in the Firmware */
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#define MAX_TIMESLOT_VAL (0x1F)
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