Merge remote branch 'slsDetectorSoftware/developer' into developer

This commit is contained in:
Dhanya Maliakal 2017-12-04 16:48:30 +01:00
commit 25023f6971
399 changed files with 116515 additions and 0 deletions

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slsDetectorSoftware/.gitignore vendored Normal file
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*.o
*~
#*#
.project

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set(SOURCES
multiSlsDetector/multiSlsDetector.cpp
slsDetector/slsDetectorUsers.cpp
slsDetector/slsDetectorUtils.cpp
slsDetector/slsDetectorCommand.cpp
slsDetector/slsDetectorActions.cpp
slsDetector/slsDetector.cpp
slsDetectorAnalysis/angularConversion.cpp
slsDetectorAnalysis/angularConversionStatic.cpp
slsDetectorAnalysis/energyConversion.cpp
slsDetectorAnalysis/fileIO.cpp
slsDetectorAnalysis/postProcessing.cpp
slsDetectorAnalysis/postProcessingFuncs.cpp
slsReceiverInterface/receiverInterface.cpp
threadFiles/CondVar.cpp
threadFiles/Mutex.cpp
threadFiles/ThreadPool.cpp
usersFunctions/usersFunctions.cpp
)
set(HEADERS
)
include_directories(
commonFiles
multiSlsDetector
slsDetector
slsDetectorUtils
slsDetectorCommand
slsDetectorAnalysis
slsReceiverInterface
threadFiles
usersFunctions
../slsReceiverSoftware/include
../slsReceiverSoftware/MySocketTCP
)
add_definitions(
-DDACS_INT
)
add_library(zmq STATIC IMPORTED )
set_target_properties(zmq PROPERTIES
IMPORTED_LOCATION ${CMAKE_CURRENT_SOURCE_DIR}/../slsReceiverSoftware/include/libzmq.a
)
add_library(slsDetectorStatic STATIC
${SOURCES}
${HEADERS}
)
set_target_properties(slsDetectorStatic PROPERTIES
ARCHIVE_OUTPUT_NAME SlsDetector
ARCHIVE_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/bin
)
add_library(slsDetectorShared SHARED
${SOURCES}
${HEADERS}
)
set_target_properties(slsDetectorShared PROPERTIES
LIBRARY_OUTPUT_NAME SlsDetector
LIBRARY_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/bin
)
add_subdirectory(slsDetectorClient)
if(DOXYGEN_FOUND)
add_custom_target(doc
${DOXYGEN_EXECUTABLE}
${CMAKE_CURRENT_SOURCE_DIR}/slsDetectorUsers.doxy
WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}
COMMENT "Generating API documentation with Doxygen" VERBATIM
)
endif()

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include ../Makefile.include
DESTDIR ?= ../bin
LIBDIR ?= $(DESTDIR)
CFLAGS= -g -DC_ONLY -fPIC
#FLAGS+= #-DVERBOSE -DVERYVERBOSE
DFLAGS= -g -DDACS_INT
INCLUDES?= -IcommonFiles -IslsDetector -I../slsReceiverSoftware/MySocketTCP -IusersFunctions -ImultiSlsDetector -IslsDetectorUtils -IslsDetectorCommand -IslsDetectorAnalysis -IslsReceiverInterface -I../slsReceiverSoftware/include -IthreadFiles -I$(ASM)
#EPICSFLAGS=-D EPICS -I/usr/local/epics/base/include/ -I /usr/local/epics/base/include/os/Linux/ -L /usr/local/epics/base/lib/$(EPICS_HOST_ARCH) -Wl,-R/usr/local/epics/base/lib/$(EPICS_HOST_ARCH) -lca -lCom
LIBZMQDIR = ../slsReceiverSoftware/include
LIBZMQ = -L$(LIBZMQDIR) -Wl,-rpath=$(LIBZMQDIR) -lzmq
SRC_CLNT=slsDetectorAnalysis/fileIO.cpp usersFunctions/usersFunctions.cpp slsDetector/slsDetectorUtils.cpp slsDetector/slsDetectorCommand.cpp slsDetectorAnalysis/angularConversion.cpp slsDetectorAnalysis/angularConversionStatic.cpp slsDetectorAnalysis/energyConversion.cpp slsDetector/slsDetectorActions.cpp slsDetectorAnalysis/postProcessing.cpp slsDetector/slsDetector.cpp multiSlsDetector/multiSlsDetector.cpp slsDetectorAnalysis/postProcessingFuncs.cpp slsReceiverInterface/receiverInterface.cpp slsDetector/slsDetectorUsers.cpp threadFiles/CondVar.cpp threadFiles/Mutex.cpp threadFiles/ThreadPool.cpp #../slsReceiverSoftware/MySocketTCP/MySocketTCP.cpp
DEPSINCLUDES = $(LIBZMQDIR)/sls_receiver_defs.h $(LIBZMQDIR)/sls_receiver_funcs.h $(LIBZMQDIR)/ansi.h commonFiles/sls_detector_defs.h commonFiles/sls_detector_funcs.h commonFiles/error_defs.h slsDetector/slsDetectorBase.h slsDetectorAnalysis/angCalLogClass.h slsDetectorAnalysis/angleConversionConstant.h slsDetectorAnalysis/badChannelCorrections.h slsDetectorAnalysis/detectorData.h slsDetectorAnalysis/enCalLogClass.h slsDetectorAnalysis/fileIOStatic.h slsDetectorAnalysis/movingStat.h slsDetectorAnalysis/runningStat.h slsDetectorAnalysis/single_photon_hit.h threadFiles/Global.h threadFiles/Task.h usersFunctions/angleFunction.h
$(info )
$(info #######################################)
$(info # In slsDetectorSoftware Makefile #)
$(info #######################################)
$(info )
OBJS = $(SRC_CLNT:%.cpp=%.o)
.PHONY: all package clean
all: package $(SRC_CLNT)
mythenVirtualServer: $(SRC_MYTHEN_SVC)
cd mythenDetectorServer && make -f Makefile.virtual DESTDIR=$(DESTDIR)
gotthardVirtualServer: $(SRC_MYTHEN_SVC)
cd gotthardDetectorServer && make -f Makefile.virtual DESTDIR=$(DESTDIR)
%.o : %.cpp %.h $(DEPSINCLUDES) Makefile
$(CXX) -o $@ -c $< $(INCLUDES) $(DFLAGS) -fPIC $(EPICSFLAGS) -pthread -lrt $(LIBZMQ) $(FLAGS)
package: versioning $(OBJS) $(DESTDIR)/libSlsDetector.so $(DESTDIR)/libSlsDetector.a
versioning:
$(call colorecho,`./updateGitVersion.sh`)
$(DESTDIR)/libSlsDetector.so: $(OBJS)
$(call colorecho,"#######################################")
$(call colorecho,"# Compiling slsDetector Library #")
$(call colorecho,"#######################################")
$(CXX) -shared -Wl,-soname,libSlsDetector.so -o libSlsDetector.so $(OBJS) -lc $(INCLUDES) $(DFLAGS) $(FLAGS) $(EPICSFLAGS) -L/usr/lib64 -pthread -lrt $(LIBZMQ)
$(shell test -d $(DESTDIR) || mkdir -p $(DESTDIR))
mv libSlsDetector.so $(DESTDIR)
$(DESTDIR)/libSlsDetector.a: $(OBJS)
ar rcs libSlsDetector.a $(OBJS)
mv libSlsDetector.a $(DESTDIR)
clean:
rm -rf $(DESTDIR)/libSlsDetector.a $(DESTDIR)/libSlsDetector.so core $(OBJS)
cd
#-------------------------------------------------------------------------------
install: package
install_inc:
$(shell test -d $(DESTDIR) || mkdir -p $(DESTDIR))
cp -P slsDetector/slsDetectorUsers.h slsDetectorAnalysis/detectorData.h $(DESTDIR)

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CFLAGS= -DC_ONLY
#FLAGS= -DVERBOSE -DVERYVERBOSE
INCLUDES= -IcommonFiles -IslsDetector -IMySocketTCP -IusersFunctions -ImultiSlsDetector -IslsDetectorUtils -IslsDetectorCommand -IslsDetectorAnalysis
#EPICSFLAGS=-D EPICS -I/usr/local/epics/base/include/ -I /usr/local/epics/base/include/os/Linux/ -L /usr/local/epics/base/lib/SL5-x86/ -Wl,-R/usr/local/epics/base/lib/SL5-x86 -lca -lCom
CC=gcc
CXX=g++
SRC_CLNT= slsDetectorAnalysis/FileIO_Standalone.cpp MySocketTCP/MySocketTCP.cpp usersFunctions/usersFunctions.cpp slsDetector/slsDetectorUtils.cpp slsDetector/slsDetectorCommand.cpp slsDetectorAnalysis/AngularConversion_Standalone.cpp slsDetectorAnalysis/energyConversion.cpp slsDetector/slsDetectorActions.cpp slsDetectorAnalysis/postProcessingFileIO_Standalone.cpp slsDetector/slsDetector.cpp multiSlsDetector/multiSlsDetector.cpp
OBJS = $(SRC_CLNT:.cpp=.o)
HEADERS = $(SRC_CLNT:.cpp=.h) commonFiles/sls_detector_defs.h slsDetectorAnalysis/detectorData.h slsDetector/slsDetectorBase.h slsDetector/slsDetectorUsers.h multiSlsDetector/multiSlsDetectorCommand.h
SRC_MYTHEN_SVC = mythenDetectorServer/server.c mythenDetectorServer/server_funcs.c mythenDetectorServer/communication_funcs.c mythenDetectorServer/firmware_funcs.c mythenDetectorServer/mcb_funcs.c mythenDetectorServer/trimming_funcs.c
all: package $(SRC_CLNT)
echo "compiling all"
doc: $(SRC_H) $(SRC_CLNT)
doxygen doxy.config
mythenServer: $(SRC_MYTHEN_SVC)
$(CC) $(SRC_MYTHEN_SVC) $(CFLAGS) $(FLAGS) $(INCLUDES) -ImythenDetectorServer -DVIRTUAL -lm -D MCB_FUNCS -DC_ONLY -DVERBOSE
mv a.out mythenServer
picassoServer: $(SRC_MYTHEN_SVC)
$(CC) $(SRC_MYTHEN_SVC) $(CFLAGS) $(FLAGS) $(INCLUDES) -ImythenDetectorServer -D VIRTUAL -lm -DMCB_FUNCS -DPICASSOD -DC_ONLY
mv a.out picassoServer
%.o : %.cpp %.h
$(CXX) -Wall -o $@ -c $< $(INCLUDES) $(FLAGS) $(EPICSFLAGS)
package: $(OBJS)
$(CXX) -shared -Wl,-soname,libSlsDetector.so -o libSlsDetector.so $(OBJS) -lc $(INCLUDES) $(FLAGS) $(EPICSFLAGS)
ar rcs libSlsDetector.a $(OBJS)
clean:
rm -rf libSlsDetector.a libSlsDetector.so core docs/* $(OBJS)
#-------------------------------------------------------------------------------
lib: package
# added install target, HBl
install_lib: lib
$(shell test -d $(DESTDIR) || mkdir -p $(DESTDIR))
cp -P libSlsDetector.so $(DESTDIR)
install_inc:
$(shell test -d $(DESTDIR) || mkdir -p $(DESTDIR))
cp -P $(HEADERS) $(DESTDIR)
install_doc: doc
$(shell test -d $(DESTDIR) || mkdir -p $(DESTDIR))
cp -Pr docs/* $(DESTDIR)

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CFLAGS= -DC_ONLY -fPIC
#FLAGS+= #-DVERBOSE -DVERYVERBOSE
DFLAGS= -DDACS_INT -DTHIS_PATH='"$(shell pwd)"' -DSLS_RECEIVER_FUNCTION_LIST
#ASM=$(shell echo "/lib/modules/`uname -r`/build/include")
INCLUDES?= -IcommonFiles -IslsDetector -IMySocketTCP -IusersFunctions -ImultiSlsDetector -IslsDetectorUtils -IslsDetectorCommand -IslsDetectorAnalysis -IslsReceiverInterface -IslsReceiver -I$(ASM)
EPICSFLAGS=-D EPICS -I/usr/local/epics/base/include/ -I /usr/local/epics/base/include/os/Linux/ -L /usr/local/epics/base/lib/SL5-x86/ -Wl,-R/usr/local/epics/base/lib/SL5-x86 -lca -lCom
CC=g++
SRC_CLNT= slsDetectorAnalysis/fileIO.cpp MySocketTCP/MySocketTCP.cpp usersFunctions/usersFunctions.cpp slsDetector/slsDetectorUtils.cpp slsDetector/slsDetectorCommand.cpp slsDetectorAnalysis/angularConversion.cpp slsDetectorAnalysis/angularConversionStatic.cpp slsDetectorAnalysis/energyConversion.cpp slsDetector/slsDetectorActions.cpp slsDetectorAnalysis/postProcessing.cpp slsDetector/slsDetector.cpp multiSlsDetector/multiSlsDetector.cpp slsDetector/slsDetectorUsers.cpp slsDetectorAnalysis/postProcessingFuncs.cpp slsReceiverInterface/receiverInterface.cpp slsReceiver/slsReceiverFunctionList.cpp slsReceiver/slsReceiver_funcs.cpp slsReceiver/slsReceiverUsers.cpp
OBJS = $(SRC_CLNT:.cpp=.o)
HEADERS = $(SRC_CLNT:.cpp=.h) commonFiles/sls_detector_defs.h slsDetectorAnalysis/detectorData.h slsDetector/slsDetectorBase.h multiSlsDetector/multiSlsDetectorCommand.h slsDetectorAnalysis/enCalLogClass.h slsDetectorAnalysis/angCalLogClass.h slsDetectorAnalysis/angleConversionConstant.h usersFunctions/angleFunction.h slsReceiverInterface/receiverInterface.h slsDetector/svnInfoLib.h slsReceiver/circularFifo.h slsReceiver/slsReceiver_funcs.h slsReceiver/svnInfoReceiverTmp.h slsReceiver/receiver_defs.h slsReceiver/slsReceiverFunctionList.h slsReceiver/slsReceiverUsers.h slsReceiver/svnInfoReceiver.h
DESTDIR ?= bin
DOCDIR ?= docs
all: package $(SRC_CLNT)
echo "compiling all"
intdoc: $(SRC_H) $(SRC_CLNT)
doxygen doxy.config
doc: $(DOCDIR)/pdf/slsDetectorUsersDocs.pdf
$(DOCDIR)/pdf/slsDetectorUsersDocs.pdf: slsDetectorUsersDocs
cd slsDetectorUsersDocs/latex && make
$(shell test -d $(DOCDIR) || mkdir -p $(DOCDIR))
$(shell test -d $(DOCDIR)/pdf || mkdir -p $(DOCDIR)/pdf)
cp slsDetectorUsersDocs/latex/refman.pdf $(DOCDIR)/pdf/slsDetectorUsersDocs.pdf
htmldoc: $(DOCDIR)/html/slsDetectorUsersDocs
$(DOCDIR)/html/slsDetectorUsersDocs: slsDetectorUsersDocs
$(shell test -d $(DOCDIR) || mkdir -p $(DOCDIR))
$(shell test -d $(DOCDIR)/html || mkdir -p $(DOCDIR)/html)
$(shell test -d $(DOCDIR)/html/slsDetectorUsersDocs && rm -r $(DOCDIR)/html/slsDetectorUsersDocs)
cp -r slsDetectorUsersDocs/html $(DOCDIR)/html/slsDetectorUsersDocs
slsDetectorUsersDocs: slsDetectorUsers.doxy slsDetector/slsDetectorUsers.h slsDetector/slsDetectorUsers.cpp slsDetectorAnalysis/detectorData.h
doxygen slsDetectorUsers.doxy
mythenVirtualServer: $(SRC_MYTHEN_SVC)
cd mythenDetectorServer && make -f Makefile.virtual DESTDIR=$(DESTDIR)
gotthardVirtualServer: $(SRC_MYTHEN_SVC)
cd gotthardDetectorServer && make -f Makefile.virtual DESTDIR=$(DESTDIR)
%.o : %.cpp %.h Makefile
$(CXX) -Wall -o $@ -c $< $(INCLUDES) $(DFLAGS) $(FLAGS) -fPIC $(EPICSFLAGS) -L/usr/lib64/
package: $(OBJS) $(DESTDIR)/libSlsDetector.so $(DESTDIR)/libSlsDetector.a
$(DESTDIR)/libSlsDetector.so: $(OBJS)
$(CXX) -shared -Wl,-soname,libSlsDetector.so -o libSlsDetector.so $(OBJS) -lc $(INCLUDES) $(DFLAGS) $(FLAGS) $(EPICSFLAGS) -L/usr/lib64/
$(shell test -d $(DESTDIR) || mkdir -p $(DESTDIR))
mv libSlsDetector.so $(DESTDIR)
$(DESTDIR)/libSlsDetector.a: $(OBJS)
ar rcs libSlsDetector.a $(OBJS)
mv libSlsDetector.a $(DESTDIR)
clean:
rm -rf libSlsDetector.a libSlsDetector.so core docs/* slsDetectorUsersDocs $(OBJS)
#-------------------------------------------------------------------------------
install: package
install_inc:
$(shell test -d $(DESTDIR) || mkdir -p $(DESTDIR))
cp -P slsDetector/slsDetectorUsers.h slsDetectorAnalysis/detectorData.h $(DESTDIR) slsReceiver/slsReceiverUsers.h

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This subversion repository contains
Common directories
Please inform Anna or Dhanya if you make modifications to these directories
- MySocketTCP : socket class
- commonFiles : header file common to server and client
- slsDetector : base class with all main detector functionalities (client side)
Mythen specific directories
Please inform Anna if you make modifications to these directories
- mythenDetector : mythen specific funcs (mainly files I/O and angular conversion)
- mythenDetectorServer : mythen server (for etrax compiler)
- firmware lib might be added in the future
Other Detector specific directories
Please inform Dhanya if you make modifications to these directories
make doc

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#include "communication_funcs.h"
//#include <sys/socket.h>
#include <netinet/tcp.h> /* for TCP_NODELAY */
#include <stdlib.h>
#include <string.h>
#include <stdio.h>
#include <errno.h>
#include <sys/time.h>
char lastClientIP[INET_ADDRSTRLEN];
char thisClientIP[INET_ADDRSTRLEN];
int lockStatus;
int differentClients;
//int socketDescriptor, file_des;
const int send_rec_max_size=SEND_REC_MAX_SIZE;
extern int errno;
char dummyClientIP[INET_ADDRSTRLEN];
fd_set readset, tempset;
int isock=0, maxfd;
int myport=-1;
//struct sockaddr_in address;
//#define VERBOSE
int bindSocket(unsigned short int port_number) {
int i;
struct sockaddr_in addressS;
int socketDescriptor;
//int file_des;
//file_des= -1;
if (myport==port_number)
return -10;
socketDescriptor = socket(AF_INET, SOCK_STREAM,0); //tcp
//socketDescriptor = socket(PF_INET, SOCK_STREAM, 0);
if (socketDescriptor < 0) {
printf("Can not create socket\n");
} else {
i = 1;
setsockopt(socketDescriptor, SOL_SOCKET, SO_REUSEADDR, &i, sizeof(i));
// setsockopt(socketDescriptor, IPPROTO_TCP, TCP_NODELAY, (char *) &i, sizeof(i));
// TCP_CORK
// Set some fields in the serverAddress structure.
addressS.sin_family = AF_INET;
addressS.sin_addr.s_addr = htonl(INADDR_ANY);
addressS.sin_port = htons(port_number);
// memset(&address.sin_addr, 0, sizeof(address.sin_addr));
if(bind(socketDescriptor,(struct sockaddr *) &addressS,sizeof(addressS))<0){
printf("Can not create socket\n");
socketDescriptor=-1;
} else {
if (listen(socketDescriptor, 5)==0) {
if (isock==0) {
FD_ZERO(&readset);
}
FD_SET(socketDescriptor, &readset);
isock++;
maxfd = socketDescriptor;
printf ("%d port %d fd %d\n",isock, port_number,socketDescriptor);
myport=port_number;
} else
printf("error on listen");
}
}
//int getrlimit(int resource, struct rlimit *rlim);
return socketDescriptor;
}
int getServerError(int socketDescriptor)
{
if (socketDescriptor<0) return 1;
else return 0;
};
int acceptConnection(int socketDescriptor) {
int j;
struct sockaddr_in addressC;
int file_des=-1;
struct timeval tv;
int result;
//socklen_t address_length;
socklen_t address_length=sizeof(struct sockaddr_in);
if (socketDescriptor<0)
return -1;
memcpy(&tempset, &readset, sizeof(tempset));
tv.tv_sec = 10000000;
tv.tv_usec = 0;
result = select(maxfd + 1, &tempset, NULL, NULL, &tv);
if (result == 0) {
printf("select() timed out!\n");
} else if (result < 0 && errno != EINTR) {
printf("Error in select(): %s\n", strerror(errno));
} else if (result > 0) {
#ifdef VERBOSE
printf("select returned!\n");
#endif
for (j=0; j<maxfd+1; j++) {
if (FD_ISSET(j, &tempset)) {
#ifdef VERBOSE
printf("fd %d is set\n",j);
#endif
FD_CLR(j, &tempset);
if ((file_des = accept(j,(struct sockaddr *) &addressC, &address_length)) < 0) {
printf("Error in accept(): %s\n", strerror(errno));
printf("Error: with server accept, connection refused %d\n", errno);
switch(errno) {
case EWOULDBLOCK:
printf("ewouldblock eagain\n");
break;
case EBADF:
printf("ebadf\n");
break;
case ECONNABORTED:
printf("econnaborted\n");
break;
case EFAULT:
printf("efault\n");
break;
case EINTR:
printf("eintr\n");
break;
case EINVAL:
printf("einval\n");
break;
case EMFILE:
printf("emfile\n");
break;
case ENFILE:
printf("enfile\n");
break;
case ENOTSOCK:
printf("enotsock\n");
break;
case EOPNOTSUPP:
printf("eOPNOTSUPP\n");
break;
case ENOBUFS:
printf("ENOBUFS\n");
break;
case ENOMEM:
printf("ENOMEM\n");
break;
case ENOSR:
printf("ENOSR\n");
break;
case EPROTO:
printf("EPROTO\n");
break;
default:
printf("unknown error\n");
}
// should remove descriptor
socketDescriptor=-1;
} else {
inet_ntop(AF_INET, &(addressC.sin_addr), dummyClientIP, INET_ADDRSTRLEN);
#ifdef VERBOSE
printf("connection accepted %d\n",file_des);
#endif
FD_SET(file_des, &readset);
maxfd = (maxfd < file_des)?file_des:maxfd;
}
}
}
}
return file_des;
}
void closeConnection(int file_des) {
#ifdef VERY_VERBOSE
#endif
if(file_des>=0)
close(file_des);
FD_CLR(file_des, &readset);
}
void exitServer(int socketDescriptor) {
if (socketDescriptor>=0)
close(socketDescriptor);
#ifdef VERY_VERBOSE
printf("Closing server\n");
#endif
FD_CLR(socketDescriptor, &readset);
socketDescriptor=-1;
isock--;
}
void swapData(void* val,int length,intType itype){
int i;
int16_t* c= (int16_t*)val;
int32_t* a= (int32_t*)val;
int64_t* b= (int64_t*)val;
for(i=0; length > 0; i++){
switch(itype){
case INT16:
c[i] = ((c[i] & 0x00FF) << 8) | ((c[i] & 0xFF00) >> 8);
length -= sizeof(int16_t);
break;
case INT32:
a[i]=((a[i] << 8) & 0xFF00FF00) | ((a[i] >> 8) & 0xFF00FF );
a[i]=(a[i] << 16) | ((a[i] >> 16) & 0xFFFF);
length -= sizeof(int32_t);
break;
case INT64:
b[i] = ((b[i] << 8) & 0xFF00FF00FF00FF00ULL ) | ((b[i] >> 8) & 0x00FF00FF00FF00FFULL );
b[i] = ((b[i] << 16) & 0xFFFF0000FFFF0000ULL ) | ((b[i] >> 16) & 0x0000FFFF0000FFFFULL );
b[i] = (b[i] << 32) | ((b[i] >> 32) & 0xFFFFFFFFULL);
length -= sizeof(int64_t);
break;
default:
length = 0;
break;
}
}
}
int sendData(int file_des, void* buf,int length, intType itype){
#ifndef PCCOMPILE
#ifdef EIGERD
swapData(buf, length, itype);
#endif
#endif
return sendDataOnly(file_des, buf, length);
}
int receiveData(int file_des, void* buf,int length, intType itype){
int ret = receiveDataOnly(file_des, buf, length);
#ifndef PCCOMPILE
#ifdef EIGERD
if (ret >= 0) swapData(buf, length, itype);
#endif
#endif
return ret;
}
int sendDataOnly(int file_des, void* buf,int length) {
int ret = write(file_des, buf, length); //value of -1 is other end socket crash as sigpipe is ignored
if (ret < 0) cprintf(BG_RED, "Error writing to socket. Possible socket crash\n");
return ret;
}
int receiveDataOnly(int file_des, void* buf,int length) {
int total_received=0;
int nreceiving;
int nreceived;
if (file_des<0) return -1;
#ifdef VERY_VERBOSE
printf("want to receive %d Bytes\n", length);
#endif
while(length > 0) {
nreceiving = (length>send_rec_max_size) ? send_rec_max_size:length;
nreceived = read(file_des,(char*)buf+total_received,nreceiving);
if(!nreceived){
if(!total_received) {
return -1; //to handle it
}
break;
}
length-=nreceived;
total_received+=nreceived;
}
if (total_received>0)
strcpy(thisClientIP,dummyClientIP);
if (strcmp(lastClientIP,thisClientIP))
differentClients=1;
else
differentClients=0;
return total_received;
}
int sendChannel(int file_des, sls_detector_channel *myChan) {
int ts=0;
//sendDataOnly(file_des,myChan, sizeof(sls_detector_channel));
ts+=sendData(file_des,&(myChan->chan),sizeof(myChan->chan),INT32);
ts+=sendData(file_des,&(myChan->chip),sizeof(myChan->chip),INT32);
ts+=sendData(file_des,&(myChan->module),sizeof(myChan->module),INT32);
ts+=sendData(file_des,&(myChan->reg),sizeof(myChan->reg),INT64);
return ts;
}
int sendChip(int file_des, sls_detector_chip *myChip) {
int ts=0;
//ts+=sendDataOnly(file_des,myChip,sizeof(sls_detector_chip));
ts+=sendData(file_des,&(myChip->chip),sizeof(myChip->chip),INT32);
ts+=sendData(file_des,&(myChip->module),sizeof(myChip->module),INT32);
ts+=sendData(file_des,&(myChip->nchan),sizeof(myChip->nchan),INT32);
ts+=sendData(file_des,&(myChip->reg),sizeof(myChip->reg),INT32);
ts+=sendData(file_des,(myChip->chanregs),sizeof(myChip->chanregs),INT32);
ts+=sendData(file_des,myChip->chanregs,myChip->nchan*sizeof(int),INT32);
return ts;
}
int sendModule(int file_des, sls_detector_module *myMod) {
return sendModuleGeneral(file_des, myMod, 1);
}
int sendModuleGeneral(int file_des, sls_detector_module *myMod, int sendAll) {
int ts=0;
#ifdef VERBOSE
int idac;
#endif
int nChips=myMod->nchip;
int nChans=myMod->nchan;
int nAdcs=myMod->nadc;
int nDacs=myMod->ndac;
//ts+= sendDataOnly(file_des,myMod,sizeof(sls_detector_module));
ts+=sendData(file_des,&(myMod->module),sizeof(myMod->module),INT32);
ts+=sendData(file_des,&(myMod->serialnumber),sizeof(myMod->serialnumber),INT32);
ts+=sendData(file_des,&(myMod->nchan),sizeof(myMod->nchan),INT32);
ts+=sendData(file_des,&(myMod->nchip),sizeof(myMod->nchip),INT32);
ts+=sendData(file_des,&(myMod->ndac),sizeof(myMod->ndac),INT32);
ts+=sendData(file_des,&(myMod->nadc),sizeof(myMod->nadc),INT32);
ts+=sendData(file_des,&(myMod->reg),sizeof(myMod->reg),INT32);
ts+=sendData(file_des,myMod->dacs,sizeof(myMod->ndac),OTHER);
if(sendAll){
ts+=sendData(file_des,myMod->adcs,sizeof(myMod->nadc),OTHER);
}else{
uint32_t k = 0;
ts+=sendData(file_des,&k,sizeof(k),OTHER);
}
/*some detectors dont require sending all trimbits etc.*/
if(sendAll){
ts+=sendData(file_des,myMod->chipregs,sizeof(myMod->nchip),OTHER);
ts+=sendData(file_des,myMod->chanregs,sizeof(myMod->nchan),OTHER);
}
ts+=sendData(file_des,&(myMod->gain), sizeof(myMod->gain),OTHER);
ts+=sendData(file_des,&(myMod->offset), sizeof(myMod->offset),OTHER);
#ifdef VERBOSE
printf("module %d of size %d sent\n",myMod->module, ts);
#endif
ts+= sendData(file_des,myMod->dacs,sizeof(dacs_t)*nDacs,INT32);
#ifdef VERBOSE
printf("dacs %d of size %d sent\n",myMod->module, ts);
for (idac=0; idac< nDacs; idac++)
printf("dac %d is %d\n",idac,(int)myMod->dacs[idac]);
#endif
if(sendAll)
ts+= sendData(file_des,myMod->adcs,sizeof(dacs_t)*nAdcs,INT32);
else {
uint32_t k = 0;
ts+= sendData(file_des,&k,sizeof(k),INT32);
}
#ifdef VERBOSE
printf("adcs %d of size %d sent\n",myMod->module, ts);
#endif
/*some detectors dont require sending all trimbits etc.*/
if(sendAll){
ts+=sendData(file_des,myMod->chipregs,sizeof(int)*nChips,INT32);
#ifdef VERBOSE
printf("chips %d of size %d sent\n",myMod->module, ts);
#endif
ts+=sendData(file_des,myMod->chanregs,sizeof(int)*nChans,INT32);
#ifdef VERBOSE
printf("chans %d of size %d sent - %d\n",myMod->module, ts, myMod->nchan);
#endif
}
#ifdef VERBOSE
printf("module %d of size %d sent register %x\n",myMod->module, ts, myMod->reg);
#endif
return ts;
}
int receiveChannel(int file_des, sls_detector_channel *myChan) {
int ts=0;
//receiveDataOnly(file_des,myChan,sizeof(sls_detector_channel));
ts+=receiveData(file_des,&(myChan->chan),sizeof(myChan->chan),INT32);
ts+=receiveData(file_des,&(myChan->chip),sizeof(myChan->chip),INT32);
ts+=receiveData(file_des,&(myChan->module),sizeof(myChan->module),INT32);
ts+=receiveData(file_des,&(myChan->reg),sizeof(myChan->reg),INT32);
return ts;
}
int receiveChip(int file_des, sls_detector_chip* myChip) {
int *ptr=myChip->chanregs;
int ts=0;
int nChans, nchanold=myChip->nchan, chdiff;
//ts+= receiveDataOnly(file_des,myChip,sizeof(sls_detector_chip));
ts+=receiveData(file_des,&(myChip->chip),sizeof(myChip->chip),INT32);
ts+=receiveData(file_des,&(myChip->module),sizeof(myChip->module),INT32);
ts+=receiveData(file_des,&(myChip->nchan),sizeof(myChip->nchan),INT32);
ts+=receiveData(file_des,&(myChip->reg),sizeof(myChip->reg),INT32);
ts+=receiveData(file_des,(myChip->chanregs),sizeof(myChip->chanregs),INT32);
myChip->chanregs=ptr;
nChans=myChip->nchan;
chdiff=nChans-nchanold;
if (nchanold!=nChans) {
printf("wrong number of channels received!\n");
}
#ifdef VERBOSE
printf("chip structure received\n");
printf("now receiving %d channels\n", nChans);
#endif
if (chdiff<=0)
ts+=receiveData(file_des,myChip->chanregs, sizeof(int)*nChans,INT32);
else {
ptr=(int*)malloc(chdiff*sizeof(int));
myChip->nchan=nchanold;
ts+=receiveData(file_des,myChip->chanregs, sizeof(int)*nchanold,INT32);
ts+=receiveData(file_des,ptr, sizeof(int)*chdiff,INT32);
free(ptr);
return FAIL;
}
#ifdef VERBOSE
printf("chip's channels received\n");
#endif
return ts;
}
int receiveModule(int file_des, sls_detector_module* myMod) {
return receiveModuleGeneral(file_des,myMod,1);
}
int receiveModuleGeneral(int file_des, sls_detector_module* myMod, int receiveAll) {
int ts=0;
dacs_t *dacptr=myMod->dacs;
dacs_t *adcptr=myMod->adcs;
int *chipptr=myMod->chipregs, *chanptr=myMod->chanregs;
int nChips, nchipold=myMod->nchip, nchipdiff;
int nChans, nchanold=myMod->nchan, nchandiff;
int nDacs, ndold=myMod->ndac, ndacdiff;
int nAdcs, naold=myMod->nadc, nadcdiff;
#ifdef VERBOSE
int id=0;
#endif
// ts+= receiveDataOnly(file_des,myMod,sizeof(sls_detector_module));
ts+=receiveData(file_des,&(myMod->module),sizeof(myMod->module),INT32);
ts+=receiveData(file_des,&(myMod->serialnumber),sizeof(myMod->serialnumber),INT32);
ts+=receiveData(file_des,&(myMod->nchan),sizeof(myMod->nchan),INT32);
ts+=receiveData(file_des,&(myMod->nchip),sizeof(myMod->nchip),INT32);
ts+=receiveData(file_des,&(myMod->ndac),sizeof(myMod->ndac),INT32);
ts+=receiveData(file_des,&(myMod->nadc),sizeof(myMod->nadc),INT32);
ts+=receiveData(file_des,&(myMod->reg),sizeof(myMod->reg),INT32);
ts+=receiveData(file_des,myMod->dacs,sizeof(myMod->ndac),INT32);
if(receiveAll){ // temporary fix
ts+=receiveData(file_des,myMod->adcs,sizeof(myMod->nadc),INT32);
}else {
uint32_t k;ts+=receiveData(file_des,&k,sizeof(k),INT32);//nadc is 0
}
/*some detectors dont require sending all trimbits etc.*/
if(receiveAll){
ts+=receiveData(file_des,myMod->chipregs,sizeof(myMod->nchip),INT32);
ts+=receiveData(file_des,myMod->chanregs,sizeof(myMod->nchan),INT32);
}
ts+=receiveData(file_des,&(myMod->gain), sizeof(myMod->gain),OTHER);
ts+=receiveData(file_des,&(myMod->offset), sizeof(myMod->offset),OTHER);
myMod->dacs=dacptr;
myMod->adcs=adcptr;
myMod->chipregs=chipptr;
myMod->chanregs=chanptr;
#ifdef EIGERD
//feature to exclude sending of trimbtis, nchips=0,nchans=0 in that case
if(myMod->nchip == 0 && myMod->nchan == 0) {
receiveAll=0;
nchipold=0;
nchanold=0;
}
#endif
nChips=myMod->nchip;
nchipdiff=nChips-nchipold;
if (nchipold!=nChips) {
printf("received wrong number of chips\n");
}
#ifdef VERBOSE
else
printf("received %d chips\n",nChips);
#endif
nChans=myMod->nchan;
nchandiff=nChans-nchanold;
if (nchanold!=nChans) {
printf("received wrong number of channels\n");
}
#ifdef VERBOSE
else
printf("received %d chans\n",nChans);
#endif
nDacs=myMod->ndac;
ndacdiff=nDacs-ndold;
if (ndold!=nDacs) {
printf("received wrong number of dacs\n");
}
#ifdef VERBOSE
else
printf("received %d dacs\n",nDacs);
#endif
nAdcs=myMod->nadc;
nadcdiff=nAdcs-naold;
if (naold!=nAdcs) {
printf("received wrong number of adcs\n");
}
#ifdef VERBOSE
else
printf("received %d adcs\n",nAdcs);
#endif
if (ndacdiff<=0) {
ts+=receiveData(file_des,myMod->dacs, sizeof(dacs_t)*nDacs,INT32);
#ifdef VERBOSE
printf("dacs received\n");
int id;
for (id=0; id<nDacs; id++)
printf("dac %d val %d\n",id, (int)myMod->dacs[id]);
#endif
} else {
dacptr=(dacs_t*)malloc(ndacdiff*sizeof(dacs_t));
myMod->ndac=ndold;
ts+=receiveData(file_des,myMod->dacs, sizeof(dacs_t)*ndold,INT32);
ts+=receiveData(file_des,dacptr, sizeof(dacs_t)*ndacdiff,INT32);
free(dacptr);
return FAIL;
}
if (nadcdiff<=0) {
ts+=receiveData(file_des,myMod->adcs, sizeof(dacs_t)*nAdcs,INT32);
#ifdef VERBOSE
printf("adcs received\n");
#endif
} else {
adcptr=(dacs_t*)malloc(nadcdiff*sizeof(dacs_t));
myMod->nadc=naold;
ts+=receiveData(file_des,myMod->adcs, sizeof(dacs_t)*naold,INT32);
ts+=receiveData(file_des,adcptr, sizeof(dacs_t)*nadcdiff,INT32);
free(adcptr);
return FAIL;
}
/*some detectors dont require sending all trimbits etc.*/
if(receiveAll){
if (nchipdiff<=0) {
ts+=receiveData(file_des,myMod->chipregs, sizeof(int)*nChips,INT32);
#ifdef VERBOSE
printf("chips received\n");
#endif
} else {
chipptr=(int*)malloc(nchipdiff*sizeof(int));
myMod->nchip=nchipold;
ts+=receiveData(file_des,myMod->chipregs, sizeof(int)*nchipold,INT32);
ts+=receiveData(file_des,chipptr, sizeof(int)*nchipdiff,INT32);
free(chipptr);
return FAIL;
}
if (nchandiff<=0) {
ts+=receiveData(file_des,myMod->chanregs, sizeof(int)*nChans,INT32);
#ifdef VERBOSE
printf("chans received\n");
#endif
} else {
chanptr=(int*)malloc(nchandiff*sizeof(int));
myMod->nchan=nchanold;
ts+=receiveData(file_des,myMod->chanregs, sizeof(int)*nchanold,INT32);
ts+=receiveData(file_des,chanptr, sizeof(int)*nchandiff,INT32);
free(chanptr);
return FAIL;
}
}
#ifdef VERBOSE
printf("received module %d of size %d register %x\n",myMod->module,ts,myMod->reg);
#endif
return ts;
}

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#ifndef COMMUNICATION_FUNCS_H
#define COMMUNICATION_FUNCS_H
#define SEND_REC_MAX_SIZE 4096
#define DEFAULT_PORTNO 1952
#include <sys/types.h>
#include <sys/socket.h>
#include <arpa/inet.h>
#include <netdb.h>
#include <netinet/in.h>
#include <unistd.h>
#include "sls_detector_defs.h"
typedef enum{
INT16,
INT32,
INT64,
OTHER
}intType;
int bindSocket(unsigned short int port_number);
int acceptConnection(int socketDescriptor);
void closeConnection(int file_Des);
void exitServer(int socketDescriptor);
void swapData(void* val,int length,intType itype);
int sendData(int file_des, void* buf,int length, intType itype);
int receiveData(int file_des, void* buf,int length, intType itype);
int sendDataOnly(int file_des, void* buf,int length);
int receiveDataOnly(int file_des, void* buf,int length);
int getServerError(int socketDescriptor);
int sendChannel(int file_des, sls_detector_channel *myChan);
int sendChip(int file_des, sls_detector_chip *myChip);
int sendModule(int file_des, sls_detector_module *myMod);
int sendModuleGeneral(int file_des, sls_detector_module *myMod, int sendAll);
int receiveChannel(int file_des, sls_detector_channel *myChan);
int receiveChip(int file_des, sls_detector_chip* myChip);
int receiveModule(int file_des, sls_detector_module* myMod);
int receiveModuleGeneral(int file_des, sls_detector_module* myMod, int receiveAll);
#endif

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/*
* error_defs.h
*
* Created on: Jan 18, 2013
* Author: l_maliakal_d
*/
#ifndef ERROR_DEFS_H_
#define ERROR_DEFS_H_
#include "ansi.h"
#include "sls_detector_defs.h"
#include <stdio.h>
#include <string>
#include <cstring>
#include <iostream>
using namespace std;
/** Error flags */
/*Assumption: Only upto 63 detectors */
// multi errors
// 0xFFF0000000000000ULL
#define MULTI_DETECTORS_NOT_ADDED 0x8000000000000000ULL
#define MULTI_HAVE_DIFFERENT_VALUES 0x4000000000000000ULL
// sls errors
#define CRITICAL_ERROR_MASK 0xFFFFFFF
// 0xFFFFFFF000000000ULL
#define CANNOT_CONNECT_TO_DETECTOR 0x4000000000000000ULL
#define CANNOT_CONNECT_TO_RECEIVER 0x2000000000000000ULL
#define COULDNOT_SET_CONTROL_PORT 0x1000000000000000ULL
#define COULDNOT_SET_STOP_PORT 0x0800000000000000ULL
#define COULDNOT_SET_DATA_PORT 0x0400000000000000ULL
#define FILE_PATH_DOES_NOT_EXIST 0x0200000000000000ULL
#define COULDNOT_CREATE_UDP_SOCKET 0x0100000000000000ULL
#define COULDNOT_CREATE_FILE 0x0080000000000000ULL
#define COULDNOT_ENABLE_COMPRESSION 0x0040000000000000ULL
#define RECEIVER_DET_HOSTNAME_NOT_SET 0x0020000000000000ULL
#define RECEIVER_DET_HOSTTYPE_NOT_SET 0x0010000000000000ULL
#define DETECTOR_TEN_GIGA 0x0008000000000000ULL
#define DETECTOR_ACTIVATE 0x0004000000000000ULL
#define COULD_NOT_CONFIGURE_MAC 0x0002000000000000ULL
#define COULDNOT_START_RECEIVER 0x0001000000000000ULL // default error like starting threads
#define COULDNOT_STOP_RECEIVER 0x0000800000000000ULL
#define RECEIVER_DET_POSID_NOT_SET 0x0000400000000000ULL
#define RECEIVER_MULTI_DET_SIZE_NOT_SET 0x0000200000000000ULL
#define PREPARE_ACQUISITION 0x0000100000000000ULL
#define CLEANUP_ACQUISITION 0x0000080000000000ULL
#define REGISER_WRITE_READ 0x0000040000000000ULL
// 0xFFFFFFF000000000ULL
// 0x0000000FFFFFFFFFULL
#define COULDNOT_SET_NETWORK_PARAMETER 0x0000000000000001ULL
#define COULDNOT_SET_ROI 0x0000000000000002ULL
#define RECEIVER_READ_FREQUENCY 0x0000000000000004ULL
#define SETTINGS_NOT_SET 0x0000000000000008ULL
#define SETTINGS_FILE_NOT_OPEN 0x0000000000000010ULL
#define DETECTOR_TIMER_VALUE_NOT_SET 0x0000000000000020ULL
#define RECEIVER_ACQ_PERIOD_NOT_SET 0x0000000000000040ULL
#define RECEIVER_FRAME_NUM_NOT_SET 0x0000000000000080ULL
#define RECEIVER_DYNAMIC_RANGE 0x0000000000000100ULL
#define RECEIVER_TEN_GIGA 0x0000000000000200ULL
#define ALLTIMBITS_NOT_SET 0x0000000000000400ULL
#define COULD_NOT_SET_SPEED_PARAMETERS 0x0000000000000800ULL
#define COULD_NOT_SET_READOUT_FLAGS 0x0000000000001000ULL
#define COULD_NOT_SET_FIFO_DEPTH 0x0000000000002000ULL
#define COULD_NOT_SET_COUNTER_BIT 0x0000000000004000ULL
#define COULD_NOT_PULSE_PIXEL 0x0000000000008000ULL
#define COULD_NOT_PULSE_PIXEL_NMOVE 0x0000000000010000ULL
#define COULD_NOT_PULSE_CHIP 0x0000000000020000ULL
#define COULD_NOT_SET_RATE_CORRECTION 0x0000000000040000ULL
#define DETECTOR_NETWORK_PARAMETER 0x0000000000080000ULL
#define RATE_CORRECTION_NOT_32or16BIT 0x0000000000100000ULL
#define RATE_CORRECTION_NO_TAU_PROVIDED 0x0000000000200000ULL
#define PROGRAMMING_ERROR 0x0000000000400000ULL
#define RECEIVER_ACTIVATE 0x0000000000800000ULL
#define DATA_STREAMING 0x0000000001000000ULL
#define RESET_ERROR 0x0000000002000000ULL
#define POWER_CHIP 0x0000000004000000ULL
#define RECEIVER_READ_TIMER 0x0000000008000000ULL
#define RECEIVER_ACQ_TIME_NOT_SET 0x0000000010000000ULL
#define RECEIVER_FLIPPED_DATA_NOT_SET 0x0000000020000000ULL
#define THRESHOLD_NOT_SET 0x0000000040000000ULL
#define RECEIVER_FILE_FORMAT 0x0000000080000000ULL
#define RECEIVER_SILENT_MODE_NOT_SET 0x0000000100000000ULL
#define RECEIVER_TIMER_NOT_SET 0x0000000200000000ULL
#define RECEIVER_ENABLE_GAPPIXELS_NOT_SET 0x0000000400000000ULL
#define RESTREAM_STOP_FROM_RECEIVER 0x0000000800000000ULL
// 0x0000000FFFFFFFFFULL
/** @short class returning all error messages for error mask */
class errorDefs {
public:
/** Constructor */
errorDefs():errorMask(0){
strcpy(notAddedList,"");
};
/** Gets the error message
* param errorMask error mask
/returns error message from error mask
*/
static string getErrorMessage(int64_t slsErrorMask){
string retval = "";
if(slsErrorMask&CANNOT_CONNECT_TO_DETECTOR)
retval.append("Cannot connect to Detector\n");
if(slsErrorMask&CANNOT_CONNECT_TO_RECEIVER)
retval.append("Cannot connect to Receiver\n");
if(slsErrorMask&COULDNOT_SET_CONTROL_PORT)
retval.append("Could not set control port\n");
if(slsErrorMask&COULDNOT_SET_STOP_PORT)
retval.append("Could not set stop port\n");
if(slsErrorMask&COULDNOT_SET_DATA_PORT)
retval.append("Could not set receiver port\n");
if(slsErrorMask&FILE_PATH_DOES_NOT_EXIST)
retval.append("Path to Output Directory does not exist\n");
if(slsErrorMask&COULDNOT_CREATE_UDP_SOCKET)
retval.append("Could not create UDP socket to start receiver\n");
if(slsErrorMask&COULDNOT_CREATE_FILE)
retval.append("Could not create file to start receiver.\nCheck permissions of output directory or the overwrite flag\n");
if(slsErrorMask&COULDNOT_ENABLE_COMPRESSION)
retval.append("Could not enable/disable data compression in receiver.\nThread creation failed or recompile code with MYROOT1 flag.\n");
if(slsErrorMask&RECEIVER_DET_HOSTNAME_NOT_SET)
retval.append("Could not send the detector hostname to the receiver.\n");
if(slsErrorMask&RECEIVER_DET_HOSTTYPE_NOT_SET)
retval.append("Could not send the detector type to the receiver.\n");
if(slsErrorMask&DETECTOR_TEN_GIGA)
retval.append("Could not enable/disable 10GbE in the detector.\n");
if(slsErrorMask&DETECTOR_ACTIVATE)
retval.append("Could not activate/deactivate detector\n");
if(slsErrorMask&RECEIVER_DET_POSID_NOT_SET)
retval.append("Could not set detector position id\n");
if(slsErrorMask&RECEIVER_MULTI_DET_SIZE_NOT_SET)
retval.append("Could not set multi detector size\n");
if(slsErrorMask&PREPARE_ACQUISITION)
retval.append("Could not prepare acquisition in detector\n");
if(slsErrorMask&CLEANUP_ACQUISITION)
retval.append("Could not clean up after acquisition in detector\n");
if(slsErrorMask&REGISER_WRITE_READ)
retval.append("Could not read/write register in detector\n");
if(slsErrorMask&COULD_NOT_CONFIGURE_MAC)
retval.append("Could not configure mac\n");
if(slsErrorMask&COULDNOT_SET_NETWORK_PARAMETER)
retval.append("Could not set network parameter. Should be valid and in proper format\n");
if(slsErrorMask&COULDNOT_SET_ROI)
retval.append("Could not set the exact region of interest. Verify ROI set by detector.\n");
if(slsErrorMask&RECEIVER_READ_FREQUENCY)
retval.append("Could not set receiver read frequency.\n");
if(slsErrorMask&SETTINGS_NOT_SET)
retval.append("Could not set settings.\n");
if(slsErrorMask&SETTINGS_FILE_NOT_OPEN)
retval.append("Could not open settings file. Verify if it exists.\n");
if(slsErrorMask&COULDNOT_START_RECEIVER)
retval.append("Could not start receiver.\n");
if(slsErrorMask&COULDNOT_STOP_RECEIVER)
retval.append("Could not stop receiver.\n");
if(slsErrorMask&DETECTOR_TIMER_VALUE_NOT_SET)
retval.append("Could not set one of timer values in detector.\n");
if(slsErrorMask&RECEIVER_ACQ_PERIOD_NOT_SET)
retval.append("Could not set acquisition period in receiver.\n");
if(slsErrorMask&RECEIVER_FRAME_NUM_NOT_SET)
retval.append("Could not set frame number in receiver.\n");
if(slsErrorMask&RECEIVER_DYNAMIC_RANGE)
retval.append("Could not set dynamic range in receiver.\n");
if(slsErrorMask&RECEIVER_TEN_GIGA)
retval.append("Could not enable/disable 10GbE in the receiver.\n");
if(slsErrorMask&ALLTIMBITS_NOT_SET)
retval.append("Could not set all trimbits to value.\n");
if(slsErrorMask&COULD_NOT_SET_SPEED_PARAMETERS)
retval.append("Could not set the speed parameter value\n");
if(slsErrorMask&COULD_NOT_SET_READOUT_FLAGS)
retval.append("Could not set the readout flag\n");
if(slsErrorMask&COULD_NOT_SET_FIFO_DEPTH)
retval.append("Could not set receiver fifo depth\n");
if(slsErrorMask&COULD_NOT_SET_COUNTER_BIT)
retval.append("Could not set/reset counter bit\n");
if(slsErrorMask&COULD_NOT_PULSE_PIXEL)
retval.append("Could not pulse pixel\n");
if(slsErrorMask&COULD_NOT_PULSE_PIXEL_NMOVE)
retval.append("Could not pulse pixel and move\n");
if(slsErrorMask&COULD_NOT_PULSE_CHIP)
retval.append("Could not pulse chip\n");
if(slsErrorMask&COULD_NOT_SET_RATE_CORRECTION)
retval.append("Could not set rate correction\n");
if(slsErrorMask&DETECTOR_NETWORK_PARAMETER)
retval.append("Could not set/get detector network parameter\n");
if(slsErrorMask&RATE_CORRECTION_NOT_32or16BIT)
retval.append("Rate correction Deactivated, must be in 32 or 16 bit mode\n");
if(slsErrorMask&RATE_CORRECTION_NO_TAU_PROVIDED)
retval.append("Rate correction Deactivated. No default tau provided in file\n");
if(slsErrorMask&PROGRAMMING_ERROR)
retval.append("Could not program FPGA\n");
if(slsErrorMask&RECEIVER_ACTIVATE)
retval.append("Could not activate/deactivate receiver\n");
if(slsErrorMask&DATA_STREAMING)
retval.append("Could not enable/disable Data Streaming\n");
if(slsErrorMask&RESET_ERROR)
retval.append("Could not reset the FPGA\n");
if(slsErrorMask&POWER_CHIP)
retval.append("Could not power on/off/get the chip\n");
if(slsErrorMask&RECEIVER_READ_TIMER)
retval.append("Could not set receiver read timer\n");
if(slsErrorMask&RECEIVER_FLIPPED_DATA_NOT_SET)
retval.append("Could not set receiver flipped data/bottom\n");
if(slsErrorMask&THRESHOLD_NOT_SET)
retval.append("Could not set threshold\n");
if(slsErrorMask&RECEIVER_FILE_FORMAT)
retval.append("Could not set receiver file format\n");
if(slsErrorMask&RECEIVER_TIMER_NOT_SET)
retval.append("Could not set timer in receiver.\n");
if(slsErrorMask&RECEIVER_SILENT_MODE_NOT_SET)
retval.append("Could not set silent mode in receiver.\n");
if(slsErrorMask&RECEIVER_ENABLE_GAPPIXELS_NOT_SET)
retval.append("Could not enable/disable gap pixels in receiver.\n");
if(slsErrorMask&RESTREAM_STOP_FROM_RECEIVER)
retval.append("Could not restream stop from receiver.\n");
//------------------------------------------------------ length of message
return retval;
}
/** Sets multi error mask
@param multi error mask to be set to
/returns multi error mask
*/
int64_t setErrorMask(int64_t i){errorMask=i;return getErrorMask();};
/**returns multi error mask */
int64_t getErrorMask(){return errorMask;};
/** Clears error mask
/returns error mask
*/
int64_t clearErrorMask(){errorMask=0;return errorMask;};
/** Gets the not added detector list
/returns list
*/
char* getNotAddedList(){return notAddedList;};
/** Append the detector to not added detector list
* @param name append to the list
/returns list
*/
void appendNotAddedList(const char* name){strcat(notAddedList,name);strcat(notAddedList,"+");};
/** Clears not added detector list
/returns error mask
*/
void clearNotAddedList(){strcpy(notAddedList,"");};
protected:
/** Error Mask */
int64_t errorMask;
/** Detectors Not added List */
char notAddedList[MAX_STR_LENGTH];
};
#endif /* ERROR_DEFS_H_ */

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#ifndef SLS_DETECTOR_DEFS_H
#define SLS_DETECTOR_DEFS_H
#ifdef __CINT__
#define MYROOT
#define __cplusplus
#endif
//#include <stdint.h>
#include "sls_receiver_defs.h"
/** default maximum string length */
#define MAX_SCAN_STEPS 2000
/** maxmimum number of modules per controller*/
#define MAXMODS 24
/** maxmimum number of detectors ina multidetector structure*/
#define MAXDET 100
/** header length for data :gotthard*/
#define HEADERLENGTH 12
/** maximum rois */
#define MAX_ROIS 100
/** maximum unit size of program sent to detector */
#define MAX_FPGAPROGRAMSIZE (2 * 1024 *1024)
#define MAX_SCAN_LEVELS 2
typedef char mystring[MAX_STR_LENGTH];
typedef double mysteps[MAX_SCAN_STEPS];
#ifndef DACS_FLOAT
typedef int dacs_t;
#else
typedef float dacs_t;
#endif
#define DEFAULT_DET_MAC "00:aa:bb:cc:dd:ee"
#define DEFAULT_DET_IP "129.129.202.46"
/**
\file sls_detector_defs.h
This file contains all the basic definitions common to the slsDetector class
and to the server programs running on the detector
* @author Anna Bergamaschi
* @version 0.1alpha (any string)
* @see slsDetector
$Revision: 824 $
*/
/** get flag form most functions */
#define GET_FLAG -1
#ifdef __cplusplus
/** @short class containing all the structures, constants and enum definitions */
class slsDetectorDefs: public virtual slsReceiverDefs{
public:
slsDetectorDefs(){};
#endif
enum {startScript, scriptBefore, headerBefore, headerAfter,scriptAfter, stopScript, enCalLog, angCalLog, MAX_ACTIONS};
/**
@short structure for a detector channel
should not be used by unexperienced users
\see ::channelRegisterBit
*/
typedef struct {
int chan; /**< is the channel number */
int chip; /**< is the chip number */
int module; /**< is the module number */
int64_t reg; /**< is the is the channel register (e.g. trimbits, calibration enable, comparator enable...) */
} sls_detector_channel;
/**
@short structure for a detector chip
should not be used by unexperienced users
\see ::chipRegisterBit ::channelRegisterBit
*/
typedef struct {
int chip; /**< is the chip number */
int module; /**< is the module number */
int nchan; /**< is the number of channels in the chip */
int reg; /**<is the chip register (e.g. output analogue buffer enable)
\see ::chipRegisterBit */
int *chanregs; /**< is the pointer to the array of the channel registers
\see ::channelRegisterBit */
} sls_detector_chip;
/**
@short structure for a detector module
should not be used by unexperienced users
\see :: moduleRegisterBit ::chipRegisterBit :channelRegisterBit
@li reg is the module register (e.g. dynamic range? see moduleRegisterBit)
@li dacs is the pointer to the array of dac values (in V)
@li adcs is the pointer to the array of adc values (in V)
@li chipregs is the pointer to the array of chip registers
@li chanregs is the pointer to the array of channel registers
@li gain is the module gain
@li offset is the module offset
*/
typedef struct {
int module; /**< is the module number */
int serialnumber; /**< is the module serial number */
int nchan; /**< is the number of channels on the module*/
int nchip; /**< is the number of chips on the module */
int ndac; /**< is the number of dacs on the module */
int nadc; /**< is the number of adcs on the module */
int reg; /**< is the module register (e.g. dynamic range?)
\see moduleRegisterBit */
dacs_t *dacs; /**< is the pointer to the array of the dac values (in V) */
dacs_t *adcs; /**< is the pointer to the array of the adc values (in V) FLAT_FIELD_CORRECTION*/
int *chipregs; /**< is the pointer to the array of the chip registers
\see ::chipRegisterBit */
int *chanregs; /**< is the pointer to the array of the channel registers
\see ::channelRegisterBit */
double gain; /**< is the module gain (V/keV) */
double offset; /**< is the module offset (V) */
} sls_detector_module;
/**
@short structure for a region of interest
xmin,xmax,ymin,ymax define the limits of the region
*/
typedef struct {
int xmin; /**< is the roi xmin (in channel number) */
int xmax; /**< is the roi xmax (in channel number)*/
int ymin; /**< is the roi ymin (in channel number)*/
int ymax; /**< is the roi ymax (in channel number)*/
} ROI ;
/* /\* */
/* @short structure for a generic integer array */
/* *\/ */
/* typedef struct { */
/* int len; /\**< is the number of elements of the array *\/ */
/* int *iptr; /\**< is the pointer to the array *\/ */
/* } iarray ; */
/* /\** */
/* Communication protocol (normally TCP) */
/* *\/ */
/* enum communicationProtocol{ */
/* TCP, /\**< TCP/IP *\/ */
/* UDP /\**< UDP *\/ */
/* }; */
/**
network parameters
*/
enum networkParameter {
DETECTOR_MAC, /**< detector MAC */
DETECTOR_IP, /**< detector IP */
RECEIVER_HOSTNAME, /**< receiver IP/hostname */
RECEIVER_UDP_IP, /**< receiever UDP IP */
RECEIVER_UDP_PORT, /**< receiever UDP Port */
RECEIVER_UDP_MAC, /**< receiever UDP MAC */
RECEIVER_UDP_PORT2, /**< receiever UDP Port of second half module for eiger */
DETECTOR_TXN_DELAY_LEFT, /**< transmission delay on the (left) port for next frame */
DETECTOR_TXN_DELAY_RIGHT, /**< transmission delay on the right port for next frame */
DETECTOR_TXN_DELAY_FRAME, /**< transmission delay of a whole frame for all the ports */
FLOW_CONTROL_10G, /**< flow control for 10GbE */
FLOW_CONTROL_WR_PTR, /**< memory write pointer for flow control */
FLOW_CONTROL_RD_PTR, /**< memory read pointer for flow control */
RECEIVER_STREAMING_PORT, /**< receiever streaming TCP(ZMQ) port */
CLIENT_STREAMING_PORT, /**< client streaming TCP(ZMQ) port */
RECEIVER_STREAMING_SRC_IP,/**< receiever streaming TCP(ZMQ) ip */
CLIENT_STREAMING_SRC_IP /**< client streaming TCP(ZMQ) ip */
};
/**
type of action performed (for text client)
*/
enum {GET_ACTION, PUT_ACTION, READOUT_ACTION, HELP_ACTION};
/** online flags enum \sa setOnline*/
enum {GET_ONLINE_FLAG=-1, /**< returns wether the detector is in online or offline state */
OFFLINE_FLAG=0, /**< detector in offline state (i.e. no communication to the detector - using only local structure - no data acquisition possible!) */
ONLINE_FLAG =1/**< detector in online state (i.e. communication to the detector updating the local structure) */
};
/**
flags to get (or set) the size of the detector
*/
enum numberOf {
MAXMODX, /**<maximum number of module in X direction */
MAXMODY, /**<maximum number of module in Y direction */
NMODX, /**<installed number of module in X direction */
NMODY, /**<installed number of module in Y direction */
NCHANSX, /**<number of channels in X direction */
NCHANSY, /**<number of channels in Y direction */
NCHIPSX, /**<number of chips in X direction */
NCHIPSY /**<number of chips in Y direction */
};
/**
dimension indexes
*/
enum dimension {
X=0, /**< X dimension */
Y=1, /**< Y dimension */
Z=2 /**< Z dimension */
};
/**
enable/disable flags
*/
enum {
DISABLED, /**<flag disabled */
ENABLED /**<flag enabled */
};
/**
use of the external signals
*/
enum externalSignalFlag {
GET_EXTERNAL_SIGNAL_FLAG=-1, /**<return flag for signal */
SIGNAL_OFF, /**<signal unused - tristate*/
GATE_IN_ACTIVE_HIGH, /**<input gate active high*/
GATE_IN_ACTIVE_LOW, /**<input gate active low */
TRIGGER_IN_RISING_EDGE, /**<input exposure trigger on rising edge */
TRIGGER_IN_FALLING_EDGE, /**<input exposure trigger on falling edge */
RO_TRIGGER_IN_RISING_EDGE, /**<input raedout trigger on rising edge */
RO_TRIGGER_IN_FALLING_EDGE, /**<input readout trigger on falling edge */
GATE_OUT_ACTIVE_HIGH, /**<output active high when detector is exposing*/
GATE_OUT_ACTIVE_LOW, /**<output active low when detector is exposing*/
TRIGGER_OUT_RISING_EDGE, /**<output trigger rising edge at start of exposure */
TRIGGER_OUT_FALLING_EDGE, /**<output trigger falling edge at start of exposure */
RO_TRIGGER_OUT_RISING_EDGE, /**<output trigger rising edge at start of readout */
RO_TRIGGER_OUT_FALLING_EDGE, /**<output trigger falling edge at start of readout */
OUTPUT_LOW, /**< output always low */
OUTPUT_HIGH, /**< output always high */
MASTER_SLAVE_SYNCHRONIZATION /**< reserved for master/slave synchronization in multi detector systems */
};
/**
communication mode using external signals
*/
enum externalCommunicationMode{
GET_EXTERNAL_COMMUNICATION_MODE=-1,/**<return flag for communication mode */
AUTO_TIMING, /**< internal timing */
TRIGGER_EXPOSURE, /**< trigger mode i.e. exposure is triggered */
TRIGGER_READOUT, /**< stop trigger mode i.e. readout is triggered by external signal */
GATE_FIX_NUMBER, /**< gated and reads out after a fixed number of gates */
GATE_WITH_START_TRIGGER, /**< gated with start trigger */
BURST_TRIGGER /**< trigger a burst of frames */
};
/**
detector IDs/versions
*/
enum idMode{
MODULE_SERIAL_NUMBER, /**<return module serial number */
MODULE_FIRMWARE_VERSION, /**<return module firmware */
DETECTOR_SERIAL_NUMBER, /**<return detector system serial number */
DETECTOR_FIRMWARE_VERSION, /**<return detector system firmware version */
DETECTOR_SOFTWARE_VERSION, /**<return detector system software version */
THIS_SOFTWARE_VERSION, /**<return this software version */
RECEIVER_VERSION, /**<return receiver software version */
SOFTWARE_FIRMWARE_API_VERSION /** return software firmware API version **/
};
/**
detector digital test modes
*/
enum digitalTestMode {
CHIP_TEST, /**< test chips */
MODULE_FIRMWARE_TEST, /**< test module firmware */
DETECTOR_FIRMWARE_TEST, /**< test detector system firmware */
DETECTOR_MEMORY_TEST, /**< test detector system memory */
DETECTOR_BUS_TEST, /**< test detector system CPU-FPGA bus */
DETECTOR_SOFTWARE_TEST, /**< test detector system software */
DIGITAL_BIT_TEST /**< gotthard digital bit test */
};
/**
detector analogue test modes
*/
enum analogTestMode {
CALIBRATION_PULSES, /**< test using calibration pulses */
MY_ANALOG_TEST_MODE /**< other possible test modes */
};
/**
detector dacs indexes
*/
enum dacIndex {
THRESHOLD, /**< comparator threshold level */
CALIBRATION_PULSE, /**< calibration input pulse height */
TRIMBIT_SIZE, /**< voltage to determine the trimbits LSB */
PREAMP, /**< preamp feedback */
SHAPER1, /**< shaper1 feedback */
SHAPER2, /**< shaper2 feedback */
TEMPERATURE_ADC, /**< temperature sensor (adc) */
TEMPERATURE_FPGA, /**< temperature sensor (fpga) */
HUMIDITY, /**< humidity sensor (adc) */
DETECTOR_BIAS,/**< detector bias */
VA_POT, /**< power supply va */
VDD_POT, /**< chiptest board power supply vdd */
VSH_POT, /**< chiptest board power supply vsh */
VIO_POT, /**< chiptest board power supply va */
HV_POT, /**< gotthard, chiptest board high voltage */
G_VREF_DS, /**< gotthard */
G_VCASCN_PB, /**< gotthard */
G_VCASCP_PB, /**< gotthard */
G_VOUT_CM, /**< gotthard */
G_VCASC_OUT, /**< gotthard */
G_VIN_CM, /**< gotthard */
G_VREF_COMP, /**< gotthard */
G_IB_TESTC, /**< gotthard */
V_DAC0, /**< moench */
V_DAC1, /**< moench */
V_DAC2, /**< moench */
V_DAC3, /**< moench */
V_DAC4, /**< moench */
V_DAC5, /**< moench */
V_DAC6, /**< moench */
V_DAC7, /**< moench */
E_SvP, /**< eiger */
E_SvN, /**< eiger */
E_Vtr, /**< eiger */
E_Vrf, /**< eiger */
E_Vrs, /**< eiger */
E_Vtgstv , /**< eiger */
E_Vcmp_ll, /**< eiger */
E_Vcmp_lr, /**< eiger */
E_cal, /**< eiger */
E_Vcmp_rl, /**< eiger */
E_Vcmp_rr, /**< eiger */
E_rxb_rb , /**< eiger */
E_rxb_lb, /**< eiger */
E_Vcp, /**< eiger */
E_Vcn, /**< eiger */
E_Vis, /**< eiger */
IO_DELAY, /**< eiger io delay */
ADC_VPP, /**< adc vpp for jctb */
HV_NEW, /**< new hv index for jungfrau & c */
TEMPERATURE_FPGAEXT, /**< temperature sensor (close to fpga) */
TEMPERATURE_10GE, /**< temperature sensor (close to 10GE) */
TEMPERATURE_DCDC, /**< temperature sensor (close to DCDC) */
TEMPERATURE_SODL, /**< temperature sensor (close to SODL) */
TEMPERATURE_SODR, /**< temperature sensor (close to SODR) */
TEMPERATURE_FPGA2, /**< temperature sensor (fpga2 (eiger:febl) */
TEMPERATURE_FPGA3, /**< temperature sensor (fpga3 (eiger:febr) */
V_POWER_A = 100, /**new chiptest board */
V_POWER_B = 101, /**new chiptest board */
V_POWER_C = 102, /**new chiptest board */
V_POWER_D = 103, /**new chiptest board */
V_POWER_IO =104, /**new chiptest board */
V_POWER_CHIP=105 ,/**new chiptest board */
I_POWER_A=106 , /**new chiptest board */
I_POWER_B=107 , /**new chiptest board */
I_POWER_C=108 , /**new chiptest board */
I_POWER_D=109 , /**new chiptest board */
I_POWER_IO=110 , /**new chiptest board */
V_LIMIT=111 /**new chiptest board */
};
/**
detector settings indexes
*/
enum detectorSettings{
GET_SETTINGS=-1, /**< return current detector settings */
STANDARD, /**< standard settings */
FAST, /**< fast settings */
HIGHGAIN, /**< highgain settings */
DYNAMICGAIN, /**< dynamic gain settings */
LOWGAIN, /**< low gain settings */
MEDIUMGAIN, /**< medium gain settings */
VERYHIGHGAIN, /**< very high gain settings */
LOWNOISE, /**< low noise settings */
DYNAMICHG0, /**< dynamic high gain 0 */
FIXGAIN1, /**< fix gain 1 */
FIXGAIN2, /**< fix gain 2 */
FORCESWITCHG1, /**< force switch gain 1 */
FORCESWITCHG2, /**< force switch gain 2 */
VERYLOWGAIN, /**< very low gain settings */
UNDEFINED=200, /**< undefined or custom settings */
UNINITIALIZED /**< uninitialiazed (status at startup) */
};
/**
meaning of the channel register bits
\see ::sls_detector_channel
*/
enum channelRegisterBit {
TRIMBIT_OFF=0, /**< offset of trimbit value in the channel register */
COMPARATOR_ENABLE=0x100, /**< mask of the comparator enable bit */
ANALOG_SIGNAL_ENABLE=0x200, /**< mask of the analogue output enable bit */
CALIBRATION_ENABLE=0x300, /**< mask of the calibration input enable bit */
};
#define TRIMBITMASK 0x3f
/**
meaning of the chip register bits
\see ::sls_detector_chip
*/
enum chipRegisterBit {
ENABLE_ANALOG_OUTPUT=0x1, /**< mask of the analogue output enable bit */
CHIP_OUTPUT_WIDTH=0x2 /**< mask of the chip output width */
};
/**
meaning of the module register bits
*/
enum moduleRegisterBit {
MY_MODULE_REGISTER_BIT, /**< possible module register bit meaning */
MODULE_OUTPUT_WIDTH /**< possibly module dynamic range */
};
/**
important speed parameters
*/
enum speedVariable {
CLOCK_DIVIDER, /**< readout clock divider */
WAIT_STATES, /**< wait states for bus read */
TOT_CLOCK_DIVIDER, /**< wait states for bus read */
TOT_DUTY_CYCLE, /**< wait states for bus read */
SET_SIGNAL_LENGTH, /**< set/clear signal length */
PHASE_SHIFT, /**< adds phase shift */
OVERSAMPLING, /**< oversampling for analog detectors */
ADC_CLOCK, /**< adc clock divider */
ADC_PHASE, /**< adc clock phase */
ADC_PIPELINE, /**< adc pipeline */
DBIT_CLOCK, /**< adc clock divider */
DBIT_PHASE, /**< adc clock phase */
DBIT_PIPELINE /**< adc pipeline */
};
/**
readout flags
*/
enum readOutFlags {
GET_READOUT_FLAGS=-1, /**< return readout flags */
NORMAL_READOUT=0, /**< no flag */
STORE_IN_RAM=0x1, /**< data are stored in ram and sent only after end of acquisition for faster frame rate */
READ_HITS=0x2, /**< return only the number of the channel which counted ate least one */
ZERO_COMPRESSION=0x4,/**< returned data are 0-compressed */
PUMP_PROBE_MODE=0x8,/**<pump-probe mode */
BACKGROUND_CORRECTIONS=0x1000, /**<background corrections */
TOT_MODE=0x2000,/**< pump-probe mode */
CONTINOUS_RO=0x4000,/**< pump-probe mode */
PARALLEL=0x10000,/**< eiger parallel mode */
NONPARALLEL=0x20000,/**< eiger serial mode */
SAFE=0x40000/**< eiger safe mode */,
DIGITAL_ONLY=0x80000, /** chiptest board read only digital bits (not adc values)*/
ANALOG_AND_DIGITAL=0x100000, /** chiptest board read adc values and digital bits digital bits */
DUT_CLK=0x200000, /** chiptest board fifo clock comes from device under test */
};
/**
trimming modes
*/
enum trimMode {
NOISE_TRIMMING, /**< trim with noise */
BEAM_TRIMMING, /**< trim with x-rays (on all 63 bits) */
IMPROVE_TRIMMING, /**< trim with x-rays (on a limited range of bits - should start from an already trimmed mode) */
FIXEDSETTINGS_TRIMMING,/**< trim without optimizing the threshold and the trimbit size */
OFFLINE_TRIMMING /**< trimming is performed offline */
};
/**
data correction flags
*/
enum correctionFlags {
DISCARD_BAD_CHANNELS, /**< bad channels are discarded */
AVERAGE_NEIGHBOURS_FOR_BAD_CHANNELS, /**< bad channels are replaced with the avergae of the neighbours */
FLAT_FIELD_CORRECTION, /**< data are flat field corrected */
RATE_CORRECTION, /**< data are rate corrected */
ANGULAR_CONVERSION,/**< angular conversion is calculated */
WRITE_FILE, /**< file write enable */
I0_NORMALIZATION,
OVERWRITE_FILE /**< file over write enable */
};
/** port type */
enum portType {
CONTROL_PORT, /**< control port */
STOP_PORT, /**<stop port */
DATA_PORT /**< receiver tcp port with client*/
};
/** hierarchy in multi-detector structure, if any */
enum masterFlags {
GET_MASTER=-1, /**< return master flag */
NO_MASTER, /**< no master/slave hierarchy defined */
IS_MASTER, /**<is master */
IS_SLAVE /**< is slave */
};
/** synchronization in a multidetector structure, if any */
enum synchronizationMode {
GET_SYNCHRONIZATION_MODE=-1, /**< the multidetector will return its synchronization mode */
NO_SYNCHRONIZATION, /**< all detectors are independent (no cabling) */
MASTER_GATES, /**< the master gates the other detectors */
MASTER_TRIGGERS, /**< the master triggers the other detectors */
SLAVE_STARTS_WHEN_MASTER_STOPS /**< the slave acquires when the master finishes, to avoid deadtime */
};
enum imageType {
DARK_IMAGE, /**< dark image */
GAIN_IMAGE /**< gain image */
};
/* /\** */
/* angular conversion constant for a module */
/* *\/ */
/* typedef struct { */
/* double center; /\**< center of the module (channel at which the radius is perpendicular to the module surface) *\/ */
/* double ecenter; /\**< error in the center determination *\/ */
/* double r_conversion; /\**< detector pixel size (or strip pitch) divided by the diffractometer radius *\/ */
/* double er_conversion; /\**< error in the r_conversion determination *\/ */
/* double offset; /\**< the module offset i.e. the position of channel 0 with respect to the diffractometer 0 *\/ */
/* double eoffset; /\**< error in the offset determination *\/ */
/* double tilt; /\**< ossible tilt in the orthogonal direction (unused)*\/ */
/* double etilt; /\**< error in the tilt determination *\/ */
/* } angleConversionConstant; */
enum angleConversionParameter {
ANGULAR_DIRECTION, /**< angular direction of the diffractometer */
GLOBAL_OFFSET, /**< global offset of the diffractometer */
FINE_OFFSET, /**< fine offset of the diffractometer */
BIN_SIZE, /**< angular bin size */
MOVE_FLAG, /**< wether the detector moves with the motor or not in a multi detector system */
SAMPLE_X, /**< sample displacement in the beam direction */
SAMPLE_Y /**< sample displacement orthogonal to the beam */
};
//typedef struct {
//float center; /**< center of the module (channel at which the radius is perpendicular to the module surface) */
//float ecenter; /**< error in the center determination */
//float r_conversion; /**< detector pixel size (or strip pitch) divided by the diffractometer radius */
//float er_conversion; /**< error in the r_conversion determination */
//float offset; /**< the module offset i.e. the position of channel 0 with respect to the diffractometer 0 */
//float eoffset; /**< error in the offset determination */
//float tilt; /**< ossible tilt in the orthogonal direction (unused)*/
//float etilt; /**< error in the tilt determination *//
//} angleConversionConstant;
//#if defined(__cplusplus) && !defined(EIGERD)
#ifdef __cplusplus
protected:
#endif
#ifndef MYROOT
#include "sls_detector_funcs.h"
//#include "sls_receiver_funcs.h"
#endif
//#if defined(__cplusplus) && !defined(EIGERD)
#ifdef __cplusplus
};
#endif
;
#endif
;

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/**
@internal
function indexes to call on the server
All set functions with argument -1 work as get, when possible
*/
#ifndef SLS_DETECTOR_FUNCS_H
#define SLS_DETECTOR_FUNCS_H
enum detFuncs{
// General purpose functions
F_EXEC_COMMAND=0, /**< command is executed */
F_GET_ERROR, /**< return detector error status */
// configuration functions
F_GET_DETECTOR_TYPE, /**< return detector type */
F_SET_NUMBER_OF_MODULES, /**< set/get number of installed modules */
F_GET_MAX_NUMBER_OF_MODULES, /**< get maximum number of installed modules */
F_SET_EXTERNAL_SIGNAL_FLAG, /**< set/get flag for external signal */
F_SET_EXTERNAL_COMMUNICATION_MODE, /**< set/get external communication mode (obsolete) */
// Tests and identification
F_GET_ID, /**< get detector id of version */
F_DIGITAL_TEST, /**< digital test of the detector */
F_ANALOG_TEST, /**<analog test of the detector */
F_ENABLE_ANALOG_OUT, /**<enable the analog output */
F_CALIBRATION_PULSE, /**<pulse the calibration input */
// Initialization functions
F_SET_DAC, /**< set DAC value */
F_GET_ADC, /**< get ADC value */
F_WRITE_REGISTER, /**< write to register */
F_READ_REGISTER, /**< read register */
F_WRITE_MEMORY, /**< write to memory */
F_READ_MEMORY, /**< read memory */
F_SET_CHANNEL, /**< initialize channel */
F_GET_CHANNEL, /**< get channel register */
F_SET_ALL_CHANNELS, /**< initialize all channels */
F_SET_CHIP, /**< initialize chip */
F_GET_CHIP, /**< get chip status */
F_SET_ALL_CHIPS, /**< initialize all chips */
F_SET_MODULE, /**< initialize module */
F_GET_MODULE, /**< get module status */
F_SET_ALL_MODULES, /**< initialize all modules */
F_SET_SETTINGS, /**< set detector settings */
F_GET_THRESHOLD_ENERGY, /**< get detector threshold (in eV) */
F_SET_THRESHOLD_ENERGY, /**< set detector threshold (in eV) */
// Acquisition functions
F_START_ACQUISITION, /**< start acquisition */
F_STOP_ACQUISITION, /**< stop acquisition */
F_START_READOUT, /**< start readout */
F_GET_RUN_STATUS, /**< get acquisition status */
F_START_AND_READ_ALL, /**< start acquisition and read all frames*/
F_READ_FRAME, /**< read one frame */
F_READ_ALL, /**< read alla frames */
//Acquisition setup functions
F_SET_TIMER, /**< set/get timer value */
F_GET_TIME_LEFT, /**< get current value of the timer (time left) */
F_SET_DYNAMIC_RANGE, /**< set/get detector dynamic range */
F_SET_READOUT_FLAGS, /**< set/get readout flags */
F_SET_ROI, /**< set/get region of interest */
F_SET_SPEED, /**< set/get readout speed parameters */
//Trimming
F_EXECUTE_TRIMMING, /**< execute trimming */
F_EXIT_SERVER, /**< turn off detector server */
F_LOCK_SERVER, /**< Locks/Unlocks server communication to the given client */
F_GET_LAST_CLIENT_IP, /**< returns the IP of the client last connected to the detector */
F_SET_PORT, /**< Changes communication port of the server */
F_UPDATE_CLIENT, /**< Returns all the important parameters to update the shared memory of the client */
F_CONFIGURE_MAC, /**< Configures MAC for Gotthard readout */
F_LOAD_IMAGE, /**< Loads Dark/Gain image to the Gotthard detector */
// multi detector structures
F_SET_MASTER, /**< sets master/slave flag for multi detector structures */
F_SET_SYNCHRONIZATION_MODE, /**< sets master/slave synchronization mode for multidetector structures */
F_READ_COUNTER_BLOCK, /**< reads the counter block memory for gotthard */
F_RESET_COUNTER_BLOCK, /**< resets the counter block memory for gotthard */
F_CALIBRATE_PEDESTAL, /**< starts acquistion, calibrates pedestal and write back to fpga */
F_ENABLE_TEN_GIGA, /**< enable 10Gbe */
F_SET_ALL_TRIMBITS, /** < set all trimbits to this value */
F_SET_CTB_PATTERN, /** < loads a pattern in the CTB */
F_WRITE_ADC_REG, /** < writes an ADC register */
F_SET_COUNTER_BIT, /** < set/reset counter bit in detector for eiger */
F_PULSE_PIXEL, /** < pulse pixel n number of times in eiger at (x,y) */
F_PULSE_PIXEL_AND_MOVE, /** < pulse pixel n number of times and move relatively by x and y */
F_PULSE_CHIP, /** < pulse chip n number of times */
F_SET_RATE_CORRECT, /** < set/reset rate correction tau */
F_GET_RATE_CORRECT, /** < get rate correction tau */
F_SET_NETWORK_PARAMETER, /**< set network parameters such as transmission delay, flow control */
F_PROGRAM_FPGA, /**< program FPGA */
F_RESET_FPGA, /**< reset FPGA */
F_POWER_CHIP, /**< power chip */
F_ACTIVATE, /** < activate */
F_PREPARE_ACQUISITION, /** < prepare acquisition */
F_CLEANUP_ACQUISITION, /** < clean up after acquisition */
/* Always append functions hereafter!!! */
/* Always append functions before!!! */
NUM_DET_FUNCTIONS,
TOO_MANY_FUNCTIONS_DEFINED=127 //you should get a compilation error if there are already so many functions defined. It conflicts with sls_receiver_funcs.h
};
#endif
/** @endinternal */

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# name of the file that contains the anonymous namespace. By default
# anonymous namespace are hidden.
EXTRACT_ANON_NSPACES = NO
# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all
# undocumented members of documented classes, files or namespaces.
# If set to NO (the default) these members will be included in the
# various overviews, but no documentation section is generated.
# This option has no effect if EXTRACT_ALL is enabled.
HIDE_UNDOC_MEMBERS = NO
# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all
# undocumented classes that are normally visible in the class hierarchy.
# If set to NO (the default) these classes will be included in the various
# overviews. This option has no effect if EXTRACT_ALL is enabled.
HIDE_UNDOC_CLASSES = NO
# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all
# friend (class|struct|union) declarations.
# If set to NO (the default) these declarations will be included in the
# documentation.
HIDE_FRIEND_COMPOUNDS = NO
INTERNAL_DOCS = NO
SHOW_INCLUDE_FILES = NO
SHOW_FILES = NO
SHOW_NAMESPACES = NO
COMPACT_LATEX = YES
PAPER_TYPE = a4
PDF_HYPERLINKS = YES
USE_PDFLATEX = YES
LATEX_HIDE_INDICES = YES
PREDEFINED = __cplusplus
INPUT = commonFiles/communication_funcs.h \
commonFiles/error_defs.h \
commonFiles/sls_detector_defs.h \
commonFiles/sls_detector_funcs.h \
f90Interface/externPostProcessing.h \
multiSlsDetector/multiSlsDetectorClient.h \
multiSlsDetector/multiSlsDetectorCommand.h \
multiSlsDetector/multiSlsDetector.h \
slsDetector/slsDetectorActions.h \
slsDetector/slsDetectorBase.h \
slsDetector/slsDetectorCommand.h \
slsDetector/slsDetector.h \
slsDetector/slsDetectorUsers.h \
slsDetector/slsDetectorUtils.h \
slsDetectorAnalysis/angCalLogClass.h \
slsDetectorAnalysis/angleConversionConstant.h \
slsDetectorAnalysis/angularCalibration.h \
slsDetectorAnalysis/angularConversion.h \
slsDetectorAnalysis/AngularConversion_Standalone.h \
slsDetectorAnalysis/angularConversionStatic.h \
slsDetectorAnalysis/badChannelCorrections.h \
slsDetectorAnalysis/detectorData.h \
slsDetectorAnalysis/enCalLogClass.h \
slsDetectorAnalysis/energyCalibration.h \
slsDetectorAnalysis/energyConversion.h \
slsDetectorAnalysis/fileIO.h \
slsDetectorAnalysis/FileIO_Standalone.h \
slsDetectorAnalysis/fileIOStatic.h \
slsDetectorAnalysis/movingStat.h \
slsDetectorAnalysis/postProcessingFileIO_Standalone.h \
slsDetectorAnalysis/postProcessingFuncs.h \
slsDetectorAnalysis/postProcessing.h \
slsDetectorAnalysis/postProcessing_Standalone.h \
slsDetectorAnalysis/runningStat.h \
slsDetectorAnalysis/singlePhotonFilter.h \
slsDetectorAnalysis/single_photon_hit.h \
slsDetectorAnalysis/TSlsDetectorDict.h \
slsReceiverInterface/receiverInterface.h \
threadFiles/CondVar.h \
threadFiles/Global.h \
threadFiles/Multi.h \
threadFiles/Mutex.h \
threadFiles/Single.h \
threadFiles/Task.h \
threadFiles/ThreadPool.h \
usersFunctions/angleFunction.h \
usersFunctions/usersFunctions.h \
../slsReceiverSoftware/include/ansi.h \
../slsReceiverSoftware/include/BinaryFile.h \
../slsReceiverSoftware/include/BinaryFileStatic.h \
../slsReceiverSoftware/include/circularFifo.h \
../slsReceiverSoftware/include/DataProcessor.h \
../slsReceiverSoftware/include/DataStreamer.h \
../slsReceiverSoftware/include/Fifo.h \
../slsReceiverSoftware/include/File.h \
../slsReceiverSoftware/include/GeneralData.h \
../slsReceiverSoftware/include/genericSocket.h \
../slsReceiverSoftware/include/HDF5File.h \
../slsReceiverSoftware/include/HDF5FileStatic.h \
../slsReceiverSoftware/include/Listener.h \
../slsReceiverSoftware/include/logger.h \
../slsReceiverSoftware/include/MySocketTCP.h \
../slsReceiverSoftware/include/receiver_defs.h \
../slsReceiverSoftware/include/RestHelper.h \
../slsReceiverSoftware/include/sls_receiver_defs.h \
../slsReceiverSoftware/include/sls_receiver_funcs.h \
../slsReceiverSoftware/include/slsReceiver.h \
../slsReceiverSoftware/include/slsReceiverTCPIPInterface.h \
../slsReceiverSoftware/include/slsReceiverUsers.h \
../slsReceiverSoftware/include/ThreadObject.h \
../slsReceiverSoftware/include/UDPBaseImplementation.h \
../slsReceiverSoftware/include/UDPInterface.h \
../slsReceiverSoftware/include/UDPRESTImplementation.h \
../slsReceiverSoftware/include/UDPStandardImplementation.h \
../slsReceiverSoftware/include/utilities.h \
../slsReceiverSoftware/include/ZmqSocket.h
OUTPUT_DIRECTORY = slsDetectorPackageDocs

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@ -0,0 +1,210 @@
#include "ansi.h"
#include <termios.h> /* POSIX terminal control definitions */
#include <stdio.h>
#include <stdlib.h> // atoi
#include <fcntl.h> // File control definitions
#include <sys/ioctl.h> // ioctl
#include <unistd.h> // read, close
#include <string.h> // memset
#include <linux/i2c-dev.h> // I2C_SLAVE, __u8 reg
#include <errno.h>
#define PORTNAME "/dev/ttyBF1"
#define GOODBYE 200
#define BUFFERSIZE 16
#define I2C_DEVICE_FILE "/dev/i2c-0"
#define I2C_DEVICE_ADDRESS 0x4C
//#define I2C_DEVICE_ADDRESS 0x48
#define I2C_REGISTER_ADDRESS 0x40
int i2c_open(const char* file,unsigned int addr){
//device file
int fd = open( file, O_RDWR );
if (fd < 0) {
cprintf(RED,"Warning: Unable to open file %s\n",file);
return -1;
}
//device address
if( ioctl( fd, I2C_SLAVE, addr&0x7F ) < 0 ) {
cprintf(RED,"Warning: Unable to set slave address:0x%x \n",addr);
return -2;
}
return fd;
}
int i2c_read(){
int fd = i2c_open(I2C_DEVICE_FILE, I2C_DEVICE_ADDRESS);
__u8 reg = I2C_REGISTER_ADDRESS & 0xff;
unsigned char buf = reg;
if (write(fd, &buf, 1)!= 1){
cprintf(RED,"Warning: Unable to write read request to register %d\n", reg);
return -1;
}
//read and update value (but old value read out)
if(read(fd, &buf, 1) != 1){
cprintf(RED,"Warning: Unable to read register %d\n", reg);
return -2;
}
//read again to read the updated value
if(read(fd, &buf, 1) != 1){
cprintf(RED,"Warning: Unable to read register %d\n", reg);
return -2;
}
close(fd);
return buf;
}
int i2c_write(unsigned int value){
__u8 val = value & 0xff;
int fd = i2c_open(I2C_DEVICE_FILE, I2C_DEVICE_ADDRESS);
if(fd < 0)
return fd;
__u8 reg = I2C_REGISTER_ADDRESS & 0xff;
char buf[3];
buf[0] = reg;
buf[1] = val;
if (write(fd, buf, 2) != 2) {
cprintf(RED,"Warning: Unable to write %d to register %d\n",val, reg);
return -1;
}
close(fd);
return 0;
}
int main(int argc, char* argv[]) {
int fd = open(PORTNAME, O_RDWR | O_NOCTTY | O_SYNC);
if(fd < 0){
cprintf(RED,"Warning: Unable to open port %s\n", PORTNAME);
return -1;
}
cprintf(GREEN,"opened port at %s\n",PORTNAME);
struct termios serial_conf;
// reset structure
memset(&serial_conf,0,sizeof(serial_conf));
// control options
serial_conf.c_cflag = B2400 | CS8 | CREAD | CLOCAL;
// input options
serial_conf.c_iflag = IGNPAR;
// output options
serial_conf.c_oflag = 0;
// line options
serial_conf.c_lflag = ICANON;
// flush input
if(tcflush(fd, TCIOFLUSH) < 0){
cprintf(RED,"Warning: error form tcflush %d\n", errno);
return 0;
}
// set new options for the port, TCSANOW:changes occur immediately without waiting for data to complete
if(tcsetattr(fd, TCSANOW, &serial_conf) < 0){
cprintf(RED,"Warning: error form tcsetattr %d\n", errno);
return 0;
}
if(tcsetattr(fd, TCSAFLUSH, &serial_conf) < 0){
cprintf(RED,"Warning: error form tcsetattr %d\n", errno);
return 0;
}
int ret = 0;
int n = 0;
int ival= 0;
char buffer[BUFFERSIZE];
memset(buffer,0,BUFFERSIZE);
buffer[BUFFERSIZE-1] = '\n';
cprintf(GREEN,"Ready...\n");
while(ret != GOODBYE){
memset(buffer,0,BUFFERSIZE);
n = read(fd,buffer,BUFFERSIZE);
#ifdef VERBOSE
cprintf(BLUE,"Received %d Bytes\n", n);
#endif
cprintf(BLUE,"Got message: '%s'\n",buffer);
switch(buffer[0]){
case '\0':
cprintf(GREEN,"Got Start (Detector restart)\n");
break;
case 's':
cprintf(GREEN,"Got Start \n");
break;
case 'p':
if (!sscanf(&buffer[1],"%d",&ival)){
cprintf(RED,"Warning: cannot scan voltage value\n");
break;
}
// ok/ fail
memset(buffer,0,BUFFERSIZE);
buffer[BUFFERSIZE-1] = '\n';
if(i2c_write(ival)<0)
strcpy(buffer,"fail ");
else
strcpy(buffer,"success ");
cprintf(GREEN,"Sending: '%s'\n",buffer);
n = write(fd, buffer, BUFFERSIZE);
#ifdef VERBOSE
cprintf(GREEN,"Sent %d Bytes\n", n);
#endif
break;
case 'g':
ival = i2c_read();
//ok/ fail
memset(buffer,0,BUFFERSIZE);
buffer[BUFFERSIZE-1] = '\n';
if(ival < 0)
strcpy(buffer,"fail ");
else
strcpy(buffer,"success ");
n = write(fd, buffer, BUFFERSIZE);
cprintf(GREEN,"Sending: '%s'\n",buffer);
#ifdef VERBOSE
cprintf(GREEN,"Sent %d Bytes\n", n);
#endif
//value
memset(buffer,0,BUFFERSIZE);
buffer[BUFFERSIZE-1] = '\n';
if(ival >= 0){
cprintf(GREEN,"Sending: '%d'\n",ival);
sprintf(buffer,"%d ",ival);
n = write(fd, buffer, BUFFERSIZE);
#ifdef VERBOSE
cprintf(GREEN,"Sent %d Bytes\n", n);
#endif
}else cprintf(RED,"%s\n",buffer);
break;
case 'e':
printf("Exiting Program\n");
ret = GOODBYE;
break;
default:
cprintf(RED,"Unknown Command. buffer:'%s'\n",buffer);
break;
}
}
close(fd);
printf("Goodbye Serial Communication for HV(9M)\n");
return 0;
}

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/**
* @author Ian Johnson
* @version 1.0
*/
#ifndef BEB_H
#define BEB_H
#include "LocalLinkInterface.h"
#include "slsDetectorServer_defs.h"
struct BebInfo{
unsigned int beb_number;
unsigned int serial_address;
char src_mac_1GbE[50];
char src_mac_10GbE[50];
char src_ip_1GbE[50];
char src_ip_10GbE[50];
unsigned int src_port_1GbE;
unsigned int src_port_10GbE;
};
void BebInfo_BebInfo(struct BebInfo* bebInfo, unsigned int beb_num);
void BebInfo_BebDstInfo(struct BebInfo* bebInfo, unsigned int beb_num);
int BebInfo_SetSerialAddress(struct BebInfo* bebInfo, unsigned int add);
int BebInfo_SetHeaderInfo(struct BebInfo* bebInfo, int ten_gig, char* src_mac, char* src_ip, unsigned int src_port);//src_port fixed 42000+beb_number or 52000 + beb_number);
unsigned int BebInfo_GetBebNumber(struct BebInfo* bebInfo);
unsigned int BebInfo_GetSerialAddress(struct BebInfo* bebInfo);
char* BebInfo_GetSrcMAC(struct BebInfo* bebInfo, int ten_gig);
char* BebInfo_GetSrcIP(struct BebInfo* bebInfo, int ten_gig);
unsigned int BebInfo_GetSrcPort(struct BebInfo* bebInfo, int ten_gig);
void BebInfo_Print(struct BebInfo* bebInfo);
void Beb_ClearBebInfos();
int Beb_InitBebInfos();
int Beb_CheckSourceStuffBebInfo();
unsigned int Beb_GetBebInfoIndex(unsigned int beb_numb);
void Beb_GetModuleConfiguration(int* master, int* top, int* normal);
void Beb_EndofDataSend(int tengiga);
int Beb_SetMasterViaSoftware();
int Beb_SetSlaveViaSoftware();
int Beb_Activate(int enable);
int Beb_SetNetworkParameter(enum NETWORKINDEX mode, int val);
int Beb_ResetToHardwareSettings();
u_int32_t Beb_GetFirmwareRevision();
u_int32_t Beb_GetFirmwareSoftwareAPIVersion();
void Beb_ResetFrameNumber();
int Beb_WriteTo(unsigned int index);
int Beb_SetMAC(char* mac, uint8_t* dst_ptr);
int Beb_SetIP(char* ip, uint8_t* dst_ptr);
int Beb_SetPortNumber(unsigned int port_number, uint8_t* dst_ptr);
void Beb_AdjustIPChecksum(struct udp_header_type *ip);
int Beb_SetHeaderData(unsigned int beb_number, int ten_gig, char* dst_mac, char* dst_ip, unsigned int dst_port);
int Beb_SetHeaderData1(char* src_mac, char* src_ip, unsigned int src_port, char* dst_mac, char* dst_ip, unsigned int dst_port);
void Beb_SwapDataFun(int little_endian, unsigned int n, unsigned int *d);
int Beb_SetByteOrder();
void Beb_Beb();
int Beb_SetBebSrcHeaderInfos(unsigned int beb_number, int ten_gig, char* src_mac, char* src_ip, unsigned int src_port);
int Beb_SetUpUDPHeader(unsigned int beb_number, int ten_gig, unsigned int header_number, char* dst_mac, char* dst_ip, unsigned int dst_port);
/*int Beb_SendMultiReadRequest(unsigned int beb_number, unsigned int left_right, int ten_gig, unsigned int dst_number, unsigned int npackets, unsigned int packet_size, int stop_read_when_fifo_empty=1);*/
int Beb_SendMultiReadRequest(unsigned int beb_number, unsigned int left_right, int ten_gig, unsigned int dst_number, unsigned int npackets, unsigned int packet_size, int stop_read_when_fifo_empty);
int Beb_StopAcquisition();
int Beb_SetUpTransferParameters(short the_bit_mode);
/*int Beb_RequestNImages(unsigned int beb_number, unsigned int left_right, int ten_gig, unsigned int dst_number, unsigned int nimages, int test_just_send_out_packets_no_wait=0); //all images go to the same destination!*/
int Beb_RequestNImages(unsigned int beb_number, int ten_gig, unsigned int dst_number, unsigned int nimages, int test_just_send_out_packets_no_wait);
int Beb_Test(unsigned int beb_number);
int Beb_GetBebFPGATemp();
void Beb_SetDetectorNumber(uint32_t detid);
int Beb_SetDetectorPosition(int pos[]);
uint16_t Beb_swap_uint16( uint16_t val);
int Beb_open(u_int32_t** csp0base, u_int32_t offset);
u_int32_t Beb_Read32 (u_int32_t* baseaddr, u_int32_t offset);
u_int32_t Beb_Write32 (u_int32_t* baseaddr, u_int32_t offset, u_int32_t data);
void Beb_close(int fd,u_int32_t* csp0base);
#endif

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/**
* @author Ian Johnson
* @version 1.0
*/
/*#include <iostream>
#include <iomanip>*/
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include "xparameters.h"
#include "Feb.h"
void Feb_Feb(){
Feb_nfebs = 0;
Feb_feb_numb = 0;
Feb_send_ndata = 0;
Feb_send_buffer_size = 1026;
Feb_send_data_raw = malloc((Feb_send_buffer_size+1)*sizeof(int));
Feb_send_data = &Feb_send_data_raw[1];
Feb_recv_ndata = 0;
Feb_recv_buffer_size = 1026;
Feb_recv_data_raw = malloc((Feb_recv_buffer_size+1)*sizeof(int));
Feb_recv_data = &Feb_recv_data_raw[1];
Local_LocalLinkInterface1(ll,XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT_BASEADDR);
}
/*
~Feb(){
delete ll;
if(feb_numb) delete [] feb_numb;
delete [] send_data_raw;
delete [] recv_data_raw;
}
*/
void Feb_SendCompleteFebList(unsigned int n,unsigned int* list){
unsigned int i;
if(Feb_feb_numb) free(Feb_feb_numb);
Feb_nfebs = n;
Feb_feb_numb = malloc(n*sizeof(unsigned int));
for(i=0;i<n;i++) Feb_feb_numb[i] = list[i];
}
int Feb_WriteTo(unsigned int ch){
if(ch>0xfff) return 0;
Feb_send_data_raw[0] = 0x90000000 | (ch<<16); //we
if(Local_Write(ll,4,Feb_send_data_raw)!=4) return 0;
Feb_send_data_raw[0] = 0xc0000000; //data
return 1;//((Feb_send_ndata+1)*4==Local_Write(ll,(Feb_send_ndata+1)*4,Feb_send_data_raw));
}
int Feb_ReadFrom(unsigned int ch, unsigned int ntrys){
unsigned int t;
if(ch>=0xfff) return 0;
Feb_recv_data_raw[0] = 0xa0000000 | (ch<<16); //read data
Local_Write(ll,4,Feb_recv_data_raw);
usleep(20);
Feb_recv_ndata=-1;
for(t=0;t<ntrys;t++){
if((Feb_recv_ndata=Local_Read(ll,Feb_recv_buffer_size*4,Feb_recv_data_raw)/4)>0){
Feb_recv_ndata--;
break;
}
printf("\t Read try number: %d\n",t);
usleep(1000);
}
return (Feb_recv_ndata>=0);
}
void Feb_PrintData(){
int i;
printf("Sent data: %d\n",Feb_send_ndata);
for(i=0;i<Feb_send_ndata;i++) printf("\t%d)%d (0x%x)\n",i,Feb_send_data[i],Feb_send_data[i]);
printf("Receive data: %d\n",Feb_recv_ndata);
for(i=0;i<Feb_recv_ndata;i++) printf("\t%d)%d (0x%x)\n",i,Feb_recv_data[i],Feb_recv_data[i]);
printf("\n\n");
}
int Feb_CheckHeader(unsigned int valid_bit_mask, int print_error_info){
int header_returned_is_ok = (Feb_send_data[0] & valid_bit_mask)==(Feb_recv_data[0] & valid_bit_mask);
if(print_error_info && !header_returned_is_ok){
printf("Error: Command received not the same as command recieved.\n");
printf("\t\t Header sent: %d (0x%x) received: %d (0x%x)\n",Feb_send_data[0], Feb_send_data[0], Feb_recv_data[0], Feb_recv_data[0]);
if(Feb_send_ndata>1&&Feb_recv_ndata>1){
printf("\t\t Tail sent: %d (0x%x) receiver: %d (0x%x)\n",Feb_send_data[Feb_send_ndata-1],Feb_send_data[Feb_send_ndata-1],Feb_recv_data[Feb_recv_ndata-1],Feb_recv_data[Feb_recv_ndata-1]);
}else{
printf("Error printing tail, too little data nsent = 0x%x, nrecv = 0x%x.\n",Feb_send_ndata, Feb_recv_ndata);
}
Feb_PrintData();
}
return header_returned_is_ok;
}
int Feb_CheckTail(unsigned int valid_bit_mask){
if(Feb_send_ndata<=1&&Feb_recv_ndata<=1){
printf("Error checking tail, too little data nsent = %d, nrecv = %d.\n",Feb_send_ndata, Feb_recv_ndata);
return 0;
}
unsigned int the_tail = Feb_recv_data[Feb_recv_ndata-1]&valid_bit_mask;
if(the_tail!=0){
printf("Error returned in tail: 0x%x (%d)\n",the_tail,the_tail);
if(the_tail&0x10000000) printf("\t\tBusy flag address error.\n");
if(the_tail&0x20000000) printf("\t\tRead register address error.\n");
if(the_tail&0x40000000) printf("\t\tWrite register address error.\n");
if(the_tail&0x80000000) printf("\t\tBram number error.\n");
if(the_tail&0x08000000) printf("\t\tFifo to read from error.\n");
if(the_tail&0x3ff) printf("\t\tNumber of data send error.\n");
return 0; //error
}
return 1;
}
int Feb_CheckCommunication(){
Feb_send_data_raw[0] = 0x8fff0000; //rst-all serial coms and lls
if(Local_Write(ll,4,Feb_send_data_raw)!=4) return 0;
printf("CheckingCommunication ....\n");
while((Local_Read(ll,Feb_recv_buffer_size*4,Feb_recv_data_raw)/4)>0) printf("\t) Cleanning buffer ...\n");
return Feb_SetByteOrder();
}
int Feb_SetByteOrder(){
unsigned int i;
Feb_send_ndata = 2;
Feb_send_data[0] = 0; //header
Feb_send_data[1] = 0; //tail
unsigned int dst = 0xff;
for( i=0;i<Feb_nfebs;i++) dst = (dst | Feb_feb_numb[i]); //get sub dst bits (left right in this case)
int passed = Feb_WriteTo(dst);
for(i=0;i<Feb_nfebs;i++){
printf("\t%d) Set Byte Order .............. ",i);
unsigned int current_passed = Feb_ReadFrom(Feb_feb_numb[i],20)&&(Feb_recv_ndata==2)&&Feb_CheckHeader(0xffffffff,1);
if(current_passed) printf("passed.\n");
else printf("failed.\n");
passed&=current_passed;
}
printf("\n");
return passed;
}
/* feb_ needed
int Feb_CheckSubNumber(unsigned int Feb_sub_num){
if(sub_num>=nfebs){
cout<<"Error invalid sub number "<<sub_num<<" must be less than "<<nfebs<<"."<<endl;
return 0;
}
return 1;
}
int Feb_SetStartOnEndOnFebs(int sub_num_s, unsigned int& start_on, unsigned int& end_on){
// -1 means write to all
if(sub_num_s<=-2){
cout<<"Error bad subnumber "<<sub_num_s<<"."<<endl;
return 0;
}
start_on = sub_num_s!=-1 ? sub_num_s : 0;
end_on = sub_num_s!=-1 ? sub_num_s : nfebs - 1;
return Feb_CheckSubNumber(start_on);
}
*/
/*
int Feb_ReadRegister(unsigned int Feb_sub_num, unsigned int Feb_reg_num,unsigned int& Feb_value_read){
return Feb_ReadRegisters(Feb_sub_num,1,&Feb_reg_num,&Feb_value_read);
}
*/
int Feb_ReadRegister(unsigned int sub_num, unsigned int reg_num,unsigned int* value_read){
return Feb_ReadRegisters(sub_num,1,&reg_num,value_read);
}
int Feb_ReadRegisters(unsigned int sub_num, unsigned int nreads, unsigned int* reg_nums,unsigned int* values_read){
//here cout<<"Reading Register ...."<<endl;
unsigned int i;
nreads &= 0x3ff; //10 bits
if(!nreads||nreads>Feb_send_buffer_size-2) return 0;
Feb_send_ndata = nreads+2;
Feb_send_data[0] = 0x20000000 | nreads << 14; //cmd -> read "00" , nreads
for(i=0;i<nreads;i++) Feb_send_data[i+1]=reg_nums[i];
Feb_send_data[nreads+1] = 0; //tail
if(!Feb_WriteTo(sub_num)||!Feb_ReadFrom(sub_num,20)||Feb_recv_ndata!=(int)(nreads+2)||!Feb_CheckHeader(0xffffffff,1)||!Feb_CheckTail(0xffffffff)){
Feb_PrintData();
printf("Error reading register.\n");
return 0;
}
for(i=0;i<nreads;i++) values_read[i] = Feb_recv_data[i+1];
return 1;
}
int Feb_WriteRegister(unsigned int sub_num, unsigned int reg_num,unsigned int value, int wait_on, unsigned int wait_on_address){
return Feb_WriteRegisters(sub_num,1,&reg_num,&value,&wait_on,&wait_on_address);
}
int Feb_WriteRegisters(unsigned int sub_num, unsigned int nwrites, unsigned int* reg_nums, unsigned int* values, int* wait_ons, unsigned int* wait_on_addresses){
unsigned int i;
// sub_num == 0xfff means write to all
nwrites &= 0x3ff; //10 bits
if(!nwrites||nwrites>Feb_send_buffer_size-2) return 0;
//cout<<"Write register : "<<this<<" "<<s_num<<" "<<nwrites<<" "<<reg_nums<<" "<<values<<" "<<wait_ons<<" "<<wait_on_addresses<<endl;
Feb_send_ndata = 2*nwrites+2;
Feb_send_data[0] = 0x80000000 | nwrites << 14; //cmd -> write nwrites and how many
Feb_send_data[2*nwrites+1] = 0; //tail
for(i=0;i<nwrites;i++) Feb_send_data[2*i+1] = 0x3fff&reg_nums[i]; // register address data_in(13 downto 0)
for(i=0;i<nwrites;i++) Feb_send_data[2*i+2] = values[i]; // value is data_in(31 downto 0)
// wait on busy data(28), address of busy flag data(27 downto 14)
if(wait_ons&&wait_on_addresses) for(i=0;i<nwrites;i++) Feb_send_data[2*i+1] |= (wait_ons[i]<<28 | (0x3fff&wait_on_addresses[i])<<14);
if(!Feb_WriteTo(sub_num)){
printf("%d) Error writing register(s).\n",sub_num);
Feb_PrintData();
return 0;
}
int passed = 1;
unsigned int n = (sub_num&0xff)==0xff ? Feb_nfebs : 1;
unsigned int* nums = (sub_num&0xff)==0xff ? Feb_feb_numb : &sub_num;
for(i=0;i<n;i++){
if((sub_num&0xf00&(nums[i]))==0) continue;
if(!Feb_ReadFrom(nums[i],20)||Feb_recv_ndata!=2||!Feb_CheckHeader(0xffffffff,1)){
printf("%d) Error writing register(s) response.\n",nums[i]);
Feb_PrintData();
passed = 0;
}else{
passed = passed && Feb_CheckTail(0xffffffff);
}
}
return passed;
}
int Feb_WriteMemory(unsigned int sub_num, unsigned int mem_num, unsigned int start_address, unsigned int nwrites, unsigned int *values){
// -1 means write to all
unsigned int i;
mem_num &= 0x3f; //6 bits
start_address &= 0x3fff; //14 bits
nwrites &= 0x3ff; //10 bits
if(!nwrites||nwrites>Feb_send_buffer_size-2) return 0;
Feb_send_ndata = nwrites+2;
Feb_send_data[0] = 0xc0000000 | mem_num << 24 | nwrites << 14 | start_address; //cmd -> write to memory, nwrites, mem number, start address
Feb_send_data[nwrites+1] = 0; //tail
for(i=0;i<nwrites;i++) Feb_send_data[i+1] = values[i];
if(!Feb_WriteTo(sub_num)){
printf("%d) Error writing memory.\n",sub_num);
return 0;
}
int passed = 1;
unsigned int n = (sub_num&0xff)==0xff ? Feb_nfebs : 1;
unsigned int* nums = (sub_num&0xff)==0xff ? Feb_feb_numb : &sub_num;
for(i=0;i<n;i++){
if((sub_num&0xf00&(nums[i]))==0) continue;
if(!Feb_ReadFrom(nums[i],20)||Feb_recv_ndata!=2||!Feb_CheckHeader(0xffffffff,1)){
printf("%d) Error writing memory response. \n",nums[i]);
Feb_PrintData();
passed = 0;
}else{
passed = passed && Feb_CheckTail(0xffffffff);
}
}
// unsigned int n = sub_num==0xfff ? nfebs : 1;
// unsigned int* nums = sub_num==0xfff ? feb_numb : &sub_num;
// for(unsigned int i=0;i<n;i++){
return passed;
}
int Feb_Test(){//int sub_num_s, unsigned int mem_num, unsigned int start_address, unsigned int nwrites, unsigned int *values){
// -1 means write to all
unsigned int i;
unsigned int reg_nums[10]={0,1,2,3,1,2,3,1,2,3};
printf("Test\n\n\n\n");
unsigned int value = 0;
for(i=0;i<10;i++){
Feb_WriteRegister(0xfff,reg_nums[i%10],i,0,0);
Feb_ReadRegister(256,reg_nums[i%10],&value);
printf("%d %d\n",i,value);
Feb_ReadRegister(512,reg_nums[i%10],&value);
printf("%d %d\n",i,value);
Feb_WriteMemory(0xfff,0,0,10,reg_nums);
}
return 0;
}

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/**
* @author Ian Johnson
* @version 1.0
*/
#ifndef FEB_H
#define FEB_H
#include "LocalLinkInterface.h"
struct LocalLinkInterface* ll;
unsigned int Feb_nfebs;
unsigned int* Feb_feb_numb;
int Feb_send_ndata;
unsigned int Feb_send_buffer_size;
unsigned int* Feb_send_data_raw;
unsigned int* Feb_send_data;
int Feb_recv_ndata;
unsigned int Feb_recv_buffer_size;
unsigned int* Feb_recv_data_raw;
unsigned int* Feb_recv_data;
int Feb_WriteTo(unsigned int ch);
/*int Feb_ReadFrom(unsigned int Feb_ch, unsigned int Feb_ntrys=20);*/
int Feb_ReadFrom(unsigned int ch, unsigned int ntrys);
/* int Feb_CheckHeader(unsigned int Feb_valid_bit_mask=0xffffffff, int Feb_print_error_info=1);*/
int Feb_CheckHeader(unsigned int valid_bit_mask, int print_error_info);
/*int Feb_CheckTail(unsigned int Feb_valid_bit_mask=0xffffffff);*/
int Feb_CheckTail(unsigned int valid_bit_mask);
int Feb_SetByteOrder();
//int Feb_CheckSubNumber(unsigned int Feb_sub_num);
//int Feb_SetStartOnEndOnFebs(int Feb_sub_num_s, unsigned int& Feb_start_on, unsigned int& Feb_end_on);
void Feb_PrintData();
void Feb_Feb();
/*virtual ~Feb();*/
void Feb_SendCompleteFebList(unsigned int n,unsigned int* list);
int Feb_CheckCommunication();
/*int Feb_ReadRegister(unsigned int Feb_sub_num, unsigned int Feb_reg_num,unsigned int& Feb_value_read);*/
int Feb_ReadRegister(unsigned int sub_num, unsigned int reg_num,unsigned int* value_read);
int Feb_ReadRegisters(unsigned int sub_num, unsigned int nreads, unsigned int* reg_nums,unsigned int* values_read);
/*int WriteRegister(unsigned int sub_num, unsigned int reg_num,unsigned int value, int wait_on=0, unsigned int wait_on_address=0);*/
int Feb_WriteRegister(unsigned int sub_num, unsigned int reg_num,unsigned int value, int wait_on, unsigned int wait_on_address);
/*int WriteRegisters(unsigned int sub_num, unsigned int nwrites, unsigned int* reg_nums, unsigned int* values, int* wait_ons=0, unsigned int* wait_on_addresses=0);*/
int Feb_WriteRegisters(unsigned int sub_num, unsigned int nwrites, unsigned int* reg_nums, unsigned int* values, int* wait_ons, unsigned int* wait_on_addresses);
int Feb_WriteMemory(unsigned int sub_num, unsigned int mem_num, unsigned int start_address, unsigned int nwrites, unsigned int *values);
int Feb_Test();
#endif

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/**
* @author Ian Johnson
* @version 1.0
*/
#ifndef FEBCONTROL_H
#define FEBCONTROL_H
#include <netinet/in.h>
#include <stdlib.h>
//#include <string>
//#include <vector>
#include "FebInterface.h"
struct Module{
unsigned int module_number;
int top_address_valid;
unsigned int top_left_address;
unsigned int top_right_address;
int bottom_address_valid;
unsigned int bottom_left_address;
unsigned int bottom_right_address;
unsigned int idelay_top[4]; //ll,lr,rl,ll
unsigned int idelay_bottom[4]; //ll,lr,rl,ll
float high_voltage;
int* top_dac;
int* bottom_dac;
};
void Module_Module(struct Module* mod,unsigned int number, unsigned int address_top);
void Module_ModuleBottom(struct Module* mod,unsigned int number, unsigned int address_bottom);
void Module_Module1(struct Module* mod,unsigned int number, unsigned int address_top, unsigned int address_bottom);
unsigned int Module_GetModuleNumber(struct Module* mod);
int Module_TopAddressIsValid(struct Module* mod);
unsigned int Module_GetTopBaseAddress(struct Module* mod);
unsigned int Module_GetTopLeftAddress(struct Module* mod) ;
unsigned int Module_GetTopRightAddress(struct Module* mod);
unsigned int Module_GetBottomBaseAddress(struct Module* mod);
int Module_BottomAddressIsValid(struct Module* mod);
unsigned int Module_GetBottomLeftAddress(struct Module* mod);
unsigned int Module_GetBottomRightAddress(struct Module* mod);
unsigned int Module_SetTopIDelay(struct Module* mod,unsigned int chip,unsigned int value);
unsigned int Module_GetTopIDelay(struct Module* mod,unsigned int chip) ;
unsigned int Module_SetBottomIDelay(struct Module* mod,unsigned int chip,unsigned int value);
unsigned int Module_GetBottomIDelay(struct Module* mod,unsigned int chip);
float Module_SetHighVoltage(struct Module* mod,float value);
float Module_GetHighVoltage(struct Module* mod);
int Module_SetTopDACValue(struct Module* mod,unsigned int i, int value);
int Module_GetTopDACValue(struct Module* mod,unsigned int i);
int Module_SetBottomDACValue(struct Module* mod,unsigned int i, int value);
int Module_GetBottomDACValue(struct Module* mod,unsigned int i);
void Feb_Control_activate(int activate);
int Feb_Control_IsBottomModule();
int Feb_Control_GetModuleNumber();
void Feb_Control_PrintModuleList();
int Feb_Control_GetModuleIndex(unsigned int module_number, unsigned int* module_index);
int Feb_Control_CheckModuleAddresses(struct Module* m);
int Feb_Control_AddModule(unsigned int module_number, unsigned int top_address);
/*int Feb_Control_AddModule(unsigned int module_number, unsigned int top_address, unsigned int bottom_address, int half_module=0);*/
int Feb_Control_AddModule1(unsigned int module_number, int top_enable, unsigned int top_address, unsigned int bottom_address, int half_module);
int Feb_Control_GetDACNumber(char* s, unsigned int* n);
int Feb_Control_SendDACValue(unsigned int dst_num, unsigned int ch, unsigned int* value);
int Feb_Control_VoltageToDAC(float value, unsigned int* digital, unsigned int nsteps, float vmin, float vmax);
float Feb_Control_DACToVoltage(unsigned int digital,unsigned int nsteps,float vmin,float vmax);
int Feb_Control_SendIDelays(unsigned int dst_num, int chip_lr, unsigned int channels, unsigned int ndelay_units);
int Feb_Control_SetStaticBits();
int Feb_Control_SetStaticBits1(unsigned int the_static_bits);
int Feb_Control_SendBitModeToBebServer();
unsigned int Feb_Control_ConvertTimeToRegister(float time_in_sec);
unsigned int Feb_Control_AddressToAll();
int Feb_Control_SetCommandRegister(unsigned int cmd);
int Feb_Control_GetDAQStatusRegister(unsigned int dst_address, unsigned int* ret_status);
/*int Feb_Control_StartDAQOnlyNWaitForFinish(int sleep_time_us=5000);*/
int Feb_Control_StartDAQOnlyNWaitForFinish(int sleep_time_us);
int Feb_Control_ResetChipCompletely();
int Feb_Control_ResetChipPartially();
//struct sockaddr_in Feb_Control_serv_addr;
/*
int Feb_Control_SetupSendToSocket(const char* ip_address_hostname, unsigned short int port);
int Feb_Control_WriteNRead(char* message, int length, int max_length);
*/
void Feb_Control_FebControl();
int Feb_Control_Init(int master, int top, int normal, int module_num);
int Feb_Control_OpenSerialCommunication();
void Feb_Control_CloseSerialCommunication();
int Feb_Control_CheckSetup();
unsigned int Feb_Control_GetNModules();
unsigned int Feb_Control_GetNHalfModules();
int Feb_Control_SetHighVoltage(int value);
int Feb_Control_GetHighVoltage(int* value);
int Feb_Control_SendHighVoltage(int dacvalue);
int Feb_Control_ReceiveHighVoltage(unsigned int* value);
int Feb_Control_SetIDelays(unsigned int module_num, unsigned int ndelay_units);
int Feb_Control_SetIDelays1(unsigned int module_num, unsigned int chip_pos, unsigned int ndelay_units);
int Feb_Control_DecodeDACString(char* dac_str, unsigned int* module_index, int* top, int* bottom, unsigned int* dac_ch);
/*int Feb_Control_SetDAC(string s, int value, int is_a_voltage_mv=0);*/
int Feb_Control_SetDAC(char* s, int value, int is_a_voltage_mv);
/* int Feb_Control_GetDAC(string s, int* ret_value, int voltage_mv=0);*/
int Feb_Control_GetDAC(char* s, int* ret_value, int voltage_mv);
int Feb_Control_GetDACName(unsigned int dac_num,char* s);
int Feb_Control_SetTrimbits(unsigned int module_num, unsigned int* trimbits);
unsigned int* Feb_Control_GetTrimbits();
/**Added by Dhanya */
int Feb_Control_SaveAllTrimbitsTo(int value);
int Feb_Control_Reset();
int Feb_Control_PrepareForAcquisition();
int Feb_Control_StartAcquisition();
int Feb_Control_StopAcquisition();
int Feb_Control_AcquisitionInProgress();
int Feb_Control_AcquisitionStartedBit();
/*int Feb_Control_WaitForFinishedFlag(int sleep_time_us=5000);*/
int Feb_Control_WaitForFinishedFlag(int sleep_time_us);
int Feb_Control_WaitForStartedFlag(int sleep_time_us, int prev_flag);
//functions for setting up exposure
void Feb_Control_PrintAcquisitionSetup();
int Feb_Control_SetNExposures(unsigned int n_images);
unsigned int Feb_Control_GetNExposures();
int Feb_Control_SetExposureTime(double the_exposure_time_in_sec);
double Feb_Control_GetExposureTime();
int64_t Feb_Control_GetExposureTime_in_nsec();
int Feb_Control_SetSubFrameExposureTime(int64_t the_subframe_exposure_time_in_10nsec);
int64_t Feb_Control_GetSubFrameExposureTime();
int Feb_Control_SetExposurePeriod(double the_exposure_period_in_sec);
double Feb_Control_GetExposurePeriod();
int Feb_Control_SetDynamicRange(unsigned int four_eight_sixteen_or_thirtytwo);
unsigned int Feb_Control_GetDynamicRange();
int Feb_Control_SetReadoutSpeed(unsigned int readout_speed); //0 was default, 0->full,1->half,2->quarter or 3->super_slow
int Feb_Control_SetReadoutMode(unsigned int readout_mode); ///0 was default,0->parallel,1->non-parallel,2-> safe_mode
int Feb_Control_SetTriggerMode(unsigned int trigger_mode, int polarity);//0 and 1 was default,
int Feb_Control_SetExternalEnableMode(int use_external_enable, int polarity);//0 and 1 was default,
//functions for testing
/*int Feb_Control_SetTestModeVariable(int on=1);*/
int Feb_Control_SetInTestModeVariable(int on);
int Feb_Control_GetTestModeVariable();
void Feb_Control_Set_Counter_Bit(int value);
int Feb_Control_Get_Counter_Bit();
int Feb_Control_Pulse_Pixel(int npulses,int x, int y);
int Feb_Control_PulsePixelNMove(int npulses, int inc_x_pos, int inc_y_pos);
int Feb_Control_Shift32InSerialIn(unsigned int value_to_shift_in);
int Feb_Control_SendTokenIn();
int Feb_Control_ClockRowClock(unsigned int ntimes);
int Feb_Control_PulseChip(int npulses);
int64_t Feb_Control_Get_RateTable_Tau_in_nsec();
int64_t Feb_Control_Get_RateTable_Period_in_nsec();
int Feb_Control_SetRateCorrectionTau(int64_t tau_in_Nsec);
int Feb_Control_SetRateCorrectionTable(unsigned int *table);
int Feb_Control_GetRateCorrectionVariable();
void Feb_Control_SetRateCorrectionVariable(int activate_rate_correction);
int Feb_Control_PrintCorrectedValues();
int Feb_Control_GetLeftFPGATemp();
int Feb_Control_GetRightFPGATemp();
uint32_t Feb_Control_WriteRegister(uint32_t offset, uint32_t data);
uint32_t Feb_Control_ReadRegister(uint32_t offset);
#endif

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/**
* @author Ian Johnson
* @version 1.0
*/
//#include <iostream>
//#include <iomanip>
//#include <unistd.h>
//#include <string.h>
//#include <sys/mman.h>
//#include <fcntl.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include "xparameters.h"
#include "FebInterface.h"
struct LocalLinkInterface ll_local,* ll;
unsigned int Feb_Interface_nfebs;
unsigned int* Feb_Interface_feb_numb;
int Feb_Interface_send_ndata;
unsigned int Feb_Interface_send_buffer_size;
unsigned int* Feb_Interface_send_data_raw;
unsigned int* Feb_Interface_send_data;
int Feb_Interface_recv_ndata;
unsigned int Feb_Interface_recv_buffer_size;
unsigned int* Feb_Interface_recv_data_raw;
unsigned int* Feb_Interface_recv_data;
void Feb_Interface_FebInterface(){
ll = &ll_local;
Feb_Interface_nfebs = 0;
Feb_Interface_feb_numb = 0;
Feb_Interface_send_ndata = 0;
Feb_Interface_send_buffer_size = 1026;
Feb_Interface_send_data_raw = malloc((Feb_Interface_send_buffer_size+1) * sizeof(unsigned int));
Feb_Interface_send_data = &Feb_Interface_send_data_raw[1];
Feb_Interface_recv_ndata = 0;
Feb_Interface_recv_buffer_size = 1026;
Feb_Interface_recv_data_raw = malloc((Feb_Interface_recv_buffer_size+1) * sizeof(unsigned int));
Feb_Interface_recv_data = &Feb_Interface_recv_data_raw[1];
Local_LocalLinkInterface1(ll,XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT_BASEADDR);
}
void Feb_Interface_SendCompleteList(unsigned int n,unsigned int* list){
unsigned int i;
if(Feb_Interface_feb_numb) free(Feb_Interface_feb_numb);
Feb_Interface_nfebs = n;
Feb_Interface_feb_numb = malloc(n * sizeof(unsigned int));
for(i=0;i<n;i++) Feb_Interface_feb_numb[i] = list[i];
}
int Feb_Interface_WriteTo(unsigned int ch){
if(ch>0xfff) return 0;
#ifdef MARTIN
cprintf(YELLOW, "FIW ch %d\n", ch);
#endif
Feb_Interface_send_data_raw[0] = 0x8fff0000;
if(Local_Write(ll,4,Feb_Interface_send_data_raw)!=4) return 0;
Feb_Interface_send_data_raw[0] = 0x90000000 | (ch<<16);
if(Local_Write(ll,4,Feb_Interface_send_data_raw)!=4) return 0;
Feb_Interface_send_data_raw[0] = 0xc0000000;
return ((Feb_Interface_send_ndata+1)*4==Local_Write(ll,(Feb_Interface_send_ndata+1)*4,Feb_Interface_send_data_raw));
}
int Feb_Interface_ReadFrom(unsigned int ch, unsigned int ntrys){
unsigned int t;
if(ch>=0xfff) return 0;
Feb_Interface_recv_data_raw[0] = 0xa0000000 | (ch<<16);
Local_Write(ll,4,Feb_Interface_recv_data_raw);
usleep(20);
Feb_Interface_recv_ndata=-1;
for(t=0;t<ntrys;t++){
if((Feb_Interface_recv_ndata=Local_Read(ll,Feb_Interface_recv_buffer_size*4,Feb_Interface_recv_data_raw)/4)>0){
Feb_Interface_recv_ndata--;
break;
}
usleep(1000);
}
return (Feb_Interface_recv_ndata>=0);
}
int Feb_Interface_SetByteOrder(){
Feb_Interface_send_data_raw[0] = 0x8fff0000;
if(Local_Write(ll,4,Feb_Interface_send_data_raw)!=4) return 0;
Feb_Interface_send_ndata = 2;
Feb_Interface_send_data[0] = 0;
Feb_Interface_send_data[1] = 0;
unsigned int i;
unsigned int dst = 0xff;
for(i=0;i<Feb_Interface_nfebs;i++) dst = (dst | Feb_Interface_feb_numb[i]);
int passed = Feb_Interface_WriteTo(dst);
return passed;
}
int Feb_Interface_ReadRegister(unsigned int sub_num, unsigned int reg_num,unsigned int* value_read){
return Feb_Interface_ReadRegisters(sub_num,1,&reg_num,value_read);
}
int Feb_Interface_ReadRegisters(unsigned int sub_num, unsigned int nreads, unsigned int* reg_nums,unsigned int* values_read){
//here cout<<"Reading Register ...."<<endl;
unsigned int i;
nreads &= 0x3ff;
if(!nreads||nreads>Feb_Interface_send_buffer_size-2) return 0;
Feb_Interface_send_ndata = nreads+2;
Feb_Interface_send_data[0] = 0x20000000 | nreads << 14;
for(i=0;i<nreads;i++) Feb_Interface_send_data[i+1]=reg_nums[i];
Feb_Interface_send_data[nreads+1] = 0;
if(!Feb_Interface_WriteTo(sub_num)||!Feb_Interface_ReadFrom(sub_num,20)||Feb_Interface_recv_ndata!=(int)(nreads+2)) return 0;
for(i=0;i<nreads;i++) values_read[i] = Feb_Interface_recv_data[i+1];
return 1;
}
int Feb_Interface_WriteRegister(unsigned int sub_num, unsigned int reg_num,unsigned int value, int wait_on, unsigned int wait_on_address){
return Feb_Interface_WriteRegisters(sub_num,1,&reg_num,&value,&wait_on,&wait_on_address);
}
int Feb_Interface_WriteRegisters(unsigned int sub_num, unsigned int nwrites, unsigned int* reg_nums, unsigned int* values, int* wait_ons, unsigned int* wait_on_addresses){
unsigned int i;
nwrites &= 0x3ff; //10 bits
if(!nwrites||2*nwrites>Feb_Interface_send_buffer_size-2) return 0;
//cout<<"Write register : "<<this<<" "<<s_num<<" "<<nwrites<<" "<<reg_nums<<" "<<values<<" "<<wait_ons<<" "<<wait_on_addresses<<endl;
Feb_Interface_send_ndata = 2*nwrites+2;
Feb_Interface_send_data[0] = 0x80000000 | nwrites << 14;
Feb_Interface_send_data[2*nwrites+1] = 0;
for(i=0;i<nwrites;i++) Feb_Interface_send_data[2*i+1] = 0x3fff&reg_nums[i];
for(i=0;i<nwrites;i++) Feb_Interface_send_data[2*i+2] = values[i];
// wait on busy data(28), address of busy flag data(27 downto 14)
if(wait_ons&&wait_on_addresses) for(i=0;i<nwrites;i++) Feb_Interface_send_data[2*i+1] |= (wait_ons[i]<<28 | (0x3fff&wait_on_addresses[i])<<14);
if(!Feb_Interface_WriteTo(sub_num)) return 0;
return 1;
}
int Feb_Interface_WriteMemoryInLoops(unsigned int sub_num, unsigned int mem_num, unsigned int start_address, unsigned int nwrites, unsigned int *values){
unsigned int max_single_packet_size = 352;
int passed=1;
unsigned int n_to_send = max_single_packet_size;
unsigned int ndata_sent = 0;
unsigned int ndata_countdown = nwrites;
while(ndata_countdown>0){
n_to_send = ndata_countdown<max_single_packet_size ? ndata_countdown:max_single_packet_size;
if(!Feb_Interface_WriteMemory(sub_num,mem_num,start_address,n_to_send,&(values[ndata_sent]))){passed=0; break;}
ndata_countdown-=n_to_send;
ndata_sent +=n_to_send;
start_address +=n_to_send;
usleep(500);//500 works
}
return passed;
}
int Feb_Interface_WriteMemory(unsigned int sub_num, unsigned int mem_num, unsigned int start_address, unsigned int nwrites, unsigned int *values){
// -1 means write to all
unsigned int i;
mem_num &= 0x3f;
start_address &= 0x3fff;
nwrites &= 0x3ff;
if(!nwrites||nwrites>Feb_Interface_send_buffer_size-2) {printf("error herer: nwrites:%d\n",nwrites);return 0;}//*d-1026
Feb_Interface_send_ndata = nwrites+2;//*d-1026
Feb_Interface_send_data[0] = 0xc0000000 | mem_num << 24 | nwrites << 14 | start_address; //cmd -> write to memory, nwrites, mem number, start address
Feb_Interface_send_data[nwrites+1] = 0;
for(i=0;i<nwrites;i++) Feb_Interface_send_data[i+1] = values[i];
if(!Feb_Interface_WriteTo(sub_num)) return 0;
return 1;
}

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/**
* @author Ian Johnson
* @version 1.0
*/
#ifndef FEBINTERFACE_H
#define FEBINTERFACE_H
#include "LocalLinkInterface.h"
int Feb_Interface_WriteTo(unsigned int ch);
/*int Feb_Interface_ReadFrom(unsigned int ch, unsigned int ntrys=20);*/
int Feb_Interface_ReadFrom(unsigned int ch, unsigned int ntrys);
void Feb_Interface_FebInterface();
void Feb_Interface_SendCompleteList(unsigned int n,unsigned int* list);
int Feb_Interface_SetByteOrder();
int Feb_Interface_ReadRegister(unsigned int sub_num, unsigned int reg_num,unsigned int* value_read);
int Feb_Interface_ReadRegisters(unsigned int sub_num, unsigned int nreads, unsigned int* reg_nums,unsigned int* values_read);
/*int Feb_Interface_WriteRegister(unsigned int sub_num, unsigned int reg_num,unsigned int value, int wait_on=0, unsigned int wait_on_address=0);*/
int Feb_Interface_WriteRegister(unsigned int sub_num, unsigned int reg_num,unsigned int value, int wait_on, unsigned int wait_on_address);
/*int Feb_Interface_WriteRegisters(unsigned int sub_num, unsigned int nwrites, unsigned int* reg_nums, unsigned int* values, int* wait_ons=0, unsigned int* wait_on_addresses=0);*/
int Feb_Interface_WriteRegisters(unsigned int sub_num, unsigned int nwrites, unsigned int* reg_nums, unsigned int* values, int* wait_ons, unsigned int* wait_on_addresses);
//mem_num is 0 for trimbit BRAM and 1 for rate correction BRAM
int Feb_Interface_WriteMemoryInLoops(unsigned int sub_num, unsigned int mem_num, unsigned int start_address, unsigned int nwrites, unsigned int *values);
int Feb_Interface_WriteMemory(unsigned int sub_num, unsigned int mem_num, unsigned int start_address, unsigned int nwrites, unsigned int *values);
#endif

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/**
* @author Ian Johnson
* @version 1.0
*/
//daq register definitions
#define DAQ_REG_CTRL 1
#define DAQ_REG_CHIP_CMDS 2
#define DAQ_REG_STATIC_BITS 3
#define DAQ_REG_CLK_ROW_CLK_NTIMES 3
#define DAQ_REG_SHIFT_IN_32 3
#define DAQ_REG_READOUT_NROWS 3
#define DAQ_REG_SEND_N_TESTPULSES 3
#define DAQ_REG_NEXPOSURES 3
#define DAQ_REG_EXPOSURE_TIMER 4 // == (31 downto 3) * 10^(2 downto 0)
#define DAQ_REG_EXPOSURE_REPEAT_TIMER 5 // == (31 downto 3) * 10^(2 downto 0)
#define DAQ_REG_SUBFRAME_EXPOSURES 6
#define DAQ_REG_STATUS 7 //also pg and fifo status register
#define DAQ_CTRL_RESET 0x80000000
#define DAQ_CTRL_START 0x40000000
#define ACQ_CTRL_START 0x50000000 //this is 0x10000000 (acq) | 0x40000000 (daq)
#define DAQ_CTRL_STOP 0x00000000
//direct chip commands to the DAQ_REG_CHIP_CMDS register
#define DAQ_SET_STATIC_BIT 0x00000001
#define DAQ_RESET_COMPLETELY 0x0000000E
#define DAQ_RESET_PERIPHERY 0x00000002
#define DAQ_RESET_PIXEL_COUNTERS 0x00000004
#define DAQ_RESET_COLUMN_SELECT 0x00000008
#define DAQ_STORE_IMAGE 0x00000010
#define DAQ_RELEASE_IMAGE_STORE 0x00000020
#define DAQ_SEND_A_TOKEN_IN 0x00000040
#define DAQ_CLK_ROW_CLK_NTIMES 0x00000080
#define DAQ_SERIALIN_SHIFT_IN_32 0x00000100
#define DAQ_LOAD_16ROWS_OF_TRIMBITS 0x00000200
#define DAQ_IGNORE_INITIAL_CRAP 0x00000400 //crap before readout
#define DAQ_READOUT_NROWS 0x00000800
#define DAQ_CLKOUT_LAST_4_BITS_AND_RETURN_TO_START 0x00001000 //last 4 bit of data in the last frame
#define DAQ_RELEASE_IMAGE_STORE_AFTER_READOUT 0x00002000
#define DAQ_RESET_PIXEL_COUNTERS_AFTER_READOUT 0x00004000
#define DAQ_CLK_ROW_CLK_TO_SELECT_NEXT_ROW 0x00008000
#define DAQ_CLK_MAIN_CLK_TO_SELECT_NEXT_PIXEL 0x00010000
#define DAQ_SEND_N_TEST_PULSES 0x00020000
#define DAQ_CHIP_CONTROLLER_HALF_SPEED 0x00040000 //everything at 100 MHz (50MHz ddr readout)
#define DAQ_CHIP_CONTROLLER_QUARTER_SPEED 0x00080000 //everything at 50 MHz (25MHz ddr readout)
#define DAQ_CHIP_CONTROLLER_SUPER_SLOW_SPEED 0x000c0000 //everything at ~200 kHz (200 kHz MHz ddr readout)
#define DAQ_FIFO_ENABLE 0x00100000
//direct chip commands to the DAQ_REG_CHIP_CMDS register
#define DAQ_NEXPOSURERS_SAFEST_MODE_ROW_CLK_BEFORE_MODE 0x00200000 //row clk is before main clk readout sequence
#define DAQ_NEXPOSURERS_NORMAL_NONPARALLEL_MODE 0x00400000 //expose ->readout ->expose -> ..., with store is always closed
#define DAQ_NEXPOSURERS_PARALLEL_MODE 0x00600000 //parallel acquire/read mode
//DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES is old now hard-wired in the firmware that every image comes with a header
//#define DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES 0x00800000 //DAQ_IGNORE_INITIAL_CRAP and DAQ_CLKOUT_LAST_4_BITS_AND_RETURN_TO_START
#define DAQ_NEXPOSURERS_EXTERNAL_ENABLING 0x01000000
#define DAQ_NEXPOSURERS_EXTERNAL_ENABLING_POLARITY 0x02000000
#define DAQ_NEXPOSURERS_EXTERNAL_TRIGGER_POLARITY 0x04000000
#define DAQ_NEXPOSURERS_INTERNAL_ACQUISITION 0x00000000 //internally controlled
#define DAQ_NEXPOSURERS_EXTERNAL_ACQUISITION_START 0x08000000 //external acquisition start
#define DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START 0x10000000 //external image start
#define DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START_AND_STOP 0x18000000 //externally controlly, external image start and stop
#define DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING 0x20000000
#define DAQ_NEXPOSURERS_ACTIVATE_RATE_CORRECTION 0x40000000
//#define DAQ_MASTER_HALF_MODULE 0x80000000 currently not used
//chips static bits
#define DAQ_STATIC_BIT_PROGRAM 0x00000001
#define DAQ_STATIC_BIT_M4 0x00000002 //these are the status bits, not bit mode
#define DAQ_STATIC_BIT_M8 0x00000004 //these are the status bits, not bit mode
#define DAQ_STATIC_BIT_M12 0x00000000 //these are the status bits, not bit mode, ie. "00" is 12 bit mode
#define DAQ_STATIC_BIT_CHIP_TEST 0x00000008
#define DAQ_STATIC_BIT_ROTEST 0x00000010
#define DAQ_CS_BAR_LEFT 0x00000020
#define DAQ_CS_BAR_RIGHT 0x00000040
//status flags
#define DAQ_STATUS_DAQ_RUNNING 0x01
#define DAQ_DATA_COLLISION_ERROR 0x02
#define DAQ_STATUS_CURRENT_M4 0x04
#define DAQ_STATUS_CURRENT_M8 0x08
#define DAQ_STATUS_CURRENT_M12 0x00 //in 12 bit mode both are cleared
#define DAQ_STATUS_CURRENT_TESTMODE 0x10
#define DAQ_STATUS_TOKEN_OUT 0x20
#define DAQ_STATUS_SERIAL_OUT 0x40
#define DAQ_STATUS_PIXELS_ARE_ENABLED 0x80
#define DAQ_STATUS_DAQ_RUN_TOGGLE 0x200
//data delay registers
#define CHIP_DATA_OUT_DELAY_REG_CTRL 1
#define CHIP_DATA_OUT_DELAY_REG2 2
#define CHIP_DATA_OUT_DELAY_REG3 3
#define CHIP_DATA_OUT_DELAY_REG4 4
#define CHIP_DATA_OUT_DELAY_SET 0x20000000
//module configuration
#define TOP_BIT_MASK 0x00f
#define MASTER_BIT_MASK 0x200
#define NORMAL_MODULE_BIT_MASK 0x400
// Master Slave Top Bottom Definition
#define MODULE_CONFIGURATION_MASK 0x84
//Software Configuration
#define MASTERCONFIG_OFFSET 0x160 //0x20 * 11 (P11)
#define MASTER_BIT 0x1
#define OVERWRITE_HARDWARE_BIT 0x2
#define DEACTIVATE_BIT 0x4
#define FPGA_TEMP_OFFSET 0x200
#define TXM_DELAY_LEFT_OFFSET 0x180
#define TXM_DELAY_RIGHT_OFFSET 0x1A0
#define TXM_DELAY_FRAME_OFFSET 0x1C0
#define TXM_FLOW_CONTROL_10G 0x140
//command memory
#define LEFT_OFFSET 0x0
#define RIGHT_OFFSET 0x100
#define FIRST_CMD_PART1_OFFSET 0x8
#define FIRST_CMD_PART2_OFFSET 0xc
#define SECOND_CMD_PART1_OFFSET 0x10
#define SECOND_CMD_PART2_OFFSET 0x14
#define COMMAND_COUNTER_OFFSET 0x18
#define STOP_ACQ_OFFSET 0x1c
#define STOP_ACQ_BIT 0x40000000
#define TWO_REQUESTS_OFFSET 0x1c
#define TWO_REQUESTS_BIT 0x80000000
//version
#define FIRMWARE_VERSION_OFFSET 0x4
#define FIRMWARESOFTWARE_API_OFFSET 0x0
#define FRAME_NUM_RESET_OFFSET 0xA0
//temp so far
#define FEB_REG_STATUS 0xa
//1g counters
#define ONE_GIGA_LEFT_INDEX_LSB_COUNTER 0x04
#define ONE_GIGA_LEFT_INDEX_MSB_COUNTER 0x24
#define ONE_GIGA_LEFT_TXN_DELAY_COUNTER 0x104
#define ONE_GIGA_LEFT_FRAME_DELAY_COUNTER 0x124
#define ONE_GIGA_RIGHT_INDEX_LSB_COUNTER 0x44
#define ONE_GIGA_RIGHT_INDEX_MSB_COUNTER 0x64
#define ONE_GIGA_RIGHT_TXN_DELAY_COUNTER 0x144
#define ONE_GIGA_RIGHT_FRAME_DELAY_COUNTER 0x164
//10g counters
#define TEN_GIGA_LEFT_INDEX_LSB_COUNTER 0x84
#define TEN_GIGA_LEFT_INDEX_MSB_COUNTER 0xa4
#define TEN_GIGA_LEFT_TXN_DELAY_COUNTER 0x184
#define TEN_GIGA_LEFT_FRAME_DELAY_COUNTER 0x1a4
#define TEN_GIGA_RIGHT_INDEX_LSB_COUNTER 0xc4
#define TEN_GIGA_RIGHT_INDEX_MSB_COUNTER 0xe4
#define TEN_GIGA_RIGHT_TXN_DELAY_COUNTER 0x1c4
#define TEN_GIGA_RIGHT_FRAME_DELAY_COUNTER 0x1e4
// udp header (position, id)
#define UDP_HEADER_A_LEFT_OFST 0x00C0
#define UDP_HEADER_B_LEFT_OFST 0x00E0
#define UDP_HEADER_A_RIGHT_OFST 0x0100
#define UDP_HEADER_B_RIGHT_OFST 0x0120
#define UDP_HEADER_X_OFST (0)
#define UDP_HEADER_X_MSK (0xFFFF << UDP_HEADER_X_OFST)
#define UDP_HEADER_ID_OFST (16)
#define UDP_HEADER_ID_MSK (0xFFFF << UDP_HEADER_ID_OFST)
#define UDP_HEADER_Z_OFST (0)
#define UDP_HEADER_Z_MSK (0xFFFF << UDP_HEADER_Z_OFST)
#define UDP_HEADER_Y_OFST (16)
#define UDP_HEADER_Y_MSK (0xFFFF << UDP_HEADER_Y_OFST)

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//Class initially from Gerd and was called mmap_test.c
//return reversed 1 means good, 0 means failed
//#include <stdio.h>
//#include <unistd.h>
//#include <string.h>
//#include <sys/mman.h>
//#include <fcntl.h>
#include "HardwareIO.h"
xfs_u8 HWIO_xfs_in8(xfs_u32 InAddress)
{
/* read the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on
*/
xfs_u8 IoContents;
__asm__ volatile ("eieio; lbz %0,0(%1)":"=r" (IoContents):"b"
(InAddress));
return IoContents;
}
/*****************************************************************************/
xfs_u16 HWIO_xfs_in16(xfs_u32 InAddress)
{
/* read the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on
*/
xfs_u16 IoContents;
__asm__ volatile ("eieio; lhz %0,0(%1)":"=r" (IoContents):"b"
(InAddress));
return IoContents;
}
/*****************************************************************************/
xfs_u32 HWIO_xfs_in32(xfs_u32 InAddress)
{
/* read the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on
*/
xfs_u32 IoContents;
__asm__ volatile ("eieio; lwz %0,0(%1)":"=r" (IoContents):"b"
(InAddress));
return IoContents;
}
/*****************************************************************************/
void HWIO_xfs_out8(xfs_u32 OutAddress, xfs_u8 Value)
{
/* write the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on
*/
__asm__ volatile ("stb %0,0(%1); eieio"::"r" (Value), "b"(OutAddress));
}
/*****************************************************************************/
void HWIO_xfs_out16(xfs_u32 OutAddress, xfs_u16 Value)
{
/* write the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on
*/
__asm__ volatile ("sth %0,0(%1); eieio"::"r" (Value), "b"(OutAddress));
}
/*****************************************************************************/
void HWIO_xfs_out32(xfs_u32 OutAddress, xfs_u32 Value)
{
/* write the contents of the I/O location and then synchronize the I/O
* such that the I/O operation completes before proceeding on
*/
__asm__ volatile ("stw %0,0(%1); eieio"::"r" (Value), "b"(OutAddress));
}

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//Class initially from Gerd and was called mmap_test.c
#ifndef HARDWAREIO_H
#define HARDWAREIO_H
#include "xfs_types.h"
xfs_u8 HWIO_xfs_in8(xfs_u32 InAddress);
xfs_u16 HWIO_xfs_in16(xfs_u32 InAddress);
xfs_u32 HWIO_xfs_in32(xfs_u32 InAddress);
void HWIO_xfs_out8(xfs_u32 OutAddress, xfs_u8 Value);
void HWIO_xfs_out16(xfs_u32 OutAddress, xfs_u16 Value);
void HWIO_xfs_out32(xfs_u32 OutAddress, xfs_u32 Value);
#endif

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//from Gerd and was called mmap_test.h
#ifndef __PLB_LL_FIFO_H__
#define __PLB_LL_FIFO_H__
/******************************************************************************/
/* definitions */
/******************************************************************************/
#define PLB_LL_FIFO_REG_CTRL 0
#define PLB_LL_FIFO_REG_STATUS 1
#define PLB_LL_FIFO_REG_FIFO 2
#define PLB_LL_FIFO_CTRL_LL_REM_SHIFT 30
#define PLB_LL_FIFO_CTRL_LL_REM 0xC0000000
#define PLB_LL_FIFO_CTRL_LL_EOF 0x20000000
#define PLB_LL_FIFO_CTRL_LL_SOF 0x10000000
#define PLB_LL_FIFO_CTRL_LL_MASK 0xF0000000
#define PLB_LL_FIFO_CTRL_TX_RESET 0x08000000
#define PLB_LL_FIFO_CTRL_RX_RESET 0x04000000
#define PLB_LL_FIFO_CTRL_RESET_STATUS 0x00800000
#define PLB_LL_FIFO_CTRL_RESET_USER 0x00400000
#define PLB_LL_FIFO_CTRL_RESET_LINK 0x00200000
#define PLB_LL_FIFO_CTRL_RESET_GT 0x00100000
#define PLB_LL_FIFO_CTRL_RESET_ALL 0x0CF00000
// do not reset complete gtx dual in std. case
// cause this would reset PLL and stop LL clk
#define PLB_LL_FIFO_CTRL_RESET_STD 0x0CE00000
// reset Rx and Tx Fifo and set User Reset
#define PLB_LL_FIFO_CTRL_RESET_FIFO 0x0C400000
#define PLB_LL_FIFO_CTRL_CONFIG_VECTOR 0x000FFFFF
#define PLB_LL_FIFO_STATUS_LL_REM_SHIFT 30
#define PLB_LL_FIFO_STATUS_LL_REM 0xC0000000
#define PLB_LL_FIFO_STATUS_LL_EOF 0x20000000
#define PLB_LL_FIFO_STATUS_LL_SOF 0x10000000
#define PLB_LL_FIFO_STATUS_EMPTY 0x08000000
#define PLB_LL_FIFO_STATUS_ALMOSTEMPTY 0x04000000
#define PLB_LL_FIFO_STATUS_FULL 0x02000000
#define PLB_LL_FIFO_STATUS_ALMOSTFULL 0x01000000
#define PLB_LL_FIFO_STATUS_VECTOR 0x000FFFFF
#define PLB_LL_FIFO_ALMOST_FULL_THRESHOLD_WORDS 100
#endif // __PLB_LL_FIFO_H__

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//Class initially from Gerd and was called mmap_test.c
//return reversed 1 means good, 0 means failed
#include <stdio.h>
#include <unistd.h>
//#include <string.h>
#include "HardwareMMappingDefs.h"
#include "LocalLinkInterface.h"
void Local_LocalLinkInterface1(struct LocalLinkInterface* ll,unsigned int ll_fifo_badr){
// printf("\n v 1 \n");
printf("Initialize PLB LL FIFOs\n");
ll->ll_fifo_base=0;
ll->ll_fifo_ctrl_reg=0;
if(Local_Init(ll,ll_fifo_badr)){
Local_Reset(ll);
printf("\tFIFO Status : 0x%08x\n",Local_StatusVector(ll));
}else printf("\tError LocalLink Mappping : 0x%08x\n",ll_fifo_badr);
printf("\n\n");
}
/*~LocalLinkInterface(){};*/
void Local_LocalLinkInterface(struct LocalLinkInterface* ll){
printf("Initializing new memory\n");
}
int Local_Init(struct LocalLinkInterface* ll,unsigned int ll_fifo_badr){
int fd;
void *plb_ll_fifo_ptr;
if ((fd=open("/dev/mem", O_RDWR)) < 0){
fprintf(stderr, "Could not open /dev/mem\n");
return 0;
}
plb_ll_fifo_ptr = mmap(0, getpagesize(), PROT_READ | PROT_WRITE, MAP_FILE | MAP_SHARED, fd, ll_fifo_badr);
close(fd);
if (plb_ll_fifo_ptr == MAP_FAILED){
perror ("mmap");
return 0;
}
ll->ll_fifo_base = (xfs_u32) plb_ll_fifo_ptr;
ll->ll_fifo_ctrl_reg = 0;
return 1;
}
int Local_Reset(struct LocalLinkInterface* ll){
return Local_Reset1(ll,PLB_LL_FIFO_CTRL_RESET_STD);
}
int Local_Reset1(struct LocalLinkInterface* ll,unsigned int rst_mask){
ll->ll_fifo_ctrl_reg |= rst_mask;
printf("\tCTRL Register bits: 0x%08x\n",ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg);
ll->ll_fifo_ctrl_reg &= (~rst_mask);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg);
// printf("FIFO CTRL Address: 0x%08x\n FIFO CTRL Register: 0x%08x\n",PLB_LL_FIFO_REG_CTRL,plb_ll_fifo[PLB_LL_FIFO_REG_CTRL]);
return 1;
}
unsigned int Local_StatusVector(struct LocalLinkInterface* ll){
return HWIO_xfs_in32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_STATUS);
}
int Local_Write(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer){
// note: buffer must be word (4 byte) aligned
// frame_len in byte
int vacancy=0;
int i;
int words_send = 0;
int last_word;
unsigned int *word_ptr;
unsigned int fifo_ctrl;
xfs_u32 status;
if (buffer_len < 1) return -1;
last_word = (buffer_len-1)/4;
word_ptr = (unsigned int *)buffer;
#ifdef MARTIN
cprintf(BLUE, "LL Write - Len: %2d - If: %X - Data: ",buffer_len, ll->ll_fifo_base);
for (i=0; i < buffer_len/4; i++)
cprintf(BLUE, "%.8X ",*(((unsigned *) buffer)+i));
printf("\n");
#endif
while (words_send <= last_word)
{
while (!vacancy)//wait for Fifo to be empty again
{
status = HWIO_xfs_in32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_STATUS);
if((status & PLB_LL_FIFO_STATUS_ALMOSTFULL) == 0) vacancy = 1;
#ifdef MARTIN
if (vacancy == 0) cprintf(RED, "Fifo full!\n");
#endif
}
//Just to know: #define PLB_LL_FIFO_ALMOST_FULL_THRESHOLD_WORDS 100
for (i=0; ((i<PLB_LL_FIFO_ALMOST_FULL_THRESHOLD_WORDS) && (words_send <= last_word)); i++)
{
fifo_ctrl = 0;
if (words_send == 0)
{
fifo_ctrl = PLB_LL_FIFO_CTRL_LL_SOF;//announce the start of file
}
if (words_send == last_word)
{
fifo_ctrl |= (PLB_LL_FIFO_CTRL_LL_EOF | (( (buffer_len-1)<<PLB_LL_FIFO_CTRL_LL_REM_SHIFT) & PLB_LL_FIFO_CTRL_LL_REM) );
}
Local_ctrl_reg_write_mask(ll,PLB_LL_FIFO_CTRL_LL_MASK,fifo_ctrl);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_FIFO,word_ptr[words_send++]);
}
}
return buffer_len;
}
int Local_Read(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer){
static unsigned int buffer_ptr = 0;
// note: buffer must be word (4 byte) aligned
// frame_len in byte
int len;
unsigned int *word_ptr;
unsigned int status;
volatile unsigned int fifo_val;
int sof = 0;
#ifdef MARTIN
cprintf(CYAN, "LL Read - If: %X - Data: ",ll->ll_fifo_base);
#endif
word_ptr = (unsigned int *)buffer;
do
{
status = HWIO_xfs_in32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_STATUS);
if (!(status & PLB_LL_FIFO_STATUS_EMPTY))
{
if (status & PLB_LL_FIFO_STATUS_LL_SOF)
{
if (buffer_ptr)
{
buffer_ptr = 0;
return -1; // buffer overflow
}
// printf(">>>> SOF\n\r");
buffer_ptr = 0;
sof = 1;
}
fifo_val = HWIO_xfs_in32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_FIFO); //read from fifo
if ((buffer_ptr > 0) || sof)
{
if ( (buffer_len >> 2) > buffer_ptr)
{
#ifdef MARTIN
cprintf(CYAN, "%.8X ", fifo_val);
#endif
word_ptr[buffer_ptr++] = fifo_val; //write to buffer
}
else
{
buffer_ptr = 0;
return -2; // buffer overflow
}
if (status & PLB_LL_FIFO_STATUS_LL_EOF)
{
len = (buffer_ptr << 2) -3 + ( (status & PLB_LL_FIFO_STATUS_LL_REM)>>PLB_LL_FIFO_STATUS_LL_REM_SHIFT );
#ifdef MARTIN
cprintf(CYAN, "Len: %d\n",len);
#endif
// printf(">>>>status=0x%08x EOF len = %d \n\r\n\r",status, len);
buffer_ptr = 0;
return len;
}
}
}
}
while(!(status & PLB_LL_FIFO_STATUS_EMPTY));
return 0;
}
int Local_ctrl_reg_write_mask(struct LocalLinkInterface* ll,unsigned int mask, unsigned int val){
// printf("Fifo CTRL Reg(1): 0x%08x\n",plb_ll_fifo_ctrl_reg);
ll->ll_fifo_ctrl_reg &= (~mask);
//printf("Fifo CTRL Reg(2): 0x%08x\n",plb_ll_fifo_ctrl_reg);
ll->ll_fifo_ctrl_reg |= ( mask & val);
// printf("Fifo CTRL Reg: 0x%08x\n",plb_ll_fifo_ctrl_reg);
HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg);
// printf("Fifo STAT Reg: 0x%08x\n", plb_ll_fifo[PLB_LL_FIFO_REG_STATUS]);
return 1;
}
int Local_Test(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer){
int len;
unsigned int rec_buff_len = 4096;
unsigned int rec_buffer[4097];
Local_Write(ll,buffer_len,buffer);
usleep(10000);
do{
len = Local_Read(ll,rec_buff_len,rec_buffer);
printf("receive length: %i\n",len);
if (len > 0){
rec_buffer[len]=0;
printf((char*) rec_buffer);
printf("\n");
}
} while(len > 0);
printf("\n\n\n\n");
return 1;
}
void Local_llfifo_print_frame(struct LocalLinkInterface* ll,unsigned char* fbuff, int len){
int i;
printf("\n\r----Frame of len : %d Byte\n\r",len);
for(i=0;i<len;i++){
printf("0x%02x ",fbuff[i] );
if ((i&0xf) == 0x7) printf(" ");
if ((i&0xf) == 0xf) printf("\n\r");
}
printf("\n\r");
}

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//Class initially from Gerd and was called mmap_test.c
#ifndef LOCALLINKINTERFACE_H
#define LOCALLINKINTERFACE_H
#include "xfs_types.h"
#include "HardwareIO.h"
#include <sys/types.h>
#include "ansi.h"
#include <sys/mman.h>
#include <fcntl.h>
/*class LocalLinkInterface: public HardwareIO{ //*/
struct LocalLinkInterface{
xfs_u32 ll_fifo_base;
unsigned int ll_fifo_ctrl_reg;
};
int Local_Init(struct LocalLinkInterface* ll,unsigned int ll_fifo_badr);
int Local_Reset1(struct LocalLinkInterface* ll,unsigned int rst_mask);
int Local_ctrl_reg_write_mask(struct LocalLinkInterface* ll,unsigned int mask, unsigned int val);
void Local_llfifo_print_frame(struct LocalLinkInterface* ll,unsigned char* fbuff, int len);
void Local_LocalLinkInterface1(struct LocalLinkInterface* ll,unsigned int ll_fifo_badr);
/* virtual ~LocalLinkInterface();*/
unsigned int Local_StatusVector(struct LocalLinkInterface* ll);
int Local_Reset(struct LocalLinkInterface* ll);
int Local_Write(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer);
int Local_Read(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer);
int Local_Test(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer);
void Local_LocalLinkInterface(struct LocalLinkInterface* ll);
/*
int FiFoReset(unsigned int numb);
int FifoSend(unsigned int numb, unsigned int frame_len, void *buffer);
int FifoReceive(unsigned int numb, unsigned int frame_len, void *buffer);
int FifoTest(unsigned int numb,unsigned int send_len, char *send_str);
*/
#endif

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CC = powerpc-4xx-softfloat-gcc
BLACKFIN_CC = bfin-uclinux-gcc
CFLAGS += -Wall -DDACS_INT -DEIGERD -DSLS_DETECTOR_FUNCTION_LIST -DDACS_INT -DSTOP_SERVER #-DVERBOSEI #-DVERBOSE #-DVIRTUAL -DPCCOMPILE -DMARTIN
LDLIBS += -lm -lstdc++
PROGS = eigerDetectorServer
DESTDIR ?= bin
INSTMODE = 0777
SRC_CLNT = communication_funcs.c slsDetectorServer.c slsDetectorServer_funcs.c slsDetectorFunctionList.c FebControl.c Beb.c HardwareIO.c LocalLinkInterface.c Feb.c FebInterface.c
OBJS = $(SRC_CLNT:.c=.o)
all: clean versioning $(PROGS) #hv9m_blackfin_server
boot: $(OBJS)
versioning:
@echo `tput setaf 6; ./updateGitVersion.sh; tput sgr0;`
$(PROGS): $(OBJS)
# echo $(OBJS)
mkdir -p $(DESTDIR)
$(CC) -o $@ $(SRC_CLNT) $(CFLAGS) $(LDLIBS)
mv $(PROGS) $(DESTDIR)
hv9m_blackfin_server:9mhvserial_bf.c
$(BLACKFIN_CC) -o hv9m_blackfin_server 9mhvserial_bf.c -Wall #-DVERBOSE
mv hv9m_blackfin_server $(DESTDIR)
rm hv9m_blackfin_server.gdb
clean:
rm -rf $(DESTDIR)/$(PROGS) *.o $(DESTDIR)/hv9m_blackfin_server

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CC = gcc
CFLAGS += -Wall -DDACS_INT -DEIGERD -DSLS_DETECTOR_FUNCTION_LIST -DDACS_INT -DPCCOMPILE -DSTOP_SERVER #-DVERBOSE
CFLAGS += -DVIRTUAL -DVIRTUAL_9M
MASTERFLAG += -DVIRTUAL_MASTER
LDLIBS += -lm -lstdc++ -pthread
DESTDIR ?= bin
SRC_CLNT = communication_funcs.c slsDetectorServer.c slsDetectorServer_funcs.c slsDetectorFunctionList_virtual.c
all: clean master slave
master: $(SRC_CLNT)
mkdir -p $(DESTDIR)
$(CC) -o eigerDetectorServer_virtualMaster $(SRC_CLNT) $(CFLAGS) $(MASTERFLAG) $(LDLIBS)
mv eigerDetectorServer_virtualMaster $(DESTDIR)
slave: $(SRC_CLNT)
mkdir -p $(DESTDIR)
$(CC) -o eigerDetectorServer_virtualSlave $(SRC_CLNT) $(CFLAGS) $(LDLIBS)
mv eigerDetectorServer_virtualSlave $(DESTDIR)
clean:
rm -rf $(DESTDIR)/eigerDetectorServer_virtualMaster $(DESTDIR)/eigerDetectorServer_virtualSlave *.o

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../../slsReceiverSoftware/include/ansi.h

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../commonFiles/communication_funcs.c

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../commonFiles/communication_funcs.h

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Path: slsDetectorsPackage/slsDetectorSoftware/eigerDetectorServer
URL: origin git@git.psi.ch:sls_detectors_software/sls_detector_software.git
Repository Root: origin git@git.psi.ch:sls_detectors_software/sls_detector_software.git
Repsitory UUID: 73bad32c4ab2c8cfb2687547f7da6f932b358c1a
Revision: 314
Branch: developer
Last Changed Author: Dhanya_Thattil
Last Changed Rev: 1609
Last Changed Date: 2017-10-23 11:45:17.000000002 +0200 ./Beb.c

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//#define SVNPATH ""
#define SVNURL "git@git.psi.ch:sls_detectors_software/sls_detector_software.git"
//#define SVNREPPATH ""
#define SVNREPUUID "73bad32c4ab2c8cfb2687547f7da6f932b358c1a"
//#define SVNREV 0x1609
//#define SVNKIND ""
//#define SVNSCHED ""
#define SVNAUTH "Dhanya_Thattil"
#define SVNREV 0x1609
#define SVNDATE 0x20171023
//

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//#define SVNPATH ""
#define SVNURL ""
//#define SVNREPPATH ""
#define SVNREPUUID ""
//#define SVNREV ""
//#define SVNKIND ""
//#define SVNSCHED ""
#define SVNAUTH ""
#define SVNREV ""
#define SVNDATE ""
//

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mv bin/eigerDetectorServer bin/$2
cp bin/$2 /tftpboot
git rm -f bin/$1
git add bin/$2

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../slsDetectorServer/slsDetectorFunctionList.h

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../slsDetectorServer/slsDetectorServer.c

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/*
* slsDetectorServer_defs.h
*
* Created on: Jan 24, 2013
* Author: l_maliakal_d
*/
#ifndef SLSDETECTORSERVER_DEFS_H_
#define SLSDETECTORSERVER_DEFS_H_
#include "sls_detector_defs.h"
#include <stdint.h>
#define GOODBYE (-200)
#define REQUIRED_FIRMWARE_VERSION (21)
#define IDFILECOMMAND "more /home/root/executables/detid.txt"
#define STATUS_IDLE 0
#define STATUS_RUNNING 1
#define STATUS_ERROR 2
/* Enums */
enum CLK_SPEED_INDEX {FULL_SPEED, HALF_SPEED, QUARTER_SPEED};
enum DACINDEX {SVP,VTR,VRF,VRS,SVN,VTGSTV,VCMP_LL,VCMP_LR,CAL,VCMP_RL,RXB_RB,RXB_LB,VCMP_RR,VCP,VCN,VIS,VTHRESHOLD};
#define DEFAULT_DAC_VALS { \
0, /* SvP */ \
2480, /* Vtr */ \
3300, /* Vrf */ \
1400, /* Vrs */ \
4000, /* SvN */ \
2556, /* Vtgstv */ \
1000, /* Vcmp_ll */ \
1000, /* Vcmp_lr */ \
4000, /* cal */ \
1000, /* Vcmp_rl */ \
1100, /* rxb_rb */ \
1100, /* rxb_lb */ \
1000, /* Vcmp_rr */ \
1000, /* Vcp */ \
2000, /* Vcn */ \
1550 /* Vis */ \
};
enum ADCINDEX {TEMP_FPGAEXT, TEMP_10GE, TEMP_DCDC, TEMP_SODL, TEMP_SODR, TEMP_FPGA, TEMP_FPGAFEBL, TEMP_FPGAFEBR};
enum NETWORKINDEX {TXN_LEFT, TXN_RIGHT, TXN_FRAME,FLOWCTRL_10G};
/* Hardware Definitions */
#define NMAXMOD (1)
#define NMOD (1)
#define NCHAN (256 * 256)
#define NCHIP (4)
#define NADC (0)
#define NDAC (16)
#define NGAIN (0)
#define NOFFSET (0)
#define TEN_GIGA_BUFFER_SIZE (4112)
#define ONE_GIGA_BUFFER_SIZE (1040)
#define TEN_GIGA_CONSTANT (4)
#define ONE_GIGA_CONSTANT (16)
#define NORMAL_HIGHVOLTAGE_INPUTPORT "/sys/class/hwmon/hwmon5/device/in0_input"
#define NORMAL_HIGHVOLTAGE_OUTPUTPORT "/sys/class/hwmon/hwmon5/device/out0_output"
#define SPECIAL9M_HIGHVOLTAGE_PORT "/dev/ttyS1"
#define SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE (16)
/** Default Parameters */
#define DEFAULT_MOD_INDEX (0)
#define DEFAULT_NUM_FRAMES (1)
#define DEFAULT_NUM_CYCLES (1)
#define DEFAULT_EXPTIME (1E9) //ns
#define DEFAULT_PERIOD (1E9) //ns
#define DEFAULT_DELAY (0)
#define DEFAULT_HIGH_VOLTAGE (0)
#define DEFAULT_SETTINGS (DYNAMICGAIN)
#define DEFAULT_SUBFRAME_EXPOSURE_VAL (2621440) // 2.6ms
#define DEFAULT_DYNAMIC_RANGE (16)
#define DEFAULT_READOUT_FLAG (NONPARALLEL)
#define DEFAULT_CLK_SPEED (HALF_SPEED)
#define DEFAULT_IO_DELAY (650)
#define DEFAULT_TIMING_MODE (AUTO_TIMING)
#define DEFAULT_PHOTON_ENERGY (-1)
#define DEFAULT_RATE_CORRECTION (0)
#define DEFAULT_EXT_GATING_ENABLE (0)
#define DEFAULT_EXT_GATING_POLARITY (1) //positive
#define DEFAULT_TEST_MODE (0)
#define DEFAULT_HIGH_VOLTAGE (0)
#define MAX_SUBFRAME_EXPOSURE_VAL_IN_10NS (0x1FFFFFFF) /** 29 bit register for max subframe exposure value */
#define SLAVE_HIGH_VOLTAGE_READ_VAL (-999)
#define HIGH_VOLTAGE_TOLERANCE (5)
#endif /* SLSDETECTORSERVER_DEFS_H_ */

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../slsDetectorServer/slsDetectorServer_funcs.c

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../slsDetectorServer/slsDetectorServer_funcs.h

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../commonFiles/sls_detector_defs.h

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../commonFiles/sls_detector_funcs.h

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../../slsReceiverSoftware/include/sls_receiver_defs.h

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../../slsReceiverSoftware/include/sls_receiver_funcs.h

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SERVER=eigerDetectorServer
MAINDIR=slsDetectorsPackage
SPECDIR=slsDetectorSoftware/$SERVER
TMPFILE=gitInfoEigerTmp.h
INCLFILE=gitInfoEiger.h
#evaluate the variables
EVALFILE=../../evalVersionVariables.sh
source $EVALFILE
#get modified date
#RDATE1='git log --pretty=format:"%ci" -1'
RDATE1="find ../slsDetectorServer . -type f -exec stat --format '%Y :%y %n' '{}' \; | sort -nr | cut -d: -f2- | egrep -v 'gitInfo|bin|.git|updateGitVersion|.o' | head -n 1"
RDATE=`eval $RDATE1`
NEWDATE=$(sed "s/-//g" <<< $RDATE | awk '{print $1;}')
NEWDATE=${NEWDATE/#/0x}
#get old date from INCLFILE
OLDDATE=$(more $INCLFILE | grep '#define SVNDATE' | awk '{print $3}')
#update INCLFILE if changes
if [ "$OLDDATE" != "$NEWDATE" ]; then
echo Path: ${MAINDIR}/${SPECDIR} $'\n'URL: ${GITREPO} $'\n'Repository Root: ${GITREPO} $'\n'Repsitory UUID: ${REPUID} $'\n'Revision: ${FOLDERREV} $'\n'Branch: ${BRANCH} $'\n'Last Changed Author: ${AUTH1}_${AUTH2} $'\n'Last Changed Rev: ${REV} $'\n'Last Changed Date: ${RDATE} > gitInfo.txt
cd ../../
./genVersionHeader.sh $SPECDIR/gitInfo.txt $SPECDIR/$TMPFILE $SPECDIR/$INCLFILE
cd $WD
fi

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#ifndef __XFS_TYPES_H__
#define __XFS_TYPES_H__
//#include "types.h"
#include <stdint.h>
/******************************************************************************/
/* types */
/******************************************************************************/
typedef unsigned int xfs_u32;
typedef unsigned short xfs_u16;
typedef unsigned char xfs_u8;
typedef signed int xfs_i32;
typedef signed short xfs_i16;
typedef signed char xfs_i8;
// UDP Header
struct udp_header_type
{
// ethternet frame (14 byte)
uint8_t dst_mac[6];
uint8_t src_mac[6];
uint8_t len_type[2];
// ip header (20 byte)
uint8_t ver_headerlen[1];
uint8_t service_type[1];
uint8_t total_length[2];
uint8_t identification[2];
uint8_t flags[1];
uint8_t frag_offset[1];
uint8_t time_to_live[1];
uint8_t protocol[1];
uint8_t ip_header_checksum[2];
uint8_t src_ip[4];
uint8_t dst_ip[4];
// udp header (8 byte)
uint8_t src_port[2];
uint8_t dst_port[2];
uint8_t udp_message_len[2];
uint8_t udp_checksum[2];
};
#endif // __XFS_TYPES_H__

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/* ONLY THOSE ARE USED IN THIS SOFTWARE. If one of those is modified in xilinx compilation, this file should be replaced with updated values
XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT_BASEADDR
XPAR_PLB_LL_FIFO_AURORA_RX4_TX1_RIGHT_BASEADDR
XPAR_PLB_LL_FIFO_AURORA_RX4_TX1_LEFT_BASEADDR
XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_BASEADDR
XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT_BASEADDR
XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_BASEADDR
*/
/*******************************************************************
*
* CAUTION: This file is automatically generated by libgen.
* Version: Xilinx EDK 12.4 EDK_MS4.81d
* DO NOT EDIT.
*
* Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved.
*
* Description: Driver parameters
*
*******************************************************************/
#define STDIN_BASEADDRESS 0xC0000000
#define STDOUT_BASEADDRESS 0xC0000000
/******************************************************************/
/* Definitions for peripheral BB_IO_SHIFT_REG_PPC440 */
#define XPAR_BB_IO_SHIFT_REG_PPC440_BASEADDR 0xD3000000
#define XPAR_BB_IO_SHIFT_REG_PPC440_HIGHADDR 0xD300FFFF
/* Definitions for peripheral EIGER_BEB_SYNCH_IO_PPC440 */
#define XPAR_EIGER_BEB_SYNCH_IO_PPC440_BASEADDR 0xD3100000
#define XPAR_EIGER_BEB_SYNCH_IO_PPC440_HIGHADDR 0xD310FFFF
/* Definitions for peripheral PLB_BRAM_10G */
#define XPAR_PLB_BRAM_10G_MEM0_BASEADDR 0xD4100000
#define XPAR_PLB_BRAM_10G_MEM0_HIGHADDR 0xD410FFFF
/* Definitions for peripheral PLB_BRAM_TEMAC */
#define XPAR_PLB_BRAM_TEMAC_MEM0_BASEADDR 0xD4000000
#define XPAR_PLB_BRAM_TEMAC_MEM0_HIGHADDR 0xD400FFFF
/* Definitions for peripheral PLB_GPIO_SYS */
#define XPAR_PLB_GPIO_SYS_BASEADDR 0xD1000000
#define XPAR_PLB_GPIO_SYS_HIGHADDR 0xD100FFFF
/** Command Generator */
#define XPAR_CMD_GENERATOR 0xC5000000
/** Version Numbers */
#define XPAR_VERSION 0xc6000000
/* Definitions for peripheral PLB_GPIO_TEST */
#define XPAR_PLB_GPIO_TEST_BASEADDR 0xD1010000
#define XPAR_PLB_GPIO_TEST_HIGHADDR 0xD101FFFF
/* Definitions for packet, frame and delay down counters */
#define XPAR_COUNTER_BASEADDR 0xD1020000
#define XPAR_COUNTER_HIGHADDR 0xD102FFFF
/* Definitions for peripheral PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT */
#define XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_BASEADDR 0xC4100000
#define XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_HIGHADDR 0xC410FFFF
/* Definitions for a new memory */
//#define XPAR_PLB_LL_NEW_MEMORY 0xD1000000//0xD1000084//0xC4200000
/* Definitions for peripheral PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT */
#define XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT_BASEADDR 0xC4110000
#define XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT_HIGHADDR 0xC411FFFF
/* Definitions for peripheral PLB_LL_FIFO_AURORA_RX4_TX1_LEFT */
#define XPAR_PLB_LL_FIFO_AURORA_RX4_TX1_LEFT_BASEADDR 0xC4120000
#define XPAR_PLB_LL_FIFO_AURORA_RX4_TX1_LEFT_HIGHADDR 0xC412FFFF
/* Definitions for peripheral PLB_LL_FIFO_AURORA_RX4_TX1_RIGHT */
#define XPAR_PLB_LL_FIFO_AURORA_RX4_TX1_RIGHT_BASEADDR 0xC4130000
#define XPAR_PLB_LL_FIFO_AURORA_RX4_TX1_RIGHT_HIGHADDR 0xC413FFFF
/* Definitions for peripheral PLB_LL_FIFO_XAUI_10G */
#define XPAR_PLB_LL_FIFO_XAUI_10G_BASEADDR 0xC4140000
#define XPAR_PLB_LL_FIFO_XAUI_10G_HIGHADDR 0xC414FFFF
/* Definitions for peripheral PLB_V46_CPU_TO_PLB_V46_BRIDGED */
#define XPAR_PLB_V46_CPU_TO_PLB_V46_BRIDGED_BRIDGE_BASEADDR 0xCFFF0000
#define XPAR_PLB_V46_CPU_TO_PLB_V46_BRIDGED_BRIDGE_HIGHADDR 0xCFFFFFFF
#define XPAR_PLB_V46_CPU_TO_PLB_V46_BRIDGED_RNG0_BASEADDR 0xD0000000
#define XPAR_PLB_V46_CPU_TO_PLB_V46_BRIDGED_RNG0_HIGHADDR 0xDFFFFFFF
/* Definitions for peripheral PPC_SRAM */
#define XPAR_PPC_SRAM_BASEADDR 0x00000000
#define XPAR_PPC_SRAM_HIGHADDR 0x01FFFFFF
/******************************************************************/
/* Definitions for peripheral PFLASH */
#define XPAR_PFLASH_NUM_BANKS_MEM 1
/******************************************************************/
/* Definitions for peripheral PFLASH */
#define XPAR_PFLASH_MEM0_BASEADDR 0xE0000000
#define XPAR_PFLASH_MEM0_HIGHADDR 0xE3FFFFFF
/******************************************************************/
/* Canonical definitions for peripheral PFLASH */
#define XPAR_EMC_0_NUM_BANKS_MEM 1
#define XPAR_EMC_0_MEM0_BASEADDR 0xE0000000
#define XPAR_EMC_0_MEM0_HIGHADDR 0xE3FFFFFF
/******************************************************************/
/* Definitions for driver PLB_SHT1X_IF */
#define XPAR_PLB_SHT1X_IF_NUM_INSTANCES 2
/* Definitions for peripheral PLB_SHT1X_IF_CH1 */
#define XPAR_PLB_SHT1X_IF_CH1_DEVICE_ID 0
#define XPAR_PLB_SHT1X_IF_CH1_BASEADDR 0xD2200000
#define XPAR_PLB_SHT1X_IF_CH1_HIGHADDR 0xD220FFFF
/* Definitions for peripheral PLB_SHT1X_IF_CH2 */
#define XPAR_PLB_SHT1X_IF_CH2_DEVICE_ID 1
#define XPAR_PLB_SHT1X_IF_CH2_BASEADDR 0xD2210000
#define XPAR_PLB_SHT1X_IF_CH2_HIGHADDR 0xD221FFFF
/******************************************************************/
/* Definitions for driver UARTLITE */
#define XPAR_XUARTLITE_NUM_INSTANCES 1
/* Definitions for peripheral RS232 */
#define XPAR_RS232_BASEADDR 0xC0000000
#define XPAR_RS232_HIGHADDR 0xC000FFFF
#define XPAR_RS232_DEVICE_ID 0
#define XPAR_RS232_BAUDRATE 115200
#define XPAR_RS232_USE_PARITY 0
#define XPAR_RS232_ODD_PARITY 0
#define XPAR_RS232_DATA_BITS 8
/******************************************************************/
/* Canonical definitions for peripheral RS232 */
#define XPAR_UARTLITE_0_DEVICE_ID XPAR_RS232_DEVICE_ID
#define XPAR_UARTLITE_0_BASEADDR 0xC0000000
#define XPAR_UARTLITE_0_HIGHADDR 0xC000FFFF
#define XPAR_UARTLITE_0_BAUDRATE 115200
#define XPAR_UARTLITE_0_USE_PARITY 0
#define XPAR_UARTLITE_0_ODD_PARITY 0
#define XPAR_UARTLITE_0_DATA_BITS 8
#define XPAR_UARTLITE_0_SIO_CHAN 1
/******************************************************************/
/* Definitions for driver SPI */
#define XPAR_XSPI_NUM_INSTANCES 2
/* Definitions for peripheral SPI_FLASH */
#define XPAR_SPI_FLASH_DEVICE_ID 0
#define XPAR_SPI_FLASH_BASEADDR 0xD2000000
#define XPAR_SPI_FLASH_HIGHADDR 0xD200FFFF
#define XPAR_SPI_FLASH_FIFO_EXIST 1
#define XPAR_SPI_FLASH_SPI_SLAVE_ONLY 0
#define XPAR_SPI_FLASH_NUM_SS_BITS 1
#define XPAR_SPI_FLASH_NUM_TRANSFER_BITS 8
/* Definitions for peripheral XPS_SPI_FEB_CFG */
#define XPAR_XPS_SPI_FEB_CFG_DEVICE_ID 1
#define XPAR_XPS_SPI_FEB_CFG_BASEADDR 0xD2010000
#define XPAR_XPS_SPI_FEB_CFG_HIGHADDR 0xD201FFFF
#define XPAR_XPS_SPI_FEB_CFG_FIFO_EXIST 1
#define XPAR_XPS_SPI_FEB_CFG_SPI_SLAVE_ONLY 0
#define XPAR_XPS_SPI_FEB_CFG_NUM_SS_BITS 2
#define XPAR_XPS_SPI_FEB_CFG_NUM_TRANSFER_BITS 8
/******************************************************************/
/* Canonical definitions for peripheral SPI_FLASH */
#define XPAR_SPI_0_DEVICE_ID XPAR_SPI_FLASH_DEVICE_ID
#define XPAR_SPI_0_BASEADDR 0xD2000000
#define XPAR_SPI_0_HIGHADDR 0xD200FFFF
#define XPAR_SPI_0_FIFO_EXIST 1
#define XPAR_SPI_0_SPI_SLAVE_ONLY 0
#define XPAR_SPI_0_NUM_SS_BITS 1
#define XPAR_SPI_0_NUM_TRANSFER_BITS 8
/* Canonical definitions for peripheral XPS_SPI_FEB_CFG */
#define XPAR_SPI_1_DEVICE_ID XPAR_XPS_SPI_FEB_CFG_DEVICE_ID
#define XPAR_SPI_1_BASEADDR 0xD2010000
#define XPAR_SPI_1_HIGHADDR 0xD201FFFF
#define XPAR_SPI_1_FIFO_EXIST 1
#define XPAR_SPI_1_SPI_SLAVE_ONLY 0
#define XPAR_SPI_1_NUM_SS_BITS 2
#define XPAR_SPI_1_NUM_TRANSFER_BITS 8
/******************************************************************/
/* Definitions for driver LLTEMAC */
#define XPAR_XLLTEMAC_NUM_INSTANCES 1
/* Definitions for peripheral TEMAC_INST Channel 0 */
#define XPAR_TEMAC_INST_CHAN_0_DEVICE_ID 0
#define XPAR_TEMAC_INST_CHAN_0_BASEADDR 0xC3000000
#define XPAR_TEMAC_INST_CHAN_0_HIGHADDR 0xC30FFFFF
#define XPAR_TEMAC_INST_CHAN_0_TXCSUM 0
#define XPAR_TEMAC_INST_CHAN_0_RXCSUM 0
#define XPAR_TEMAC_INST_CHAN_0_PHY_TYPE 4
#define XPAR_TEMAC_INST_CHAN_0_TXVLAN_TRAN 0
#define XPAR_TEMAC_INST_CHAN_0_RXVLAN_TRAN 0
#define XPAR_TEMAC_INST_CHAN_0_TXVLAN_TAG 0
#define XPAR_TEMAC_INST_CHAN_0_RXVLAN_TAG 0
#define XPAR_TEMAC_INST_CHAN_0_TXVLAN_STRP 0
#define XPAR_TEMAC_INST_CHAN_0_RXVLAN_STRP 0
#define XPAR_TEMAC_INST_CHAN_0_MCAST_EXTEND 0
/* Canonical definitions for peripheral TEMAC_INST Channel 0 */
#define XPAR_LLTEMAC_0_DEVICE_ID 0
#define XPAR_LLTEMAC_0_BASEADDR 0xC3000000
#define XPAR_LLTEMAC_0_HIGHADDR 0xC30FFFFF
#define XPAR_LLTEMAC_0_TXCSUM 0
#define XPAR_LLTEMAC_0_RXCSUM 0
#define XPAR_LLTEMAC_0_PHY_TYPE 4
#define XPAR_LLTEMAC_0_TXVLAN_TRAN 0
#define XPAR_LLTEMAC_0_RXVLAN_TRAN 0
#define XPAR_LLTEMAC_0_TXVLAN_TAG 0
#define XPAR_LLTEMAC_0_RXVLAN_TAG 0
#define XPAR_LLTEMAC_0_TXVLAN_STRP 0
#define XPAR_LLTEMAC_0_RXVLAN_STRP 0
#define XPAR_LLTEMAC_0_MCAST_EXTEND 0
#define XPAR_LLTEMAC_0_INTR 1
/* LocalLink TYPE Enumerations */
#define XPAR_LL_FIFO 1
#define XPAR_LL_DMA 2
/* Canonical LocalLink parameters for TEMAC_INST */
/******************************************************************/
/* Definitions for peripheral XPS_BRAM_IF_CNTLR_PPC440 */
#define XPAR_XPS_BRAM_IF_CNTLR_PPC440_BASEADDR 0xFFFC0000
#define XPAR_XPS_BRAM_IF_CNTLR_PPC440_HIGHADDR 0xFFFFFFFF
/******************************************************************/
#define XPAR_INTC_MAX_NUM_INTR_INPUTS 5
#define XPAR_XINTC_HAS_IPR 1
#define XPAR_XINTC_USE_DCR 0
/* Definitions for driver INTC */
#define XPAR_XINTC_NUM_INSTANCES 1
/* Definitions for peripheral XPS_INTC_PPC440 */
#define XPAR_XPS_INTC_PPC440_DEVICE_ID 0
#define XPAR_XPS_INTC_PPC440_BASEADDR 0xC1000000
#define XPAR_XPS_INTC_PPC440_HIGHADDR 0xC100FFFF
#define XPAR_XPS_INTC_PPC440_KIND_OF_INTR 0xFFFFFFF4
/******************************************************************/
#define XPAR_INTC_SINGLE_BASEADDR 0xC1000000
#define XPAR_INTC_SINGLE_HIGHADDR 0xC100FFFF
#define XPAR_INTC_SINGLE_DEVICE_ID XPAR_XPS_INTC_PPC440_DEVICE_ID
#define XPAR_XPS_LL_FIFO_TEMAC_IP2INTC_IRPT_MASK 0X000001
#define XPAR_XPS_INTC_PPC440_XPS_LL_FIFO_TEMAC_IP2INTC_IRPT_INTR 0
#define XPAR_TEMAC_INST_TEMACINTC0_IRPT_MASK 0X000002
#define XPAR_XPS_INTC_PPC440_TEMAC_INST_TEMACINTC0_IRPT_INTR 1
#define XPAR_XPS_TIMER_PPC440_INTERRUPT_MASK 0X000004
#define XPAR_XPS_INTC_PPC440_XPS_TIMER_PPC440_INTERRUPT_INTR 2
#define XPAR_SPI_FLASH_IP2INTC_IRPT_MASK 0X000008
#define XPAR_XPS_INTC_PPC440_SPI_FLASH_IP2INTC_IRPT_INTR 3
#define XPAR_RS232_INTERRUPT_MASK 0X000010
#define XPAR_XPS_INTC_PPC440_RS232_INTERRUPT_INTR 4
/******************************************************************/
/* Canonical definitions for peripheral XPS_INTC_PPC440 */
#define XPAR_INTC_0_DEVICE_ID XPAR_XPS_INTC_PPC440_DEVICE_ID
#define XPAR_INTC_0_BASEADDR 0xC1000000
#define XPAR_INTC_0_HIGHADDR 0xC100FFFF
#define XPAR_INTC_0_KIND_OF_INTR 0xFFFFFFF4
#define XPAR_INTC_0_LLFIFO_0_VEC_ID XPAR_XPS_INTC_PPC440_XPS_LL_FIFO_TEMAC_IP2INTC_IRPT_INTR
#define XPAR_INTC_0_LLTEMAC_0_VEC_ID XPAR_XPS_INTC_PPC440_TEMAC_INST_TEMACINTC0_IRPT_INTR
#define XPAR_INTC_0_TMRCTR_0_VEC_ID XPAR_XPS_INTC_PPC440_XPS_TIMER_PPC440_INTERRUPT_INTR
#define XPAR_INTC_0_SPI_0_VEC_ID XPAR_XPS_INTC_PPC440_SPI_FLASH_IP2INTC_IRPT_INTR
#define XPAR_INTC_0_UARTLITE_0_VEC_ID XPAR_XPS_INTC_PPC440_RS232_INTERRUPT_INTR
/******************************************************************/
/* Definitions for driver LLFIFO */
#define XPAR_XLLFIFO_NUM_INSTANCES 1
/* Definitions for peripheral XPS_LL_FIFO_TEMAC */
#define XPAR_XPS_LL_FIFO_TEMAC_DEVICE_ID 0
#define XPAR_XPS_LL_FIFO_TEMAC_BASEADDR 0xC4000000
#define XPAR_XPS_LL_FIFO_TEMAC_HIGHADDR 0xC400FFFF
/******************************************************************/
/* Canonical definitions for peripheral XPS_LL_FIFO_TEMAC */
#define XPAR_LLFIFO_0_DEVICE_ID XPAR_XPS_LL_FIFO_TEMAC_DEVICE_ID
#define XPAR_LLFIFO_0_BASEADDR 0xC4000000
#define XPAR_LLFIFO_0_HIGHADDR 0xC400FFFF
/******************************************************************/
/* Definitions for driver SYSMON */
#define XPAR_XSYSMON_NUM_INSTANCES 1
/* Definitions for peripheral XPS_SYSMON_ADC_PPC440 */
#define XPAR_XPS_SYSMON_ADC_PPC440_DEVICE_ID 0
#define XPAR_XPS_SYSMON_ADC_PPC440_BASEADDR 0xD0010000
#define XPAR_XPS_SYSMON_ADC_PPC440_HIGHADDR 0xD001FFFF
#define XPAR_XPS_SYSMON_ADC_PPC440_INCLUDE_INTR 1
/******************************************************************/
/* Canonical definitions for peripheral XPS_SYSMON_ADC_PPC440 */
#define XPAR_SYSMON_0_DEVICE_ID XPAR_XPS_SYSMON_ADC_PPC440_DEVICE_ID
#define XPAR_SYSMON_0_BASEADDR 0xD0010000
#define XPAR_SYSMON_0_HIGHADDR 0xD001FFFF
#define XPAR_SYSMON_0_INCLUDE_INTR 1
/******************************************************************/
/* Definitions for driver TMRCTR */
#define XPAR_XTMRCTR_NUM_INSTANCES 1
/* Definitions for peripheral XPS_TIMER_PPC440 */
#define XPAR_XPS_TIMER_PPC440_DEVICE_ID 0
#define XPAR_XPS_TIMER_PPC440_BASEADDR 0xC2000000
#define XPAR_XPS_TIMER_PPC440_HIGHADDR 0xC200FFFF
/******************************************************************/
/* Canonical definitions for peripheral XPS_TIMER_PPC440 */
#define XPAR_TMRCTR_0_DEVICE_ID XPAR_XPS_TIMER_PPC440_DEVICE_ID
#define XPAR_TMRCTR_0_BASEADDR 0xC2000000
#define XPAR_TMRCTR_0_HIGHADDR 0xC200FFFF
/******************************************************************/
/* Definitions for bus frequencies */
#define XPAR_CPU_PPC440_MPLB_FREQ_HZ 100000000
/******************************************************************/
/* Canonical definitions for bus frequencies */
#define XPAR_PROC_BUS_0_FREQ_HZ 100000000
/******************************************************************/
#define XPAR_CPU_PPC440_CORE_CLOCK_FREQ_HZ 400000000
#define XPAR_PPC440_VIRTEX5_CORE_CLOCK_FREQ_HZ 400000000
#define XPAR_CPU_PPC440_IDCR_BASEADDR 0x00000000
/******************************************************************/
#define XPAR_CPU_ID 0
#define XPAR_PPC440_VIRTEX5_ID 0
#define XPAR_PPC440_VIRTEX5_PIR 0b1111
#define XPAR_PPC440_VIRTEX5_ENDIAN_RESET 0
#define XPAR_PPC440_VIRTEX5_USER_RESET 0b0000
#define XPAR_PPC440_VIRTEX5_INTERCONNECT_IMASK 0xffffffff
#define XPAR_PPC440_VIRTEX5_ICU_RD_FETCH_PLB_PRIO 0b00
#define XPAR_PPC440_VIRTEX5_ICU_RD_SPEC_PLB_PRIO 0b00
#define XPAR_PPC440_VIRTEX5_ICU_RD_TOUCH_PLB_PRIO 0b00
#define XPAR_PPC440_VIRTEX5_DCU_RD_LD_CACHE_PLB_PRIO 0b00
#define XPAR_PPC440_VIRTEX5_DCU_RD_NONCACHE_PLB_PRIO 0b00
#define XPAR_PPC440_VIRTEX5_DCU_RD_TOUCH_PLB_PRIO 0b00
#define XPAR_PPC440_VIRTEX5_DCU_RD_URGENT_PLB_PRIO 0b00
#define XPAR_PPC440_VIRTEX5_DCU_WR_FLUSH_PLB_PRIO 0b00
#define XPAR_PPC440_VIRTEX5_DCU_WR_STORE_PLB_PRIO 0b00
#define XPAR_PPC440_VIRTEX5_DCU_WR_URGENT_PLB_PRIO 0b00
#define XPAR_PPC440_VIRTEX5_DMA0_PLB_PRIO 0b00
#define XPAR_PPC440_VIRTEX5_DMA1_PLB_PRIO 0b00
#define XPAR_PPC440_VIRTEX5_DMA2_PLB_PRIO 0b00
#define XPAR_PPC440_VIRTEX5_DMA3_PLB_PRIO 0b00
#define XPAR_PPC440_VIRTEX5_IDCR_BASEADDR 0x00000000
#define XPAR_PPC440_VIRTEX5_IDCR_HIGHADDR 0x000000FF
#define XPAR_PPC440_VIRTEX5_APU_CONTROL 0b00010000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_0 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_1 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_2 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_3 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_4 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_5 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_6 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_7 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_8 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_9 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_10 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_11 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_12 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_13 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_14 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_APU_UDI_15 0b000000000000000000000000
#define XPAR_PPC440_VIRTEX5_PPC440MC_ADDR_BASE 0x00000000
#define XPAR_PPC440_VIRTEX5_PPC440MC_ADDR_HIGH 0X01FFFFFF
#define XPAR_PPC440_VIRTEX5_PPC440MC_ROW_CONFLICT_MASK 0x00000000
#define XPAR_PPC440_VIRTEX5_PPC440MC_BANK_CONFLICT_MASK 0x00000000
#define XPAR_PPC440_VIRTEX5_PPC440MC_CONTROL 0X8140008F
#define XPAR_PPC440_VIRTEX5_PPC440MC_PRIO_ICU 4
#define XPAR_PPC440_VIRTEX5_PPC440MC_PRIO_DCUW 3
#define XPAR_PPC440_VIRTEX5_PPC440MC_PRIO_DCUR 2
#define XPAR_PPC440_VIRTEX5_PPC440MC_PRIO_SPLB1 0
#define XPAR_PPC440_VIRTEX5_PPC440MC_PRIO_SPLB0 1
#define XPAR_PPC440_VIRTEX5_PPC440MC_ARB_MODE 0
#define XPAR_PPC440_VIRTEX5_PPC440MC_MAX_BURST 8
#define XPAR_PPC440_VIRTEX5_MPLB_AWIDTH 32
#define XPAR_PPC440_VIRTEX5_MPLB_DWIDTH 128
#define XPAR_PPC440_VIRTEX5_MPLB_NATIVE_DWIDTH 128
#define XPAR_PPC440_VIRTEX5_MPLB_COUNTER 0x00000500
#define XPAR_PPC440_VIRTEX5_MPLB_PRIO_ICU 4
#define XPAR_PPC440_VIRTEX5_MPLB_PRIO_DCUW 3
#define XPAR_PPC440_VIRTEX5_MPLB_PRIO_DCUR 2
#define XPAR_PPC440_VIRTEX5_MPLB_PRIO_SPLB1 0
#define XPAR_PPC440_VIRTEX5_MPLB_PRIO_SPLB0 1
#define XPAR_PPC440_VIRTEX5_MPLB_ARB_MODE 0
#define XPAR_PPC440_VIRTEX5_MPLB_SYNC_TATTRIBUTE 0
#define XPAR_PPC440_VIRTEX5_MPLB_MAX_BURST 8
#define XPAR_PPC440_VIRTEX5_MPLB_ALLOW_LOCK_XFER 1
#define XPAR_PPC440_VIRTEX5_MPLB_READ_PIPE_ENABLE 1
#define XPAR_PPC440_VIRTEX5_MPLB_WRITE_PIPE_ENABLE 1
#define XPAR_PPC440_VIRTEX5_MPLB_WRITE_POST_ENABLE 1
#define XPAR_PPC440_VIRTEX5_MPLB_P2P 0
#define XPAR_PPC440_VIRTEX5_MPLB_WDOG_ENABLE 1
#define XPAR_PPC440_VIRTEX5_SPLB0_AWIDTH 32
#define XPAR_PPC440_VIRTEX5_SPLB0_DWIDTH 128
#define XPAR_PPC440_VIRTEX5_SPLB0_NATIVE_DWIDTH 128
#define XPAR_PPC440_VIRTEX5_SPLB0_SUPPORT_BURSTS 1
#define XPAR_PPC440_VIRTEX5_SPLB0_USE_MPLB_ADDR 0
#define XPAR_PPC440_VIRTEX5_SPLB0_NUM_MPLB_ADDR_RNG 0
#define XPAR_PPC440_VIRTEX5_SPLB0_RNG_MC_BASEADDR 0xFFFFFFFF
#define XPAR_PPC440_VIRTEX5_SPLB0_RNG_MC_HIGHADDR 0x00000000
#define XPAR_PPC440_VIRTEX5_SPLB0_RNG0_MPLB_BASEADDR 0xFFFFFFFF
#define XPAR_PPC440_VIRTEX5_SPLB0_RNG0_MPLB_HIGHADDR 0x00000000
#define XPAR_PPC440_VIRTEX5_SPLB0_RNG1_MPLB_BASEADDR 0xFFFFFFFF
#define XPAR_PPC440_VIRTEX5_SPLB0_RNG1_MPLB_HIGHADDR 0x00000000
#define XPAR_PPC440_VIRTEX5_SPLB0_RNG2_MPLB_BASEADDR 0xFFFFFFFF
#define XPAR_PPC440_VIRTEX5_SPLB0_RNG2_MPLB_HIGHADDR 0x00000000
#define XPAR_PPC440_VIRTEX5_SPLB0_RNG3_MPLB_BASEADDR 0xFFFFFFFF
#define XPAR_PPC440_VIRTEX5_SPLB0_RNG3_MPLB_HIGHADDR 0x00000000
#define XPAR_PPC440_VIRTEX5_SPLB0_NUM_MASTERS 1
#define XPAR_PPC440_VIRTEX5_SPLB0_MID_WIDTH 1
#define XPAR_PPC440_VIRTEX5_SPLB0_ALLOW_LOCK_XFER 1
#define XPAR_PPC440_VIRTEX5_SPLB0_READ_PIPE_ENABLE 1
#define XPAR_PPC440_VIRTEX5_SPLB0_PROPAGATE_MIRQ 0
#define XPAR_PPC440_VIRTEX5_SPLB0_P2P -1
#define XPAR_PPC440_VIRTEX5_SPLB1_AWIDTH 32
#define XPAR_PPC440_VIRTEX5_SPLB1_DWIDTH 128
#define XPAR_PPC440_VIRTEX5_SPLB1_NATIVE_DWIDTH 128
#define XPAR_PPC440_VIRTEX5_SPLB1_SUPPORT_BURSTS 1
#define XPAR_PPC440_VIRTEX5_SPLB1_USE_MPLB_ADDR 0
#define XPAR_PPC440_VIRTEX5_SPLB1_NUM_MPLB_ADDR_RNG 0
#define XPAR_PPC440_VIRTEX5_SPLB1_RNG_MC_BASEADDR 0xFFFFFFFF
#define XPAR_PPC440_VIRTEX5_SPLB1_RNG_MC_HIGHADDR 0x00000000
#define XPAR_PPC440_VIRTEX5_SPLB1_RNG0_MPLB_BASEADDR 0xFFFFFFFF
#define XPAR_PPC440_VIRTEX5_SPLB1_RNG0_MPLB_HIGHADDR 0x00000000
#define XPAR_PPC440_VIRTEX5_SPLB1_RNG1_MPLB_BASEADDR 0xFFFFFFFF
#define XPAR_PPC440_VIRTEX5_SPLB1_RNG1_MPLB_HIGHADDR 0x00000000
#define XPAR_PPC440_VIRTEX5_SPLB1_RNG2_MPLB_BASEADDR 0xFFFFFFFF
#define XPAR_PPC440_VIRTEX5_SPLB1_RNG2_MPLB_HIGHADDR 0x00000000
#define XPAR_PPC440_VIRTEX5_SPLB1_RNG3_MPLB_BASEADDR 0xFFFFFFFF
#define XPAR_PPC440_VIRTEX5_SPLB1_RNG3_MPLB_HIGHADDR 0x00000000
#define XPAR_PPC440_VIRTEX5_SPLB1_NUM_MASTERS 1
#define XPAR_PPC440_VIRTEX5_SPLB1_MID_WIDTH 1
#define XPAR_PPC440_VIRTEX5_SPLB1_ALLOW_LOCK_XFER 1
#define XPAR_PPC440_VIRTEX5_SPLB1_READ_PIPE_ENABLE 1
#define XPAR_PPC440_VIRTEX5_SPLB1_PROPAGATE_MIRQ 0
#define XPAR_PPC440_VIRTEX5_SPLB1_P2P -1
#define XPAR_PPC440_VIRTEX5_NUM_DMA 0
#define XPAR_PPC440_VIRTEX5_DMA0_TXCHANNELCTRL 0x01010000
#define XPAR_PPC440_VIRTEX5_DMA0_RXCHANNELCTRL 0x01010000
#define XPAR_PPC440_VIRTEX5_DMA0_CONTROL 0b00000000
#define XPAR_PPC440_VIRTEX5_DMA0_TXIRQTIMER 0b1111111111
#define XPAR_PPC440_VIRTEX5_DMA0_RXIRQTIMER 0b1111111111
#define XPAR_PPC440_VIRTEX5_DMA1_TXCHANNELCTRL 0x01010000
#define XPAR_PPC440_VIRTEX5_DMA1_RXCHANNELCTRL 0x01010000
#define XPAR_PPC440_VIRTEX5_DMA1_CONTROL 0b00000000
#define XPAR_PPC440_VIRTEX5_DMA1_TXIRQTIMER 0b1111111111
#define XPAR_PPC440_VIRTEX5_DMA1_RXIRQTIMER 0b1111111111
#define XPAR_PPC440_VIRTEX5_DMA2_TXCHANNELCTRL 0x01010000
#define XPAR_PPC440_VIRTEX5_DMA2_RXCHANNELCTRL 0x01010000
#define XPAR_PPC440_VIRTEX5_DMA2_CONTROL 0b00000000
#define XPAR_PPC440_VIRTEX5_DMA2_TXIRQTIMER 0b1111111111
#define XPAR_PPC440_VIRTEX5_DMA2_RXIRQTIMER 0b1111111111
#define XPAR_PPC440_VIRTEX5_DMA3_TXCHANNELCTRL 0x01010000
#define XPAR_PPC440_VIRTEX5_DMA3_RXCHANNELCTRL 0x01010000
#define XPAR_PPC440_VIRTEX5_DMA3_CONTROL 0b00000000
#define XPAR_PPC440_VIRTEX5_DMA3_TXIRQTIMER 0b1111111111
#define XPAR_PPC440_VIRTEX5_DMA3_RXIRQTIMER 0b1111111111
#define XPAR_PPC440_VIRTEX5_DCR_AUTOLOCK_ENABLE 1
#define XPAR_PPC440_VIRTEX5_PPCDM_ASYNCMODE 0
#define XPAR_PPC440_VIRTEX5_PPCDS_ASYNCMODE 0
#define XPAR_PPC440_VIRTEX5_GENERATE_PLB_TIMESPECS 1
#define XPAR_PPC440_VIRTEX5_HW_VER "1.01.a"
/******************************************************************/

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#include "externPostProcessing.h"
#include <string>
#include <iostream>
#include <fstream>
#include <iomanip>
#include <cstring>
#include <string>
#include <sstream>
#include <queue>
#include <math.h>
using namespace std;
int externPostProcessing::InitDataset(int *nModules,int *chPerMod,int moduleMask[],int badChans[], double ffcoeff[], double fferr[], double* tDead, double angRadius[], double angOffset[], double angCentre[], double* totalOffset, double* binSize, double *sampleX, double *sampleY)
{
init_dataset(nModules,chPerMod,moduleMask,badChans,ffcoeff,fferr,tDead,angRadius,angOffset,angCentre,totalOffset,binSize,sampleX,sampleY);
return 0;
}
int externPostProcessing::finalizeDataset(double ang[], double val[], double err[], int *np)
{
finalize_dataset(ang, val, err, np);
return 0;
};
int addFrame(double data[], double *pos, double *IO, double *expTime, const char *filename, int *var)
{
add_frame(data, pos, i0, expTime, filename, var);
return 0;
};
int calculateFlatField(int* nModules, int *chPerMod, int modMask[], int badChanMask[], double data[], double ffCoeff[], double ffErr[])
{
calculate_flat_field(nModules, chPerMod, modMask, badChanMask, data, ffCoeff, ffErr);
return 0;
};

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#ifndef EXTERNPOSTPROCESSING_H
#define EXTERNPOSTPROCESSING_H
#include "detectorData.h"
#include <string>
#include <iostream>
#include <fstream>
#include <iomanip>
#include <cstring>
#include <string>
#include <sstream>
#include <queue>
#include <math.h>
using namespace std;
extern "C" {
void init_dataset(int *nMod, int *chPerMod, int* modMask, int *badChanMask, double *ffCoeff, double *ffErr, double *tDead, int *dir, double *angRadius, double *angOffset, double *angCenter, double *totalOff, double *binSize, double * sampleX, double* sampleY);
void finalize_dataset(double *outang, double *outval, double *outerr, int *np);
void add_frame(double *data, double *pos, double *i0, double *exptime, char *fn, double *var);
void calculate_flat_field(int *nMod, int *chPerMod, int *modMask,int *badChanMask, double *data, double *ffc, double *fferr);
}
class externPostProcessing
{
public:
externPostProcessing(){};
virtual ~externPostProcessing(){};
static int InitDataset(int *nModules,int *chPerMod,int moduleMask[],int badChans[], double ffcoeff[], double fferr[], double* tDead, int *dir, double angRadius[], double angOffset[], double angCentre[], double* totalOffset, double* binSize, double *sampleX, double *sampleY);
static int finalizeDataset(double ang[], double val[], double err[], int *np);
static int addFrame(double data[], double *pos, double *IO, double *expTime, const char *filename, int *var=0);
static int calculateFlatField(int* nModules, int *chPerMod, int moduleMask[], int badChannelMask[], double ffData[], double ffCoeff[], double ffErr[]);
};
#endif

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module ax
USE,INTRINSIC :: ISO_C_BINDING
IMPLICIT NONE
integer(C_LONG) :: numberofmodules,totalnumberofchannels
real(C_DOUBLE) :: numberofbins
real(C_DOUBLE) :: bincenter(360000), binvalue(360000), binerror(360000)
contains
subroutine initdataset(nmodules, chpmod, modulemask,badchanmask,ffcoeff,fferr,tdead,angradius,angoffset,angcenter, totaloffset, binsize, samplex, sampley) bind(c, name='init_dataset')
IMPLICIT NONE
integer(C_LONG), intent(IN) :: nmodules, chpmod
integer(C_LONG), intent(IN) :: modulemask(nmodules), badchanmask(nmodules*chpmod)
real(C_DOUBLE), intent(IN) :: ffcoeff(nmodules*chpmod), fferr(nmodules*chpmod)
real(C_DOUBLE), intent(IN) :: tdead, totaloffset,binsize, samplex, sampley
real(C_DOUBLE), intent(IN) :: angradius(nmodules), angoffset(nmodules), angcenter(nmodules)
integer(C_LONG) :: i
print*,'init dataset'
numberofmodules=nmodules
print*,'Number of modules:'
print*,numberofmodules
print*,'Channels per module:'
print*,chpmod
totalnumberofchannels=nmodules*chpmod
print*,'Total number of channels:'
print*,totalnumberofchannels
print*,'Modulemask:'
do i=1,nmodules
print*,i,modulemask(i)
enddo
print*,'Badchannelmask:'
do i=1,nmodules*chpmod
print*,i,badchanmask(i)
enddo
print*,'Flat field coefficients:'
do i=1,nmodules*chpmod
print*,i,ffcoeff(i),'+-',fferr(i)
enddo
print*,'Tdead:'
print*,tdead
print*,'Angular conversion coefficients:'
do i=1,nmodules
print*,i,angradius(i),angoffset(i),angcenter(i)
enddo
print*,'Total offset:'
print*,totaloffset
print*,'Bin size:'
print*,binsize
numberofbins=360./binsize
print*,'Sample displacement:'
print*,samplex, sampley
end subroutine initdataset
subroutine resetdataset() bind(c, name='resetDataset')
IMPLICIT NONE
print*,'reset dataset'
end subroutine resetdataset
subroutine finalizedataset(outang, outval, outerr, outnpoints) bind(c, name='finalize_dataset')
IMPLICIT NONE
integer(C_LONG), intent(OUT) :: outnpoints
real(C_DOUBLE), intent(OUT) :: outang(*), outval(*), outerr(*)
integer(C_LONG) :: i
print*,'finalize dataset'
outnpoints=numberofbins
print*,'returning points:'
do i=1,numberofbins
outang(i)=i;
outval(i)=i*100;
outerr(i)=i*0.1
print*,i,outang(i),outval(i),outerr(i)
enddo
end subroutine finalizedataset
subroutine addframe(data, pos, i0, exptime, fname, var) bind(c, name='add_frame')
IMPLICIT NONE
real(C_DOUBLE), intent(IN) :: data(totalnumberofchannels)
real(C_DOUBLE), intent(IN) :: pos, i0, exptime, var
character(kind=c_char), dimension(*), intent(IN) :: fname
integer :: l
integer :: i
l=0
do
if (fname(l+1) == C_NULL_CHAR) exit
l = l + 1
end do
print*,'add frame'
print*,'Filename: '
print*,fname(1:l)
print*,'Position: '
print*,pos
print*,'I0: '
print*,i0
print*,'Exposure time: '
print*,exptime
print*,'Var: '
print*,var
print*,'Data: '
print*,data
end subroutine addframe
subroutine calculateflatfield(nmodules, chpmod, modulemask, badchanmask,data, ffcoeff,fferr) bind(c, name='calculate_flat_field')
IMPLICIT NONE
integer(C_LONG), intent(IN) :: nmodules, chpmod
integer(C_LONG), intent(IN) :: modulemask(nmodules), badchanmask(nmodules*chpmod)
real(C_DOUBLE), intent(IN) :: data(nmodules*chpmod)
real(C_DOUBLE), intent(OUT) :: ffcoeff(*),fferr(*)
integer(C_LONG) :: i
real(C_DOUBLE) :: ave;
print*,'calculate flat field'
do i=1,nmodules*chpmod
ffcoeff(i)=data(i)*10.
fferr(i)=i
print*,i,data(i), ffcoeff(i),fferr(i)
enddo
end subroutine calculateflatfield
end module ax

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Path: slsDetectorsPackage/slsDetectorSoftware
URL: origin git@git.psi.ch:sls_detectors_software/sls_detector_software.git
Repository Root: origin git@git.psi.ch:sls_detectors_software/sls_detector_software.git
Repsitory UUID: ea284699983c3811852b1bcea3708d952803020d
Revision: 1611
Branch: zmqchange
Last Changed Author: Dhanya_Maliakal
Last Changed Rev: 1619
Last Changed Date: 2017-11-27 14:45:39.000000002 +0100 ./slsDetector/slsDetectorBase.h

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AXIS_BUILDTYPE ?= cris-axis-linux-gnu

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../slsDetectorServer/AD9257.h

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# $Id: Makefile,v 1.1.1.1 2006/02/04 03:35:01 freza Exp $
# first compile
# make cris-axis-linux-gnu
CROSS = bfin-uclinux-
CC = $(CROSS)gcc
CFLAGS += -Wall -DGOTTHARDD -DMCB_FUNCS -DDACS_INT -DDEBUG # -DVERBOSE #-DVERYVERBOSE #-DVIRTUAL #-DDACS_INT_CSERVER
PROGS= gotthardDetectorServer
INSTDIR= /tftpboot
INSTMODE= 0777
BINS = testlib_sharedlibc
SRCS = server.c firmware_funcs.c server_funcs.c communication_funcs.c mcb_funcs.c trimming_funcs.c sharedmemory.c
OBJS = $(SRCS:%.c=%.o)
all: clean versioning $(PROGS)
boot: $(OBJS)
versioning:
@echo `tput setaf 6; ./updateGitVersion.sh; tput sgr0;`
$(PROGS): $(OBJS)
# echo $(OBJS)
$(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@)
install: $(PROGS)
$(INSTALL) -d $(INSTDIR)
$(INSTALL) -m $(INSTMODE) $(PROGS) $(INSTDIR)
romfs:
$(ROMFSINST) /bin/$(PROGS)
clean:
rm -rf $(PROGS) *.o *.gdb

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# $Id: Makefile,v 1.1.1.1 2006/02/04 03:35:01 freza Exp $
# first compile
# make cris-axis-linux-gnu
CROSS = bfin-uclinux-
CC = $(CROSS)gcc
CFLAGS += -Wall -DGOTTHARDD -DPROPIXD -DMCB_FUNCS -DDACS_INT -DDEBUG # -DVERBOSE #-DVERYVERBOSE #-DVIRTUAL #-DDACS_INT_CSERVER
PROGS= propixDetectorServer
INSTDIR= /tftpboot
INSTMODE= 0777
BINS = testlib_sharedlibc
SRCS = server.c server_funcs.c communication_funcs.c firmware_funcs.c mcb_funcs.c trimming_funcs.c sharedmemory.c
OBJS = $(SRCS:%.c=%.o)
all: clean $(PROGS)
boot: $(OBJS)
$(PROGS): $(OBJS)
echo $(OBJS)
@echo `tput setaf 6; ./updateGitVersion.sh; tput sgr0;`
$(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@)
install: $(PROGS)
$(INSTALL) -d $(INSTDIR)
$(INSTALL) -m $(INSTMODE) $(PROGS) $(INSTDIR)
romfs:
$(ROMFSINST) /bin/$(PROGS)
clean:
rm -rf $(PROGS) *.o *.gdb

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DESTDIR ?= ./
CC = gcc
CFLAGS += -Wall -DGOTTHARDD -DMCB_FUNCS -DDACS_INT -DDEBUG -DVIRTUAL
PROGS= $(DESTDIR)/gotthardVirtualServer
SRCS = server.c server_funcs.c communication_funcs.c firmware_funcs.c mcb_funcs.c trimming_funcs.c sharedmemory.c
OBJS = $(SRCS:%.c=%.o)
gotthardVirtualServer = $(PROGS)
all: clean $(PROGS)
$(PROGS): $(OBJS)
$(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@)
clean:
rm -rf $(PROGS) *.o *.gdb

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../../slsReceiverSoftware/include/ansi.h

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../slsDetectorServer/commonServerFunctions.h

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../commonFiles/communication_funcs.c

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../commonFiles/communication_funcs.h

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#masterflags (no_master, is_master, is_slave)
masterflags no_master
#master default delay
masterdefaultdelay 70
#patternphase
patternphase 0
#adcphase
adcphase 0
#slave pattern phase
slavepatternphase 0
#slave adc phase
slaveadcphase 0
#rst to sw1 delay
rsttosw1delay 2

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#ifndef FIRMWARE_FUNCS_H
#define FIRMWARE_FUNCS_H
#include "sls_detector_defs.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/mman.h>
#include <fcntl.h>
#include <stdarg.h>
#include <unistd.h>
//#include <asm/page.h>
#include <sys/mman.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <stdarg.h>
#include <unistd.h>
int mapCSP0(void);
u_int16_t bus_r16(u_int32_t offset);
u_int16_t bus_w16(u_int32_t offset, u_int16_t data);//aldos function
u_int32_t bus_w(u_int32_t offset, u_int32_t data);
u_int32_t bus_r(u_int32_t offset);
void setMasterSlaveConfiguration();
int setPhaseShiftOnce();
int setPhaseShift(int numphaseshift);
int cleanFifo();
int setDAQRegister();
u_int32_t putout(char *s, int modnum);
u_int32_t readin(int modnum);
u_int32_t setClockDivider(int d);
u_int32_t getClockDivider();
u_int32_t setSetLength(int d);
u_int32_t getSetLength();
u_int32_t setWaitStates(int d);
u_int32_t getWaitStates();
u_int32_t setTotClockDivider(int d);
u_int32_t getTotClockDivider();
u_int32_t setTotDutyCycle(int d);
u_int32_t getTotDutyCycle();
u_int32_t setExtSignal(int d, enum externalSignalFlag mode);
int getExtSignal(int d);
u_int32_t setFPGASignal(int d, enum externalSignalFlag mode);
int getFPGASignal(int d);
int setTiming(int t);
int setConfigurationRegister(int d);
int setToT(int d);
int setContinousReadOut(int d);
int startReceiver(int d);
int setDACRegister(int idac, int val, int imod);
int getTemperature(int tempSensor,int imod);
int initHighVoltage(int val,int imod);
int initConfGain(int isettings,int val,int imod);
int setADC(int adc);
int configureMAC(int ipad, long long int macad, long long int detectormacadd, int detipad, int ival, int udpport);
int getAdcConfigured();
u_int64_t getDetectorNumber();
u_int32_t getFirmwareVersion();
u_int32_t getFirmwareSVNVersion();
int testFifos(void);
u_int32_t testFpga(void);
u_int32_t testRAM(void);
int testBus(void);
int setDigitalTestBit(int ival);
int64_t set64BitReg(int64_t value, int aLSB, int aMSB);
int64_t get64BitReg(int aLSB, int aMSB);
int64_t setFrames(int64_t value);
int64_t getFrames();
int64_t setExposureTime(int64_t value);
int64_t getExposureTime();
int64_t setGates(int64_t value);
int64_t getGates();
int64_t setDelay(int64_t value);
int64_t getDelay();
int64_t setPeriod(int64_t value);
int64_t getPeriod();
int64_t setTrains(int64_t value);
int64_t getTrains();
int64_t setProbes(int64_t value);
int64_t getProbes();
int64_t getProgress();
int64_t setProgress();
int64_t getActualTime();
int64_t getMeasurementTime();
u_int32_t runBusy(void);
u_int32_t runState(void);
u_int32_t dataPresent(void);
int startStateMachine();
int stopStateMachine();
int startReadOut();
u_int32_t fifoReset(void);
u_int32_t fifoReadCounter(int fifonum);
u_int32_t fifoReadStatus();
u_int32_t fifo_full(void);
u_int32_t* fifo_read_event();
u_int32_t* decode_data(int* datain);
//u_int32_t move_data(u_int64_t* datain, u_int64_t* dataout);
int setDynamicRange(int dr);
int getDynamicRange();
int getNModBoard();
int setNMod(int n);
int setStoreInRAM(int b);
int allocateRAM();
int clearRAM();
int setMaster(int f);
int setSynchronization(int s);
int loadImage(int index, short int ImageVals[]);
int readCounterBlock(int startACQ, short int CounterVals[]);
int resetCounterBlock(int startACQ);
int calibratePedestal(int frames);
/*
u_int32_t setNBits(u_int32_t);
u_int32_t getNBits();
*/
/*
//move to mcb_funcs?
int readOutChan(int *val);
u_int32_t getModuleNumber(int modnum);
int testShiftIn(int imod);
int testShiftOut(int imod);
int testShiftStSel(int imod);
int testDataInOut(int num, int imod);
int testExtPulse(int imod);
int testExtPulseMux(int imod, int ow);
int testDataInOutMux(int imod, int ow, int num);
int testOutMux(int imod);
int testFpgaMux(int imod);
int calibration_sensor(int num, int *values, int *dacs) ;
int calibration_chip(int num, int *values, int *dacs);
*/
#endif

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Path: slsDetectorsPackage/slsDetectorSoftware/gotthardDetectorServer
URL: origin git@git.psi.ch:sls_detectors_software/sls_detector_software.git
Repository Root: origin git@git.psi.ch:sls_detectors_software/sls_detector_software.git
Repsitory UUID: c5777e517c451226e3275e6948895baee21a1f94
Revision: 210
Branch: gotthardfix
Last Changed Author: Dhanya_Maliakal
Last Changed Rev: 1585
Last Changed Date: 2017-11-09 13:57:04.000000002 +0100 ./server_funcs.c

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//#define SVNPATH ""
#define SVNURL "git@git.psi.ch:sls_detectors_software/sls_detector_software.git"
//#define SVNREPPATH ""
#define SVNREPUUID "c5777e517c451226e3275e6948895baee21a1f94"
//#define SVNREV 0x1585
//#define SVNKIND ""
//#define SVNSCHED ""
#define SVNAUTH "Dhanya_Maliakal"
#define SVNREV 0x1585
#define SVNDATE 0x20171109
//

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//#define SVNPATH ""
#define SVNURL ""
//#define SVNREPPATH ""
#define SVNREPUUID ""
//#define SVNREV ""
//#define SVNKIND ""
//#define SVNSCHED ""
#define SVNAUTH ""
#define SVNREV ""
#define SVNDATE ""
//

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#ifdef MCB_FUNCS
#ifndef MCB_FUNCS_H
#define MCB_FUNCS_H
#include "sls_detector_defs.h"
#define RGPRVALS {100,50,200}
#define RGSH1VALS {300,200,400}
#define RGSH2VALS {260,300,260}
// high,dynamic,low,medium,very high
#define CONF_GAIN {0,0, 0, 8, 6, 2, 1}//dynamic gain confgain yet to be figured out-probably 8 or 16
#define DEFAULTGAIN {11.66,9.32,14.99}
#define DEFAULTOFFSET {817.5,828.6,804.2}
// DAC definitions
enum dacsVal{VREF_DS, VCASCN_PB, VCASCP_PB, VOUT_CM, VCASC_OUT, VIN_CM, VREF_COMP, IB_TESTC,HIGH_VOLTAGE, CONFGAIN};
/* DAC adresses */
#define DACCS {0,0,1,1,2,2,3,3,4,4,5,5,6,6}
#define DACADDR {0,1,0,1,0,1,0,1,0,1,0,1,0,1}
//Register Definitions for temp,hv,dac gain
enum adcVals{TEMP_FPGA, TEMP_ADC};
//dynamic range
/*
#define MAX5523 commented out by dhanya
#ifndef MAX5523
#define MAX5533
#endif
#ifdef MAX5533
#define DAC_DR 4096
#endif
#ifdef MAX5523
*/
#define DAC_DR 1024
//#endif
//reference voltage
#define DAC_REFOUT1
#ifdef DAC_REFOUT2
#define DAC_MAX 2.425
#define DAC_REFOUT 2
#define DAC_REFOUT1
#endif
#ifdef DAC_REFOUT3
#define DAC_MAX 3.885
#define DAC_REFOUT 3
#define DAC_REFOUT1
#endif
#ifdef DAC_REFOUT0
#define DAC_MAX 1.214
#define DAC_REFOUT 0
#endif
#ifdef DAC_REFOUT1
#define DAC_MAX 1.940
#define DAC_REFOUT 1
#endif
/* dac calibration constants */
#define VA 1.11
#define CVTRIM 52.430851
#define BVTRIM -0.102022
#define AVTRIM 0.000050
#define PARTREF {100,1.55,-2.5,-2.5,0,-2.5}
#define PARTR1 {78,10,10,10,10,10}
#define PARTR2 {0,4.7,27,47,22,47}
//chip shiftin register meaning
#define OUTMUX_OFFSET 20
#define PROBES_OFFSET 4
#define OUTBUF_OFFSET 0
void showbits(int h);
int initDetector();
int copyChannel(sls_detector_channel *destChan, sls_detector_channel *srcChan);
int copyChip(sls_detector_chip *destChip, sls_detector_chip *srcChip);
int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod);
/* Register commands */
int clearDACSregister(int imod );
int nextDAC(int imod );
int clearCSregister(int imod );
int setCSregister(int imod );
int nextChip(int imod );
int firstChip(int imod );
int clearSSregister(int imod );
int setSSregister(int imod );
int nextStrip(int imod );
int selChannel(int strip,int imod );
int selChip(int chip,int imod );
int selMod(int mod,int imod );
/* DACs routines */
int program_one_dac(int addr, int value,int imod );
int set_one_dac(int imod);
int initDAC(int dac_addr, int value,int imod );
int initDACs(int* v,int imod );
int setSettings(int i,int imod);
int initDACbyIndex(int ind,int val, int imod);
int initDACbyIndexDACU(int ind,int val, int imod, int mV, int retval[]);
int getDACbyIndexDACU(int ind, int imod);
/* Other DAC index routines*/
int getTemperatureByModule(int tempSensor, int imod);
int initHighVoltageByModule(int val, int imod);
int initConfGainByModule(int isettings,int val,int imod);
/* Initialization*/
int initChannel(int ft,int cae, int ae, int coe, int ocoe, int counts,int imod );
int initChannelbyNumber(sls_detector_channel myChan);
int getChannelbyNumber(sls_detector_channel*);
int getTrimbit(int imod, int ichip, int ichan);
int initChip(int obe, int ow,int imod );
int initChipWithProbes(int obe, int ow,int nprobes, int imod);
//int getNProbes();
int initChipbyNumber(sls_detector_chip myChip);
int getChipbyNumber(sls_detector_chip*);
int initMCBregisters(int cm,int imod );
int initModulebyNumber(sls_detector_module);
int getModulebyNumber(sls_detector_module*);
/* To chips */
int clearCounter(int imod );
int clearOutReg(int imod);
int setOutReg(int imod );
int extPulse(int ncal,int imod );
int calPulse(int ncal,int imod );
int counterClear(int imod );
int countEnable(int imod );
int counterSet(int imod );
/* moved from firmware_funcs */
int readOutChan(int *val);
int getModuleNumber(int modnum);
int testShiftIn(int imod);
int testShiftOut(int imod);
int testShiftStSel(int imod);
int testDataInOut(int num, int imod);
int testExtPulse(int imod);
int testExtPulseMux(int imod, int ow);
int testDataInOutMux(int imod, int ow, int num);
int testOutMux(int imod);
int testFpgaMux(int imod);
int calibration_sensor(int num, int *values, int *dacs) ;
int calibration_chip(int num, int *values, int *dacs);
ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret);
#endif
#endif

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#ifndef REGISTERS_G_H
#define REGISTERS_G_H
#include "sls_detector_defs.h"
/* Definitions for FPGA*/
#define CSP0 0x20200000
#define MEM_SIZE 0x100000
/* values defined for FPGA */
#define MCSNUM 0x0
#define FIXED_PATT_VAL 0xacdc1980
#define FPGA_INIT_PAT 0x60008
#define FPGA_INIT_ADDR 0xb0000000
/* registers defined in FPGA */
#define PCB_REV_REG 0x2c<<11
#define GAIN_REG 0x10<<11
//#define FLOW_CONTROL_REG 0x11<<11
//#define FLOW_STATUS_REG 0x12<<11
//#define FRAME_REG 0x13<<11
#define MULTI_PURPOSE_REG 0x14<<11
#define DAQ_REG 0x15<<11
//#define TIME_FROM_START_REG 0x16<<11
#define MCB_CNTRL_REG_OFF 0x17<<11// control the dacs
//ADC
#define ADC_SPI_REG 0x18<<11
#define ADC_SERIAL_CLK_OUT_OFST (0)
#define ADC_SERIAL_CLK_OUT_MSK (0x00000001 << ADC_SERIAL_CLK_OUT_OFST)
#define ADC_SERIAL_DATA_OUT_OFST (1)
#define ADC_SERIAL_DATA_OUT_MSK (0x00000001 << ADC_SERIAL_DATA_OUT_OFST)
#define ADC_SERIAL_CS_OUT_OFST (2)
#define ADC_SERIAL_CS_OUT_MSK (0x0000000F << ADC_SERIAL_CS_OUT_OFST)
#define ADC_SYNC_REG 0x19<<11
//#define MUTIME_REG 0x1a<<11
//temperature
#define TEMP_IN_REG 0x1b<<11
#define TEMP_OUT_REG 0x1c<<11
//configure MAC
#define TSE_CONF_REG 0x1d<<11
#define ENET_CONF_REG 0x1e<<11
//#define WRTSE_SHAD_REG 0x1f<<11
//HV
#define HV_REG 0x20<<11
#define DUMMY_REG 0x21<<11
#define FPGA_VERSION_REG 0x22<<11
#define FIX_PATT_REG 0x23<<11
#define CONTROL_REG 0x24<<11
#define STATUS_REG 0x25<<11
#define CONFIG_REG 0x26<<11
#define EXT_SIGNAL_REG 0x27<<11
#define FPGA_SVN_REG 0x29<<11
#define CHIP_OF_INTRST_REG 0x2A<<11
//FIFO
#define LOOK_AT_ME_REG 0x28<<11
#define FIFO_DATA_REG_OFF 0x50<<11 ///////
//to read back dac registers
#define MOD_DACS1_REG 0x65<<11
#define MOD_DACS2_REG 0x66<<11
#define MOD_DACS3_REG 0x67<<11
//user entered
#define SET_DELAY_LSB_REG 0x68<<11
#define SET_DELAY_MSB_REG 0x69<<11
#define GET_DELAY_LSB_REG 0x6a<<11
#define GET_DELAY_MSB_REG 0x6b<<11
#define SET_TRAINS_LSB_REG 0x6c<<11
#define SET_TRAINS_MSB_REG 0x6d<<11
#define GET_TRAINS_LSB_REG 0x6e<<11
#define GET_TRAINS_MSB_REG 0x6f<<11
#define SET_FRAMES_LSB_REG 0x70<<11
#define SET_FRAMES_MSB_REG 0x71<<11
#define GET_FRAMES_LSB_REG 0x72<<11
#define GET_FRAMES_MSB_REG 0x73<<11
#define SET_PERIOD_LSB_REG 0x74<<11
#define SET_PERIOD_MSB_REG 0x75<<11
#define GET_PERIOD_LSB_REG 0x76<<11
#define GET_PERIOD_MSB_REG 0x77<<11
#define SET_EXPTIME_LSB_REG 0x78<<11
#define SET_EXPTIME_MSB_REG 0x79<<11
#define GET_EXPTIME_LSB_REG 0x7a<<11
#define GET_EXPTIME_MSB_REG 0x7b<<11
#define SET_GATES_LSB_REG 0x7c<<11
#define SET_GATES_MSB_REG 0x7d<<11
#define GET_GATES_LSB_REG 0x7e<<11
#define GET_GATES_MSB_REG 0x7f<<11
//image
#define DARK_IMAGE_REG 0x81<<11
#define GAIN_IMAGE_REG 0x82<<11
//counter block memory
#define COUNTER_MEMORY_REG 0x85<<11
#define GET_MEASUREMENT_TIME_LSB_REG 0x023000
#define GET_MEASUREMENT_TIME_MSB_REG 0x024000
#define GET_ACTUAL_TIME_LSB_REG 0x025000
#define GET_ACTUAL_TIME_MSB_REG 0x026000
//not used
//#define MCB_DOUT_REG_OFF 0x200000
//#define FIFO_CNTRL_REG_OFF 0x300000
//#define FIFO_COUNTR_REG_OFF 0x400000
//not used so far
//#define SPEED_REG 0x006000
//#define SET_NBITS_REG 0x008000
//not used
//#define GET_SHIFT_IN_REG 0x022000
#define SHIFTMOD 2
#define SHIFTFIFO 9
/** for PCB_REV_REG */
#define DETECTOR_TYPE_MASK 0xF0000
#define DETECTOR_TYPE_OFFSET 16
#define BOARD_REVISION_MASK 0xFFFF
#define MOENCH_MODULE 2
/* for control register */
#define START_ACQ_BIT 0x00000001
#define STOP_ACQ_BIT 0x00000002
#define START_FIFOTEST_BIT 0x00000004 // ?????
#define STOP_FIFOTEST_BIT 0x00000008 // ??????
#define START_READOUT_BIT 0x00000010
#define STOP_READOUT_BIT 0x00000020
#define START_EXPOSURE_BIT 0x00000040
#define STOP_EXPOSURE_BIT 0x00000080
#define START_TRAIN_BIT 0x00000100
#define STOP_TRAIN_BIT 0x00000200
#define SYNC_RESET 0x00000400
/* for status register */
#define RUN_BUSY_BIT 0x00000001
#define READOUT_BUSY_BIT 0x00000002
#define FIFOTEST_BUSY_BIT 0x00000004 //????
#define WAITING_FOR_TRIGGER_BIT 0x00000008
#define DELAYBEFORE_BIT 0x00000010
#define DELAYAFTER_BIT 0x00000020
#define EXPOSING_BIT 0x00000040
#define COUNT_ENABLE_BIT 0x00000080
#define READSTATE_0_BIT 0x00000100
#define READSTATE_1_BIT 0x00000200
#define READSTATE_2_BIT 0x00000400
#define RUNSTATE_0_BIT 0x00001000
#define RUNSTATE_1_BIT 0x00002000
#define RUNSTATE_2_BIT 0x00004000
#define SOME_FIFO_FULL_BIT 0x00008000 // error!
#define ALL_FIFO_EMPTY_BIT 0x00010000 // data ready
#define RUNMACHINE_BUSY_BIT 0x00020000
#define READMACHINE_BUSY_BIT 0x00040000
#define STOPPED_BIT 0x00100000
/* for fifo status register */
#define FIFO_ENABLED_BIT 0x80000000
#define FIFO_DISABLED_BIT 0x01000000
#define FIFO_ERROR_BIT 0x08000000
#define FIFO_EMPTY_BIT 0x04000000
#define FIFO_DATA_READY_BIT 0x02000000
#define FIFO_COUNTER_MASK 0x000001ff
#define FIFO_NM_MASK 0x00e00000
#define FIFO_NM_OFF 21
#define FIFO_NC_MASK 0x001ffe00
#define FIFO_NC_OFF 9
/* for config register *///not really used yet
#define TOT_ENABLE_BIT 0x00000002
#define TIMED_GATE_BIT 0x00000004
#define CONT_RO_ENABLE_BIT 0x00080000
#define CPU_OR_RECEIVER_BIT 0x00001000
/* for speed register */
#define CLK_DIVIDER_MASK 0x000000ff
#define CLK_DIVIDER_OFFSET 0
#define SET_LENGTH_MASK 0x00000f00
#define SET_LENGTH_OFFSET 8
#define WAIT_STATES_MASK 0x0000f000
#define WAIT_STATES_OFFSET 12
#define TOTCLK_DIVIDER_MASK 0xff000000
#define TOTCLK_DIVIDER_OFFSET 24
#define TOTCLK_DUTYCYCLE_MASK 0x00ff0000
#define TOTCLK_DUTYCYCLE_OFFSET 16
/* for external signal register */
#define SIGNAL_OFFSET 4
#define SIGNAL_MASK 0xF
#define EXT_SIG_OFF 0x0
#define EXT_GATE_IN_ACTIVEHIGH 0x1
#define EXT_GATE_IN_ACTIVELOW 0x2
#define EXT_TRIG_IN_RISING 0x3
#define EXT_TRIG_IN_FALLING 0x4
#define EXT_RO_TRIG_IN_RISING 0x5
#define EXT_RO_TRIG_IN_FALLING 0x6
#define EXT_GATE_OUT_ACTIVEHIGH 0x7
#define EXT_GATE_OUT_ACTIVELOW 0x8
#define EXT_TRIG_OUT_RISING 0x9
#define EXT_TRIG_OUT_FALLING 0xA
#define EXT_RO_TRIG_OUT_RISING 0xB
#define EXT_RO_TRIG_OUT_FALLING 0xC
/* for temperature register */
#define T1_CLK_BIT 0x00000001
#define T1_CS_BIT 0x00000002
#define T2_CLK_BIT 0x00000004
#define T2_CS_BIT 0x00000008
/* fifo control register */
#define FIFO_RESET_BIT 0x00000001
#define FIFO_DISABLE_TOGGLE_BIT 0x00000002
//chip shiftin register meaning
#define OUTMUX_OFF 20
#define OUTMUX_MASK 0x1f
#define PROBES_OFF 4
#define PROBES_MASK 0x7f
#define OUTBUF_OFF 0
#define OUTBUF_MASK 1
/* multi purpose register */
#define PHASE_STEP_BIT 0x00000001
#define PHASE_STEP_OFFSET 0
// #define xxx_BIT 0x00000002
#define RESET_COUNTER_BIT 0x00000004
#define RESET_COUNTER_OFFSET 2
//#define xxx_BIT 0x00000008
//#define xxx_BIT 0x00000010
#define SW1_BIT 0x00000020
#define SW1_OFFSET 5
#define WRITE_BACK_BIT 0x00000040
#define WRITE_BACK_OFFSET 6
#define RESET_BIT 0x00000080
#define RESET_OFFSET 7
#define PLL_CLK_SEL_MSK 0x00000700
#define PLL_CLK_SEL_OFFSET 8
#define PLL_CLK_SEL_MASTER_VAL ((0x1 << PLL_CLK_SEL_OFFSET) & PLL_CLK_SEL_MSK)
#define PLL_CLK_SEL_MASTER_ADC_VAL ((0x2 << PLL_CLK_SEL_OFFSET) & PLL_CLK_SEL_MSK)
#define PLL_CLK_SEL_SLAVE_VAL ((0x3 << PLL_CLK_SEL_OFFSET) & PLL_CLK_SEL_MSK)
#define PLL_CLK_SEL_SLAVE_ADC_VAL ((0x4 << PLL_CLK_SEL_OFFSET) & PLL_CLK_SEL_MSK)
#define ENET_RESETN_BIT 0x00000800
#define ENET_RESETN_OFFSET 11
#define INT_RSTN_BIT 0x00001000
#define INT_RSTN_OFFSET 12
#define DIGITAL_TEST_BIT 0x00004000
#define DIGITAL_TEST_OFFSET 14
//#define CHANGE_AT_POWER_ON_BIT 0x00008000
//#define CHANGE_AT_POWER_ON_OFFSET 15
#define RST_TO_SW1_DELAY_MSK 0x000F0000
#define RST_TO_SW1_DELAY_OFFSET 16
/* settings/conf gain register */
#define GAIN_MASK 0x000000ff
#define GAIN_OFFSET 0
#define SETTINGS_MASK 0x0000ff00
#define SETTINGS_OFFSET 8
/* CHIP_OF_INTRST_REG */
#define CHANNEL_MASK 0xffff0000
#define CHANNEL_OFFSET 16
#define ACTIVE_ADC_MASK 0x0000001f
/**ADC SYNC CLEAN FIFO*/
#define ADCSYNC_CLEAN_FIFO_BITS 0x300000
#endif

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/* A simple server in the internet domain using TCP
The port number is passed as an argument */
#include "sls_detector_defs.h"
#include "communication_funcs.h"
#include "server_funcs.h"
#include <stdlib.h>
#include <string.h>
extern int sockfd;
extern int phase_shift;
void error(char *msg)
{
perror(msg);
}
int main(int argc, char *argv[])
{
int portno, b;
char cmd[100];
int retval=OK;
int sd, fd;
int iarg;
for(iarg=1; iarg<argc; iarg++){
if(!strcasecmp(argv[iarg],"-phaseshift")){
if ( sscanf(argv[iarg+1],"%d",&phase_shift)==0) {
printf("could not decode phase shift\n");
return 1;
}
argc=1;
}
}
if (argc==1) {
portno = DEFAULT_PORTNO;
sprintf(cmd,"%s %d &",argv[0],DEFAULT_PORTNO+1);
printf("\n\nControl Server\nOpening control server on port %d\n",portno );
system(cmd);
b=1;
} else {
portno = DEFAULT_PORTNO+1;
if ( sscanf(argv[1],"%d",&portno) ==0) {
printf("could not open stop server: unknown port\n");
return 1;
}
b=0;
printf("\n\nStop Server\nOpening stop server on port %d\n",portno);
}
init_detector(b);
sd=bindSocket(portno);
sockfd=sd;
if (getServerError(sd)) {
printf("server error!\n");
return -1;
}
/* assign function table */
function_table();
#ifdef VERBOSE
printf("function table assigned \n");
#endif
/* waits for connection */
while(retval!=GOODBYE) {
#ifdef VERBOSE
printf("\n");
#endif
#ifdef VERY_VERBOSE
printf("Waiting for client call\n");
#endif
fd=acceptConnection(sockfd);
#ifdef VERY_VERBOSE
printf("Conenction accepted\n");
#endif
retval=decode_function(fd);
#ifdef VERY_VERBOSE
printf("function executed\n");
#endif
closeConnection(fd);
#ifdef VERY_VERBOSE
printf("connection closed\n");
#endif
}
exitServer(sockfd);
printf("Goodbye!\n");
return 0;
}

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#ifndef SERVER_DEFS_H
#define SERVER_DEFS_H
#include "sls_detector_defs.h"
#include <stdint.h>
// Hardware definitions
#define NCHAN 128
#define NCHIP 10
#define NMAXMODX 1
#define NMAXMODY 1
#define NMAXMOD NMAXMODX*NMAXMODY
#define NDAC 8
#define NADC 5
#define NCHANS NCHAN*NCHIP*NMAXMOD
#define NDACS NDAC*NMAXMOD
#define NTRIMBITS 6
#define NCOUNTBITS 24
#define NCHIPS_PER_ADC 2
// for 25 um
#define CONFIG_FILE "config.txt"
//#define TRIM_DR ((2**NTRIMBITS)-1)
//#define COUNT_DR ((2**NCOUNTBITS)-1)
#define TRIM_DR (((int)pow(2,NTRIMBITS))-1)
#define COUNT_DR (((int)pow(2,NCOUNTBITS))-1)
#define ALLMOD 0xffff
#define ALLFIFO 0xffff
#define ADCSYNC_VAL 0x32214
#define TOKEN_RESTART_DELAY 0x88000000
#define TOKEN_RESTART_DELAY_ROI 0x1b000000
#define TOKEN_TIMING_REV1 0x1f16
#define TOKEN_TIMING_REV2 0x1f0f
#define DEFAULT_PHASE_SHIFT 120
#define DEFAULT_IP_PACKETSIZE 0x0522
#define DEFAULT_UDP_PACKETSIZE 0x050E
#define ADC1_IP_PACKETSIZE 256*2+14+20
#define ADC1_UDP_PACKETSIZE 256*2+4+8+2
#ifdef VIRTUAL
#define DEBUGOUT
#endif
#define CLK_FREQ 32.1E+6
#endif

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#ifndef SERVER_FUNCS_H
#define SERVER_FUNCS_H
#include "sls_detector_defs.h"
#include <stdio.h>
/*
#include <sys/types.h>
#include <sys/socket.h>
#include <netinet/in.h>
*/
#include "communication_funcs.h"
#define GOODBYE -200
int sockfd;
int function_table();
int decode_function(int);
int init_detector(int);
int M_nofunc(int);
int exit_server(int);
// General purpose functions
int get_detector_type(int);
int set_number_of_modules(int);
int get_max_number_of_modules(int);
int exec_command(int);
int set_external_signal_flag(int);
int set_external_communication_mode(int);
int get_id(int);
int digital_test(int);
int write_register(int);
int read_register(int);
int set_dac(int);
int get_adc(int);
int set_channel(int);
int set_chip(int);
int set_module(int);
int get_channel(int);
int get_chip(int);
int get_module(int);
int get_threshold_energy(int);
int set_threshold_energy(int);
int set_settings(int);
int start_acquisition(int);
int stop_acquisition(int);
int start_readout(int);
int get_run_status(int);
int read_frame(int);
int read_all(int);
int start_and_read_all(int);
int set_timer(int);
int get_time_left(int);
int set_dynamic_range(int);
int set_roi(int);
int get_roi(int);
int set_speed(int);
void configureADC();
int set_readout_flags(int);
int execute_trimming(int);
int lock_server(int);
int set_port(int);
int get_last_client_ip(int);
int set_master(int);
int set_synchronization(int);
int update_client(int);
int send_update(int);
int configure_mac(int);
int load_image(int);
int read_counter_block(int);
int reset_counter_block(int);
int start_receiver(int);
int stop_receiver(int);
int calibrate_pedestal(int);
int set_roi(int);
int write_adc_register(int);
#endif

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#include "sharedmemory.h"
struct statusdata *stdata;
int inism(int clsv) {
static int scansmid;
if (clsv==SMSV) {
if ( (scansmid=shmget(SMKEY,1024,IPC_CREAT | 0666 ))==-1 ) {
return -1;
}
if ( (stdata=shmat(scansmid,NULL,0))==(void*)-1) {
return -2;
}
}
if (clsv==SMCL) {
if ( (scansmid=shmget(SMKEY,0,0) )==-1 ) {
return -3;
}
if ( (stdata=shmat(scansmid,NULL,0))==(void*)-1) {
return -4;
}
}
return 1;
}
void write_status_sm(char *status) {
strcpy(stdata->status,status);
}
void write_stop_sm(int v) {
stdata->stop=v;
}
void write_runnumber_sm(int v) {
stdata->runnumber=v;
}

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#ifndef SM
#define SM
#include "sls_detector_defs.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/mman.h>
#include <fcntl.h>
#include <stdarg.h>
#include <unistd.h>
//#include <asm/page.h>
#include <sys/mman.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <stdarg.h>
#include <unistd.h>
#include <sys/shm.h>
#include <sys/ipc.h>
#include <sys/stat.h>
/* key for shared memory */
#define SMKEY 10001
#define SMSV 1
#define SMCL 2
struct statusdata {
int runnumber;
int stop;
char status[20];
} ;
/* for shared memory */
int inism(int clsv);
void write_status_sm(char *status);
void write_stop_sm(int v);
void write_runnumber_sm(int v);
#endif

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../commonFiles/sls_detector_defs.h

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../commonFiles/sls_detector_funcs.h

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../../slsReceiverSoftware/include/sls_receiver_defs.h

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../../slsReceiverSoftware/include/sls_receiver_funcs.h

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/* A simple server in the internet domain using TCP
The port number is passed as an argument */
#include "sls_detector_defs.h"
#include "communication_funcs.h"
#include "firmware_funcs.h"
int sockfd;
int main(int argc, char *argv[])
{
int portno;
int retval=0;
portno = DEFAULT_PORTNO;
bindSocket(portno);
if (getServerError())
return -1;
/* waits for connection */
while(retval!=GOODBYE) {
#ifdef VERBOSE
printf("\n");
#endif
#ifdef VERY_VERBOSE
printf("Stop server: waiting for client call\n");
#endif
acceptConnection();
retval=stopStateMachine();
closeConnection();
}
exitServer();
printf("Goodbye!\n");
return 0;
}

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#ifndef PICASSOD
#include "server_defs.h"
#else
#include "picasso_defs.h"
#endif
#include "trimming_funcs.h"
#include "mcb_funcs.h"
#include "firmware_funcs.h"
#include <math.h>
extern int nModX;
//extern int *values;
extern const int nChans;
extern const int nChips;
extern const int nDacs;
extern const int nAdcs;
int trim_fixed_settings(int countlim, int par2, int im)
{
int retval=OK;
#ifdef VERBOSE
printf("Trimming with fixed settings\n");
#endif
#ifdef VIRTUAL
return OK;
#endif
if (par2<=0)
retval=trim_with_level(countlim, im);
else
retval=trim_with_median(countlim,im);
return retval;
}
int trim_with_noise(int countlim, int nsigma, int im)
{
int retval=OK, retval1=OK, retval2=OK;
#ifdef VERBOSE
printf("Trimming using noise\n");
#endif
#ifdef VIRTUAL
return OK;
#endif
/* threshold scan */
#ifdef VERBOSE
printf("chosing vthresh and vtrim.....");
#endif
retval1=choose_vthresh_and_vtrim(countlim,nsigma, im);
#ifdef VERBOSE
printf("trimming with noise.....\n");
#endif
retval2=trim_with_level(countlim, im);
#ifdef DEBUGOUT
printf("done\n");
#endif
if (retval1==OK && retval2==OK)
retval=OK;
else
retval=FAIL;
return retval;
}
int trim_with_beam(int countlim, int nsigma, int im) //rpc
{
int retval=OK, retval1=OK, retval2=OK;
printf("Trimming using beam\n");
//return OK;
#ifdef VIRTUAL
printf("Trimming using beam\n");
return OK;
#endif
/* threshold scan */
#ifdef DEBUGOUT
printf("chosing vthresh and vtrim.....");
#endif
retval1=choose_vthresh_and_vtrim(countlim,nsigma,im);
retval2=trim_with_median(TRIM_DR, im);
#ifdef DEBUGOUT
printf("done\n");
#endif
if (retval1==OK && retval2==OK)
retval=OK;
else
retval=FAIL;
return retval;
}
int trim_improve(int maxit, int par2, int im) //rpc
{
int retval=OK, retval1=OK, retval2=OK;
#ifdef VERBOSE
printf("Improve the trimming\n");
#endif
#ifdef VIRTUAL
return OK;
#endif
if (par2!=0 && im==ALLMOD)
retval1=choose_vthresh();
retval2=trim_with_median(2*maxit+1, im);
#ifdef DEBUGOUT
printf("done\n");
#endif
if (retval1==OK && retval2==OK)
retval=OK;
else
retval=FAIL;
return retval;
}
int calcthr_from_vcal(int vcal) {
int thrmin;
//thrmin=140+3*vcal/5;
thrmin=180+3*vcal/5;
return thrmin;
}
int calccal_from_vthr(int vthr) {
int vcal;
vcal=5*(vthr-140)/3;
return vcal;
}
int choose_vthresh_and_vtrim(int countlim, int nsigma, int im) {
int retval=OK;
#ifdef MCB_FUNCS
int modma, modmi, nm;
int thr, thrstep=5, nthr=31;
int *fifodata;
double vthreshmean, vthreshSTDev;
int *thrmi, *thrma;
double c;
//double b=BVTRIM;
//double a=AVTRIM;
int *trim;
int ich, imod, ichan;
int nvalid=0;
u_int32_t *scan;
int ithr;
sls_detector_channel myChan;
setFrames(1);
// setNMod(getNModBoard());
if (im==ALLMOD){
modmi=0;
modma=nModX;
} else {
modmi=im;
modma=im+1;
}
nm=modma-modmi;
trim=malloc(sizeof(int)*nChans*nChips*nModX);
thrmi=malloc(sizeof(int)*nModX);
thrma=malloc(sizeof(int)*nModX);
for (ich=0; ich<nChans*nChips*nm; ich++)
trim[ich]=-1;
/*
setCSregister(im);
setSSregister(im);
initChannel(0,0,0,1,0,0,im);
counterClear(im);
clearSSregister(im);
usleep(500);
*/
myChan.chan=-1;
myChan.chip=-1;
myChan.module=ALLMOD;
myChan.reg=COMPARATOR_ENABLE;
initChannelbyNumber(myChan);
for (ithr=0; ithr<nthr; ithr++) {
fifoReset();
/* scanning threshold */
for (imod=modmi; imod<modma; imod++) {
//commented out by dhanya thr=getDACbyIndexDACU(VTHRESH,imod);
if (ithr==0) {
thrmi[imod]=thr;
//commented out by dhanya initDACbyIndexDACU(VTHRESH,thr,imod);
} else
;//commented out by dhanya initDACbyIndexDACU(VTHRESH,thr+thrstep,imod);
}
/* setCSregister(ALLMOD);
setSSregister(ALLMOD);
initChannel(0,0,0,1,0,0,im);
setDynamicRange(32);
*/
counterClear(ALLMOD);
clearSSregister(ALLMOD);
usleep(500);
startStateMachine();
while (runBusy()) {
}
usleep(500);
fifodata=(int*)fifo_read_event();
scan=decode_data(fifodata);
for (imod=modmi; imod<modma; imod++) {
for (ichan=0; ichan<nChans*nChips; ichan++){
ich=imod*nChips*nChans+ichan;
if (scan[ich]>countlim && trim[ich]==-1) {
//commented out by dhanya trim[ich]=getDACbyIndexDACU(VTHRESH,imod);
#ifdef VERBOSE
// printf("yes: %d %d %d\n",ich,ithr,scan[ich]);
#endif
}
#ifdef VERBOSE
/* else {
printf("no: %d %d %d\n",ich,ithr,scan[ich]);
}*/
#endif
}
}
free(scan);
}
for (imod=modmi; imod<modma; imod++) {
vthreshmean=0;
vthreshSTDev=0;
nvalid=0;
//commented out by dhanya thrma[imod]=getDACbyIndexDACU(VTHRESH,imod);
for (ichan=0; ichan<nChans*nChips; ichan++){
ich=imod*nChans*nChips+ichan;
if(trim[ich]>thrmi[imod] && trim[ich]<thrma[imod]) {
vthreshmean=vthreshmean+trim[ich];
vthreshSTDev=vthreshSTDev+trim[ich]*trim[ich];
nvalid++;
}
}
if (nvalid>0) {
vthreshmean=vthreshmean/nvalid;
//commented out by dhanya vthreshSTDev=sqrt((vthreshSTDev/nvalid)-vthreshmean*vthreshmean);
} else {
vthreshmean=thrmi[imod];
vthreshSTDev=nthr*thrstep;
printf("No valid channel for module %d\n",imod);
retval=FAIL;
}
#ifdef DEBUGOUT
printf("module= %d nvalid = %d mean=%f RMS=%f\n",imod, nvalid, vthreshmean,vthreshSTDev);
#endif
// *vthresh=round(vthreshmean-nsigma*vthreshSTDev);
thr=(int)(vthreshmean-nsigma*vthreshSTDev);
if (thr<0 || thr>(DAC_DR-1)) {
thr=thrmi[imod]/2;
printf("Can't find correct threshold for module %d\n",imod);
retval=FAIL;
}
//commented out by dhanya initDACbyIndexDACU(VTHRESH,thr,imod);
#ifdef VERBOSE
printf("vthresh=%d \n",thr);
#endif
c=CVTRIM-2.*nsigma*vthreshSTDev/63.;
//commented out by dhanya thr=(int)((-b-sqrt(b*b-4*a*c))/(2*a));
if (thr<500 || thr>(DAC_DR-1)) {
thr=750;
printf("Can't find correct trimbit size for module %d\n",imod);
retval=FAIL;
}
//commented out by dhanya initDACbyIndexDACU(VTRIM,thr,imod);
#ifdef VERBOSE
printf("vtrim=%d \n",thr);
#endif
}
free(trim);
free(thrmi);
free(thrma);
#endif
return retval;
}
int trim_with_level(int countlim, int im) {
int ich, itrim, ichan, ichip, imod;
u_int32_t *scan;
int *inttrim;
int modma, modmi, nm;
int retval=OK;
int *fifodata;
sls_detector_channel myChan;
printf("trimming module number %d", im);
#ifdef MCB_FUNCS
setFrames(1);
// setNMod(getNModBoard());
if (im==ALLMOD){
modmi=0;
modma=nModX;
} else {
modmi=im;
modma=im+1;
}
nm=modma-modmi;
inttrim=malloc(sizeof(int)*nChips*nChans*nModX);
printf("countlim=%d\n",countlim);
for (ich=0; ich<nChans*nChips*nModX; ich++)
inttrim[ich]=-1;
for (itrim=0; itrim<TRIM_DR+1; itrim++) {
fifoReset();
printf("Trimbit %d\n",itrim);
myChan.chan=-1;
myChan.chip=-1;
myChan.module=ALLMOD;
myChan.reg=COMPARATOR_ENABLE|(itrim<<TRIMBIT_OFF);
initChannelbyNumber(myChan);
/*
setCSregister(im);
setSSregister(im);
initChannel(itrim,0,0,1,0,0,ALLMOD);
setDynamicRange(32);
*/
setCSregister(ALLMOD);
setSSregister(ALLMOD);
counterClear(ALLMOD);
clearSSregister(ALLMOD);
usleep(500);
startStateMachine();
while (runBusy()) {
}
usleep(500);
fifodata=(int*)fifo_read_event();
scan=decode_data(fifodata);
for (imod=modmi; imod<modma; imod++) {
for (ichan=0; ichan<nChans*nChips; ichan++) {
ich=ichan+imod*nChans*nChips;
if (inttrim[ich]==-1) {
if (scan[ich]>countlim){
inttrim[ich]=itrim;
if (scan[ich]>2*countlim && itrim>0) {
//if (scan[ich]>2*countlim || itrim==0) {
inttrim[ich]=itrim-1;
}
#ifdef VERBOSE
printf("Channel %d trimbit %d counted %d (%08x) countlim %d\n",ich,itrim,scan[ich],fifodata[ich],countlim);
#endif
}
}
#ifdef VERBOSE
/* else
printf("Channel %d trimbit %d counted %d countlim %d\n",ich,itrim,scan[ich],countlim);*/
#endif
}
}
free(scan);
}
for (imod=modmi; imod<modma; imod++) {
clearCSregister(imod);
firstChip(im);
for (ichip=0; ichip<nChips; ichip++) {
clearSSregister(imod);
for (ichan=0; ichan<nChans; ichan++) {
nextStrip(imod);
ich=ichan+imod*nChans*nChips+ichip*nChans;
if (*(inttrim+ich)==-1) {
*(inttrim+ich)=TRIM_DR;
// printf("could not trim channel %d chip %d module %d - set to %d\n", ichan, ichip, imod, *(inttrim+ich) );
retval=FAIL;
}
#ifdef VERBOSE
// else
// printf("channel %d trimbit %d\n",ich,*(inttrim+ich) );
#endif
initChannel(inttrim[ich],0,0,1,0,0,imod);
}
nextChip(imod);
}
}
free(inttrim);
#endif
return retval;
}
#define ELEM_SWAP(a,b) { register int t=(a);(a)=(b);(b)=t; }
#define median(a,n) kth_smallest(a,n,(((n)&1)?((n)/2):(((n)/2)-1)))
int kth_smallest(int *a, int n, int k)
{
register int i,j,l,m ;
register double x ;
l=0 ; m=n-1 ;
while (l<m) {
x=a[k] ;
i=l ;
j=m ;
do {
while (a[i]<x) i++ ;
while (x<a[j]) j-- ;
if (i<=j) {
ELEM_SWAP(a[i],a[j]) ;
i++ ; j-- ;
}
} while (i<=j) ;
if (j<k) l=i ;
if (k<i) m=j ;
}
return a[k] ;
}
int ave(int *a, int n)
{
int av=0,i;
for (i=0; i<n; i++)
av=av+((double)*(a+i))/((double)n);
return av;
}
int choose_vthresh() {
int retval=OK;
#ifdef MCB_FUNCS
int imod, ichan;
u_int32_t *scan, *scan1;
int olddiff[nModX], direction[nModX];
int med[nModX], med1[nModX], diff, media;
int change_flag=1;
int iteration=0;
int maxiterations=10;
int vthreshmean=0;
int vthresh;
int im=ALLMOD;
int modma, modmi, nm;
int *fifodata;
setFrames(1);
// setNMod(getNModBoard());
if (im==ALLMOD){
modmi=0;
modma=nModX;
} else {
modmi=im;
modma=im+1;
}
nm=modma-modmi;
setDynamicRange(32);
setCSregister(ALLMOD);
setSSregister(ALLMOD);
counterClear(ALLMOD);
clearSSregister(ALLMOD);
usleep(500);
startStateMachine();
while (runBusy()) {
//printf(".");
}
usleep(500);
fifodata=(int*)fifo_read_event();
scan=decode_data(fifodata);
//
scan1=decode_data(fifodata);
for (imod=modmi; imod<modma; imod++) {
//
med[imod]=(int)median((int*)scan1+imod*nChans*nChips,nChans*nChips);
med1[imod]=med[imod];
//commented out by dhanya vthreshmean=vthreshmean+getDACbyIndexDACU(VTHRESH,imod);
olddiff[imod]=0xffffff;
direction[imod]=0;
printf("Median of module %d=%d\n",imod,med[imod]);
}
vthreshmean=vthreshmean/nm;
//media=median(scan,nChans*nChips*nModX);
//printf("Median overall=%d\n",media);
media=median(med1+modmi,nm);
printf("Median of modules=%d\n",media);
free(scan);
free(scan1);
while(change_flag && iteration<maxiterations) {
setDynamicRange(32);
fifoReset();
setCSregister(ALLMOD);
setSSregister(ALLMOD);
counterClear(ALLMOD);
clearSSregister(ALLMOD);
usleep(500);
startStateMachine();
while (runBusy()) {
}
usleep(500);
fifodata=(int*)fifo_read_event();
scan=decode_data(fifodata);
//
scan1=decode_data(fifodata);
change_flag=0;
printf("Vthresh iteration %3d 0f %3d\n",iteration, maxiterations);
for (ichan=modmi; ichan<modma; ichan++) {
med[ichan]=(int)median((int*)scan1+ichan*nChans*nChips,nChans*nChips);
med1[imod]=med[imod];
media=median(med1+modmi,nm);
diff=med[ichan]-media;
if (direction[ichan]==0) {
if (diff>0)
direction[ichan]=1;
else
direction[ichan]=-1;
}
//commented out by dhanya vthresh=getDACbyIndexDACU(VTHRESH,imod);
if ( direction[ichan]!=-3) {
if (abs(diff)>abs(olddiff[ichan])) {
vthresh=vthresh-direction[ichan];
if (vthresh>(DAC_DR-1)) {
vthresh=(DAC_DR-1);
printf("can't equalize threshold for module %d\n", ichan);
retval=FAIL;
}
if (vthresh<0) {
vthresh=0;
printf("can't equalize threshold for module %d\n", ichan);
retval=FAIL;
}
direction[ichan]=-3;
} else {
vthresh=vthresh+direction[ichan];
olddiff[ichan]=diff;
change_flag=1;
}
//commented out by dhanya initDACbyIndex(VTHRESH,vthresh, ichan);
}
}
iteration++;
free(scan);
free(scan1);
}
#endif
return retval;
}
int trim_with_median(int stop, int im) {
int retval=OK;
#ifdef MCB_FUNCS
int ichan, imod, ichip, ich;
u_int32_t *scan, *scan1;
int *olddiff, *direction;
int med, diff;
int change_flag=1;
int iteration=0;
int me[nModX], me1[nModX];
int modma, modmi, nm;
int trim;
int *fifodata;
setFrames(1);
// setNMod(getNModBoard());
if (im==ALLMOD){
modmi=0;
modma=nModX;
} else {
modmi=im;
modma=im+1;
}
nm=modma-modmi;
olddiff=malloc(4*nModX*nChips*nChans);
direction=malloc(4*nModX*nChips*nChans);
for (imod=modmi; imod<modma; imod++) {
for (ichip=0; ichip<nChips; ichip++) {
for (ich=0; ich<nChans; ich++) {
ichan=imod*nChips*nChans+ichip*nChans+ich;
direction[ichan]=0;
olddiff[ichan]=0x0fffffff;
}
}
}
/********
fifoReset();
setCSregister(ALLMOD);
setSSregister(ALLMOD);
counterClear(ALLMOD);
clearSSregister(ALLMOD);
usleep(500);
startStateMachine();
while (runBusy()) {
}
usleep(500);
scan=decode_data(fifo_read_event());
for (imod=modmi; imod<modma; imod++) {
me[imod]=median(scan+imod*nChans*nChips,nChans*nChips);
printf("Median of module %d=%d\n",imod,me[imod]);
}
med=median(me,nm);
printf("median is %d\n",med);
free(scan);
**************/
while(change_flag && iteration<stop) {
setDynamicRange(32);
fifoReset();
setCSregister(ALLMOD);
setSSregister(ALLMOD);
counterClear(ALLMOD);
clearSSregister(ALLMOD);
usleep(500);
startStateMachine();
while (runBusy()) {
}
usleep(500);
fifodata=(int*)fifo_read_event();
scan=decode_data(fifodata);
scan1=decode_data(fifodata);
/********* calculates median every time ***********/
for (imod=modmi; imod<modma; imod++) {
me[imod]=median((int*)scan1+imod*nChans*nChips,nChans*nChips);
me1[imod]=me[imod];
printf("Median of module %d=%d\n",imod,me[imod]);
}
med=median(me1,nm);
printf("median is %d\n",med);
change_flag=0;
printf("Trimbits iteration %d of %d\n",iteration, stop);
for (imod=modmi; imod<modma; imod++) {
for (ichip=0; ichip<nChips; ichip++) {
selChip(ichip,imod);
clearSSregister(imod);
for (ich=0; ich<nChans; ich++) {
ichan=imod*nChips*nChans+ichip*nChans+ich;
nextStrip(imod);
diff=scan[ichan]-me[imod];
if (direction[ichan]==0) {
if (diff>0) {
direction[ichan]=1;
} else {
direction[ichan]=-1;
}
}
if ( direction[ichan]!=-3) {
if (abs(diff)>abs(olddiff[ichan])) {
trim=getTrimbit(imod,ichip,ich)+direction[ichan];
printf("%d old diff %d < new diff %d %d - trimbit %d\n",ichan, olddiff[ichan], diff, direction[ichan], trim);
direction[ichan]=-3;
} else {
trim=getTrimbit(imod,ichip,ich)-direction[ichan];
olddiff[ichan]=diff;
change_flag=1;
}
if (trim>TRIM_DR) {
trim=63;
printf("can't trim channel %d chip %d module %d to trim %d\n",ich, ichip, imod, trim);
retval=FAIL;
}
if (trim<0) {
printf("can't trim channel %d chip %d module %d to trim %d\n",ich, ichip, imod, trim);
trim=0;
retval=FAIL;
}
initChannel(trim,0,0,1,0,0,imod);
}
}
}
}
iteration++;
free(scan);
free(scan1);
}
free(olddiff);
free(direction);
#endif
return retval;
}

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#ifndef TRIMMING_FUNCS_H
#define TRIMMING_FUNCS_H
#include "sls_detector_defs.h"
int trim_fixed_settings(int countlim, int par2, int imod);
int trim_with_noise(int countlim, int nsigma, int imod);
int trim_with_beam(int countlim, int nsigma, int imod);
int trim_improve(int maxit, int par2, int imod);
int calcthr_from_vcal(int vcal);
int calccal_from_vthr(int vthr);
int choose_vthresh_and_vtrim(int countlim, int nsigma, int imod);
int choose_vthresh();
int trim_with_level(int countlim, int imod);
int trim_with_median(int stop, int imod);
int calcthr_from_vcal(int vcal);
int calccal_from_vthr(int vthr);
#endif

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SERVER=gotthardDetectorServer
MAINDIR=slsDetectorsPackage
SPECDIR=slsDetectorSoftware/$SERVER
TMPFILE=gitInfoGotthardTmp.h
INCLFILE=gitInfoGotthard.h
#evaluate the variables
EVALFILE=../../evalVersionVariables.sh
source $EVALFILE
#get modified date
#RDATE1='git log --pretty=format:"%ci" -1'
RDATE1="find . -type f -exec stat --format '%Y :%y %n' '{}' \; | sort -nr | cut -d: -f2- | egrep -v 'gitInfo|.git|updateGitVersion|.o' | head -n 1"
RDATE=`eval $RDATE1`
NEWDATE=$(sed "s/-//g" <<< $RDATE | awk '{print $1;}')
NEWDATE=${NEWDATE/#/0x}
#get old date from INCLFILE
OLDDATE=$(more $INCLFILE | grep '#define SVNDATE' | awk '{print $3}')
#update INCLFILE if changes
if [ "$OLDDATE" != "$NEWDATE" ]; then
echo Path: ${MAINDIR}/${SPECDIR} $'\n'URL: ${GITREPO} $'\n'Repository Root: ${GITREPO} $'\n'Repsitory UUID: ${REPUID} $'\n'Revision: ${FOLDERREV} $'\n'Branch: ${BRANCH} $'\n'Last Changed Author: ${AUTH1}_${AUTH2} $'\n'Last Changed Rev: ${REV} $'\n'Last Changed Date: ${RDATE} > gitInfo.txt
cd ../../
./genVersionHeader.sh $SPECDIR/gitInfo.txt $SPECDIR/$TMPFILE $SPECDIR/$INCLFILE
cd $WD
fi

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../slsDetectorAnalysis/detectorData.h

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../slsDetector/slsDetectorUsers.h

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../../slsReceiverSoftware/include/slsReceiverUsers.h

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# $Id: Makefile,v 1.1.1.1 2006/02/04 03:35:01 freza Exp $
# first compile
# make cris-axis-linux-gnu
CROSS = bfin-uclinux-
CC = $(CROSS)gcc
CFLAGS += -Wall -DMOENCHD -DMCB_FUNCS -DDACS_INT -DDEBUG -DV1 -DCTB #-DVERBOSE #-DVERYVERBOSE #-DVIRTUAL #-DDACS_INT_CSERVER
PROGS= jctbDetectorServer
INSTDIR= /tftpboot
INSTMODE= 0777
BINS = testlib_sharedlibc
SRCS = server.c server_funcs.c communication_funcs.c firmware_funcs.c slow_adc.c blackfin.c
#mcb_funcs.c sharedmemory.c
OBJS = $(SRCS:%.c=%.o)
all: clean versioning $(PROGS)
test: clean jungfrauADCTEst
boot: $(OBJS)
versioning:
@echo `tput setaf 6; ./updateGitVersion.sh; tput sgr0;`
jctbDetectorServer: $(OBJS)
echo $(OBJS)
$(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@)
jungfrauADCTEst: $(OBJS)
echo $(OBJS)
$(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@) -DTESTADC
install: $(PROGS)
$(INSTALL) -d $(INSTDIR)
$(INSTALL) -m $(INSTMODE) $(PROGS) $(INSTDIR)
romfs:
$(ROMFSINST) /bin/$(PROGS)
clean:
rm -rf $(PROGS) *.o *.gdb

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../../slsReceiverSoftware/include/ansi.h

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export PATH=/afs/psi.ch/project/sls_det_firmware/jungfrau_software/uClinux-2010_64bit/bfin-uclinux/bin:$PATH

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#include "blackfin.h"
#include <sys/ipc.h>
#include <sys/shm.h>
#include <sys/time.h>
#include <string.h>
#include <sys/utsname.h>
#include <sys/types.h>
#include <sys/socket.h>
#include <netinet/in.h>
#include <netinet/tcp.h>
#include <arpa/inet.h>
#include <netdb.h>
#include <time.h>
#include <sys/time.h>
#include <sys/mman.h>
#include <sys/socket.h>
#include <sys/stat.h>
#include <errno.h>
#include <fcntl.h>
#include <stdarg.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include "server_defs.h"
#include "registers_m.h"
//for memory mapping
u_int32_t CSP0BASE;
u_int16_t volatile *values;
int mapCSP0(void) {
printf("Mapping memory\n");
#ifndef VIRTUAL
int fd;
fd = open("/dev/mem", O_RDWR | O_SYNC, 0);
if (fd == -1) {
printf("\nCan't find /dev/mem!\n");
return FAIL;
}
printf("/dev/mem opened\n");
CSP0BASE = (u_int32_t)mmap(0, MEM_SIZE, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, fd, CSP0);
if (CSP0BASE == (u_int32_t)MAP_FAILED) {
printf("\nCan't map memmory area!!\n");
return FAIL;
}
printf("CSP0 mapped\n");
#endif
#ifdef VIRTUAL
CSP0BASE = malloc(MEM_SIZE);
printf("memory allocated\n");
#endif
#ifdef SHAREDMEMORY
if ( (res=inism(SMSV))<0) {
printf("error attaching shared memory! %i",res);
return FAIL;
}
#endif
printf("CSPObase is 0x%08x \n",CSP0BASE);
printf("CSPOBASE=from %08x to %08x\n",CSP0BASE,CSP0BASE+MEM_SIZE);
u_int32_t address;
address = FIFO_DATA_REG;//_OFF;
//values=(u_int32_t*)(CSP0BASE+address*2);
values=(u_int16_t*)(CSP0BASE+address*2);
printf("statusreg=%08x\n",bus_r(STATUS_REG));
printf("\n\n");
return OK;
}
u_int16_t bus_r16(u_int32_t offset){
volatile u_int16_t *ptr1;
ptr1=(u_int16_t*)(CSP0BASE+offset*2);
return *ptr1;
}
u_int16_t bus_w16(u_int32_t offset, u_int16_t data) {
volatile u_int16_t *ptr1;
ptr1=(u_int16_t*)(CSP0BASE+offset*2);
*ptr1=data;
return OK;
}
u_int32_t bus_w(u_int32_t offset, u_int32_t data) {
volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(CSP0BASE+offset*2);
*ptr1=data;
return OK;
}
u_int32_t bus_r(u_int32_t offset) {
volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(CSP0BASE+offset*2);
return *ptr1;
}
// program dacq settings
int64_t set64BitReg(int64_t value, int aLSB, int aMSB){
int64_t v64;
u_int32_t vLSB,vMSB;
if (value!=-1) {
vLSB=value&(0xffffffff);
bus_w(aLSB,vLSB);
v64=value>> 32;
vMSB=v64&(0xffffffff);
bus_w(aMSB,vMSB);
// printf("Wreg64(%x,%x) %08x %08x %016llx\n", aLSB>>11, aMSB>>11, vLSB, vMSB, value);
}
return get64BitReg(aLSB, aMSB);
}
int64_t get64BitReg(int aLSB, int aMSB){
int64_t v64;
u_int32_t vLSB,vMSB;
vLSB=bus_r(aLSB);
vMSB=bus_r(aMSB);
v64=vMSB;
v64=(v64<<32) | vLSB;
// printf("reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, v64);
return v64;
}
/* /\** */
/* /\** ramType is DARK_IMAGE_REG or GAIN_IMAGE_REG *\/ */
/* u_int16_t ram_w16(u_int32_t ramType, int adc, int adcCh, int Ch, u_int16_t data) { */
/* unsigned int adr = (ramType | adc << 8 | adcCh << 5 | Ch ); */
/* // printf("Writing to addr:%x\n",adr); */
/* return bus_w16(adr,data); */
/* } */
/* /\** ramType is DARK_IMAGE_REG or GAIN_IMAGE_REG *\/ */
/* u_int16_t ram_r16(u_int32_t ramType, int adc, int adcCh, int Ch){ */
/* unsigned int adr = (ramType | adc << 8 | adcCh << 5 | Ch ); */
/* // printf("Reading from addr:%x\n",adr); */
/* return bus_r16(adr); */
/* } */
/* **\/ */

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#ifndef BLACKFIN_H
#define BLACKFIN_H
#define CSP0 0x20200000
#define MEM_SIZE 0x100000
#include <sys/types.h>
int mapCSP0(void);
u_int16_t bus_r16(u_int32_t offset);
u_int16_t bus_w16(u_int32_t offset, u_int16_t data);//aldos function
u_int32_t bus_w(u_int32_t offset, u_int32_t data);
u_int32_t bus_r(u_int32_t offset);
int64_t set64BitReg(int64_t value, int aLSB, int aMSB);
int64_t get64BitReg(int aLSB, int aMSB);
#endif

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