mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-23 18:17:59 +02:00
ctb server: removed unnecessary prints, resulting in a bug fix for slow adc temp
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@ -167,31 +167,31 @@ void I2C_ConfigureI2CCore(uint32_t creg, uint32_t sreg,
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* @returns value read from register
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*/
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uint32_t I2C_Read(uint32_t devId, uint32_t addr) {
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FILE_LOG(logDEBUG1, (" ================================================\n"));
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FILE_LOG(logDEBUG1, (" Reading from I2C device 0x%x and reg 0x%x\n", devId, addr));
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FILE_LOG(logDEBUG2, (" ================================================\n"));
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FILE_LOG(logDEBUG2, (" Reading from I2C device 0x%x and reg 0x%x\n", devId, addr));
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// device Id mask
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uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
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FILE_LOG(logDEBUG1, (" devId:0x%x\n", devIdMask));
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FILE_LOG(logDEBUG2, (" devId:0x%x\n", devIdMask));
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// write I2C ID
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bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
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FILE_LOG(logDEBUG1, (" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK))));
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FILE_LOG(logDEBUG2, (" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK))));
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// write register addr
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bus_w(I2C_Transfer_Command_Fifo_Reg, addr);
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FILE_LOG(logDEBUG1, (" write addr:0x%x\n", addr));
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FILE_LOG(logDEBUG2, (" write addr:0x%x\n", addr));
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// repeated start with read (repeated start needed here because it was in write operation mode earlier, for the device ID)
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bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL));
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FILE_LOG(logDEBUG1, (" repeated start:0x%x\n", (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL)));
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FILE_LOG(logDEBUG2, (" repeated start:0x%x\n", (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL)));
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// continue reading
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bus_w(I2C_Transfer_Command_Fifo_Reg, 0x0);
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FILE_LOG(logDEBUG1, (" continue reading:0x%x\n", 0x0));
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FILE_LOG(logDEBUG2, (" continue reading:0x%x\n", 0x0));
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// stop reading
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bus_w(I2C_Transfer_Command_Fifo_Reg, I2C_TFR_CMD_STOP_MSK);
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FILE_LOG(logDEBUG1, (" stop reading:0x%x\n", I2C_TFR_CMD_STOP_MSK));
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FILE_LOG(logDEBUG2, (" stop reading:0x%x\n", I2C_TFR_CMD_STOP_MSK));
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// read value
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uint32_t retval = 0;
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@ -201,24 +201,24 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr) {
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int status = 1;
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while(status) {
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status = bus_r(I2C_Status_Reg) & I2C_STATUS_BUSY_MSK;
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FILE_LOG(logDEBUG1, (" status:%d\n", status));
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FILE_LOG(logDEBUG2, (" status:%d\n", status));
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usleep(0);
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}
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// get rx fifo level (get number of bytes to be received)
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int level = bus_r(I2C_Rx_Data_Fifo_Level_Reg);
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FILE_LOG(logDEBUG1, (" level:%d\n", level));
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FILE_LOG(logDEBUG2, (" level:%d\n", level));
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int iloop = level - 1;
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// level bytes to read, read 1 byte at a time
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for (iloop = level - 1; iloop >= 0; --iloop) {
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u_int16_t byte = bus_r(I2C_Rx_Data_Fifo_Reg) & I2C_RX_DATA_FIFO_RXDATA_MSK;
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FILE_LOG(logDEBUG1, (" byte nr %d:0x%x\n", iloop, byte));
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FILE_LOG(logDEBUG2, (" byte nr %d:0x%x\n", iloop, byte));
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// push by 1 byte at a time
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retval |= (byte << (8 * iloop));
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}
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FILE_LOG(logDEBUG1, (" retval:0x%x\n", retval));
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FILE_LOG(logDEBUG1, (" ================================================\n"));
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FILE_LOG(logDEBUG2, (" retval:0x%x\n", retval));
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FILE_LOG(logDEBUG2, (" ================================================\n"));
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return retval;
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}
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@ -229,34 +229,34 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr) {
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* @param data data to be written (16 bit)
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*/
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void I2C_Write(uint32_t devId, uint32_t addr, uint16_t data) {
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FILE_LOG(logDEBUG1, (" ================================================\n"));
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FILE_LOG(logDEBUG1, (" Writing to I2C (Device:0x%x, reg:0x%x, data:%d)\n", devId, addr, data));
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FILE_LOG(logDEBUG2, (" ================================================\n"));
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FILE_LOG(logDEBUG2, (" Writing to I2C (Device:0x%x, reg:0x%x, data:%d)\n", devId, addr, data));
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// device Id mask
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uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
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FILE_LOG(logDEBUG1, (" devId:0x%x\n", devId));
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FILE_LOG(logDEBUG2, (" devId:0x%x\n", devId));
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// write I2C ID
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bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
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FILE_LOG(logDEBUG1, (" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK))));
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FILE_LOG(logDEBUG2, (" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK))));
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// write register addr
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bus_w(I2C_Transfer_Command_Fifo_Reg, addr);
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FILE_LOG(logDEBUG1, (" write addr:0x%x\n", addr));
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FILE_LOG(logDEBUG2, (" write addr:0x%x\n", addr));
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// do not do the repeated start as it is already in write operation mode (else it wont work)
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uint8_t msb = (uint8_t)((data & 0xFF00) >> 8);
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uint8_t lsb = (uint8_t)(data & 0x00FF);
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FILE_LOG(logDEBUG1, (" msb:0x%02x, lsb:0x%02x\n", msb, lsb));
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FILE_LOG(logDEBUG2, (" msb:0x%02x, lsb:0x%02x\n", msb, lsb));
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// writing data MSB
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bus_w(I2C_Transfer_Command_Fifo_Reg, ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK));
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FILE_LOG(logDEBUG1, (" write msb:0x%02x\n", ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK)));
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FILE_LOG(logDEBUG2, (" write msb:0x%02x\n", ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK)));
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// writing data LSB and stop writing bit
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bus_w(I2C_Transfer_Command_Fifo_Reg, ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK);
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FILE_LOG(logDEBUG1, (" write lsb and stop writing:0x%x\n", ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK));
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FILE_LOG(logDEBUG1, (" ================================================\n"));
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FILE_LOG(logDEBUG2, (" write lsb and stop writing:0x%x\n", ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK));
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FILE_LOG(logDEBUG2, (" ================================================\n"));
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}
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