speed separated

This commit is contained in:
maliakal_d 2019-11-05 18:50:35 +01:00
parent 96d64778ee
commit 1f64d2a4e2
29 changed files with 830 additions and 714 deletions

View File

@ -750,70 +750,7 @@ int setExternalSampling(int val) {
return ((bus_r(addr) & DBIT_EXT_TRG_OPRTN_MD_MSK) >> DBIT_EXT_TRG_OPRTN_MD_OFST); return ((bus_r(addr) & DBIT_EXT_TRG_OPRTN_MD_MSK) >> DBIT_EXT_TRG_OPRTN_MD_OFST);
} }
/* parameters - speed, readout */ /* parameters - readout */
void setSpeed(enum speedVariable ind, int val, int mode) {
switch(ind) {
case ADC_PHASE:
FILE_LOG(logINFOBLUE, ("Configuring ADC Phase\n"));
configurePhase(ADC_CLK, val, mode);
break;
case DBIT_PHASE:
FILE_LOG(logINFOBLUE, ("Configuring Dbit Phase\n"));
configurePhase(DBIT_CLK, val, mode);
break;
case ADC_CLOCK:
FILE_LOG(logINFOBLUE, ("Configuring ADC Clock\n"));
configureFrequency(ADC_CLK, val);
configureSyncFrequency(ADC_CLK);
break;
case DBIT_CLOCK:
FILE_LOG(logINFOBLUE, ("Configuring Dbit Clock\n"));
configureFrequency(DBIT_CLK, val);
configureSyncFrequency(DBIT_CLK);
break;
case ADC_PIPELINE:
setAdcOffsetRegister(1, val);
break;
case DBIT_PIPELINE:
setAdcOffsetRegister(0, val);
break;
case CLOCK_DIVIDER:
FILE_LOG(logINFOBLUE, ("Configuring Run Clock\n"));
configureFrequency(RUN_CLK, val);
configureSyncFrequency(RUN_CLK);
break;
default:
return;
}
}
int getSpeed(enum speedVariable ind, int mode) {
switch(ind) {
case ADC_PHASE:
return getPhase(ADC_CLK, mode);
case DBIT_PHASE:
return getPhase(DBIT_CLK, mode);
case MAX_ADC_PHASE_SHIFT:
return getMaxPhase(ADC_CLK);
case MAX_DBIT_PHASE_SHIFT:
return getMaxPhase(DBIT_CLK);
case ADC_CLOCK:
return getFrequency(ADC_CLK);
case DBIT_CLOCK:
return getFrequency(DBIT_CLK);
case SYNC_CLOCK:
return getFrequency(SYNC_CLK);
case CLOCK_DIVIDER:
return getFrequency(RUN_CLK);
case ADC_PIPELINE:
return getAdcOffsetRegister(1);
case DBIT_PIPELINE:
return getAdcOffsetRegister(0);
default:
return -1;
}
}
int setReadoutMode(enum readoutMode mode) { int setReadoutMode(enum readoutMode mode) {
uint32_t addr = CONFIG_REG; uint32_t addr = CONFIG_REG;
@ -1613,22 +1550,24 @@ int enableTenGigabitEthernet(int val) {
/* ctb specific - configure frequency, phase, pll */ /* ctb specific - configure frequency, phase, pll */
// ind can only be ADC_CLK or DBIT_CLK int setPhase(enum CLKINDEX ind, int val, int degrees) {
void configurePhase(enum CLKINDEX ind, int val, int degrees) { if (ind != ADC_CLK && ind != DBIT_CLK) {
char clock_names[4][10]={"run_clk","adc_clk", "sync_clk", "dbit_clk"}; FILE_LOG(logERROR, ("Unknown clock index %d to set phase\n", ind));
return FAIL;
}
char* clock_names[] = {CLK_NAMES};
FILE_LOG(logINFO, ("Setting %s clock (%d) phase to %d %s\n", clock_names[ind], ind, val, degrees == 0 ? "" : "degrees"));
int maxShift = getMaxPhase(ind); int maxShift = getMaxPhase(ind);
// validation // validation
if (degrees && (val < 0 || val > 359)) { if (degrees && (val < 0 || val > 359)) {
FILE_LOG(logERROR, ("\tPhase provided for C%d(%s) outside limits (0 - 359°C)\n", ind, clock_names[ind])); FILE_LOG(logERROR, ("\tPhase outside limits (0 - 359°C)\n"));
return; return FAIL;
} }
if (!degrees && (val < 0 || val > maxShift - 1)) { if (!degrees && (val < 0 || val > maxShift - 1)) {
FILE_LOG(logERROR, ("\tPhase provided for C%d(%s) outside limits (0 - %d phase shifts)\n", ind, clock_names[ind], maxShift - 1)); FILE_LOG(logERROR, ("\tPhase outside limits (0 - %d phase shifts)\n", maxShift - 1));
return; return FAIL;
} }
FILE_LOG(logDEBUG1, ("\tConfiguring Phase of C%d(%s) to %d (degree mode: %d)\n", ind, clock_names[ind], val, degrees));
int valShift = val; int valShift = val;
// convert to phase shift // convert to phase shift
if (degrees) { if (degrees) {
@ -1642,9 +1581,9 @@ void configurePhase(enum CLKINDEX ind, int val, int degrees) {
// same phase // same phase
if (!relativePhase) { if (!relativePhase) {
FILE_LOG(logINFO, ("\tNothing to do in Phase Shift\n")); FILE_LOG(logINFO, ("\tNothing to do in Phase Shift\n"));
return; return OK;
} }
FILE_LOG(logINFOBLUE, ("\tConfiguring Phase of C%d(%s) to %d (degree mode: %d)\n", ind, clock_names[ind], val, degrees)); FILE_LOG(logINFOBLUE, ("Configuring Phase\n"));
int phase = 0; int phase = 0;
if (relativePhase > 0) { if (relativePhase > 0) {
@ -1657,9 +1596,14 @@ void configurePhase(enum CLKINDEX ind, int val, int degrees) {
ALTERA_PLL_SetPhaseShift(phase, (int)ind, 0); ALTERA_PLL_SetPhaseShift(phase, (int)ind, 0);
clkPhase[ind] = valShift; clkPhase[ind] = valShift;
return OK;
} }
int getPhase(enum CLKINDEX ind, int degrees) { int getPhase(enum CLKINDEX ind, int degrees) {
if (ind != ADC_CLK && ind != DBIT_CLK) {
FILE_LOG(logERROR, ("Unknown clock index %d to get phase\n", ind));
return -1;
}
if (!degrees) if (!degrees)
return clkPhase[ind]; return clkPhase[ind];
// convert back to degrees // convert back to degrees
@ -1669,32 +1613,29 @@ int getPhase(enum CLKINDEX ind, int degrees) {
} }
int getMaxPhase(enum CLKINDEX ind) { int getMaxPhase(enum CLKINDEX ind) {
if (ind != ADC_CLK && ind != DBIT_CLK) {
FILE_LOG(logERROR, ("Unknown clock index %d to get max phase\n", ind));
return -1;
}
int ret = ((double)PLL_VCO_FREQ_MHZ / (double)clkDivider[ind]) * MAX_PHASE_SHIFTS_STEPS; int ret = ((double)PLL_VCO_FREQ_MHZ / (double)clkDivider[ind]) * MAX_PHASE_SHIFTS_STEPS;
char clock_names[4][10]={"run_clk","adc_clk", "sync_clk", "dbit_clk"}; char* clock_names[] = {CLK_NAMES};
FILE_LOG(logDEBUG1, ("Max Phase Shift (%s): %d (Clock: %d MHz, VCO:%d MHz)\n", FILE_LOG(logDEBUG1, ("Max Phase Shift (%s): %d (Clock: %d MHz, VCO:%d MHz)\n",
clock_names[ind], ret, clkDivider[ind], PLL_VCO_FREQ_MHZ)); clock_names[ind], ret, clkDivider[ind], PLL_VCO_FREQ_MHZ));
return ret; return ret;
} }
int validatePhaseinDegrees(enum speedVariable ind, int val, int retval) { int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval) {
if (val == -1) if (ind != ADC_CLK && ind != DBIT_CLK) {
return OK; FILE_LOG(logERROR, ("Unknown clock index %d to validate phase in degrees\n", ind));
enum CLKINDEX clkIndex; return FAIL;
switch(ind) {
case ADC_PHASE:
clkIndex = ADC_CLK;
break;
case DBIT_PHASE:
clkIndex = DBIT_CLK;
break;
default:
FILE_LOG(logERROR, ("Unknown speed enum %d for validating phase in degrees\n", (int)ind));
} }
FILE_LOG(logDEBUG1, ("validating phase in degrees for clk %d\n", clkIndex)); if (val == -1) {
int maxShift = getMaxPhase(clkIndex); return OK;
// convert degrees to shift }
FILE_LOG(logDEBUG1, ("validating phase in degrees for clk %d\n", ind));
int maxShift = getMaxPhase(ind);
// convert degrees to shift // convert degrees to shift
int valShift = 0; int valShift = 0;
ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift);
@ -1706,17 +1647,21 @@ int validatePhaseinDegrees(enum speedVariable ind, int val, int retval) {
return FAIL; return FAIL;
} }
void configureFrequency(enum CLKINDEX ind, int val) { int setFrequency(enum CLKINDEX ind, int val) {
char clock_names[4][10]={"run_clk","adc_clk", "sync_clk", "dbit_clk"}; if (ind < 0 || ind >= NUM_CLOCKS) {
if (val <= 0) FILE_LOG(logERROR, ("Unknown clock index %d to set frequency\n", ind));
return; return FAIL;
}
FILE_LOG(logINFO, ("\tConfiguring Frequency of C%d(%s) to %d MHz\n", ind, clock_names[ind], val)); if (val <= 0) {
return FAIL;
}
char* clock_names[] = {CLK_NAMES};
FILE_LOG(logINFO, ("\tSetting %s clock (%d) frequency to %d MHz\n", clock_names[ind], ind, val));
// check adc clk too high // check adc clk too high
if (ind == ADC_CLK && val > MAXIMUM_ADC_CLK) { if (ind == ADC_CLK && val > MAXIMUM_ADC_CLK) {
FILE_LOG(logERROR, ("Frequency %d MHz too high for ADC\n", val)); FILE_LOG(logERROR, ("Frequency %d MHz too high for ADC\n", val));
return; return FAIL;
} }
// Remembering adcphase/ dbit phase // Remembering adcphase/ dbit phase
@ -1727,7 +1672,7 @@ void configureFrequency(enum CLKINDEX ind, int val) {
// Calculate and set output frequency // Calculate and set output frequency
clkDivider[ind] = ALTERA_PLL_SetOuputFrequency (ind, PLL_VCO_FREQ_MHZ, val); clkDivider[ind] = ALTERA_PLL_SetOuputFrequency (ind, PLL_VCO_FREQ_MHZ, val);
FILE_LOG(logINFO, ("\tC%d(%s): Frequency set to %d MHz\n", ind, clock_names[ind], clkDivider[ind])); FILE_LOG(logINFO, ("\t%s clock (%d) frequency set to %d MHz\n", clock_names[ind], ind, clkDivider[ind]));
// adc and dbit phase is reset by pll (when setting output frequency) // adc and dbit phase is reset by pll (when setting output frequency)
clkPhase[ADC_CLK] = 0; clkPhase[ADC_CLK] = 0;
@ -1736,23 +1681,32 @@ void configureFrequency(enum CLKINDEX ind, int val) {
// set the phase if custom set // set the phase if custom set
if (clkPhase[ADC_CLK] != adcPhase) { if (clkPhase[ADC_CLK] != adcPhase) {
FILE_LOG(logINFO, ("\tPhase reset by PLL\n\tCorrecting ADC phase to %d\n", adcPhase)); FILE_LOG(logINFO, ("\tPhase reset by PLL\n\tCorrecting ADC phase to %d\n", adcPhase));
configurePhase(ADC_CLK, adcPhase, 0); setPhase(ADC_CLK, adcPhase, 0);
} }
if (clkPhase[DBIT_CLK] != dbitPhase) { if (clkPhase[DBIT_CLK] != dbitPhase) {
FILE_LOG(logINFO, ("\tPhase reset by PLL\n\tCorrecting DBIT phase to %d\n", dbitPhase)); FILE_LOG(logINFO, ("\tPhase reset by PLL\n\tCorrecting DBIT phase to %d\n", dbitPhase));
configurePhase(DBIT_CLK, dbitPhase, 0); setPhase(DBIT_CLK, dbitPhase, 0);
} }
// required to reconfigure as adc clock is stopped temporarily when resetting pll (in changing output frequency) // required to reconfigure as adc clock is stopped temporarily when resetting pll (in changing output frequency)
AD9257_Configure(); AD9257_Configure();
if (ind != SYNC_CLK) {
configureSyncFrequency(ind);
}
return OK;
} }
int getFrequency(enum CLKINDEX ind) { int getFrequency(enum CLKINDEX ind) {
if (ind < 0 || ind >= NUM_CLOCKS) {
FILE_LOG(logERROR, ("Unknown clock index %d to get frequency\n", ind));
return -1;
}
return clkDivider[ind]; return clkDivider[ind];
} }
void configureSyncFrequency(enum CLKINDEX ind) { void configureSyncFrequency(enum CLKINDEX ind) {
char clock_names[4][10]={"run_clk","adc_clk", "sync_clk", "dbit_clk"}; char* clock_names[] = {CLK_NAMES};
int clka = 0, clkb = 0; int clka = 0, clkb = 0;
switch(ind) { switch(ind) {
case ADC_CLK: case ADC_CLK:
@ -1768,6 +1722,7 @@ void configureSyncFrequency(enum CLKINDEX ind) {
clkb = ADC_CLK; clkb = ADC_CLK;
break; break;
default: default:
FILE_LOG(logERROR, ("Unknown clock index %d to configure sync frequcny\n", ind));
return; return;
} }
@ -1798,17 +1753,22 @@ void configureSyncFrequency(enum CLKINDEX ind) {
// configure sync to current // configure sync to current
if (configure) if (configure)
configureFrequency(SYNC_CLK, min); setFrequency(SYNC_CLK, min);
} }
void setAdcOffsetRegister(int adc, int val) { void setPipeline(enum CLKINDEX ind, int val) {
if (val < 0) if (ind != ADC_CLK && ind != DBIT_CLK) {
FILE_LOG(logERROR, ("Unknown clock index %d to set pipeline\n", ind));
return; return;
}
FILE_LOG(logINFO, ("Setting %s Pipeline to %d\n", (adc ? "ADC" : "Dbit"), val)); if (val < 0) {
return;
}
char* clock_names[] = {CLK_NAMES};
FILE_LOG(logINFO, ("Setting %s clock (%d) Pipeline to %d\n", clock_names[ind], ind, val));
uint32_t offset = ADC_OFFSET_ADC_PPLN_OFST; uint32_t offset = ADC_OFFSET_ADC_PPLN_OFST;
uint32_t mask = ADC_OFFSET_ADC_PPLN_MSK; uint32_t mask = ADC_OFFSET_ADC_PPLN_MSK;
if (!adc) { if (ind == DBIT_CLK) {
offset = ADC_OFFSET_DBT_PPLN_OFST; offset = ADC_OFFSET_DBT_PPLN_OFST;
mask = ADC_OFFSET_DBT_PPLN_MSK; mask = ADC_OFFSET_DBT_PPLN_MSK;
} }
@ -1818,13 +1778,18 @@ void setAdcOffsetRegister(int adc, int val) {
bus_w(addr, bus_r(addr) & ~ mask); bus_w(addr, bus_r(addr) & ~ mask);
// set value // set value
bus_w(addr, bus_r(addr) | ((val << offset) & mask)); bus_w(addr, bus_r(addr) | ((val << offset) & mask));
FILE_LOG(logDEBUG1, (" %s Offset: 0x%8x\n", (adc ? "ADC" : "Dbit"), bus_r(addr))); FILE_LOG(logDEBUG1, (" %s clock (%d) Offset: 0x%8x\n", clock_names[ind], ind, bus_r(addr)));
} }
int getAdcOffsetRegister(int adc) { int getPipeline(enum CLKINDEX ind) {
if (adc) if (ind != ADC_CLK && ind != DBIT_CLK) {
return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_ADC_PPLN_MSK) >> ADC_OFFSET_ADC_PPLN_OFST); FILE_LOG(logERROR, ("Unknown clock index %d to get pipeline\n", ind));
return -1;
}
if (ind == DBIT_CLK) {
return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_DBT_PPLN_MSK) >> ADC_OFFSET_DBT_PPLN_OFST); return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_DBT_PPLN_MSK) >> ADC_OFFSET_DBT_PPLN_OFST);
}
return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_ADC_PPLN_MSK) >> ADC_OFFSET_ADC_PPLN_OFST);
} }

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@ -23,11 +23,12 @@ typedef struct ip_header_struct {
} ip_header; } ip_header;
/* Enums */ /* Enums */
enum CLKINDEX {RUN_CLK, ADC_CLK, SYNC_CLK, DBIT_CLK, NUM_CLOCKS};
enum ADCINDEX {V_PWR_IO, V_PWR_A, V_PWR_B, V_PWR_C, V_PWR_D, I_PWR_IO, I_PWR_A, I_PWR_B, I_PWR_C, I_PWR_D}; enum ADCINDEX {V_PWR_IO, V_PWR_A, V_PWR_B, V_PWR_C, V_PWR_D, I_PWR_IO, I_PWR_A, I_PWR_B, I_PWR_C, I_PWR_D};
enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7, D8, D9,
D10, D11, D12, D13, D14, D15, D16, D17, D10, D11, D12, D13, D14, D15, D16, D17,
D_PWR_D, D_PWR_CHIP, D_PWR_C, D_PWR_B, D_PWR_A, D_PWR_IO}; D_PWR_D, D_PWR_CHIP, D_PWR_C, D_PWR_B, D_PWR_A, D_PWR_IO};
enum CLKINDEX {RUN_CLK, ADC_CLK, SYNC_CLK, DBIT_CLK, NUM_CLOCKS};
#define CLK_NAMES "run", "adc", "sync", "dbit"
/* Hardware Definitions */ /* Hardware Definitions */
#define NCHAN (36) #define NCHAN (36)

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@ -450,7 +450,7 @@ void setupDetector() {
setParallelMode(DEFAULT_PARALLEL_MODE); setParallelMode(DEFAULT_PARALLEL_MODE);
setOverFlowMode(DEFAULT_READOUT_STOREINRAM_MODE); setOverFlowMode(DEFAULT_READOUT_STOREINRAM_MODE);
setStoreInRamMode(DEFAULT_READOUT_OVERFLOW32_MODE); setStoreInRamMode(DEFAULT_READOUT_OVERFLOW32_MODE);
setSpeed(CLOCK_DIVIDER, DEFAULT_CLK_SPEED);//clk_devider,half speed setClockDivider(RUN_CLK, DEFAULT_CLK_SPEED);//clk_devider,half speed
setIODelay(DEFAULT_IO_DELAY); setIODelay(DEFAULT_IO_DELAY);
setTiming(DEFAULT_TIMING_MODE); setTiming(DEFAULT_TIMING_MODE);
setStartingFrameNumber(DEFAULT_STARTING_FRAME_NUMBER); setStartingFrameNumber(DEFAULT_STARTING_FRAME_NUMBER);
@ -532,25 +532,6 @@ int setDynamicRange(int dr) {
/* parameters - readout */ /* parameters - readout */
void setSpeed(enum speedVariable ind, int val) {
if (ind != CLOCK_DIVIDER)
return;
if (val != -1) {
FILE_LOG(logDEBUG1, ("Setting Read out Speed: %d\n", val));
#ifndef VIRTUAL
if (Feb_Control_SetReadoutSpeed(val))
#endif
eiger_readoutspeed = val;
}
}
int getSpeed(enum speedVariable ind) {
if (ind != CLOCK_DIVIDER)
return -1;
return eiger_readoutspeed;
}
int setParallelMode(int mode) { int setParallelMode(int mode) {
mode = (mode == 0 ? E_NON_PARALLEL : E_PARALLEL); mode = (mode == 0 ? E_NON_PARALLEL : E_PARALLEL);
#ifndef VIRTUAL #ifndef VIRTUAL
@ -1354,6 +1335,27 @@ int enableTenGigabitEthernet(int val) {
/* eiger specific - iodelay, pulse, rate, temp, activate, delay nw parameter */ /* eiger specific - iodelay, pulse, rate, temp, activate, delay nw parameter */
int setClockDivider(enum CLKINDEX ind, int val) {
if (ind != RUN_CLK) {
FILE_LOG(logERROR, ("Unknown clock index: %d\n", ind));
return FAIL;
}
if (val >= 0) {
FILE_LOG(logINFO, ("Setting Read out Speed: %d\n", val));
#ifndef VIRTUAL
if (Feb_Control_SetReadoutSpeed(val))
#endif
eiger_readoutspeed = val;
}
}
int getClockDivider(enum CLKINDEX ind) {
if (ind != RUN_CLK) {
FILE_LOG(logERROR, ("Unknown clock index: %d\n", ind));
return FAIL;
}
return eiger_readoutspeed;
}
int setIODelay(int val) { int setIODelay(int val) {
if (val!=-1) { if (val!=-1) {

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@ -30,7 +30,9 @@ enum DACINDEX {E_SVP,E_VTR,E_VRF,E_VRS,E_SVN,E_VTGSTV,E_VCMP_LL,E_VCMP_L
}; };
enum ADCINDEX {TEMP_FPGAEXT, TEMP_10GE, TEMP_DCDC, TEMP_SODL, TEMP_SODR, TEMP_FPGA, TEMP_FPGAFEBL, TEMP_FPGAFEBR}; enum ADCINDEX {TEMP_FPGAEXT, TEMP_10GE, TEMP_DCDC, TEMP_SODL, TEMP_SODR, TEMP_FPGA, TEMP_FPGAFEBL, TEMP_FPGAFEBR};
enum NETWORKINDEX {TXN_LEFT, TXN_RIGHT, TXN_FRAME,FLOWCTRL_10G}; enum NETWORKINDEX {TXN_LEFT, TXN_RIGHT, TXN_FRAME,FLOWCTRL_10G};
enum {E_PARALLEL, E_NON_PARALLEL}; enum ROINDEX {E_PARALLEL, E_NON_PARALLEL};
enum CLKINDEX {RUN_CLK, NUM_CLOCKS};
#define CLK_NAMES "run"
/* Hardware Definitions */ /* Hardware Definitions */
#define NCHAN (256 * 256) #define NCHAN (256 * 256)

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@ -666,11 +666,25 @@ void calcChecksum(udp_header* udp) {
} }
// Detector Specific // Detector Specific
int setPhase(enum CLKINDEX ind, int val, int degrees) {
char clock_names[6][15]={"Readout_c0", "Readout_c1", "System_c0", "System_c1", "System_c2", "System_c3"};
FILE_LOG(logDEBUG1, ("\tConfiguring Phase of C%d(%s) to %d (degree mode: %d)\n", ind, clock_names[ind], val, degrees));
int setPhase(enum CLKINDEX ind, int val, int degrees) {
if (ind < 0 || ind >= NUM_CLOCKS) {
FILE_LOG(logERROR, ("Unknown clock index %d to set phase\n", ind));
return FAIL;
}
char* clock_names[] = {CLK_NAMES};
FILE_LOG(logINFO, ("Setting %s clock (%d) phase to %d %s\n", clock_names[ind], ind, val, degrees == 0 ? "" : "degrees"));
int maxShift = getMaxPhase(ind); int maxShift = getMaxPhase(ind);
// validation
if (degrees && (val < 0 || val > 359)) {
FILE_LOG(logERROR, ("\tPhase outside limits (0 - 359°C)\n"));
return FAIL;
}
if (!degrees && (val < 0 || val > maxShift - 1)) {
FILE_LOG(logERROR, ("\tPhase outside limits (0 - %d phase shifts)\n", maxShift - 1));
return FAIL;
}
int valShift = val; int valShift = val;
// convert to phase shift // convert to phase shift
if (degrees) { if (degrees) {
@ -686,7 +700,7 @@ int setPhase(enum CLKINDEX ind, int val, int degrees) {
FILE_LOG(logINFO, ("\tNothing to do in Phase Shift\n")); FILE_LOG(logINFO, ("\tNothing to do in Phase Shift\n"));
return OK; return OK;
} }
FILE_LOG(logINFOBLUE, ("\tConfiguring Phase of C%d(%s) to %d (degree mode: %d)\n", ind, clock_names[ind], val, degrees)); FILE_LOG(logINFOBLUE, ("Configuring Phase\n"));
int phase = 0; int phase = 0;
if (relativePhase > 0) { if (relativePhase > 0) {
@ -705,6 +719,10 @@ int setPhase(enum CLKINDEX ind, int val, int degrees) {
} }
int getPhase(enum CLKINDEX ind, int degrees) { int getPhase(enum CLKINDEX ind, int degrees) {
if (ind < 0 || ind >= NUM_CLOCKS) {
FILE_LOG(logERROR, ("Unknown clock index %d to get phase\n", ind));
return -1;
}
if (!degrees) if (!degrees)
return clkPhase[ind]; return clkPhase[ind];
// convert back to degrees // convert back to degrees
@ -714,11 +732,15 @@ int getPhase(enum CLKINDEX ind, int degrees) {
} }
int getMaxPhase(enum CLKINDEX ind) { int getMaxPhase(enum CLKINDEX ind) {
if (ind < 0 || ind >= NUM_CLOCKS) {
FILE_LOG(logERROR, ("Unknown clock index %d to get max phase\n", ind));
return -1;
}
int vcofreq = getVCOFrequency(ind); int vcofreq = getVCOFrequency(ind);
int maxshiftstep = ALTERA_PLL_C10_GetMaxPhaseShiftStepsofVCO(); int maxshiftstep = ALTERA_PLL_C10_GetMaxPhaseShiftStepsofVCO();
int ret = ((double)vcofreq / (double)clkDivider[ind]) * maxshiftstep; int ret = ((double)vcofreq / (double)clkDivider[ind]) * maxshiftstep;
char clock_names[6][15]={"Readout_c0", "Readout_c1", "System_c0", "System_c1", "System_c2", "System_c3"}; char* clock_names[] = {CLK_NAMES};
FILE_LOG(logDEBUG1, ("\tMax Phase Shift (%s): %d (Clock: %d Hz, VCO:%d Hz)\n", FILE_LOG(logDEBUG1, ("\tMax Phase Shift (%s): %d (Clock: %d Hz, VCO:%d Hz)\n",
clock_names[ind], ret, clkDivider[ind], vcofreq)); clock_names[ind], ret, clkDivider[ind], vcofreq));
@ -726,12 +748,16 @@ int getMaxPhase(enum CLKINDEX ind) {
} }
int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval) { int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval) {
if (val == -1) if (ind < 0 || ind >= NUM_CLOCKS) {
FILE_LOG(logERROR, ("Unknown clock index %d to validate phase in degrees\n", ind));
return FAIL;
}
if (val == -1) {
return OK; return OK;
}
FILE_LOG(logDEBUG1, ("validating phase in degrees for clk %d\n", (int)ind)); FILE_LOG(logDEBUG1, ("validating phase in degrees for clk %d\n", (int)ind));
int maxShift = getMaxPhase(ind); int maxShift = getMaxPhase(ind);
// convert degrees to shift // convert degrees to shift
// convert degrees to shift
int valShift = 0; int valShift = 0;
ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift);
// convert back to degrees // convert back to degrees
@ -745,10 +771,18 @@ int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval) {
int getFrequency(enum CLKINDEX ind) { int getFrequency(enum CLKINDEX ind) {
if (ind < 0 || ind >= NUM_CLOCKS) {
FILE_LOG(logERROR, ("Unknown clock index %d to get frequency\n", ind));
return -1;
}
return clkDivider[ind]; return clkDivider[ind];
} }
int getVCOFrequency(enum CLKINDEX ind) { int getVCOFrequency(enum CLKINDEX ind) {
if (ind < 0 || ind >= NUM_CLOCKS) {
FILE_LOG(logERROR, ("Unknown clock index %d to get vco frequency\n", ind));
return -1;
}
int pllIndex = ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL; int pllIndex = ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL;
return ALTERA_PLL_C10_GetVCOFrequency(pllIndex); return ALTERA_PLL_C10_GetVCOFrequency(pllIndex);
} }
@ -758,13 +792,19 @@ int getMaxClockDivider() {
} }
int setClockDivider(enum CLKINDEX ind, int val) { int setClockDivider(enum CLKINDEX ind, int val) {
char clock_names[6][15]={"Readout_c0", "Readout_c1", "System_c0", "System_c1", "System_c2", "System_c3"}; if (ind < 0 || ind >= NUM_CLOCKS) {
FILE_LOG(logERROR, ("Unknown clock index %d to set clock divider\n", ind));
return FAIL;
}
if (val < 2 || val > getMaxClockDivider()) {
return FAIL;
}
char* clock_names[] = {CLK_NAMES};
int vcofreq = getVCOFrequency(ind); int vcofreq = getVCOFrequency(ind);
int currentdiv = vcofreq / clkDivider[ind]; int currentdiv = vcofreq / clkDivider[ind];
int newfreq = vcofreq / val; int newfreq = vcofreq / val;
FILE_LOG(logINFO, ("\tConfiguring Click Divider of C%d(%s) from %d (%d Hz) to %d (%d Hz). \n\t(Vcofreq: %d Hz)\n", ind, clock_names[ind], currentdiv, clkDivider[ind], val, newfreq, vcofreq)); FILE_LOG(logINFO, ("\tSetting %s clock (%d) divider from %d (%d Hz) to %d (%d Hz). \n\t(Vcofreq: %d Hz)\n", clock_names[ind], ind, currentdiv, clkDivider[ind], val, newfreq, vcofreq));
// Remembering old phases in degrees // Remembering old phases in degrees
int oldPhases[NUM_CLOCKS]; int oldPhases[NUM_CLOCKS];
@ -772,7 +812,7 @@ int setClockDivider(enum CLKINDEX ind, int val) {
int i = 0; int i = 0;
for (i = 0; i < NUM_CLOCKS; ++i) { for (i = 0; i < NUM_CLOCKS; ++i) {
oldPhases [i] = getPhase(i, 1); oldPhases [i] = getPhase(i, 1);
FILE_LOG(logDEBUG1, ("\tRemembering C%d (%s) phase: %d degrees\n", ind, clock_names, oldPhases[i])); FILE_LOG(logDEBUG1, ("\tRemembering %s clock (%d) phase: %d degrees\n", clock_names[ind], ind, oldPhases[i]));
} }
} }
@ -781,7 +821,7 @@ int setClockDivider(enum CLKINDEX ind, int val) {
int clkIndex = ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind; int clkIndex = ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind;
int ret = ALTERA_PLL_C10_SetOuputFrequency (pllIndex, clkIndex, newfreq); int ret = ALTERA_PLL_C10_SetOuputFrequency (pllIndex, clkIndex, newfreq);
clkDivider[ind] = newfreq; clkDivider[ind] = newfreq;
FILE_LOG(logINFO, ("\tC%d(%s): Clock Divider set to %d (%d Hz)\n", ind, clock_names[ind], val, clkDivider[ind])); FILE_LOG(logINFO, ("\t%s clock (%d) divider set to %d (%d Hz)\n", clock_names[ind], ind, val, clkDivider[ind]));
// phase is reset by pll (when setting output frequency) // phase is reset by pll (when setting output frequency)
if (ind >= READOUT_C0) { if (ind >= READOUT_C0) {
@ -798,7 +838,7 @@ int setClockDivider(enum CLKINDEX ind, int val) {
{ {
int i = 0; int i = 0;
for (i = 0; i < NUM_CLOCKS; ++i) { for (i = 0; i < NUM_CLOCKS; ++i) {
FILE_LOG(logINFO, ("\tPhase reset by PLL\n\tCorrecting C%d(%s) to %d degrees\n", i, clock_names[i], oldPhases[i])); FILE_LOG(logINFO, ("\tPhase reset by PLL\n\tCorrecting %s clock (%d) phase to %d degrees\n", clock_names[i], i, oldPhases[i]));
setPhase(i, oldPhases[i], 1); setPhase(i, oldPhases[i], 1);
} }
} }
@ -806,6 +846,10 @@ int setClockDivider(enum CLKINDEX ind, int val) {
} }
int getClockDivider(enum CLKINDEX ind) { int getClockDivider(enum CLKINDEX ind) {
if (ind < 0 || ind >= NUM_CLOCKS) {
FILE_LOG(logERROR, ("Unknown clock index %d to get clock divider\n", ind));
return -1;
}
return (getVCOFrequency(ind) / clkDivider[ind]); return (getVCOFrequency(ind) / clkDivider[ind]);
} }

View File

@ -77,6 +77,7 @@ enum DACINDEX {G2_VREF_H_ADC, /* 0 */ \
1400 /* 15 (700 mV) VCOM_ADC2*/ \ 1400 /* 15 (700 mV) VCOM_ADC2*/ \
}; };
enum CLKINDEX {READOUT_C0, READOUT_C1, SYSTEM_C0, SYSTEM_C1, SYSTEM_C2, SYSTEM_C3, NUM_CLOCKS}; enum CLKINDEX {READOUT_C0, READOUT_C1, SYSTEM_C0, SYSTEM_C1, SYSTEM_C2, SYSTEM_C3, NUM_CLOCKS};
#define CLK_NAMES "READOUT_C0", "READOUT_C1", "SYSTEM_C0", "SYSTEM_C1", "SYSTEM_C2", "SYSTEM_C3"
/* Struct Definitions */ /* Struct Definitions */
typedef struct udp_header_struct { typedef struct udp_header_struct {

View File

@ -783,21 +783,6 @@ ROI getROI() {
return rois; return rois;
} }
// parameters - readout
void setSpeed(enum speedVariable ind, int val) {
switch(ind) {
case ADC_PHASE:
setPhaseShift(val);
break;
default:
return;
}
}
int getSpeed(enum speedVariable ind) {
// cannot get phase shift
return -1;
}
/* parameters - timer */ /* parameters - timer */
void setNumFrames(int64_t val) { void setNumFrames(int64_t val) {
@ -1513,6 +1498,18 @@ int* getDetectorPosition() {
return detPos; return detPos;
} }
/* gotthard specific - adc phase */
int setPhase(enum CLKINDEX ind, int val, int degrees) {
if (ind != ADC_CLK) {
FILE_LOG(logERROR, ("Unknown clock index: %d\n", ind));
return FAIL;
}
if (degrees != 0) {
FILE_LOG(logERROR, ("Cannot set phase in degrees\n"));
return FAIL;
}
setPhaseShift(val);
}
/* aquisition */ /* aquisition */

View File

@ -5,6 +5,9 @@
/* Enums */ /* Enums */
enum ADCINDEX {TEMP_FPGA, TEMP_ADC}; enum ADCINDEX {TEMP_FPGA, TEMP_ADC};
enum DACINDEX {G_VREF_DS, G_VCASCN_PB, G_VCASCP_PB, G_VOUT_CM, G_VCASC_OUT, G_VIN_CM, G_VREF_COMP, G_IB_TESTC}; enum DACINDEX {G_VREF_DS, G_VCASCN_PB, G_VCASCP_PB, G_VOUT_CM, G_VCASC_OUT, G_VIN_CM, G_VREF_COMP, G_IB_TESTC};
enum CLKINDEX {ADC_CLK, NUM_CLOCKS};
#define CLK_NAMES "adc"
#define DEFAULT_DAC_VALS { \ #define DEFAULT_DAC_VALS { \
660, /* G_VREF_DS */ \ 660, /* G_VREF_DS */ \
650, /* G_VCASCN_PB */ \ 650, /* G_VCASCN_PB */ \

View File

@ -431,7 +431,7 @@ void setupDetector() {
bus_w(DAQ_REG, 0x0); /* Only once at server startup */ bus_w(DAQ_REG, 0x0); /* Only once at server startup */
FILE_LOG(logINFOBLUE, ("Setting Default parameters\n")); FILE_LOG(logINFOBLUE, ("Setting Default parameters\n"));
setClockDivider(HALF_SPEED); setClockDivider(RUN_CLK, HALF_SPEED);
cleanFifos(); cleanFifos();
resetCore(); resetCore();
@ -452,7 +452,7 @@ void setupDetector() {
setNumAdditionalStorageCells(DEFAULT_NUM_STRG_CLLS); setNumAdditionalStorageCells(DEFAULT_NUM_STRG_CLLS);
setStorageCellDelay(DEFAULT_STRG_CLL_DLY); setStorageCellDelay(DEFAULT_STRG_CLL_DLY);
selectStoragecellStart(DEFAULT_STRG_CLL_STRT); selectStoragecellStart(DEFAULT_STRG_CLL_STRT);
/*setClockDivider(HALF_SPEED); depends if all the previous stuff works*/ /*setClockDivider(RUN_CLK, HALF_SPEED); depends if all the previous stuff works*/
setTiming(DEFAULT_TIMING_MODE); setTiming(DEFAULT_TIMING_MODE);
setStartingFrameNumber(DEFAULT_STARTING_FRAME_NUMBER); setStartingFrameNumber(DEFAULT_STARTING_FRAME_NUMBER);
@ -542,36 +542,6 @@ uint32_t getADCInvertRegister() {
} }
/* parameters - speed, readout */
void setSpeed(enum speedVariable ind, int val, int mode) {
switch(ind) {
case CLOCK_DIVIDER:
setClockDivider(val);
break;
case ADC_PHASE:
setAdcPhase(val, mode);
break;
default:
return;
}
}
int getSpeed(enum speedVariable ind, int mode) {
switch(ind) {
case CLOCK_DIVIDER:
return getClockDivider();
case ADC_PHASE:
return getPhase(mode);
case MAX_ADC_PHASE_SHIFT:
return getMaxPhaseShift();
default:
return -1;
}
}
/* parameters - timer */ /* parameters - timer */
int selectStoragecellStart(int pos) { int selectStoragecellStart(int pos) {
@ -1376,10 +1346,11 @@ void configureASICTimer() {
bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_DS_TMR_MSK) | ASIC_CTRL_DS_TMR_VAL); bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_DS_TMR_MSK) | ASIC_CTRL_DS_TMR_VAL);
} }
void setClockDivider(int val) { int setClockDivider(enum CLKINDEX ind, int val) {
// setting if (ind != RUN_CLK) {
if(val >= 0) { FILE_LOG(logERROR, ("Unknown clock index %d to set speed\n", ind));
return FAIL;
}
// stop state machine if running // stop state machine if running
if(runBusy()) { if(runBusy()) {
stopStateMachine(); stopStateMachine();
@ -1395,7 +1366,7 @@ void setClockDivider(int val) {
case FULL_SPEED: case FULL_SPEED:
if(isHardwareVersion2()) { if(isHardwareVersion2()) {
FILE_LOG(logERROR, ("Cannot set full speed. Should not be here\n")); FILE_LOG(logERROR, ("Cannot set full speed. Should not be here\n"));
return; return FAIL;
} }
FILE_LOG(logINFO, ("Setting Full Speed (40 MHz):\n")); FILE_LOG(logINFO, ("Setting Full Speed (40 MHz):\n"));
adcOfst = ADC_OFST_FULL_SPEED_VAL; adcOfst = ADC_OFST_FULL_SPEED_VAL;
@ -1421,7 +1392,8 @@ void setClockDivider(int val) {
break; break;
default: default:
break; FILE_LOG(logERROR, ("Unknown speed val %d\n", val));
return FAIL;
} }
bus_w(CONFIG_REG, (bus_r(CONFIG_REG) & ~CONFIG_READOUT_SPEED_MSK) | config); bus_w(CONFIG_REG, (bus_r(CONFIG_REG) & ~CONFIG_READOUT_SPEED_MSK) | config);
@ -1433,12 +1405,17 @@ void setClockDivider(int val) {
bus_w(SAMPLE_REG, sampleAdcSpeed); bus_w(SAMPLE_REG, sampleAdcSpeed);
FILE_LOG(logINFO, ("\tSet Sample Reg to 0x%x\n", bus_r(SAMPLE_REG))); FILE_LOG(logINFO, ("\tSet Sample Reg to 0x%x\n", bus_r(SAMPLE_REG)));
setAdcPhase(adcPhase, 0); setPhase(ADC_CLK, adcPhase, 0);
FILE_LOG(logINFO, ("\tSet ADC Phase Reg to %d\n", adcPhase)); FILE_LOG(logINFO, ("\tSet ADC Phase Reg to %d\n", adcPhase));
}
return OK;
} }
int getClockDivider() { int getClockDivider(enum CLKINDEX ind) {
if (ind != RUN_CLK) {
FILE_LOG(logERROR, ("Unknown clock index %d to get speed\n", ind));
return -1;
}
u_int32_t speed = bus_r(CONFIG_REG) & CONFIG_READOUT_SPEED_MSK; u_int32_t speed = bus_r(CONFIG_REG) & CONFIG_READOUT_SPEED_MSK;
switch(speed){ switch(speed){
case CONFIG_FULL_SPEED_40MHZ_VAL: case CONFIG_FULL_SPEED_40MHZ_VAL:
@ -1448,21 +1425,26 @@ int getClockDivider() {
case CONFIG_QUARTER_SPEED_10MHZ_VAL: case CONFIG_QUARTER_SPEED_10MHZ_VAL:
return QUARTER_SPEED; return QUARTER_SPEED;
default: default:
FILE_LOG(logERROR, ("Unknown speed val: %d\n", speed));
return -1; return -1;
} }
} }
void setAdcPhase(int val, int degrees){ int setPhase(enum CLKINDEX ind, int val, int degrees){
if (ind != ADC_CLK) {
FILE_LOG(logERROR, ("Unknown clock index %d to set phase\n", ind));
return FAIL;
}
int maxShift = MAX_PHASE_SHIFTS; int maxShift = MAX_PHASE_SHIFTS;
// validation // validation
if (degrees && (val < 0 || val > 359)) { if (degrees && (val < 0 || val > 359)) {
FILE_LOG(logERROR, ("\tPhase provided outside limits (0 - 359°C)\n")); FILE_LOG(logERROR, ("\tPhase provided outside limits (0 - 359°C)\n"));
return; return FAIL;
} }
if (!degrees && (val < 0 || val > MAX_PHASE_SHIFTS - 1)) { if (!degrees && (val < 0 || val > MAX_PHASE_SHIFTS - 1)) {
FILE_LOG(logERROR, ("\tPhase provided outside limits (0 - %d phase shifts)\n", maxShift - 1)); FILE_LOG(logERROR, ("\tPhase provided outside limits (0 - %d phase shifts)\n", maxShift - 1));
return; return FAIL;
} }
FILE_LOG(logINFO, ("Setting ADC Phase to %d (degree mode: %d)\n", val, degrees)); FILE_LOG(logINFO, ("Setting ADC Phase to %d (degree mode: %d)\n", val, degrees));
@ -1479,7 +1461,7 @@ void setAdcPhase(int val, int degrees){
// same phase // same phase
if (!relativePhase) { if (!relativePhase) {
FILE_LOG(logINFO, ("Nothing to do in Phase Shift\n")); FILE_LOG(logINFO, ("Nothing to do in Phase Shift\n"));
return; return OK;
} }
int phase = 0; int phase = 0;
@ -1495,9 +1477,14 @@ void setAdcPhase(int val, int degrees){
adcPhase = valShift; adcPhase = valShift;
alignDeserializer(); alignDeserializer();
return OK;
} }
int getPhase(int degrees) { int getPhase(enum CLKINDEX ind, int degrees) {
if (ind != ADC_CLK) {
FILE_LOG(logERROR, ("Unknown clock index %d to get phase\n", ind));
return -1;
}
if (!degrees) if (!degrees)
return adcPhase; return adcPhase;
// convert back to degrees // convert back to degrees
@ -1506,13 +1493,22 @@ int getPhase(int degrees) {
return val; return val;
} }
int getMaxPhaseShift() { int getMaxPhase(enum CLKINDEX ind) {
if (ind != ADC_CLK) {
FILE_LOG(logERROR, ("Unknown clock index %d to get max phase\n", ind));
return -1;
}
return MAX_PHASE_SHIFTS; return MAX_PHASE_SHIFTS;
} }
int validatePhaseinDegrees(int val, int retval) { int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval) {
if (val == -1) if (ind != ADC_CLK) {
FILE_LOG(logERROR, ("Unknown clock index %d to validate phase in degrees\n", ind));
return FAIL;
}
if (val == -1) {
return OK; return OK;
}
FILE_LOG(logDEBUG1, ("validating phase in degrees\n")); FILE_LOG(logDEBUG1, ("validating phase in degrees\n"));
int maxShift = MAX_PHASE_SHIFTS; int maxShift = MAX_PHASE_SHIFTS;
// convert degrees to shift // convert degrees to shift

View File

@ -49,6 +49,8 @@ enum DACINDEX {J_VB_COMP, J_VDD_PROT, J_VIN_COM, J_VREF_PRECH, J_VB_PIXBUF, J
420 /* J_VREF_COMP */ \ 420 /* J_VREF_COMP */ \
}; };
enum NETWORKINDEX { TXN_FRAME, FLOWCTRL_10G }; enum NETWORKINDEX { TXN_FRAME, FLOWCTRL_10G };
enum CLKINDEX {RUN_CLK, ADC_CLK, NUM_CLOCKS};
#define CLK_NAMES "run", "adc"
/* Hardware Definitions */ /* Hardware Definitions */
#define NCHAN (256 * 256) #define NCHAN (256 * 256)

View File

@ -388,14 +388,6 @@ int setDynamicRange(int dr){
/* parameters - speed, readout */ /* parameters - speed, readout */
void setSpeed(enum speedVariable ind, int val) {
}
int getSpeed(enum speedVariable ind) {
return -1;
}
void setNumFrames(int64_t val) { void setNumFrames(int64_t val) {
if (val > 0) { if (val > 0) {
FILE_LOG(logINFO, ("Setting number of frames %lld\n", (long long int)val)); FILE_LOG(logINFO, ("Setting number of frames %lld\n", (long long int)val));

View File

@ -149,16 +149,6 @@ int setExternalSampling(int val);
#endif #endif
// parameters - readout // parameters - readout
#if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(JUNGFRAUD)
void setSpeed(enum speedVariable ind, int val, int mode);
int getSpeed(enum speedVariable ind, int mode);
#else
#ifndef GOTTHARD2D
void setSpeed(enum speedVariable ind, int val);
int getSpeed(enum speedVariable ind);
#endif
#endif
#ifdef EIGERD #ifdef EIGERD
int setParallelMode(int mode); int setParallelMode(int mode);
int getParallelMode(); int getParallelMode();
@ -355,15 +345,15 @@ int powerChip (int on);
// chip test board or moench specific - configure frequency, phase, pll, flashing firmware // chip test board or moench specific - configure frequency, phase, pll, flashing firmware
#if defined(CHIPTESTBOARDD) || defined(MOENCHD) #if defined(CHIPTESTBOARDD) || defined(MOENCHD)
void configurePhase(enum CLKINDEX ind, int val, int degrees); int setPhase(enum CLKINDEX ind, int val, int degrees);
int getPhase(enum CLKINDEX ind, int degrees); int getPhase(enum CLKINDEX ind, int degrees);
int getMaxPhase(enum CLKINDEX ind); int getMaxPhase(enum CLKINDEX ind);
int validatePhaseinDegrees(enum speedVariable ind, int val, int retval); int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval);
void configureFrequency(enum CLKINDEX ind, int val); int setFrequency(enum CLKINDEX ind, int val);
int getFrequency(enum CLKINDEX ind); int getFrequency(enum CLKINDEX ind);
void configureSyncFrequency(enum CLKINDEX ind); void configureSyncFrequency(enum CLKINDEX ind);
void setAdcOffsetRegister(int adc, int val); void setPipeline(enum CLKINDEX ind, int val);
int getAdcOffsetRegister(int adc); int getPipeline(enum CLKINDEX ind);
extern void eraseFlash(); // programfpga.h extern void eraseFlash(); // programfpga.h
extern int startWritingFPGAprogram(FILE** filefp); // programfpga.h extern int startWritingFPGAprogram(FILE** filefp); // programfpga.h
extern void stopWritingFPGAprogram(FILE* filefp); // programfpga.h extern void stopWritingFPGAprogram(FILE* filefp); // programfpga.h
@ -390,12 +380,12 @@ void initReadoutConfiguration();
int powerChip (int on); int powerChip (int on);
int autoCompDisable(int on); int autoCompDisable(int on);
void configureASICTimer(); void configureASICTimer();
void setClockDivider(int val); int setClockDivider(enum CLKINDEX ind, int val);
int getClockDivider(); int getClockDivider(enum CLKINDEX ind);
void setAdcPhase(int val, int degrees); int setPhase(enum CLKINDEX ind, int val, int degrees);
int getPhase(int degrees); int getPhase(enum CLKINDEX ind, int degrees);
int getMaxPhaseShift(); int getMaxPhase(enum CLKINDEX ind);
int validatePhaseinDegrees(int val, int retval); int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval);
int setThresholdTemperature(int val); int setThresholdTemperature(int val);
int setTemperatureControl(int val); int setTemperatureControl(int val);
int setTemperatureEvent(int val); int setTemperatureEvent(int val);
@ -407,6 +397,8 @@ void alignDeserializer();
// eiger specific - iodelay, pulse, rate, temp, activate, delay nw parameter // eiger specific - iodelay, pulse, rate, temp, activate, delay nw parameter
#elif EIGERD #elif EIGERD
int setClockDivider(enum CLKINDEX ind, int val);
int getClockDivider(enum CLKINDEX ind);
int setIODelay(int val); int setIODelay(int val);
int setCounterBit(int val); int setCounterBit(int val);
int pulsePixel(int n, int x, int y); int pulsePixel(int n, int x, int y);
@ -423,6 +415,10 @@ int getAllTrimbits();
int getBebFPGATemp(); int getBebFPGATemp();
int activate(int enable); int activate(int enable);
// gotthard specific - adc phase
#elif GOTTHARDD
int setPhase(enum CLKINDEX ind, int val, int degrees);
#elif MYTHEN3D #elif MYTHEN3D
uint64_t readPatternWord(int addr); uint64_t readPatternWord(int addr);
uint64_t writePatternWord(int addr, uint64_t word); uint64_t writePatternWord(int addr, uint64_t word);
@ -436,7 +432,7 @@ int setPhase(enum CLKINDEX ind, int val, int degrees);
int getPhase(enum CLKINDEX ind, int degrees); int getPhase(enum CLKINDEX ind, int degrees);
int getMaxPhase(enum CLKINDEX ind); int getMaxPhase(enum CLKINDEX ind);
int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval); int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval);
//int setFrequency(enum CLKINDEX ind, int val); //void setFrequency(enum CLKINDEX ind, int val);
int getFrequency(enum CLKINDEX ind); int getFrequency(enum CLKINDEX ind);
int getVCOFrequency(enum CLKINDEX ind); int getVCOFrequency(enum CLKINDEX ind);
int getMaxClockDivider(); int getMaxClockDivider();

View File

@ -11,7 +11,6 @@ int printSocketReadError();
void init_detector(); void init_detector();
int decode_function(int); int decode_function(int);
const char* getRetName(); const char* getRetName();
const char* getSpeedName(enum speedVariable ind);
const char* getFunctionName(enum detFuncs func); const char* getFunctionName(enum detFuncs func);
void function_table(); void function_table();
void functionNotImplemented(); void functionNotImplemented();
@ -78,7 +77,6 @@ int get_measurement_time(int);
int set_dynamic_range(int); int set_dynamic_range(int);
int set_roi(int); int set_roi(int);
int get_roi(int); int get_roi(int);
int set_speed(int);
int exit_server(int); int exit_server(int);
int lock_server(int); int lock_server(int);
int get_last_client_ip(int); int get_last_client_ip(int);
@ -181,3 +179,5 @@ int get_clock_phase(int);
int get_max_clock_phase_shift(int); int get_max_clock_phase_shift(int);
int set_clock_divider(int); int set_clock_divider(int);
int get_clock_divider(int); int get_clock_divider(int);
int set_pipeline(int);
int get_pipeline(int);

View File

@ -114,22 +114,6 @@ const char* getRetName() {
} }
} }
const char* getSpeedName(enum speedVariable ind) {
switch (ind) {
case CLOCK_DIVIDER: return "clock_divider";
case ADC_CLOCK: return "adc_clock";
case ADC_PHASE: return "adc_phase";
case ADC_PIPELINE: return "adc_pipeline";
case DBIT_CLOCK: return "dbit_clock";
case DBIT_PHASE: return "dbit_phase";
case DBIT_PIPELINE: return "dbit_pipeline";
case MAX_ADC_PHASE_SHIFT: return "max_adc_phase_shift";
case MAX_DBIT_PHASE_SHIFT: return "max_dbit_phase_shift";
case SYNC_CLOCK: return "sync_clock";
default: return "unknown_speed";
}
}
const char* getRunStateName(enum runStatus ind) { const char* getRunStateName(enum runStatus ind) {
switch (ind) { switch (ind) {
case IDLE: return "idle"; case IDLE: return "idle";
@ -200,7 +184,6 @@ const char* getFunctionName(enum detFuncs func) {
case F_SET_DYNAMIC_RANGE: return "F_SET_DYNAMIC_RANGE"; case F_SET_DYNAMIC_RANGE: return "F_SET_DYNAMIC_RANGE";
case F_SET_ROI: return "F_SET_ROI"; case F_SET_ROI: return "F_SET_ROI";
case F_GET_ROI: return "F_GET_ROI"; case F_GET_ROI: return "F_GET_ROI";
case F_SET_SPEED: return "F_SET_SPEED";
case F_EXIT_SERVER: return "F_EXIT_SERVER"; case F_EXIT_SERVER: return "F_EXIT_SERVER";
case F_LOCK_SERVER: return "F_LOCK_SERVER"; case F_LOCK_SERVER: return "F_LOCK_SERVER";
case F_GET_LAST_CLIENT_IP: return "F_GET_LAST_CLIENT_IP"; case F_GET_LAST_CLIENT_IP: return "F_GET_LAST_CLIENT_IP";
@ -297,7 +280,8 @@ const char* getFunctionName(enum detFuncs func) {
case F_GET_MAX_CLOCK_PHASE_SHIFT: return "F_GET_MAX_CLOCK_PHASE_SHIFT"; case F_GET_MAX_CLOCK_PHASE_SHIFT: return "F_GET_MAX_CLOCK_PHASE_SHIFT";
case F_SET_CLOCK_DIVIDER: return "F_SET_CLOCK_DIVIDER"; case F_SET_CLOCK_DIVIDER: return "F_SET_CLOCK_DIVIDER";
case F_GET_CLOCK_DIVIDER: return "F_GET_CLOCK_DIVIDER"; case F_GET_CLOCK_DIVIDER: return "F_GET_CLOCK_DIVIDER";
case F_SET_PIPELINE: return "F_SET_PIPELINE";
case F_GET_PIPELINE: return "F_GET_PIPELINE";
default: return "Unknown Function"; default: return "Unknown Function";
} }
@ -359,7 +343,6 @@ void function_table() {
flist[F_SET_DYNAMIC_RANGE] = &set_dynamic_range; flist[F_SET_DYNAMIC_RANGE] = &set_dynamic_range;
flist[F_SET_ROI] = &set_roi; flist[F_SET_ROI] = &set_roi;
flist[F_GET_ROI] = &get_roi; flist[F_GET_ROI] = &get_roi;
flist[F_SET_SPEED] = &set_speed;
flist[F_EXIT_SERVER] = &exit_server; flist[F_EXIT_SERVER] = &exit_server;
flist[F_LOCK_SERVER] = &lock_server; flist[F_LOCK_SERVER] = &lock_server;
flist[F_GET_LAST_CLIENT_IP] = &get_last_client_ip; flist[F_GET_LAST_CLIENT_IP] = &get_last_client_ip;
@ -456,6 +439,8 @@ void function_table() {
flist[F_GET_MAX_CLOCK_PHASE_SHIFT] = &get_max_clock_phase_shift; flist[F_GET_MAX_CLOCK_PHASE_SHIFT] = &get_max_clock_phase_shift;
flist[F_SET_CLOCK_DIVIDER] = &set_clock_divider; flist[F_SET_CLOCK_DIVIDER] = &set_clock_divider;
flist[F_GET_CLOCK_DIVIDER] = &get_clock_divider; flist[F_GET_CLOCK_DIVIDER] = &get_clock_divider;
flist[F_SET_PIPELINE] = &set_pipeline;
flist[F_GET_PIPELINE] = &get_pipeline;
// check // check
if (NUM_DET_FUNCTIONS >= RECEIVER_ENUM_START) { if (NUM_DET_FUNCTIONS >= RECEIVER_ENUM_START) {
@ -2571,131 +2556,6 @@ int get_roi(int file_des) {
return ret; return ret;
} }
int set_speed(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int args[3] = {-1, -1, -1};
int retval = -1;
if (receiveData(file_des, args, sizeof(args), INT32) < 0)
return printSocketReadError();
#ifdef GOTTHARD2D
functionNotImplemented();
#else
enum speedVariable ind = args[0];
int val = args[1];
int mode = args[2];
char speedName[20] = {0};
strcpy(speedName, getSpeedName(ind));
FILE_LOG(logDEBUG1, ("Setting speed index %s (speedVariable %d) to %d (mode: %d)\n", speedName, ind, val, mode));
// check index
switch(ind) {
#ifdef JUNGFRAUD
case ADC_PHASE:
case CLOCK_DIVIDER:
case MAX_ADC_PHASE_SHIFT:
#elif CHIPTESTBOARDD
case ADC_PHASE:
case DBIT_PHASE:
case MAX_ADC_PHASE_SHIFT:
case MAX_DBIT_PHASE_SHIFT:
case ADC_CLOCK:
case DBIT_CLOCK:
case SYNC_CLOCK:
case CLOCK_DIVIDER:
case ADC_PIPELINE:
case DBIT_PIPELINE:
#elif MOENCHD
case ADC_PHASE:
case DBIT_PHASE:
case MAX_ADC_PHASE_SHIFT:
case MAX_DBIT_PHASE_SHIFT:
case ADC_CLOCK:
case DBIT_CLOCK:
case SYNC_CLOCK:
case CLOCK_DIVIDER:
case ADC_PIPELINE:
case DBIT_PIPELINE:
#elif GOTTHARDD
case ADC_PHASE:
#elif EIGERD
case CLOCK_DIVIDER:
#endif
break;
default:
modeNotImplemented(speedName, (int)ind);
break;
}
#if (!defined(CHIPTESTBOARDD)) && (!defined(MOENCHD)) && (!defined(JUNGFRAUD))
if (ret == OK && mode == 1) {
ret = FAIL;
strcpy(mess, "deg is not defined for this detector.\n");
FILE_LOG(logERROR,(mess));
}
#endif
#ifdef JUNGFRAUD
if (ret == OK && ind == CLOCK_DIVIDER && val == FULL_SPEED && isHardwareVersion2()) {
ret = FAIL;
strcpy(mess, "Full speed not implemented for this board version.\n");
FILE_LOG(logERROR,(mess));
}
#endif
if (ret == OK) {
// set
if ((val != -1) && (Server_VerifyLock() == OK)) {
#if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(JUNGFRAUD)
setSpeed(ind, val, mode);
#else
setSpeed(ind, val);
#endif
}
// get
#if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(JUNGFRAUD)
retval = getSpeed(ind, mode);
#else
retval = getSpeed(ind);
#endif
FILE_LOG(logDEBUG1, ("%s: %d (mode:%d)\n", speedName, retval, mode));
// validate
char validateName[20] = {0};
sprintf(validateName, "set %s", speedName);
#ifndef GOTTHARDD
#if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(JUNGFRAUD)
if ((ind == ADC_PHASE || ind == DBIT_PHASE) && mode == 1) {
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
ret = validatePhaseinDegrees(ind, val, retval);
#else
ret = validatePhaseinDegrees(val, retval);
#endif
if (ret == FAIL) {
sprintf(mess, "Could not set %s. Set %d, got %d\n", validateName, val, retval);
FILE_LOG(logERROR,(mess));
}
} else
validate(val, retval, validateName, DEC);
#else
validate(val, retval, validateName, DEC);
#endif
#endif
}
#endif
return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval));
}
int exit_server(int file_des) { int exit_server(int file_des) {
FILE_LOG(logINFORED, ("Closing Server\n")); FILE_LOG(logINFORED, ("Closing Server\n"));
ret = OK; ret = OK;
@ -5463,35 +5323,53 @@ int set_clock_frequency(int file_des) {
if (receiveData(file_des, args, sizeof(args), INT32) < 0) if (receiveData(file_des, args, sizeof(args), INT32) < 0)
return printSocketReadError(); return printSocketReadError();
FILE_LOG(logINFO, ("Setting frequency of clock %d: %u\n", args[0], args[1])); FILE_LOG(logDEBUG1, ("Setting clock (%d) frequency : %u\n", args[0], args[1]));
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
functionNotImplemented(); functionNotImplemented();
/* #else
// only set // only set
if (Server_VerifyLock() == OK) { if (Server_VerifyLock() == OK) {
enum CLKINDEX c = (enum CLKINDEX)args[0]; int ind = args[0];
if (c >= NUM_CLOCKS) { int val = args[1];
enum CLKINDEX c = 0;
switch (ind) {
case ADC_CLOCK:
c = ADC_CLK;
break;
case DBIT_CLOCK:
c = DBIT_CLK;
break;
case RUN_CLOCK:
c = RUN_CLK;
break;
case SYNC_CLOCK:
ret = FAIL; ret = FAIL;
sprintf(mess, "Cannot set frequency of clock %d. Max number of clocks is %d.\n", (int)c, NUM_CLOCKS - 1); sprintf(mess, "Cannot set sync clock frequency.\n");
FILE_LOG(logERROR, (mess)); FILE_LOG(logERROR,(mess));
} else { break;
ret = setFrequency(c, args[1]); default:
if (ret == FAIL) { modeNotImplemented("clock index (frequency set)", ind);
strcpy(mess, "Set frequency in unknown state. Reconfigure did not return.\n"); break;
FILE_LOG(logERROR, (mess)); }
} else {
int retval = getFrequency(c);
FILE_LOG(logDEBUG1, ("retval frequency of clock %d: %d\n", (int)c, retval));
char cval[100]; if (ret != FAIL) {
memset(cval, 0, 100); char* clock_names[] = {CLK_NAMES};
sprintf(cval, "set frequency of clock %d Hz", (int)c); char modeName[50] = "";
validate(args[1], retval, cval, DEC); sprintf(modeName, "%s clock (%d) frequency", clock_names[c], (int)c);
if (getFrequency(c) == val) {
FILE_LOG(logINFO, ("Same %s: %d %s\n", modeName, val, myDetectorType == GOTTHARD2 ? "Hz" : "MHz"));
} else {
setFrequency(c, val);
int retval = getFrequency(c);
FILE_LOG(logDEBUG1, ("retval %s: %d %s\n", modeName, retval, myDetectorType == GOTTHARD2 ? "Hz" : "MHz"));
validate(val, retval, modeName, DEC);
} }
} }
} }
*/ #endif
return Server_SendResult(file_des, INT32, UPDATE, NULL, 0); return Server_SendResult(file_des, INT32, UPDATE, NULL, 0);
} }
@ -5504,20 +5382,42 @@ int get_clock_frequency(int file_des) {
if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
return printSocketReadError(); return printSocketReadError();
FILE_LOG(logDEBUG1, ("Getting frequency of clock %d\n", arg)); FILE_LOG(logDEBUG1, ("Getting clock (%d) frequency\n", arg));
#ifndef GOTTHARD2D #if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(GOTTHARD2D)
functionNotImplemented(); functionNotImplemented();
#else #else
// get only // get only
enum CLKINDEX c = (enum CLKINDEX)arg; enum CLKINDEX c = 0;
if (c >= NUM_CLOCKS) { switch (arg) {
ret = FAIL; #if defined(CHIPTESTBOARDD) || defined(MOENCHD)
sprintf(mess, "Cannot get frequency of clock %d. Max number of clocks is %d.\n", (int)c, NUM_CLOCKS - 1); case ADC_CLOCK:
FILE_LOG(logERROR, (mess)); c = ADC_CLK;
} else { break;
case DBIT_CLOCK:
c = DBIT_CLK;
break;
case RUN_CLOCK:
c = RUN_CLK;
break;
case SYNC_CLOCK:
c = SYNC_CLK;
break;
#endif
default:
#ifdef GOTTHARD2D
if (c < NUM_CLOCKS) {
c = (enum CLKINDEX)arg;
break;
}
#endif
modeNotImplemented("clock index (frequency get)", arg);
break;
}
if (ret == OK) {
retval = getFrequency(c); retval = getFrequency(c);
FILE_LOG(logDEBUG1, ("retval frequency of clock %d Hz: %d\n", (int)c, retval)); char* clock_names[] = {CLK_NAMES};
FILE_LOG(logDEBUG1, ("retval %s clock (%d) frequency: %d %s\n", clock_names[c], (int)c, retval, myDetectorType == GOTTHARD2 ? "Hz" : "MHz"));
} }
#endif #endif
return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval)); return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval));
@ -5533,51 +5433,86 @@ int set_clock_phase(int file_des) {
if (receiveData(file_des, args, sizeof(args), INT32) < 0) if (receiveData(file_des, args, sizeof(args), INT32) < 0)
return printSocketReadError(); return printSocketReadError();
FILE_LOG(logINFO, ("Setting phase of clock %d: %u %s\n", args[0], args[1], (args[2] == 0 ? "" : "degrees"))); FILE_LOG(logDEBUG1, ("Setting clock (%d) phase: %u %s\n", args[0], args[1], (args[2] == 0 ? "" : "degrees")));
#ifndef GOTTHARD2D #if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(JUNGFRAUD)&& !defined(GOTTHARDD) && !defined(GOTTHARD2D)
functionNotImplemented(); functionNotImplemented();
#else #else
// only set // only set
if (Server_VerifyLock() == OK) { if (Server_VerifyLock() == OK) {
enum CLKINDEX c = (enum CLKINDEX)args[0]; int ind = args[0];
if (c >= NUM_CLOCKS) {
ret = FAIL;
sprintf(mess, "Cannot set phase for clock %d. Max number of clocks is %d.\n", (int)c, NUM_CLOCKS - 1);
FILE_LOG(logERROR, (mess));
} else {
int val = args[1]; int val = args[1];
int degrees = args[2]; int inDegrees = args[2] == 0 ? 0 : 1;
if (degrees && (val < 0 || val > 359)) { enum CLKINDEX c = 0;
ret = FAIL; switch (ind) {
sprintf(mess, "Cannot set phase. Phase provided for C%d outside limits (0 - 359°C)\n", (int)c); #if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(JUNGFRAUD) || defined(GOTTHARDD)
FILE_LOG(logERROR, (mess)); case ADC_CLOCK:
} else if (!degrees && (val < 0 || val > getMaxPhase(c) - 1)) { c = ADC_CLK;
ret = FAIL; break;
sprintf(mess, "Cannot set phase. Phase provided for C%d outside limits (0 - %d phase shifts)\n", (int)c, getMaxPhase(c) - 1); #endif
FILE_LOG(logERROR, (mess)); #if defined(CHIPTESTBOARDD) || defined(MOENCHD)
} else { case DBIT_CLOCK:
ret = setPhase(c, val, degrees); c = DBIT_CLK;
if (ret == FAIL) { break;
strcpy(mess, "Set phase in unknown state. Reconfigure did not return.\n"); #endif
FILE_LOG(logERROR, (mess)); default:
} else { #ifdef GOTTHARD2D
int retval = getPhase(c, degrees); if (c < NUM_CLOCKS) {
FILE_LOG(logDEBUG1, ("retval phase for clock %d: %d %s \n", (int)c, retval, (degrees == 0 ? "" : "degrees"))); c = (enum CLKINDEX)ind;
break;
}
#endif
modeNotImplemented("clock index (phase set)", ind);
break;
}
if (ret != FAIL) {
char* clock_names[] = {CLK_NAMES};
char modeName[50] = "";
sprintf(modeName, "%s clock (%d) phase %s", clock_names[c], (int)c, (inDegrees == 0 ? "" : "(degrees)"));
char cval[100]; // gotthard1d doesnt take degrees and cannot get phase
memset(cval, 0, 100); #ifdef GOTTHARDD
sprintf(cval, "set phase for clock %d",(int)c); if (inDegrees != 0) {
if (!degrees) { ret = FAIL;
validate(val, retval, cval, DEC); strcpy(mess, "Cannot set phase in degrees for this detector.\n");
FILE_LOG(logERROR, (mess));
}
#else
if (getPhase(c, inDegrees) == val) {
FILE_LOG(logINFO, ("Same %s: %d\n", modeName, val));
} else if (inDegrees && (val < 0 || val > 359)) {
ret = FAIL;
sprintf(mess, "Cannot set %s to %d degrees. Phase outside limits (0 - 359°C)\n", modeName, val);
FILE_LOG(logERROR, (mess));
} else if (!inDegrees && (val < 0 || val > getMaxPhase(c) - 1)) {
ret = FAIL;
sprintf(mess, "Cannot set %s to %d. Phase outside limits (0 - %d phase shifts)\n", modeName, val, getMaxPhase(c) - 1);
FILE_LOG(logERROR, (mess));
}
#endif
else {
int ret = setPhase(c, val, inDegrees);
if (ret == FAIL) {
sprintf(mess, "Could not set %s to %d.\n", modeName, val);
FILE_LOG(logERROR, (mess));
}
// gotthard1d doesnt take degrees and cannot get phase
#ifndef GOTTHARDD
else {
int retval = getPhase(c, inDegrees);
FILE_LOG(logDEBUG1, ("retval %s : %d\n", modeName, retval));
if (!inDegrees) {
validate(val, retval, modeName, DEC);
} else { } else {
ret = validatePhaseinDegrees(c, val, retval); ret = validatePhaseinDegrees(c, val, retval);
if (ret == FAIL) { if (ret == FAIL) {
sprintf(mess, "Could not set %s. Set %d degrees, got %d degrees\n", cval, val, retval); sprintf(mess, "Could not set %s. Set %d degrees, got %d degrees\n", modeName, val, retval);
FILE_LOG(logERROR,(mess)); FILE_LOG(logERROR,(mess));
} }
} }
} }
#endif
} }
} }
} }
@ -5594,20 +5529,40 @@ int get_clock_phase(int file_des) {
if (receiveData(file_des, args, sizeof(args), INT32) < 0) if (receiveData(file_des, args, sizeof(args), INT32) < 0)
return printSocketReadError(); return printSocketReadError();
FILE_LOG(logDEBUG1, ("Getting phase for clock %d %s \n", args[0], (args[1] == 0 ? "" : "in degrees"))); FILE_LOG(logDEBUG1, ("Getting clock (%d) phase %s \n", args[0], (args[1] == 0 ? "" : "in degrees")));
#ifndef GOTTHARD2D #if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(JUNGFRAUD) && !defined(GOTTHARD2D)
functionNotImplemented(); functionNotImplemented();
#else #else
// get only // get only
enum CLKINDEX c = (enum CLKINDEX)args[0]; int ind = args[0];
if (c >= NUM_CLOCKS) { int inDegrees = args[1] == 0 ? 0 : 1;
ret = FAIL; enum CLKINDEX c = 0;
sprintf(mess, "Cannot get phase of clock %d. Max number of clocks is %d.\n", (int)c, NUM_CLOCKS - 1); switch (ind) {
FILE_LOG(logERROR, (mess)); #if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(JUNGFRAUD)
} else { case ADC_CLOCK:
retval = getPhase(c, args[1]); c = ADC_CLK;
FILE_LOG(logDEBUG1, ("retval phase for clock %d: %d %s\n", (int)c, retval, (args[1] == 0 ? "" : "degrees"))); break;
#endif
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
case DBIT_CLOCK:
c = DBIT_CLK;
break;
#endif
default:
#ifdef GOTTHARD2D
if (c < NUM_CLOCKS) {
c = (enum CLKINDEX)ind;
break;
}
#endif
modeNotImplemented("clock index (phase get)", ind);
break;
}
if (ret == OK) {
retval = getPhase(c, inDegrees);
char* clock_names[] = {CLK_NAMES};
FILE_LOG(logDEBUG1, ("retval %s clock (%d) phase: %d %s\n", clock_names[c], (int)c, retval, (inDegrees == 0 ? "" : "degrees")));
} }
#endif #endif
return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval)); return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval));
@ -5622,20 +5577,38 @@ int get_max_clock_phase_shift(int file_des) {
if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
return printSocketReadError(); return printSocketReadError();
FILE_LOG(logDEBUG1, ("Getting max phase shift of clock %d\n", arg)); FILE_LOG(logDEBUG1, ("Getting clock (%d) max phase shift\n", arg));
#ifndef GOTTHARD2D #if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(JUNGFRAUD) && !defined(GOTTHARD2D)
functionNotImplemented(); functionNotImplemented();
#else #else
// get only // get only
enum CLKINDEX c = (enum CLKINDEX)arg; enum CLKINDEX c = 0;
if (c >= NUM_CLOCKS) { switch (arg) {
ret = FAIL; #if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(JUNGFRAUD)
sprintf(mess, "Cannot get frequency of clock %d. Max number of clocks is %d.\n", (int)c, NUM_CLOCKS - 1); case ADC_CLOCK:
FILE_LOG(logERROR, (mess)); c = ADC_CLK;
} else { break;
#endif
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
case DBIT_CLOCK:
c = DBIT_CLK;
break;
#endif
default:
#ifdef GOTTHARD2D
if (c < NUM_CLOCKS) {
c = (enum CLKINDEX)arg;
break;
}
#endif
modeNotImplemented("clock index (max phase get)", arg);
break;
}
if (ret == OK) {
retval = getMaxPhase(c); retval = getMaxPhase(c);
FILE_LOG(logDEBUG1, ("retval max phase shift of clock %d: %d\n", (int)c, retval)); char* clock_names[] = {CLK_NAMES};
FILE_LOG(logDEBUG1, ("retval %s clock (%d) max phase shift: %d\n", clock_names[c], (int)c, retval));
} }
#endif #endif
return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval)); return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval));
@ -5649,38 +5622,78 @@ int set_clock_divider(int file_des) {
if (receiveData(file_des, args, sizeof(args), INT32) < 0) if (receiveData(file_des, args, sizeof(args), INT32) < 0)
return printSocketReadError(); return printSocketReadError();
FILE_LOG(logINFO, ("Setting divider of clock %d: %u\n", args[0], args[1])); FILE_LOG(logDEBUG1, ("Setting clock (%d) divider: %u\n", args[0], args[1]));
#ifndef GOTTHARD2D #if !defined(EIGERD) && !defined(JUNGFRAUD) && !defined(GOTTHARD2D)
functionNotImplemented(); functionNotImplemented();
#else #else
// only set // only set
if (Server_VerifyLock() == OK) { if (Server_VerifyLock() == OK) {
enum CLKINDEX c = (enum CLKINDEX)args[0]; int ind = args[0];
int val = args[1]; int val = args[1];
if (c >= NUM_CLOCKS) { enum CLKINDEX c = 0;
switch (ind) {
// specific clock index
#if defined(EIGERD) || defined(JUNGFRAUD)
case RUN_CLOCK:
c = RUN_CLK;
break;
#endif
default:
// any clock index
#ifdef GOTTHARD2D
if (c < NUM_CLOCKS) {
c = (enum CLKINDEX)ind;
break;
}
#endif
modeNotImplemented("clock index (divider set)", ind);
break;
}
// validate val range
if (ret != FAIL) {
#ifdef JUNGFRAUD
if (val == (int)FULL_SPEED && isHardwareVersion2()) {
ret = FAIL; ret = FAIL;
sprintf(mess, "Cannot set divider of clock %d. Max number of clocks is %d.\n", (int)c, NUM_CLOCKS - 1); strcpy(mess, "Full speed not implemented for this board version.\n");
FILE_LOG(logERROR, (mess)); FILE_LOG(logERROR,(mess));
} else if (getClockDivider(c) == val) { } else
FILE_LOG(logINFO, ("Same clock divider %d\n")); #endif
} else if (val < 2 || val > getMaxClockDivider()) { #ifdef GOTTHARD2D
if (val < 2 || val > getMaxClockDivider()) {
char* clock_names[] = {CLK_NAMES};
ret = FAIL; ret = FAIL;
sprintf(mess, "Cannot set divider of clock %d to %d. Value should be in range [2-%d]\n", (int)c, val, getMaxClockDivider()); sprintf(mess, "Cannot set %s clock(%d) to %d. Value should be in range [2-%d]\n", clock_names[c], (int)c, val, getMaxClockDivider());
FILE_LOG(logERROR, (mess)); FILE_LOG(logERROR, (mess));
}
#else
if (val < (int)FULL_SPEED || val > (int)QUARTER_SPEED) {
ret = FAIL;
sprintf(mess, "Cannot set speed to %d. Value should be in range [%d-%d]\n", val, (int)FULL_SPEED, (int)QUARTER_SPEED);
FILE_LOG(logERROR, (mess));
}
#endif
}
if (ret != FAIL) {
char modeName[50] = "speed";
#ifdef GOTTHARD2D
char* clock_names[] = {CLK_NAMES};
sprintf(modeName, "%s clock (%d) divider", clock_names[c], (int)c);
#endif
if (getClockDivider(c) == val) {
FILE_LOG(logINFO, ("Same %s: %d\n", modeName, val));
} else { } else {
ret = setClockDivider(c, val); int ret = setClockDivider(c, val);
if (ret == FAIL) { if (ret == FAIL) {
strcpy(mess, "Set divider in unknown state. Reconfigure did not return.\n"); sprintf(mess, "Could not set %s to %d.\n", modeName, val);
FILE_LOG(logERROR, (mess)); FILE_LOG(logERROR, (mess));
} else { } else {
int retval = getClockDivider(c); int retval = getClockDivider(c);
FILE_LOG(logDEBUG1, ("retval divider of clock %d: %d\n", (int)c, retval)); FILE_LOG(logDEBUG1, ("retval %s : %d\n", modeName, retval));
validate(val, retval, modeName, DEC);
char cval[100]; }
memset(cval, 0, 100);
sprintf(cval, "set divider of clock %d Hz", (int)c);
validate(val, retval, cval, DEC);
} }
} }
} }
@ -5697,20 +5710,115 @@ int get_clock_divider(int file_des) {
if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
return printSocketReadError(); return printSocketReadError();
FILE_LOG(logDEBUG1, ("Getting divider of clock %d\n", arg)); FILE_LOG(logDEBUG1, ("Getting clock (%d) divider\n", arg));
#ifndef GOTTHARD2D #if !defined(EIGERD) && !defined(JUNGFRAUD) && !defined(GOTTHARD2D)
functionNotImplemented(); functionNotImplemented();
#else #else
// get only // get only
enum CLKINDEX c = (enum CLKINDEX)arg; enum CLKINDEX c = 0;
if (c >= NUM_CLOCKS) { switch (arg) {
ret = FAIL; #if defined(EIGERD) || defined(JUNGFRAUD)
sprintf(mess, "Cannot get divider of clock %d. Max number of clocks is %d.\n", (int)c, NUM_CLOCKS - 1); case RUN_CLOCK:
FILE_LOG(logERROR, (mess)); c = RUN_CLK;
} else { break;
#endif
default:
#ifdef GOTTHARD2D
if (c < NUM_CLOCKS) {
c = (enum CLKINDEX)arg;
break;
}
#endif
modeNotImplemented("clock index (divider get)", arg);
break;
}
if (ret == OK) {
retval = getClockDivider(c); retval = getClockDivider(c);
FILE_LOG(logDEBUG1, ("retval divider of clock %d Hz: %d\n", (int)c, retval)); char* clock_names[] = {CLK_NAMES};
FILE_LOG(logDEBUG1, ("retval %s clock (%d) divider: %d\n", clock_names[c], (int)c, retval));
}
#endif
return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval));
}
int set_pipeline(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int args[2] = {-1, -1};
if (receiveData(file_des, args, sizeof(args), INT32) < 0)
return printSocketReadError();
FILE_LOG(logDEBUG1, ("Setting clock (%d) pipeline : %u\n", args[0], args[1]));
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
functionNotImplemented();
#else
// only set
if (Server_VerifyLock() == OK) {
int ind = args[0];
int val = args[1];
enum CLKINDEX c = 0;
switch (ind) {
case ADC_CLOCK:
c = ADC_CLK;
break;
case DBIT_CLOCK:
c = DBIT_CLK;
break;
default:
modeNotImplemented("clock index (pipeline set)", ind);
break;
}
if (ret != FAIL) {
char* clock_names[] = {CLK_NAMES};
char modeName[50] = "";
sprintf(modeName, "%s clock (%d) piepline", clock_names[c], (int)c);
setPipeline(c, val);
int retval = getPipeline(c);
FILE_LOG(logDEBUG1, ("retval %s: %d\n", modeName, retval));
validate(val, retval, modeName, DEC);
}
}
#endif
return Server_SendResult(file_des, INT32, UPDATE, NULL, 0);
}
int get_pipeline(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int arg = -1;
int retval = -1;
if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
return printSocketReadError();
FILE_LOG(logDEBUG1, ("Getting clock (%d) frequency\n", arg));
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
functionNotImplemented();
#else
// get only
enum CLKINDEX c = 0;
switch (arg) {
case ADC_CLOCK:
c = ADC_CLK;
break;
case DBIT_CLOCK:
c = DBIT_CLK;
break;
default:
modeNotImplemented("clock index (pipeline get)", arg);
break;
}
if (ret == OK) {
retval = getPipeline(c);
char* clock_names[] = {CLK_NAMES};
FILE_LOG(logDEBUG1, ("retval %s clock (%d) pipeline: %d\n", clock_names[c], (int)c, retval));
} }
#endif #endif
return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval)); return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval));

View File

@ -614,18 +614,6 @@ class slsDetector : public virtual slsDetectorDefs {
/** [Jungfrau][CTB] Get timestamp at a frame start */ /** [Jungfrau][CTB] Get timestamp at a frame start */
int64_t getMeasurementTime() const; int64_t getMeasurementTime() const;
/**
* Set speed
* @param sp speed type (clkdivider option for Jungfrau and Eiger,
* adcphase for Gotthard, others for CTB & Moench)
* @param value (clkdivider 0,1,2 for full, half and quarter speed). Other
* values check manual
* @param mode 0 for shift, 1 for degrees. relevant only for speed type
* adcphase and dbit phase
* @returns value of speed set
*/
int setSpeed(speedVariable sp, int value = -1, int mode = 0);
/** /**
* Set/get dynamic range * Set/get dynamic range
* (Eiger: If i is 32, also sets clkdivider to 2, if 16, sets clkdivider to * (Eiger: If i is 32, also sets clkdivider to 2, if 16, sets clkdivider to
@ -1788,6 +1776,12 @@ class slsDetector : public virtual slsDetectorDefs {
/** [Gotthard2] */ /** [Gotthard2] */
void setClockDivider(int clkIndex, int value); void setClockDivider(int clkIndex, int value);
/** [Ctb][Moench] */
int getPipeline(int clkIndex);
/** [Ctb][Moench] */
void setPipeline(int clkIndex, int value);
private: private:
/** /**
* Send function parameters to detector (control server) * Send function parameters to detector (control server)

View File

@ -405,7 +405,11 @@ std::string CmdProxy::ClockFrequency(int action) {
os << cmd << ' '; os << cmd << ' ';
if (action == defs::HELP_ACTION) { if (action == defs::HELP_ACTION) {
os << "[n_clock (0-8)] [freq_in_Hz]\n\t[Gotthard2] Frequency of clock n_clock in Hz. Use clkdiv to set frequency." << '\n'; os << "[n_clock (0-8)] [freq_in_Hz]\n\t[Gotthard2] Frequency of clock n_clock in Hz. Use clkdiv to set frequency." << '\n';
} else if (action == defs::GET_ACTION) { } else {
if (det->getDetectorType().squash(defs::GENERIC) != defs::GOTTHARD2) {
throw sls::RuntimeError("Not implemented for this detector.");
}
if (action == defs::GET_ACTION) {
if (args.size() != 1) { if (args.size() != 1) {
WrongNumberOfParameters(1); WrongNumberOfParameters(1);
} }
@ -415,11 +419,12 @@ std::string CmdProxy::ClockFrequency(int action) {
if (args.size() != 2) { if (args.size() != 2) {
WrongNumberOfParameters(2); WrongNumberOfParameters(2);
} }
det->setClockFrequency(std::stoi(args[0]), std::stoi(args[1])); det->setClockFrequency(std::stoi(args[0]), std::stoi(args[1]), {det_id});
os << std::stoi(args[1]) << '\n'; os << std::stoi(args[1]) << '\n';
} else { } else {
throw sls::RuntimeError("Unknown action"); throw sls::RuntimeError("Unknown action");
} }
}
return os.str(); return os.str();
} }
@ -429,7 +434,11 @@ std::string CmdProxy::ClockPhase(int action) {
os << cmd << ' '; os << cmd << ' ';
if (action == defs::HELP_ACTION) { if (action == defs::HELP_ACTION) {
os << "[n_clock (0-8)] [phase] [deg (optional)]\n\t[Gotthard2] Phase of clock n_clock. If deg, then phase shift in degrees, else absolute phase shift values." << '\n'; os << "[n_clock (0-8)] [phase] [deg (optional)]\n\t[Gotthard2] Phase of clock n_clock. If deg, then phase shift in degrees, else absolute phase shift values." << '\n';
} else if (action == defs::GET_ACTION) { } else {
if (det->getDetectorType().squash(defs::GENERIC) != defs::GOTTHARD2) {
throw sls::RuntimeError("Not implemented for this detector.");
}
if (action == defs::GET_ACTION) {
if (args.size() == 1) { if (args.size() == 1) {
auto t = det->getClockPhase(std::stoi(args[0]), {det_id}); auto t = det->getClockPhase(std::stoi(args[0]), {det_id});
os << OutString(t) << '\n'; os << OutString(t) << '\n';
@ -458,6 +467,7 @@ std::string CmdProxy::ClockPhase(int action) {
} else { } else {
throw sls::RuntimeError("Unknown action"); throw sls::RuntimeError("Unknown action");
} }
}
return os.str(); return os.str();
} }
@ -466,7 +476,11 @@ std::string CmdProxy::MaxClockPhaseShift(int action) {
os << cmd << ' '; os << cmd << ' ';
if (action == defs::HELP_ACTION) { if (action == defs::HELP_ACTION) {
os << "[n_clock (0-8)]\n\t[Gotthard2] Absolute Maximum Phase shift of clock n_clock." << '\n'; os << "[n_clock (0-8)]\n\t[Gotthard2] Absolute Maximum Phase shift of clock n_clock." << '\n';
} else if (action == defs::GET_ACTION) { } else {
if (det->getDetectorType().squash(defs::GENERIC) != defs::GOTTHARD2) {
throw sls::RuntimeError("Not implemented for this detector.");
}
if (action == defs::GET_ACTION) {
if (args.size() != 1) { if (args.size() != 1) {
WrongNumberOfParameters(1); WrongNumberOfParameters(1);
} }
@ -477,6 +491,7 @@ std::string CmdProxy::MaxClockPhaseShift(int action) {
} else { } else {
throw sls::RuntimeError("Unknown action"); throw sls::RuntimeError("Unknown action");
} }
}
return os.str(); return os.str();
} }
@ -485,7 +500,11 @@ std::string CmdProxy::ClockDivider(int action) {
os << cmd << ' '; os << cmd << ' ';
if (action == defs::HELP_ACTION) { if (action == defs::HELP_ACTION) {
os << "[n_clock (0-8)] [n_divider]\n\t[Gotthard2] Clock Divider of clock n_clock. Must be greater than 1." << '\n'; os << "[n_clock (0-8)] [n_divider]\n\t[Gotthard2] Clock Divider of clock n_clock. Must be greater than 1." << '\n';
} else if (action == defs::GET_ACTION) { } else {
if (det->getDetectorType().squash(defs::GENERIC) != defs::GOTTHARD2) {
throw sls::RuntimeError("Not implemented for this detector.");
}
if (action == defs::GET_ACTION) {
if (args.size() != 1) { if (args.size() != 1) {
WrongNumberOfParameters(1); WrongNumberOfParameters(1);
} }
@ -495,11 +514,12 @@ std::string CmdProxy::ClockDivider(int action) {
if (args.size() != 2) { if (args.size() != 2) {
WrongNumberOfParameters(2); WrongNumberOfParameters(2);
} }
det->setClockDivider(std::stoi(args[0]), std::stoi(args[1])); det->setClockDivider(std::stoi(args[0]), std::stoi(args[1]), {det_id});
os << std::stoi(args[1]) << '\n'; os << std::stoi(args[1]) << '\n';
} else { } else {
throw sls::RuntimeError("Unknown action"); throw sls::RuntimeError("Unknown action");
} }
}
return os.str(); return os.str();
} }
@ -656,7 +676,7 @@ std::string CmdProxy::Threshold(int action) {
if (args.size() != 0) { if (args.size() != 0) {
WrongNumberOfParameters(0); WrongNumberOfParameters(0);
} }
auto t = det->getThresholdEnergy(); auto t = det->getThresholdEnergy({det_id});
os << OutString(t) << '\n'; os << OutString(t) << '\n';
} else if (action == defs::PUT_ACTION) { } else if (action == defs::PUT_ACTION) {
if (args.size() == 1) { if (args.size() == 1) {
@ -932,7 +952,7 @@ std::string CmdProxy::TemperatureEvent(int action) {
if (std::stoi(args[0]) != 0) { if (std::stoi(args[0]) != 0) {
throw sls::RuntimeError("Unknown argument for temp event. Did you mean 0 to reset event?"); throw sls::RuntimeError("Unknown argument for temp event. Did you mean 0 to reset event?");
} }
det->resetTemperatureEvent(); det->resetTemperatureEvent({det_id});
os << "cleared" << '\n'; os << "cleared" << '\n';
} else { } else {
throw sls::RuntimeError("Unknown action"); throw sls::RuntimeError("Unknown action");
@ -1017,8 +1037,8 @@ std::string CmdProxy::Samples(int action) {
if (args.size() != 1) { if (args.size() != 1) {
WrongNumberOfParameters(1); WrongNumberOfParameters(1);
} }
det->setNumberOfAnalogSamples(std::stoi(args[0])); det->setNumberOfAnalogSamples(std::stoi(args[0]), {det_id});
det->setNumberOfDigitalSamples(std::stoi(args[0])); det->setNumberOfDigitalSamples(std::stoi(args[0]), {det_id});
os << args.front() << '\n'; os << args.front() << '\n';
} else { } else {
throw sls::RuntimeError("Unknown action"); throw sls::RuntimeError("Unknown action");
@ -1081,7 +1101,7 @@ std::string CmdProxy::SlowAdc(int action) {
auto t = det->getTemperature(defs::SLOW_ADC_TEMP, {det_id}); auto t = det->getTemperature(defs::SLOW_ADC_TEMP, {det_id});
os << OutString(t) << " °C\n"; os << OutString(t) << " °C\n";
} else { } else {
auto t = det->getSlowADC(static_cast<defs::dacIndex>(nchan + defs::SLOW_ADC0)); auto t = det->getSlowADC(static_cast<defs::dacIndex>(nchan + defs::SLOW_ADC0), {det_id});
os << OutString(t) << '\n'; os << OutString(t) << '\n';
} }
} else if (action == defs::PUT_ACTION) { } else if (action == defs::PUT_ACTION) {
@ -1140,7 +1160,7 @@ std::string CmdProxy::DigitalIODelay(int action) {
if (args.size() != 2) { if (args.size() != 2) {
WrongNumberOfParameters(2); WrongNumberOfParameters(2);
} }
det->setDigitalIODelay(stoulHex(args[0]), std::stoi(args[1])); det->setDigitalIODelay(stoulHex(args[0]), std::stoi(args[1]), {det_id});
os << sls::ToString(args) << '\n'; os << sls::ToString(args) << '\n';
} else { } else {
throw sls::RuntimeError("Unknown action"); throw sls::RuntimeError("Unknown action");
@ -1162,7 +1182,7 @@ std::string CmdProxy::Pattern(int action) {
if (args.size() != 1) { if (args.size() != 1) {
WrongNumberOfParameters(1); WrongNumberOfParameters(1);
} }
det->setPattern(args[0]); det->setPattern(args[0], {det_id});
os << args.front() << '\n'; os << args.front() << '\n';
} else { } else {
throw sls::RuntimeError("Unknown action"); throw sls::RuntimeError("Unknown action");
@ -1185,7 +1205,7 @@ std::string CmdProxy::PatternWord(int action) {
if (args.size() != 2) { if (args.size() != 2) {
WrongNumberOfParameters(2); WrongNumberOfParameters(2);
} }
det->setPatternWord(stoiHex(args[0]), stoulHex(args[1])); det->setPatternWord(stoiHex(args[0]), stoulHex(args[1]), {det_id});
os << sls::ToString(args) << '\n'; os << sls::ToString(args) << '\n';
} else { } else {
throw sls::RuntimeError("Unknown action"); throw sls::RuntimeError("Unknown action");

View File

@ -169,8 +169,7 @@ Result<ns> Detector::getPeriodLeft(Positions pos) const {
} }
Result<defs::speedLevel> Detector::getSpeed(Positions pos) const { Result<defs::speedLevel> Detector::getSpeed(Positions pos) const {
auto res = pimpl->Parallel(&slsDetector::setSpeed, pos, defs::CLOCK_DIVIDER, -1, auto res = pimpl->Parallel(&slsDetector::getClockDivider, pos, defs::RUN_CLOCK);
0);
Result<defs::speedLevel> speedResult(res.size()); Result<defs::speedLevel> speedResult(res.size());
for (unsigned int i = 0; i < res.size(); ++i) { for (unsigned int i = 0; i < res.size(); ++i) {
speedResult[i] = static_cast<defs::speedLevel>(res[i]); speedResult[i] = static_cast<defs::speedLevel>(res[i]);
@ -179,29 +178,29 @@ Result<defs::speedLevel> Detector::getSpeed(Positions pos) const {
} }
void Detector::setSpeed(defs::speedLevel value, Positions pos) { void Detector::setSpeed(defs::speedLevel value, Positions pos) {
pimpl->Parallel(&slsDetector::setSpeed, pos, defs::CLOCK_DIVIDER, pimpl->Parallel(&slsDetector::setClockDivider, pos, defs::RUN_CLOCK,
static_cast<int>(value), 0); static_cast<int>(value));
} }
Result<int> Detector::getADCPhase(Positions pos) const { Result<int> Detector::getADCPhase(Positions pos) const {
return pimpl->Parallel(&slsDetector::setSpeed, pos, defs::ADC_PHASE, -1, 0); return pimpl->Parallel(&slsDetector::getClockPhase, pos, defs::ADC_CLOCK, false);
} }
void Detector::setADCPhase(int value, Positions pos) { void Detector::setADCPhase(int value, Positions pos) {
pimpl->Parallel(&slsDetector::setSpeed, pos, defs::ADC_PHASE, value, 0); pimpl->Parallel(&slsDetector::setClockPhase, pos, defs::ADC_CLOCK, value, false);
} }
Result<int> Detector::getMaxADCPhaseShift(Positions pos) const { Result<int> Detector::getMaxADCPhaseShift(Positions pos) const {
return pimpl->Parallel(&slsDetector::setSpeed, pos, return pimpl->Parallel(&slsDetector::getMaxClockPhaseShift, pos,
defs::MAX_ADC_PHASE_SHIFT, -1, 0); defs::ADC_CLOCK);
} }
Result<int> Detector::getADCPhaseInDegrees(Positions pos) const { Result<int> Detector::getADCPhaseInDegrees(Positions pos) const {
return pimpl->Parallel(&slsDetector::setSpeed, pos, defs::ADC_PHASE, -1, 1); return pimpl->Parallel(&slsDetector::getClockPhase, pos, defs::ADC_CLOCK, true);
} }
void Detector::setADCPhaseInDegrees(int value, Positions pos) { void Detector::setADCPhaseInDegrees(int value, Positions pos) {
pimpl->Parallel(&slsDetector::setSpeed, pos, defs::ADC_PHASE, value, 1); pimpl->Parallel(&slsDetector::setClockPhase, pos, defs::ADC_CLOCK, value, true);
} }
Result<int> Detector::getClockFrequency(int clkIndex, Positions pos) { Result<int> Detector::getClockFrequency(int clkIndex, Positions pos) {
@ -1119,78 +1118,68 @@ void Detector::setReadoutMode(defs::readoutMode value, Positions pos) {
} }
Result<int> Detector::getDBITPhase(Positions pos) const { Result<int> Detector::getDBITPhase(Positions pos) const {
return pimpl->Parallel(&slsDetector::setSpeed, pos, defs::DBIT_PHASE, -1, return pimpl->Parallel(&slsDetector::getClockPhase, pos, defs::DBIT_CLOCK, false);
0);
} }
void Detector::setDBITPhase(int value, Positions pos) { void Detector::setDBITPhase(int value, Positions pos) {
pimpl->Parallel(&slsDetector::setSpeed, pos, defs::DBIT_PHASE, value, 0); pimpl->Parallel(&slsDetector::setClockPhase, pos, defs::DBIT_CLOCK, value, false);
} }
Result<int> Detector::getMaxDBITPhaseShift(Positions pos) const { Result<int> Detector::getMaxDBITPhaseShift(Positions pos) const {
return pimpl->Parallel(&slsDetector::setSpeed, pos, return pimpl->Parallel(&slsDetector::getMaxClockPhaseShift, pos,
defs::MAX_DBIT_PHASE_SHIFT, -1, 0); defs::DBIT_CLOCK);
} }
Result<int> Detector::getDBITPhaseInDegrees(Positions pos) const { Result<int> Detector::getDBITPhaseInDegrees(Positions pos) const {
return pimpl->Parallel(&slsDetector::setSpeed, pos, defs::DBIT_PHASE, -1, return pimpl->Parallel(&slsDetector::getClockPhase, pos, defs::DBIT_CLOCK, true);
1);
} }
void Detector::setDBITPhaseInDegrees(int value, Positions pos) { void Detector::setDBITPhaseInDegrees(int value, Positions pos) {
pimpl->Parallel(&slsDetector::setSpeed, pos, defs::DBIT_PHASE, value, 1); pimpl->Parallel(&slsDetector::setClockPhase, pos, defs::DBIT_CLOCK, value, true);
} }
Result<int> Detector::getADCClock(Positions pos) const { Result<int> Detector::getADCClock(Positions pos) const {
return pimpl->Parallel(&slsDetector::setSpeed, pos, defs::ADC_CLOCK, -1, 0); return pimpl->Parallel(&slsDetector::getClockFrequency, pos, defs::ADC_CLOCK);
} }
void Detector::setADCClock(int value_in_MHz, Positions pos) { void Detector::setADCClock(int value_in_MHz, Positions pos) {
pimpl->Parallel(&slsDetector::setSpeed, pos, defs::ADC_CLOCK, value_in_MHz, pimpl->Parallel(&slsDetector::setClockFrequency, pos, defs::ADC_CLOCK, value_in_MHz);
0);
} }
Result<int> Detector::getDBITClock(Positions pos) const { Result<int> Detector::getDBITClock(Positions pos) const {
return pimpl->Parallel(&slsDetector::setSpeed, pos, defs::DBIT_CLOCK, -1, return pimpl->Parallel(&slsDetector::getClockFrequency, pos, defs::DBIT_CLOCK);
0);
} }
void Detector::setDBITClock(int value_in_MHz, Positions pos) { void Detector::setDBITClock(int value_in_MHz, Positions pos) {
pimpl->Parallel(&slsDetector::setSpeed, pos, defs::DBIT_CLOCK, value_in_MHz, pimpl->Parallel(&slsDetector::setClockFrequency, pos, defs::DBIT_CLOCK, value_in_MHz);
0);
} }
Result<int> Detector::getRUNClock(Positions pos) const { Result<int> Detector::getRUNClock(Positions pos) const {
return pimpl->Parallel(&slsDetector::setSpeed, pos, defs::CLOCK_DIVIDER, -1, return pimpl->Parallel(&slsDetector::getClockFrequency, pos, defs::RUN_CLOCK);
0);
} }
void Detector::setRUNClock(int value_in_MHz, Positions pos) { void Detector::setRUNClock(int value_in_MHz, Positions pos) {
pimpl->Parallel(&slsDetector::setSpeed, pos, defs::CLOCK_DIVIDER, pimpl->Parallel(&slsDetector::setClockFrequency, pos, defs::RUN_CLOCK, value_in_MHz);
value_in_MHz, 0);
} }
Result<int> Detector::getSYNCClock(Positions pos) const { Result<int> Detector::getSYNCClock(Positions pos) const {
return pimpl->Parallel(&slsDetector::setSpeed, pos, defs::SYNC_CLOCK, -1, return pimpl->Parallel(&slsDetector::getClockFrequency, pos, defs::SYNC_CLOCK);
0);
} }
Result<int> Detector::getADCPipeline(Positions pos) const { Result<int> Detector::getADCPipeline(Positions pos) const {
return pimpl->Parallel(&slsDetector::setSpeed, pos, defs::ADC_PIPELINE, -1, return pimpl->Parallel(&slsDetector::getPipeline, pos, defs::ADC_CLOCK);
0);
} }
void Detector::setADCPipeline(int value, Positions pos) { void Detector::setADCPipeline(int value, Positions pos) {
pimpl->Parallel(&slsDetector::setSpeed, pos, defs::ADC_PIPELINE, value, 0); pimpl->Parallel(&slsDetector::setPipeline, pos, defs::ADC_CLOCK, value);
} }
Result<int> Detector::getDBITPipeline(Positions pos) const { Result<int> Detector::getDBITPipeline(Positions pos) const {
return pimpl->Parallel(&slsDetector::setSpeed, pos, defs::DBIT_PIPELINE, -1, return pimpl->Parallel(&slsDetector::getPipeline, pos, defs::DBIT_CLOCK);
0);
} }
void Detector::setDBITPipeline(int value, Positions pos) { void Detector::setDBITPipeline(int value, Positions pos) {
pimpl->Parallel(&slsDetector::setSpeed, pos, defs::DBIT_PIPELINE, value, 0); pimpl->Parallel(&slsDetector::setPipeline, pos, defs::DBIT_CLOCK, value);
} }
Result<int> Detector::getVoltage(defs::dacIndex index, Positions pos) const { Result<int> Detector::getVoltage(defs::dacIndex index, Positions pos) const {

View File

@ -1460,16 +1460,6 @@ int64_t slsDetector::getMeasurementTime() const {
return retval; return retval;
} }
int slsDetector::setSpeed(speedVariable sp, int value, int mode) {
int args[]{static_cast<int>(sp), value, mode};
int retval = -1;
FILE_LOG(logDEBUG1) << "Setting speed index " << sp << " to " << value
<< " mode: " << mode;
sendToDetector(F_SET_SPEED, args, retval);
FILE_LOG(logDEBUG1) << "Speed index " << sp << ": " << retval;
return retval;
}
int slsDetector::setDynamicRange(int n) { int slsDetector::setDynamicRange(int n) {
// TODO! Properly handle fail // TODO! Properly handle fail
int prevDr = shm()->dynamicRange; int prevDr = shm()->dynamicRange;
@ -1494,9 +1484,9 @@ int slsDetector::setDynamicRange(int n) {
updateRateCorrection(); updateRateCorrection();
// update speed for usability // update speed for usability
if (dr == 32) { if (dr == 32) {
FILE_LOG(logINFO) << "Setting Clock to Quarter Speed to cope with Dynamic Range of 32"; setSpeed(CLOCK_DIVIDER, 2); FILE_LOG(logINFO) << "Setting Clock to Quarter Speed to cope with Dynamic Range of 32"; setClockDivider(RUN_CLOCK, 2);
} else if (dr == 16) { } else if (dr == 16) {
FILE_LOG(logINFO) << "Setting Clock to Half Speed to cope with Dynamic Range of 16"; setSpeed(CLOCK_DIVIDER, 1); FILE_LOG(logINFO) << "Setting Clock to Half Speed to cope with Dynamic Range of 16"; setClockDivider(RUN_CLOCK, 1);
} }
} }
@ -3549,6 +3539,21 @@ void slsDetector::setClockDivider(int clkIndex, int value) {
sendToDetector(F_SET_CLOCK_DIVIDER, args, nullptr); sendToDetector(F_SET_CLOCK_DIVIDER, args, nullptr);
} }
int slsDetector::getPipeline(int clkIndex) {
int retval = -1;
FILE_LOG(logDEBUG1) << "Getting Clock " << clkIndex << " pipeline";
sendToDetector(F_GET_PIPELINE, clkIndex, retval);
FILE_LOG(logDEBUG1) << "Clock " << clkIndex << " pipeline: " << retval;
return retval;
}
void slsDetector::setPipeline(int clkIndex, int value) {
int args[]{clkIndex, value};
FILE_LOG(logDEBUG1) << "Setting Clock " << clkIndex << " pipeline to " << value;
sendToDetector(F_SET_PIPELINE, args, nullptr);
}
sls_detector_module slsDetector::interpolateTrim(sls_detector_module *a, sls_detector_module slsDetector::interpolateTrim(sls_detector_module *a,
sls_detector_module *b, sls_detector_module *b,
const int energy, const int e1, const int energy, const int e1,

View File

@ -2205,9 +2205,9 @@ TEST_CASE("adcpipeline", "[.cmd][.ctb]") {
TEST_CASE("maxdbitphaseshift", "[.cmd][.ctb]") { TEST_CASE("maxdbitphaseshift", "[.cmd][.ctb]") {
if (test::type == slsDetectorDefs::CHIPTESTBOARD ) { if (test::type == slsDetectorDefs::CHIPTESTBOARD ) {
REQUIRE_NOTHROW(multiSlsDetectorClient("maxdbitphaseshift", GET)); REQUIRE_NOTHROW(multiSlsDetectorClient("maxdbitphaseshift", GET));
REQUIRE_THROWS(multiSlsDetectorClient("maxdbitphaseshift 120", PUT));
} else { } else {
REQUIRE_THROWS(multiSlsDetectorClient("maxdbitphaseshift", GET)); REQUIRE_THROWS(multiSlsDetectorClient("maxdbitphaseshift", GET));
} }
} }
@ -3652,6 +3652,9 @@ TEST_CASE("adcphase", "[.cmd][.ctb][.jungfrau][.gotthard]") {
if (test::type == slsDetectorDefs::GOTTHARD) { if (test::type == slsDetectorDefs::GOTTHARD) {
REQUIRE_NOTHROW(multiSlsDetectorClient("adcphase 120", PUT)); REQUIRE_NOTHROW(multiSlsDetectorClient("adcphase 120", PUT));
REQUIRE_NOTHROW(multiSlsDetectorClient("adcphase 0", PUT));
REQUIRE_THROWS(multiSlsDetectorClient("adcphase 120 deg", PUT));
REQUIRE_THROWS(multiSlsDetectorClient("adcphase", GET));
// get is -1 // get is -1
} else if (test::type == slsDetectorDefs::CHIPTESTBOARD || test::type == slsDetectorDefs::JUNGFRAU) { } else if (test::type == slsDetectorDefs::CHIPTESTBOARD || test::type == slsDetectorDefs::JUNGFRAU) {
int prev_val = 0; int prev_val = 0;
@ -3692,6 +3695,7 @@ TEST_CASE("syncclk", "[.cmd][.ctb]") {
REQUIRE_THROWS(multiSlsDetectorClient("syncclk", GET)); REQUIRE_THROWS(multiSlsDetectorClient("syncclk", GET));
} else { } else {
REQUIRE_NOTHROW(multiSlsDetectorClient("syncclk", GET)); REQUIRE_NOTHROW(multiSlsDetectorClient("syncclk", GET));
REQUIRE_THROWS(multiSlsDetectorClient("syncclk 40", PUT));
} }
} }
@ -3751,7 +3755,7 @@ TEST_CASE("dbitclk", "[.cmd][.ctb]") {
TEST_CASE("runclk", "[.cmd][.ctb]") { TEST_CASE("runclk", "[.cmd][.ctb]") {
if(test::type != slsDetectorDefs::CHIPTESTBOARD) { if(test::type != slsDetectorDefs::CHIPTESTBOARD) {
;// REQUIRE_THROWS(multiSlsDetectorClient("runclk", GET)); Only once setspeed is split into many (runclk = speed for now) REQUIRE_THROWS(multiSlsDetectorClient("runclk", GET));
} else { } else {
int prev_runclk = 0; int prev_runclk = 0;
{ {
@ -3780,7 +3784,7 @@ TEST_CASE("speed", "[.cmd][.eiger][.jungfrau]") {
if(test::type != slsDetectorDefs::EIGER && test::type != slsDetectorDefs::JUNGFRAU) { if(test::type != slsDetectorDefs::EIGER && test::type != slsDetectorDefs::JUNGFRAU) {
REQUIRE_THROWS(multiSlsDetectorClient("speed", GET)); REQUIRE_THROWS(multiSlsDetectorClient("speed", GET));
} else { } else {
/*{TODO : only for new boards /*{TODO : only for new jungfrau boards
REQUIRE_NOTHROW(multiSlsDetectorClient("speed 0", PUT)); REQUIRE_NOTHROW(multiSlsDetectorClient("speed 0", PUT));
std::ostringstream oss; std::ostringstream oss;
REQUIRE_NOTHROW(multiSlsDetectorClient("speed", GET, nullptr, oss)); REQUIRE_NOTHROW(multiSlsDetectorClient("speed", GET, nullptr, oss));
@ -4055,7 +4059,10 @@ TEST_CASE("clk", "[.cmd]") {
REQUIRE_THROWS(multiSlsDetectorClient("clkdiv 7", GET)); // 7 doesnt exist REQUIRE_THROWS(multiSlsDetectorClient("clkdiv 7", GET)); // 7 doesnt exist
REQUIRE_THROWS(multiSlsDetectorClient("clkdiv 4", PUT)); // requires clk index and val REQUIRE_THROWS(multiSlsDetectorClient("clkdiv 4", PUT)); // requires clk index and val
REQUIRE_THROWS(multiSlsDetectorClient("clkdiv 7 4", PUT)); // 7 doesnt exist REQUIRE_THROWS(multiSlsDetectorClient("clkdiv 7 4", PUT)); // 7 doesnt exist
REQUIRE_THROWS(multiSlsDetectorClient("maxclkphaseshift 7", GET)); // 7 doesnt exist
REQUIRE_THROWS(multiSlsDetectorClient("maxclkphaseshift 7 4", PUT)); // cannot put
REQUIRE_NOTHROW(multiSlsDetectorClient("maxclkphaseshift 0", GET));
int t = 0; int t = 0;
{ {
std::ostringstream oss; std::ostringstream oss;

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@ -458,19 +458,10 @@ format
#define TRIMBITMASK 0x3f #define TRIMBITMASK 0x3f
/** enum clockIndex {
important speed parameters ADC_CLOCK,
*/ DBIT_CLOCK,
enum speedVariable { RUN_CLOCK,
CLOCK_DIVIDER, /**< readout clock divider */
ADC_CLOCK, /**< adc clock divider */
ADC_PHASE, /**< adc clock phase */
ADC_PIPELINE, /**< adc pipeline */
DBIT_CLOCK, /**< adc clock divider */
DBIT_PHASE, /**< adc clock phase */
DBIT_PIPELINE, /**< adc pipeline */
MAX_ADC_PHASE_SHIFT, /** max adc phase shift */
MAX_DBIT_PHASE_SHIFT, /** max adc phase shift */
SYNC_CLOCK SYNC_CLOCK
}; };

View File

@ -65,7 +65,6 @@ enum detFuncs{
F_SET_DYNAMIC_RANGE, F_SET_DYNAMIC_RANGE,
F_SET_ROI, F_SET_ROI,
F_GET_ROI, F_GET_ROI,
F_SET_SPEED,
F_EXIT_SERVER, F_EXIT_SERVER,
F_LOCK_SERVER, F_LOCK_SERVER,
F_GET_LAST_CLIENT_IP, F_GET_LAST_CLIENT_IP,
@ -162,6 +161,8 @@ enum detFuncs{
F_GET_MAX_CLOCK_PHASE_SHIFT, F_GET_MAX_CLOCK_PHASE_SHIFT,
F_SET_CLOCK_DIVIDER, F_SET_CLOCK_DIVIDER,
F_GET_CLOCK_DIVIDER, F_GET_CLOCK_DIVIDER,
F_SET_PIPELINE,
F_GET_PIPELINE,
NUM_DET_FUNCTIONS, NUM_DET_FUNCTIONS,
RECEIVER_ENUM_START = 256, /**< detector function should not exceed this (detector server should not compile anyway) */ RECEIVER_ENUM_START = 256, /**< detector function should not exceed this (detector server should not compile anyway) */
@ -291,7 +292,6 @@ static const char* getFunctionNameFromEnum(enum detFuncs func) {
case F_SET_DYNAMIC_RANGE: return "F_SET_DYNAMIC_RANGE"; case F_SET_DYNAMIC_RANGE: return "F_SET_DYNAMIC_RANGE";
case F_SET_ROI: return "F_SET_ROI"; case F_SET_ROI: return "F_SET_ROI";
case F_GET_ROI: return "F_GET_ROI"; case F_GET_ROI: return "F_GET_ROI";
case F_SET_SPEED: return "F_SET_SPEED";
case F_EXIT_SERVER: return "F_EXIT_SERVER"; case F_EXIT_SERVER: return "F_EXIT_SERVER";
case F_LOCK_SERVER: return "F_LOCK_SERVER"; case F_LOCK_SERVER: return "F_LOCK_SERVER";
case F_GET_LAST_CLIENT_IP: return "F_GET_LAST_CLIENT_IP"; case F_GET_LAST_CLIENT_IP: return "F_GET_LAST_CLIENT_IP";
@ -388,6 +388,8 @@ static const char* getFunctionNameFromEnum(enum detFuncs func) {
case F_GET_MAX_CLOCK_PHASE_SHIFT: return "F_GET_MAX_CLOCK_PHASE_SHIFT"; case F_GET_MAX_CLOCK_PHASE_SHIFT: return "F_GET_MAX_CLOCK_PHASE_SHIFT";
case F_SET_CLOCK_DIVIDER: return "F_SET_CLOCK_DIVIDER"; case F_SET_CLOCK_DIVIDER: return "F_SET_CLOCK_DIVIDER";
case F_GET_CLOCK_DIVIDER: return "F_GET_CLOCK_DIVIDER"; case F_GET_CLOCK_DIVIDER: return "F_GET_CLOCK_DIVIDER";
case F_SET_PIPELINE: return "F_SET_PIPELINE";
case F_GET_PIPELINE: return "F_GET_PIPELINE";
case NUM_DET_FUNCTIONS: return "NUM_DET_FUNCTIONS"; case NUM_DET_FUNCTIONS: return "NUM_DET_FUNCTIONS";
case RECEIVER_ENUM_START: return "RECEIVER_ENUM_START"; case RECEIVER_ENUM_START: return "RECEIVER_ENUM_START";

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@ -4,9 +4,9 @@
#define APIRECEIVER 0x190722 #define APIRECEIVER 0x190722
#define APIGUI 0x190723 #define APIGUI 0x190723
#define APIMOENCH 0x190820 #define APIMOENCH 0x190820
#define APICTB 0x191104 #define APIEIGER 0x191105
#define APIGOTTHARD 0x191104 #define APIJUNGFRAU 0x191105
#define APIJUNGFRAU 0x191104 #define APIGOTTHARD 0x191105
#define APIGOTTHARD2 0x191104 #define APIGOTTHARD2 0x191105
#define APIMYTHEN3 0x191104 #define APIMYTHEN3 0x191105
#define APIEIGER 0x191104 #define APICTB 0x191105

View File

@ -1,7 +1,6 @@
#include "sls_detector_defs.h" #include "sls_detector_defs.h"
using dt = slsDetectorDefs::detectorType; using dt = slsDetectorDefs::detectorType;
using di = slsDetectorDefs::dacIndex; using di = slsDetectorDefs::dacIndex;
using sv = slsDetectorDefs::speedVariable;
using defs = slsDetectorDefs; using defs = slsDetectorDefs;
namespace test { namespace test {