eiger quad server: set and reset chip signals before and after trimming

This commit is contained in:
2021-07-21 14:05:28 +02:00
parent 8ba37e99a7
commit 1e1c799223
4 changed files with 60 additions and 15 deletions

View File

@ -27,6 +27,11 @@
#define DAQ_REG_HRDWRE_OW_MASTER_MSK (0x00000001 << DAQ_REG_HRDWRE_OW_MASTER_OFST)
#define DAQ_REG_HRDWRE_MASTER_OFST (4)
#define DAQ_REG_HRDWRE_MASTER_MSK (0x00000001 << DAQ_REG_HRDWRE_MASTER_OFST)
#define DAQ_REG_HRDWRE_PROGRAM_OFST (30)
#define DAQ_REG_HRDWRE_PROGRAM_MSK (0x00000001 << DAQ_REG_HRDWRE_PROGRAM_OFST)
#define DAQ_REG_HRDWRE_M8_OFST (31)
#define DAQ_REG_HRDWRE_M8_MSK (0x00000001 << DAQ_REG_HRDWRE_M8_OFST)
#define DAQ_REG_RO_OFFSET 20
#define DAQ_REG_STATUS (DAQ_REG_RO_OFFSET + 0) // also pg and fifo status register