dev: jungfrau HW 1.0: adc output clock phase to 120 (#952)

* jungfrau: change adc output clock phase from 180 to 120 for v1.0 boards for reliable readout of adc #2

* versioning

* formatting
This commit is contained in:
maliakal_d 2024-08-22 15:45:41 +02:00 committed by GitHub
parent 9c57571a41
commit 1d4a5d6d29
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GPG Key ID: B5690EEEBB952194
5 changed files with 24 additions and 1 deletions

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@ -489,6 +489,7 @@ void setupDetector() {
AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK,
ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK,
ADC_SPI_SRL_DT_OTPT_OFST); ADC_SPI_SRL_DT_OTPT_OFST);
AD9257_Set_Jungfrau_Hardware_Version_1_0(isHardwareVersion_1_0());
AD9257_Disable(); AD9257_Disable();
AD9257_Configure(); AD9257_Configure();

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@ -4,6 +4,10 @@
#include <inttypes.h> #include <inttypes.h>
#ifdef JUNGFRAUD
void AD9257_Set_Jungfrau_Hardware_Version_1_0(int val);
#endif
/** /**
* Set Defines * Set Defines
* @param reg spi register * @param reg spi register

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@ -172,6 +172,14 @@ uint32_t AD9257_DigMask = 0x0;
int AD9257_DigOffset = 0x0; int AD9257_DigOffset = 0x0;
int AD9257_VrefVoltage = 0; int AD9257_VrefVoltage = 0;
#ifdef JUNGFRAUD
int AD9257_is_Jungfrau_Hardware_Version_1_0 = 0;
void AD9257_Set_Jungfrau_Hardware_Version_1_0(int val) {
AD9257_is_Jungfrau_Hardware_Version_1_0 = val;
}
#endif
void AD9257_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, void AD9257_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk,
uint32_t dmsk, int dofst) { uint32_t dmsk, int dofst) {
AD9257_Reg = reg; AD9257_Reg = reg;
@ -286,8 +294,18 @@ void AD9257_Configure() {
AD9257_OUT_BINARY_OFST_VAL | AD9257_OUT_LVDS_IEEE_VAL); AD9257_OUT_BINARY_OFST_VAL | AD9257_OUT_LVDS_IEEE_VAL);
// output clock phase // output clock phase
#ifdef JUNGFRAUD
if (AD9257_is_Jungfrau_Hardware_Version_1_0) {
LOG(logINFO, ("\tOutput clock phase: 120\n"));
AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_120_VAL);
} else {
LOG(logINFO, ("\tOutput clock phase: 180\n")); LOG(logINFO, ("\tOutput clock phase: 180\n"));
AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_180_VAL); AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_180_VAL);
}
#else
LOG(logINFO, ("\tOutput clock phase: 180\n"));
AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_180_VAL);
#endif
// all devices on chip to receive next command // all devices on chip to receive next command
LOG(logINFO, ("\tAll devices on chip to receive next command\n")); LOG(logINFO, ("\tAll devices on chip to receive next command\n"));

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@ -7,8 +7,8 @@
#define APICTB "developer 0x240820" #define APICTB "developer 0x240820"
#define APIGOTTHARD "developer 0x240820" #define APIGOTTHARD "developer 0x240820"
#define APIGOTTHARD2 "developer 0x240820" #define APIGOTTHARD2 "developer 0x240820"
#define APIJUNGFRAU "developer 0x240820"
#define APIMYTHEN3 "developer 0x240820" #define APIMYTHEN3 "developer 0x240820"
#define APIMOENCH "developer 0x240820" #define APIMOENCH "developer 0x240820"
#define APIEIGER "developer 0x240820" #define APIEIGER "developer 0x240820"
#define APIXILINXCTB "developer 0x240820" #define APIXILINXCTB "developer 0x240820"
#define APIJUNGFRAU "developer 0x240822"