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dev: jungfrau HW 1.0: adc output clock phase to 120 (#952)

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* jungfrau: change adc output clock phase from 180 to 120 for v1.0 boards for reliable readout of adc #2

* versioning

* formatting
This commit is contained in:
maliakal_d
2024-08-22 15:45:41 +02:00
committed by GitHub
parent 9c57571a41
commit 1d4a5d6d29
5 changed files with 24 additions and 1 deletions
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2
slsSupportLib/include/sls/versionAPI.h
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@ -7,8 +7,8 @@
#define APICTB "developer 0x240820"
#define APIGOTTHARD "developer 0x240820"
#define APIGOTTHARD2 "developer 0x240820"
#define APIJUNGFRAU "developer 0x240820"
#define APIMYTHEN3 "developer 0x240820"
#define APIMOENCH "developer 0x240820"
#define APIEIGER "developer 0x240820"
#define APIXILINXCTB "developer 0x240820"
#define APIJUNGFRAU "developer 0x240822"