dev: jungfrau HW 1.0: adc output clock phase to 120 (#952)

Browse Source

* jungfrau: change adc output clock phase from 180 to 120 for v1.0 boards for reliable readout of adc #2

* versioning

* formatting

...

This commit is contained in:

maliakal_d

2024-08-22 15:45:41 +02:00

committed by GitHub

parent 9c57571a41

commit 1d4a5d6d29

5 changed files with 24 additions and 1 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download Patch File Download Diff File Expand all files Collapse all files

BIN

slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServer_developer

Binary file not shown.