detectors/slsDetectorPackage
25
0
Fork 0
mirror of https://github.com/slsdetectorgroup/slsDetectorPackage.git synced 2025-06-23 10:07:59 +02:00
Code Issues Actions Packages Releases Activity

revised gain plot; updated version api

Browse Source
This commit is contained in:
maliakal_d
2020-03-04 10:25:06 +01:00
parent 032475fc14 2fcb41426a
commit 1b996d1703
37 changed files with 2667 additions and 1383 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c
View File

@ -515,7 +515,7 @@ void setupDetector() {
// altera pll
ALTERA_PLL_SetDefines(PLL_CNTRL_REG, PLL_PARAM_REG, PLL_CNTRL_RCNFG_PRMTR_RST_MSK, PLL_CNTRL_WR_PRMTR_MSK, PLL_CNTRL_PLL_RST_MSK, PLL_CNTRL_ADDR_MSK, PLL_CNTRL_ADDR_OFST);
bus_w(ADC_PORT_INVERT_REG, 0);// depends on chip
setADCInvertRegister(0);// depends on chip
FILE_LOG(logINFOBLUE, ("Setting Default parameters\n"));
cleanFifos(); // FIXME: why twice?

1
slsDetectorServers/ctbDetectorServer/slsDetectorServer_defs.h
View File

@ -107,7 +107,6 @@ enum CLKINDEX {RUN_CLK, ADC_CLK, SYNC_CLK, DBIT_CLK, NUM_CLOCKS};
#define BIT32_MSK (0xFFFFFFFF)
#define BIT16_MASK (0xFFFF)
#define ADC_PORT_INVERT_VAL (0x453b2593)
#define MAXIMUM_ADC_CLK (65)
#define PLL_VCO_FREQ_MHZ (800)

3
slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c
View File

@ -1,7 +1,7 @@
#include "slsDetectorFunctionList.h"
#include "versionAPI.h"
#include "clogger.h"
#include <sys/select.h>
#include "AD9257.h" // commonServerFunctions.h, blackfin.h, ansi.h
#include "LTC2620.h" // dacs
#include "MAX1932.h" // hv
@ -14,6 +14,7 @@
#include <string.h>
#include <unistd.h> // usleep
#include <sys/select.h>
#ifdef VIRTUAL
#include <pthread.h>
#include <time.h>

3
slsDetectorServers/moenchDetectorServer/CMakeLists.txt
View File

@ -12,7 +12,8 @@ add_executable(moenchDetectorServer_virtual
../slsDetectorServer/src/ALTERA_PLL.c
../slsDetectorServer/src/LTC2620.c
../slsDetectorServer/src/MAX1932.c
../slsDetectorServer/src/programFpgaBlackfin.c
../slsDetectorServer/src/programFpgaBlackfin.c
../slsDetectorServer/src/readDefaultPattern.c
)
include_directories(

414
slsDetectorServers/moenchDetectorServer/DefaultPattern.txt Executable file
View File

@ -0,0 +1,414 @@
patword 0x0000 0x0000000000000000
patword 0x0001 0x0000000000000000
patword 0x0002 0x0008000900080000
patword 0x0003 0x0008000900080000
patword 0x0004 0x0008000900080000
patword 0x0005 0x0008000900080000
patword 0x0006 0x0008000900080000
patword 0x0007 0x0008000900080000
patword 0x0008 0x0008000900080000
patword 0x0009 0x0008000900080000
patword 0x000a 0x0008000900080000
patword 0x000b 0x0008000900080000
patword 0x000c 0x0008000900080000
patword 0x000d 0x0008000900080000
patword 0x000e 0x0008000900080000
patword 0x000f 0x0008000900080000
patword 0x0010 0x0008000900080000
patword 0x0011 0x0008000900080000
patword 0x0012 0x0008000900080000
patword 0x0013 0x0008000900080000
patword 0x0014 0x0008000900080000
patword 0x0015 0x0008000900080000
patword 0x0016 0x0008400900080020
patword 0x0017 0x0008400900080020
patword 0x0018 0x0008599f0418503a
patword 0x0019 0x0008599f0418503a
patword 0x001a 0x0108599f0418503a
patword 0x001b 0x0108599f0418503a
patword 0x001c 0x0108599f0418503a
patword 0x001d 0x0108599f0418503a
patword 0x001e 0x0108599f0418503a
patword 0x001f 0x0108599f0418503a
patword 0x0020 0x0108599f0418503a
patword 0x0021 0x0108599f0418503a
patword 0x0022 0x0108599f0418503a
patword 0x0023 0x0108599f0418503a
patword 0x0024 0x0108599f0418503a
patword 0x0025 0x0108599f0418503a
patword 0x0026 0x0108599f0418503a
patword 0x0027 0x0108599f0418503a
patword 0x0028 0x0108599f0418503a
patword 0x0029 0x0108599f0418503a
patword 0x002a 0x0108599f0418503a
patword 0x002b 0x0108599f0418503a
patword 0x002c 0x0108599f0418503a
patword 0x002d 0x0108599f0418503a
patword 0x002e 0x0108599f0418503a
patword 0x002f 0x0108599f0418503a
patword 0x0030 0x0108599f0418503a
patword 0x0031 0x0108599f0418503a
patword 0x0032 0x0108599f0418503a
patword 0x0033 0x0108599f0418503a
patword 0x0034 0x0108599f0418503a
patword 0x0035 0x0108599f0418503a
patword 0x0036 0x0108599f0418503a
patword 0x0037 0x0108599f0418503a
patword 0x0038 0x0108599f0418503a
patword 0x0039 0x0108599f0418503a
patword 0x003a 0x0108599f0418503a
patword 0x003b 0x0108599f0418503a
patword 0x003c 0x0108599f0418503a
patword 0x003d 0x0108599f0418503a
patword 0x003e 0x0108599f0418503a
patword 0x003f 0x0108599f0418503a
patword 0x0040 0x0108599f0418503a
patword 0x0041 0x0108599f0418503a
patword 0x0042 0x0108599f0418503a
patword 0x0043 0x0108599f0418503a
patword 0x0044 0x0108599f0418503a
patword 0x0045 0x0108599f0418503a
patword 0x0046 0x0108599f0418503a
patword 0x0047 0x0108599f0418503a
patword 0x0048 0x0108599f0418503a
patword 0x0049 0x0108599f0418503a
patword 0x004a 0x0108599f0418503a
patword 0x004b 0x0108599f0418503a
patword 0x004c 0x0108599f0418503a
patword 0x004d 0x0108599f0418503a
patword 0x004e 0x0108599f0418503a
patword 0x004f 0x0108599f0418503a
patword 0x0050 0x0108599f0418503a
patword 0x0051 0x0108599f0418503a
patword 0x0052 0x0108599f0418503a
patword 0x0053 0x0108599f0418503a
patword 0x0054 0x0108599f0418503a
patword 0x0055 0x0108599f0418503a
patword 0x0056 0x0108599f0418503a
patword 0x0057 0x0108599f0418503a
patword 0x0058 0x0108599f0418503a
patword 0x0059 0x0108599f0418503a
patword 0x005a 0x0108599f0418503a
patword 0x005b 0x0108599f0418503a
patword 0x005c 0x0108599f0418503a
patword 0x005d 0x0108599f0418503a
patword 0x005e 0x0108599f0418503a
patword 0x005f 0x0108599f0418503a
patword 0x0060 0x0108599f0418503a
patword 0x0061 0x0108599f0418503a
patword 0x0062 0x0108599f0418503a
patword 0x0063 0x0108599f0418503a
patword 0x0064 0x0108599f0418503a
patword 0x0065 0x0108599f0418503a
patword 0x0066 0x0108599f0418503a
patword 0x0067 0x0108599f0418503a
patword 0x0068 0x0108599f0418503a
patword 0x0069 0x0108599f0418503a
patword 0x006a 0x0108599f0418503a
patword 0x006b 0x0108599f0418503a
patword 0x006c 0x0108599f0418503a
patword 0x006d 0x0108599f0418503a
patword 0x006e 0x0108599f0418503a
patword 0x006f 0x0108599f0418503a
patword 0x0070 0x0108599f0418503a
patword 0x0071 0x0108599f0418503a
patword 0x0072 0x0108599f0418503a
patword 0x0073 0x0108599f0418503a
patword 0x0074 0x0108599f0418503a
patword 0x0075 0x0108599f0418503a
patword 0x0076 0x0108599f0418503a
patword 0x0077 0x0108599f0418503a
patword 0x0078 0x0108599f0418503a
patword 0x0079 0x0108599f0418503a
patword 0x007a 0x0108599f0418503a
patword 0x007b 0x0108599f0418503a
patword 0x007c 0x0108599f0418503a
patword 0x007d 0x0108599f0418503a
patword 0x007e 0x010859960418503a
patword 0x007f 0x010859960418503a
patword 0x0080 0x010859960418503a
patword 0x0081 0x010859960418503a
patword 0x0082 0x010859960418503a
patword 0x0083 0x010859960418503a
patword 0x0084 0x010859960418503a
patword 0x0085 0x010859960418503a
patword 0x0086 0x010859960418503a
patword 0x0087 0x010859960418503a
patword 0x0088 0x010859960418503a
patword 0x0089 0x010859960418503a
patword 0x008a 0x010859960418503a
patword 0x008b 0x010859960418503a
patword 0x008c 0x010859960418503a
patword 0x008d 0x010859960418503a
patword 0x008e 0x010859960418503a
patword 0x008f 0x010859960418503a
patword 0x0090 0x010859960418503a
patword 0x0091 0x010859960418503a
patword 0x0092 0x010819960418501a
patword 0x0093 0x010819960418501a
patword 0x0094 0x010819960418501a
patword 0x0095 0x010819960418501a
patword 0x0096 0x030819960418501a
patword 0x0097 0x030819960418501a
patword 0x0098 0x030819960418501a
patword 0x0099 0x030819960418501a
patword 0x009a 0x030819960418501a
patword 0x009b 0x030819960418501a
patword 0x009c 0x030819960418501a
patword 0x009d 0x030819960418501a
patword 0x009e 0x030819960418501a
patword 0x009f 0x030819960418501a
patword 0x00a0 0x030819960418501a
patword 0x00a1 0x030819960418501a
patword 0x00a2 0x030819960418501a
patword 0x00a3 0x030819960418501a
patword 0x00a4 0x030819960418501a
patword 0x00a5 0x030819960418501a
patword 0x00a6 0x030819960418501a
patword 0x00a7 0x030819960418501a
patword 0x00a8 0x030819960418501a
patword 0x00a9 0x030819960418501a
patword 0x00aa 0x030819960418501a
patword 0x00ab 0x030819960418501a
patword 0x00ac 0x030819960008501a
patword 0x00ad 0x030819960008501a
patword 0x00ae 0x030819960008501a
patword 0x00af 0x030819960008501a
patword 0x00b0 0x030819960008501a
patword 0x00b1 0x030819960008501a
patword 0x00b2 0x030819960008501a
patword 0x00b3 0x030819960008501a
patword 0x00b4 0x030819960008501a
patword 0x00b5 0x030819960008501a
patword 0x00b6 0x030819960008501a
patword 0x00b7 0x030819960008501a
patword 0x00b8 0x030819960008501a
patword 0x00b9 0x030819960008501a
patword 0x00ba 0x030819960008501a
patword 0x00bb 0x030819960008501a
patword 0x00bc 0x030819960008501a
patword 0x00bd 0x030819960008501a
patword 0x00be 0x030819960008501a
patword 0x00bf 0x030819960008501a
patword 0x00c0 0x0308199f0008501a
patword 0x00c1 0x0308199f0008501a
patword 0x00c2 0x0308199f0008501a
patword 0x00c3 0x0308199f0008501a
patword 0x00c4 0x0308199f0008501a
patword 0x00c5 0x0308199f0008501a
patword 0x00c6 0x0308199f0008501a
patword 0x00c7 0x0308199f0008501a
patword 0x00c8 0x0308199f0008501a
patword 0x00c9 0x0308199f0008501a
patword 0x00ca 0x0308199f0008501a
patword 0x00cb 0x0308199f0008501a
patword 0x00cc 0x0308199f0008501a
patword 0x00cd 0x0308199f0008501a
patword 0x00ce 0x0308199f0008501a
patword 0x00cf 0x0308199f0008501a
patword 0x00d0 0x0308199f0008501a
patword 0x00d1 0x0308199f0008501a
patword 0x00d2 0x0308199f0008501a
patword 0x00d3 0x0308199f0008501a
patword 0x00d4 0x0308599f0008503a
patword 0x00d5 0x0308599f0008503a
patword 0x00d6 0x030c599f000850ba
patword 0x00d7 0x030c599f000850ba
patword 0x00d8 0x030c599f000850ba
patword 0x00d9 0x030c599f000850ba
patword 0x00da 0x030c599f000850ba
patword 0x00db 0x030c599f000850ba
patword 0x00dc 0x030c599f000850ba
patword 0x00dd 0x030c599f000850ba
patword 0x00de 0x030c599f000850ba
patword 0x00df 0x030c599f000850ba
patword 0x00e0 0x030c599f000850ba
patword 0x00e1 0x030c599f000850ba
patword 0x00e2 0x030c599f000850ba
patword 0x00e3 0x030c599f000850ba
patword 0x00e4 0x030c599f000850ba
patword 0x00e5 0x030c599f000850ba
patword 0x00e6 0x030c599f000850ba
patword 0x00e7 0x030c599f000850ba
patword 0x00e8 0x030c599f000850ba
patword 0x00e9 0x030c599f000850ba
patword 0x00ea 0x030c799f010858ba
patword 0x00eb 0x030c799f010858ba
patword 0x00ec 0x030c599f000850ba
patword 0x00ed 0x030c599f000850ba
patword 0x00ee 0x030c599f000850ba
patword 0x00ef 0x030c599f000850ba
patword 0x00f0 0x030c599f000850ba
patword 0x00f1 0x030c599f000850ba
patword 0x00f2 0x030c599f000850ba
patword 0x00f3 0x030c599f000850ba
patword 0x00f4 0x030c599f000850ba
patword 0x00f5 0x030c599f000850ba
patword 0x00f6 0x030c599f000850ba
patword 0x00f7 0x030c599f000850ba
patword 0x00f8 0x030c599f000850ba
patword 0x00f9 0x030c599f000850ba
patword 0x00fa 0x030c599f000850ba
patword 0x00fb 0x030c599f000850ba
patword 0x00fc 0x030c599f000850ba
patword 0x00fd 0x030c599f000850ba
patword 0x00fe 0x030c599f000850ba
patword 0x00ff 0x030c599f000850ba
patword 0x0100 0x030c599f000850ba
patword 0x0101 0x030c599f000850ba
patword 0x0102 0x030c599f400850ba
patword 0x0103 0x030c599f400850ba
patword 0x0104 0x030c599f600850ba
patword 0x0105 0x030c599f400850ba
patword 0x0106 0x030c599f400850ba
patword 0x0107 0x030c599f400850ba
patword 0x0108 0x870c599f682e50ba
patword 0x0109 0x870c599f482850ba
patword 0x010a 0x870c599f000e50ba
patword 0x010b 0x870c599f000850ba
patword 0x010c 0x870c599f000e50ba
patword 0x010d 0x870c599f000850ba
patword 0x010e 0x870c599f000e50ba
patword 0x010f 0x870c599f000850ba
patword 0x0110 0x870c599f000e50ba
patword 0x0111 0x870c599f000850ba
patword 0x0112 0x870c599f000e50ba
patword 0x0113 0x870c599f000850ba
patword 0x0114 0x870c599f000e50ba
patword 0x0115 0x870c599f000850ba
patword 0x0116 0x870c599f000e50ba
patword 0x0117 0x870c599f000850ba
patword 0x0118 0x870c599f000e50ba
patword 0x0119 0x870c599f000850ba
patword 0x011a 0x870c599f000e50ba
patword 0x011b 0x870c599f000850ba
patword 0x011c 0x870c599f000e50ba
patword 0x011d 0x870c599f000850ba
patword 0x011e 0x870c599f000e50ba
patword 0x011f 0x870c599f000850ba
patword 0x0120 0x870c599f000e50ba
patword 0x0121 0x870c599f000850ba
patword 0x0122 0x870c599f200e50ba
patword 0x0123 0x870c599f000850ba
patword 0x0124 0x870c599f000e50ba
patword 0x0125 0x870c599f000850ba
patword 0x0126 0x870c599f000e50ba
patword 0x0127 0x870c599f000850ba
patword 0x0128 0x870c599f000e50ba
patword 0x0129 0x870c599f000850ba
patword 0x012a 0x870c599f000e50ba
patword 0x012b 0x870c599f000850ba
patword 0x012c 0x870c599f000e50ba
patword 0x012d 0x870c599f000850ba
patword 0x012e 0x870c599f000e50ba
patword 0x012f 0x870c599f000850ba
patword 0x0130 0x870c599f000e50ba
patword 0x0131 0x870c599f000850ba
patword 0x0132 0x870c599f000e50ba
patword 0x0133 0x870c599f000850ba
patword 0x0134 0x870c599f000e50ba
patword 0x0135 0x870c599f000850ba
patword 0x0136 0x870c599f000e50ba
patword 0x0137 0x870c599f000850ba
patword 0x0138 0x870c599f000e50ba
patword 0x0139 0x870c599f000850ba
patword 0x013a 0x870c599f282e50ba
patword 0x013b 0x870c599f082850ba
patword 0x013c 0x870c599f000e50ba
patword 0x013d 0x870c599f000850ba
patword 0x013e 0x870c599f000e50ba
patword 0x013f 0x870c599f000850ba
patword 0x0140 0x870c599f000e50ba
patword 0x0141 0x870c599f000850ba
patword 0x0142 0x870c599f000e50ba
patword 0x0143 0x870c599f000850ba
patword 0x0144 0x870c599f000e50ba
patword 0x0145 0x870c599f000850ba
patword 0x0146 0x870c599f000e50ba
patword 0x0147 0x870c599f000850ba
patword 0x0148 0x870c599f000e50ba
patword 0x0149 0x870c599f000850ba
patword 0x014a 0x870c599f000e50ba
patword 0x014b 0x870c599f000850ba
patword 0x014c 0x870c599f000e50ba
patword 0x014d 0x870c599f000850ba
patword 0x014e 0x870c599f000e50ba
patword 0x014f 0x870c599f000850ba
patword 0x0150 0x870c599f000e50ba
patword 0x0151 0x870c599f000850ba
patword 0x0152 0x870c599f000e50ba
patword 0x0153 0x870c599f000850ba
patword 0x0154 0x870c599f200e50ba
patword 0x0155 0x870c599f000850ba
patword 0x0156 0x870c599f000e50ba
patword 0x0157 0x870c599f000850ba
patword 0x0158 0x870c599f000e50ba
patword 0x0159 0x870c599f000850ba
patword 0x015a 0x870c599f000e50ba
patword 0x015b 0x870c599f000850ba
patword 0x015c 0x870c599f000e50ba
patword 0x015d 0x870c599f000850ba
patword 0x015e 0x870c599f000e50ba
patword 0x015f 0x870c599f000850ba
patword 0x0160 0x870c599f000e50ba
patword 0x0161 0x870c599f000850ba
patword 0x0162 0x870c599f000e50ba
patword 0x0163 0x870c599f000850ba
patword 0x0164 0x870c599f000e50ba
patword 0x0165 0x870c599f000850ba
patword 0x0166 0x870c599f000e50ba
patword 0x0167 0x870c599f000850ba
patword 0x0168 0x870c599f000e50ba
patword 0x0169 0x870c599f000850ba
patword 0x016a 0x870c599f000e50ba
patword 0x016b 0x870c599f000850ba
patword 0x016c 0x070c599f000850ba
patword 0x016d 0x070c599f000850ba
patword 0x016e 0x000c599f000850ba
patword 0x016f 0x000c599f000850ba
patword 0x0170 0x0008599f200e503a
patword 0x0171 0x0008599f0008503a
patword 0x0172 0x0008599f200e503a
patword 0x0173 0x0008599f0008503a
patword 0x0174 0x0008599f0008503a
patword 0x0175 0x0008599f0008503a
patword 0x0176 0x0008599f0008503a
patword 0x0177 0x0008599f0008503a
patword 0x0178 0x0008599f0008503a
patword 0x0179 0x0008599f0008503a
patword 0x017a 0x0008599f0008503a
patword 0x017b 0x0008599f0008503a
patword 0x017c 0x0008599f0008503a
patword 0x017d 0x0008599f0008503a
patword 0x017e 0x0008599f0008503a
patword 0x017f 0x0008599f0008503a
patword 0x0180 0x0008599f0008503a
patword 0x0181 0x0008599f0008503a
patword 0x0182 0x0008599f0008503a
patword 0x0183 0x0008599f0008503a
patword 0x0184 0x0008599f0008503a
patword 0x0185 0x0008599f0008503a
patword 0x0186 0x0008599f0008503a
patword 0x0187 0x0008599f0008503a
patword 0x0188 0x0008599f0008503a
patword 0x0189 0x0008599f0008503a
patword 0x018a 0x0008599f0008503a
patword 0x018b 0x0008599f0008503a
patword 0x018c 0x0008599f0008503a
patword 0x018d 0x0008599f0008503a
patioctrl 0x8f0effff6dbffdbf
patclkctrl 0x0000000000000000
patlimits 0x0000 0x018c
patloop0 0x013a 0x016b
patnloop0 199
patloop1 0x0400 0x0400
patnloop1 0
patloop2 0x0400 0x0400
patnloop2 0
patwait0 0x00aa
patwaittime0 10000
patwait1 0x0400
patwaittime1 0
patwait2 0x0400
patwaittime2 0

3
slsDetectorServers/moenchDetectorServer/Makefile
View File

@ -12,7 +12,7 @@ DESTDIR ?= bin
INSTMODE = 0777
SRCS = slsDetectorFunctionList.c
SRCS += $(main_src)slsDetectorServer.c $(main_src)slsDetectorServer_funcs.c $(main_src)communication_funcs.c $(main_src)blackfin.c $(main_src)common.c $(main_src)commonServerFunctions.c $(main_src)communication_funcs_UDP.c $(main_src)UDPPacketHeaderGenerator.c $(main_src)AD9257.c $(main_src)ALTERA_PLL.c $(main_src)LTC2620.c $(main_src)MAX1932.c $(main_src)programFpgaBlackfin.c
SRCS += $(main_src)slsDetectorServer.c $(main_src)slsDetectorServer_funcs.c $(main_src)communication_funcs.c $(main_src)blackfin.c $(main_src)common.c $(main_src)commonServerFunctions.c $(main_src)communication_funcs_UDP.c $(main_src)UDPPacketHeaderGenerator.c $(main_src)AD9257.c $(main_src)ALTERA_PLL.c $(main_src)LTC2620.c $(main_src)MAX1932.c $(main_src)programFpgaBlackfin.c $(main_src)readDefaultPattern.c
OBJS = $(SRCS:.c=.o)
@ -34,6 +34,7 @@ $(PROGS): $(OBJS)
mv $(PROGS) $(DESTDIR)
rm *.gdb
rm $(main_src)*.o
rm *.o
clean:
rm -rf $(DESTDIR)/$(PROGS) *.o *.gdb $(main_src)*.o

65
slsDetectorServers/moenchDetectorServer/RegisterDefs.h
View File

@ -16,7 +16,7 @@
/* Fix pattern RO register */
#define FIX_PATT_REG (0x01 << MEM_MAP_SHIFT)
#define FIX_PATT_VAL (0xACDC2014)
#define FIX_PATT_VAL (0xACDC2016)
/* Status RO register */
#define STATUS_REG (0x02 << MEM_MAP_SHIFT)
@ -289,7 +289,7 @@
/* Configuration RW register */
#define CONFIG_REG (0x4D << MEM_MAP_SHIFT)
#define CONFIG_LED_DSBL_OFST (0)
#define CONFIG_LED_DSBL_OFST (0) // Not used in firmware or software
#define CONFIG_LED_DSBL_MSK (0x00000001 << CONFIG_LED_DSBL_OFST)
#define CONFIG_DSBL_ANLG_OTPT_OFST (8)
#define CONFIG_DSBL_ANLG_OTPT_MSK (0x00000001 << CONFIG_DSBL_ANLG_OTPT_OFST)
@ -365,23 +365,23 @@
#define PATTERN_CNTRL_RD_OFST (1)
#define PATTERN_CNTRL_RD_MSK (0x00000001 << PATTERN_CNTRL_RD_OFST)
#define PATTERN_CNTRL_ADDR_OFST (16)
#define PATTERN_CNTRL_ADDR_MSK (0x0000FFFF << PATTERN_CNTRL_ADDR_OFST)
#define PATTERN_CNTRL_ADDR_MSK (0x00001FFF << PATTERN_CNTRL_ADDR_OFST)
/* Pattern Limit RW regiser */
#define PATTERN_LIMIT_REG (0x53 << MEM_MAP_SHIFT)
#define PATTERN_LIMIT_STRT_OFST (0)
#define PATTERN_LIMIT_STRT_MSK (0x0000FFFF << PATTERN_LIMIT_STRT_OFST)
#define PATTERN_LIMIT_STRT_MSK (0x00001FFF << PATTERN_LIMIT_STRT_OFST)
#define PATTERN_LIMIT_STP_OFST (16)
#define PATTERN_LIMIT_STP_MSK (0x0000FFFF << PATTERN_LIMIT_STP_OFST)
#define PATTERN_LIMIT_STP_MSK (0x00001FFF << PATTERN_LIMIT_STP_OFST)
/* Pattern Loop 0 Address RW regiser */
#define PATTERN_LOOP_0_ADDR_REG (0x54 << MEM_MAP_SHIFT)
#define PATTERN_LOOP_0_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_0_ADDR_STRT_MSK (0x0000FFFF << PATTERN_LOOP_0_ADDR_STRT_OFST)
#define PATTERN_LOOP_0_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_0_ADDR_STRT_OFST)
#define PATTERN_LOOP_0_ADDR_STP_OFST (16)
#define PATTERN_LOOP_0_ADDR_STP_MSK (0x0000FFFF << PATTERN_LOOP_0_ADDR_STP_OFST)
#define PATTERN_LOOP_0_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_0_ADDR_STP_OFST)
/* Pattern Loop 0 Iteration RW regiser */
#define PATTERN_LOOP_0_ITERATION_REG (0x55 << MEM_MAP_SHIFT)
@ -390,9 +390,9 @@
#define PATTERN_LOOP_1_ADDR_REG (0x56 << MEM_MAP_SHIFT)
#define PATTERN_LOOP_1_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_1_ADDR_STRT_MSK (0x0000FFFF << PATTERN_LOOP_1_ADDR_STRT_OFST)
#define PATTERN_LOOP_1_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_1_ADDR_STRT_OFST)
#define PATTERN_LOOP_1_ADDR_STP_OFST (16)
#define PATTERN_LOOP_1_ADDR_STP_MSK (0x0000FFFF << PATTERN_LOOP_1_ADDR_STP_OFST)
#define PATTERN_LOOP_1_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_1_ADDR_STP_OFST)
/* Pattern Loop 1 Iteration RW regiser */
#define PATTERN_LOOP_1_ITERATION_REG (0x57 << MEM_MAP_SHIFT)
@ -401,9 +401,9 @@
#define PATTERN_LOOP_2_ADDR_REG (0x58 << MEM_MAP_SHIFT)
#define PATTERN_LOOP_2_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_2_ADDR_STRT_MSK (0x0000FFFF << PATTERN_LOOP_2_ADDR_STRT_OFST)
#define PATTERN_LOOP_2_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_2_ADDR_STRT_OFST)
#define PATTERN_LOOP_2_ADDR_STP_OFST (16)
#define PATTERN_LOOP_2_ADDR_STP_MSK (0x0000FFFF << PATTERN_LOOP_2_ADDR_STP_OFST)
#define PATTERN_LOOP_2_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_2_ADDR_STP_OFST)
/* Pattern Loop 2 Iteration RW regiser */
#define PATTERN_LOOP_2_ITERATION_REG (0x59 << MEM_MAP_SHIFT)
@ -412,31 +412,36 @@
#define PATTERN_WAIT_0_ADDR_REG (0x5A << MEM_MAP_SHIFT)
#define PATTERN_WAIT_0_ADDR_OFST (0)
#define PATTERN_WAIT_0_ADDR_MSK (0x0000FFFF << PATTERN_WAIT_0_ADDR_OFST)
#define PATTERN_WAIT_0_ADDR_MSK (0x00001FFF << PATTERN_WAIT_0_ADDR_OFST)
//FIXME: is mask 3FF
/* Pattern Wait 1 RW regiser */
#define PATTERN_WAIT_1_ADDR_REG (0x5B << MEM_MAP_SHIFT)
#define PATTERN_WAIT_1_ADDR_OFST (0)
#define PATTERN_WAIT_1_ADDR_MSK (0x0000FFFF << PATTERN_WAIT_1_ADDR_OFST)
#define PATTERN_WAIT_1_ADDR_MSK (0x00001FFF << PATTERN_WAIT_1_ADDR_OFST)
/* Pattern Wait 2 RW regiser */
#define PATTERN_WAIT_2_ADDR_REG (0x5C << MEM_MAP_SHIFT)
#define PATTERN_WAIT_2_ADDR_OFST (0)
#define PATTERN_WAIT_2_ADDR_MSK (0x0000FFFF << PATTERN_WAIT_2_ADDR_OFST)
#define PATTERN_WAIT_2_ADDR_MSK (0x00001FFF << PATTERN_WAIT_2_ADDR_OFST)
/* Samples RW register */
#define SAMPLES_REG (0x5D << MEM_MAP_SHIFT)
#define SAMPLES_DIGITAL_OFST (0)
#define SAMPLES_DIGITAL_MSK (0x0000FFFF << SAMPLES_DIGITAL_OFST)
#define SAMPLES_ANALOG_OFST (16)
#define SAMPLES_ANALOG_MSK (0x0000FFFF << SAMPLES_ANALOG_OFST)
/** Power RW register */
#define POWER_REG (0x5E << MEM_MAP_SHIFT)
#define POWER_ENBL_VLTG_RGLTR_OFST (16)
#define POWER_ENBL_VLTG_RGLTR_MSK (0x0000001F << POWER_ENBL_VLTG_RGLTR_OFST)
#define POWER_HV_SLCT_OFST (31)
#define POWER_HV_SLCT_MSK (0x00000001 << POWER_HV_SLCT_OFST)
#define POWER_CHIP_OFST (16)
#define POWER_CHIP_MSK (0x00000001 << POWER_CHIP_OFST)
#define POWER_HV_INTERNAL_SLCT_OFST (31)
#define POWER_HV_INTERNAL_SLCT_MSK (0x00000001 << POWER_HV_INTERNAL_SLCT_OFST)
/* Number of Words RW register TODO */
#define NUMBER_OF_WORDS_REG (0x5F << MEM_MAP_SHIFT)
@ -493,17 +498,16 @@
#define PATTERN_WAIT_TIMER_2_LSB_REG (0x76 << MEM_MAP_SHIFT)
#define PATTERN_WAIT_TIMER_2_MSB_REG (0x77 << MEM_MAP_SHIFT)
/* ADC Disable RW register TODO */
#define ADC_DISABLE_REG (0x78 << MEM_MAP_SHIFT)
/* Readout enable RW register */
#define READOUT_10G_ENABLE_REG (0x79 << MEM_MAP_SHIFT)
/* DAC Value RW register TODO */
//#define DAC_VALUE_REG (0x79 << MEM_MAP_SHIFT)
/* DAC Number RW register TODO */
//#define DAC_NUMBER_REG (0x7A << MEM_MAP_SHIFT)
#define READOUT_10G_ENABLE_ANLG_OFST (0)
#define READOUT_10G_ENABLE_ANLG_MSK (0x000000FF << READOUT_10G_ENABLE_ANLG_OFST)
#define READOUT_10G_ENABLE_DGTL_OFST (8)
#define READOUT_10G_ENABLE_DGTL_MSK (0x00000001 << READOUT_10G_ENABLE_DGTL_OFST)
/* Digital Bit External Trigger RW register */
#define DBIT_EXT_TRG_REG (0x7B << MEM_MAP_SHIFT)
#define DBIT_EXT_TRG_REG (0x7B << MEM_MAP_SHIFT) // Not used in firmware or software
#define DBIT_EXT_TRG_SRC_OFST (0)
#define DBIT_EXT_TRG_SRC_MSK (0x0000003F << DBIT_EXT_TRG_SRC_OFST)
@ -511,7 +515,8 @@
#define DBIT_EXT_TRG_OPRTN_MD_MSK (0x00000001 << DBIT_EXT_TRG_OPRTN_MD_OFST)
/* Pin Delay 0 RW register */
#define OUTPUT_DELAY_0_REG (0x7C << MEM_MAP_SHIFT)
#define OUTPUT_DELAY_0_REG (0x7C << MEM_MAP_SHIFT) // Not used in firmware or software
#define OUTPUT_DELAY_0_OTPT_STTNG_STEPS (25)
#define OUTPUT_DELAY_0_OTPT_STTNG_OFST (0) //t = OTPT_STTNG * 25 ps, max for Cyclone V = 775 ps
#define OUTPUT_DELAY_0_OTPT_STTNG_MSK (0x0000001F << OUTPUT_DELAY_0_OTPT_STTNG_OFST)
@ -523,7 +528,7 @@
/* Pin Delay 1 RW register
* Each bit configured as enable for dynamic output delay configuration */
#define PIN_DELAY_1_REG (0x7D << MEM_MAP_SHIFT)
#define PIN_DELAY_1_REG (0x7D << MEM_MAP_SHIFT) // Not used in firmware or software
/** Pattern Mask 64 bit RW regiser */
#define PATTERN_MASK_LSB_REG (0x80 << MEM_MAP_SHIFT)
@ -533,7 +538,7 @@
#define PATTERN_SET_LSB_REG (0x82 << MEM_MAP_SHIFT)
#define PATTERN_SET_MSB_REG (0x83 << MEM_MAP_SHIFT)
/* Round Robin */
#define RXR_ENDPOINT_START_REG (0x1000 << MEM_MAP_SHIFT)

BIN
slsDetectorServers/moenchDetectorServer/bin/moenchDetectorServer_developer Executable file
View File

Binary file not shown.

1741
slsDetectorServers/moenchDetectorServer/slsDetectorFunctionList.c
View File

File diff suppressed because it is too large Load Diff

99
slsDetectorServers/moenchDetectorServer/slsDetectorServer_defs.h
View File

@ -4,27 +4,52 @@
#define MIN_REQRD_VRSN_T_RD_API 0x180314
#define REQRD_FRMWR_VRSN 0x180314
#define REQRD_FRMWR_VRSN 0x200302
#define CTRL_SRVR_INIT_TIME_US (300 * 1000)
#define CTRL_SRVR_INIT_TIME_US (2 * 1000 * 1000)
/* Struct Definitions */
typedef struct ip_header_struct {
uint16_t ip_len;
uint8_t ip_tos;
uint8_t ip_ihl:4 ,ip_ver:4;
uint16_t ip_offset:13,ip_flag:3;
uint16_t ip_ident;
uint16_t ip_chksum;
uint8_t ip_protocol;
uint8_t ip_ttl;
uint32_t ip_sourceip;
uint32_t ip_destip;
} ip_header;
typedef struct udp_header_struct {
uint32_t udp_destmac_msb;
uint16_t udp_srcmac_msb;
uint16_t udp_destmac_lsb;
uint32_t udp_srcmac_lsb;
uint8_t ip_tos;
uint8_t ip_ihl: 4, ip_ver: 4;
uint16_t udp_ethertype;
uint16_t ip_identification;
uint16_t ip_totallength;
uint8_t ip_protocol;
uint8_t ip_ttl;
uint16_t ip_fragmentoffset: 13, ip_flags: 3;
uint16_t ip_srcip_msb;
uint16_t ip_checksum;
uint16_t ip_destip_msb;
uint16_t ip_srcip_lsb;
uint16_t udp_srcport;
uint16_t ip_destip_lsb;
uint16_t udp_checksum;
uint16_t udp_destport;
} udp_header;
#define IP_HEADER_SIZE (20)
#define UDP_IP_HEADER_LENGTH_BYTES (28)
/* Enums */
enum DACINDEX {MO_VBP_COLBUF, MO_VIPRE, MO_VIN_CM, MO_VB_SDA, MO_VCASC_SFP, MO_VOUT_CM, MO_VIPRE_CDS, MO_IBIAS_SFP};
#define DAC_NAMES "vbp_colbuf", "vipre", "vin_cm", "vb_sda", "vcasc_sfp", "vout_cm", "vipre_cds", "ibias_sfp"
#define DEFAULT_DAC_VALS { 1300, /* MO_VBP_COLBUF */ \
1000, /* MO_VIPRE */ \
1400, /* MO_VIN_CM */ \
680, /* MO_VB_SDA */ \
1428, /* MO_VCASC_SFP */ \
1200, /* MO_VOUT_CM */ \
800, /* MO_VIPRE_CDS */ \
900 /* MO_IBIAS_SFP */ \
};
enum CLKINDEX {RUN_CLK, ADC_CLK, SYNC_CLK, DBIT_CLK, NUM_CLOCKS};
enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7};
#define CLK_NAMES "run", "adc", "sync", "dbit"
/* Hardware Definitions */
#define NCHAN (32)
@ -33,12 +58,14 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7};
#define DYNAMIC_RANGE (16)
#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8)
#define CLK_FREQ (156.25) /* MHz */
#define NSAMPLES_PER_ROW (25)
/** Default Parameters */
#define DEFAULT_PATTERN_FILE ("DefaultPattern.txt")
#define DEFAULT_DATA_BYTES (NCHIP * NCHAN * NUM_BITS_PER_PIXEL)
#define DEFAULT_NUM_SAMPLES (1)
#define DEFAULT_NUM_SAMPLES (5000)
#define DEFAULT_EXPTIME (0)
#define DEFAULT_NUM_FRAMES (100 * 1000 * 1000)
#define DEFAULT_NUM_FRAMES (1)
#define DEFAULT_NUM_CYCLES (1)
#define DEFAULT_PERIOD (1 * 1000 * 1000) //ns
#define DEFAULT_DELAY (0)
@ -46,35 +73,49 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7};
#define DEFAULT_VLIMIT (-100)
#define DEFAULT_TIMING_MODE (AUTO_TIMING)
#define DEFAULT_TX_UDP_PORT (0x7e9a)
#define DEFAULT_RUN_CLK (40)
#define DEFAULT_ADC_CLK (20)
#define DEFAULT_SYNC_CLK (20)
#define DEFAULT_DBIT_CLK (200)
#define DEFAULT_RUN_CLK (40)
#define DEFAULT_ADC_CLK (20)
#define DEFAULT_SYNC_CLK (20)
#define DEFAULT_DBIT_CLK (20)
#define DEFAULT_ADC_PHASE_DEG (30)
#define DEFAULT_PIPELINE (14)
#define DEFAULT_SETTINGS (G4_HIGHGAIN)
// settings
#define DEFAULT_PATSETBIT (0x40800000115ULL)
#define G1_HIGHGAIN_PATMASK (0x40800000101ULL)
#define G1_LOWGAIN_PATMASK (0x40000000100ULL)
#define G2_HIGHCAP_HIGHGAIN_PATMASK (0x00800000001ULL)
#define G2_HIGHCAP_LOWGAIN_PATMASK (0x00000000000ULL)
#define G2_LOWCAP_HIGHGAIN_PATMASK (0x40800000115ULL)
#define G2_LOWCAP_LOWGAIN_PATMASK (0x40000000114ULL)
#define G4_HIGHGAIN_PATMASK (0x00800000015ULL)
#define G4_LOWGAIN_PATMASK (0x00000000014ULL)
#define HIGHVOLTAGE_MIN (60)
#define HIGHVOLTAGE_MAX (200)
#define HIGHVOLTAGE_MAX (200) // min dac val
#define DAC_MIN_MV (0)
#define DAC_MAX_MV (2500)
/* Defines in the Firmware */
#define MAX_PATTERN_LENGTH (0x7FFF)
#define MAX_PATTERN_LENGTH (0x2000)
#define DIGITAL_IO_DELAY_MAXIMUM_PS ((OUTPUT_DELAY_0_OTPT_STTNG_MSK >> OUTPUT_DELAY_0_OTPT_STTNG_OFST) * OUTPUT_DELAY_0_OTPT_STTNG_STEPS)
#define MAX_PHASE_SHIFTS_STEPS (8)
#define WAIT_TME_US_FR_ACQDONE_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo
#define WAIT_TIME_US_PLL (10 * 1000)
#define WAIT_TIME_US_STP_ACQ (100)
#define WAIT_TIME_CONFIGURE_MAC (500 * 1000)
#define WAIT_TIME_CONFIGURE_MAC (2 * 1000 * 1000)
#define WAIT_TIME_PATTERN_READ (10)
#define WAIT_TIME_FIFO_RD_STROBE (10)
#define WAIT_TIME_1US_FOR_LOOP_CNT (50) // around 30 is 1 us in blackfin
/* MSB & LSB DEFINES */
#define MSB_OF_64_BIT_REG_OFST (32)
#define LSB_OF_64_BIT_REG_OFST (0)
#define BIT_32_MSK (0xFFFFFFFF)
#define BIT32_MSK (0xFFFFFFFF)
#define BIT16_MASK (0xFFFF)
#define IP_PACKETSIZE (0x2032)
#define ADC_PORT_INVERT_VAL (0x453b2593) //FIXME: a default value?
#define MAXIMUM_ADC_CLK (40)
#define ADC_PORT_INVERT_VAL (0x4a342593)
#define MAXIMUM_ADC_CLK (20)
#define PLL_VCO_FREQ_MHZ (800)

22
slsDetectorServers/slsDetectorServer/include/readDefaultPattern.h Executable file
View File

@ -0,0 +1,22 @@
#pragma once
#include <sys/types.h>
#include <inttypes.h>
int loadDefaultPattern(char* fname);
int default_writePatternWord(char* line, uint32_t addr, uint64_t word);
int default_writePatternIOControl(char* line, uint64_t arg);
int default_writePatternClkControl(char* line, uint64_t arg);
int default_setPatternLoopLimits(char* line, uint32_t startAddr, uint32_t stopAddr);
int default_setPatternLoopAddresses(char* line, int level, uint32_t startAddr, uint32_t stopAddr);
int default_setPatternLoopCycles(char* line, int level, int numLoops);
int default_setPatternWaitAddresses(char* line, int level, uint32_t addr);
int default_setPatternWaitTime(char* line, int level, uint64_t waittime);

26
slsDetectorServers/slsDetectorServer/include/slsDetectorFunctionList.h
View File

@ -3,6 +3,14 @@
#ifdef GOTTHARDD
#include "clogger.h" // runState(enum TLogLevel)
#endif
#ifndef VIRTUAL
#if defined(MYTHEN3D) || defined(GOTTHARD2D)
#include "programFpgaNios.h"
#elif defined(CHIPTESTBOARDD) || defined(JUNGFRAUD) || defined(MOENCHD)
#include "programFpgaBlackfin.h"
#endif
#endif
#include <stdlib.h>
#include <stdio.h> // FILE
#include <sys/types.h>
@ -84,7 +92,7 @@ int updateDatabytesandAllocateRAM();
void updateDataBytes();
#endif
#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(MYTHEN3D)
#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(MYTHEN3D) || defined(MOENCHD)
int setDefaultDacs();
#endif
#ifdef GOTTHARD2D
@ -141,6 +149,8 @@ void setADCEnableMask_10G(uint32_t mask);
uint32_t getADCEnableMask_10G();
void setADCInvertRegister(uint32_t val);
uint32_t getADCInvertRegister();
#endif
#if defined(CHIPTESTBOARDD)
int setExternalSamplingSource(int val);
int setExternalSampling(int val);
#endif
@ -213,6 +223,8 @@ int64_t getStorageCellDelay();
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
int setNumAnalogSamples(int val);
int getNumAnalogSamples();
#endif
#ifdef CHIPTESTBOARDD
int setNumDigitalSamples(int val);
int getNumDigitalSamples();
#endif
@ -245,7 +257,7 @@ int64_t getMeasurementTime();
int setModule(sls_detector_module myMod, char* mess);
int getModule(sls_detector_module *myMod);
#endif
#if (!defined(CHIPTESTBOARDD)) && (!defined(MOENCHD)) && (!defined(MYTHEN3D))
#if (!defined(CHIPTESTBOARDD)) && (!defined(MYTHEN3D))
enum detectorSettings setSettings(enum detectorSettings sett);
#endif
#if !defined(MYTHEN3D)
@ -298,11 +310,9 @@ void setPower(enum DACINDEX ind, int val);
void powerOff();
#endif
#ifndef MOENCHD
#if !defined(MYTHEN3D) && !defined(GOTTHARD2D)
#if !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D)
int getADC(enum ADCINDEX ind);
#endif
#endif
int setHighVoltage(int val);
@ -358,6 +368,7 @@ int enableTenGigabitEthernet(int val);
// moench specific - powerchip
#ifdef MOENCHD
int powerChip (int on);
int setAnalogOnlyReadout();
#endif
// chip test board or moench specific - configure frequency, phase, pll, flashing firmware
@ -383,13 +394,18 @@ uint64_t writePatternWord(int addr, uint64_t word);
int setPatternWaitAddress(int level, int addr);
uint64_t setPatternWaitTime(int level, uint64_t t);
void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop);
#ifdef CHIPTESTBOARDD
int setLEDEnable(int enable);
void setDigitalIODelay(uint64_t pinMask, int delay);
#endif
void setPatternMask(uint64_t mask);
uint64_t getPatternMask();
void setPatternBitMask(uint64_t mask);
uint64_t getPatternBitMask();
#endif
#ifdef MOENCHD
extern int loadDefaultPattern(char* fname); // readDefaultPattern.h
#endif
// jungfrau specific - powerchip, autocompdisable, clockdiv, asictimer, clock, pll, flashing firmware
#ifdef JUNGFRAUD

414
slsDetectorServers/slsDetectorServer/src/readDefaultPattern.c Executable file
View File

@ -0,0 +1,414 @@
#include "readDefaultPattern.h"
#include "sls_detector_defs.h"
#include "slsDetectorServer_defs.h"
#include "ansi.h"
#include "clogger.h"
#include <string.h>
extern char initErrorMessage[MAX_STR_LENGTH];
extern int initError;
extern uint64_t writePatternIOControl(uint64_t word);
extern uint64_t writePatternClkControl(uint64_t word);
extern uint64_t writePatternWord(int addr, uint64_t word);
extern int setPatternWaitAddress(int level, int addr);
extern uint64_t setPatternWaitTime(int level, uint64_t t);
extern void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop);
int loadDefaultPattern(char* fname) {
if (initError == FAIL) {
return initError;
}
FILE* fd = fopen(fname, "r");
if(fd == NULL) {
sprintf(initErrorMessage, "Could not open pattern file [%s].\n", fname);
initError = FAIL;
FILE_LOG(logERROR, ("%s\n\n", initErrorMessage));
return FAIL;
}
FILE_LOG(logINFOBLUE, ("Reading default pattern file %s\n", fname));
// Initialization
const size_t LZ = 256;
char line[LZ];
memset(line, 0, LZ);
char command[LZ];
// keep reading a line
while (fgets(line, LZ, fd)) {
// ignore comments
if (line[0] == '#') {
FILE_LOG(logDEBUG1, ("Ignoring Comment\n"));
continue;
}
// ignore empty lines
if (strlen(line) <= 1) {
FILE_LOG(logDEBUG1, ("Ignoring Empty line\n"));
continue;
}
FILE_LOG(logDEBUG1, ("Command to process: (size:%d) %.*s\n",
strlen(line), strlen(line) -1, line));
memset(command, 0, LZ);
// patword
if (!strncmp(line, "patword", strlen("patword"))) {
uint32_t addr = 0;
uint64_t word = 0;
// cannot scan values
if (sscanf(line, "%s 0x%x 0x%llx", command, &addr, &word) != 3) {
sprintf(initErrorMessage, "Could not scan patword arguments from default "
"pattern file. Line:[%s].\n", line);
break;
}
if (default_writePatternWord(line, addr, word) == FAIL) {
break;
}
}
// patioctrl
if (!strncmp(line, "patioctrl", strlen("patioctrl"))) {
uint64_t arg = 0;
// cannot scan values
if (sscanf(line, "%s 0x%llx", command, &arg) != 2) {
sprintf(initErrorMessage, "Could not scan patioctrl arguments from default "
"pattern file. Line:[%s].\n", line);
break;
}
if (default_writePatternIOControl(line, arg) == FAIL) {
break;
}
}
// patclkctrl
if (!strncmp(line, "patclkctrl", strlen("patclkctrl"))) {
uint64_t arg = 0;
// cannot scan values
if (sscanf(line, "%s 0x%llx", command, &arg) != 2) {
sprintf(initErrorMessage, "Could not scan patclkctrl arguments from default "
"pattern file. Line:[%s].\n", line);
break;
}
if (default_writePatternClkControl(line, arg) == FAIL) {
break;
}
}
// patlimits
if (!strncmp(line, "patlimits", strlen("patlimits"))) {
uint32_t startAddr = 0;
uint32_t stopAddr = 0;
// cannot scan values
if (sscanf(line, "%s 0x%x 0x%x", command, &startAddr, &stopAddr) != 3) {
sprintf(initErrorMessage, "Could not scan patlimits arguments from default "
"pattern file. Line:[%s].\n", line);
break;
}
if (default_setPatternLoopLimits(line, startAddr, stopAddr) == FAIL) {
break;
}
}
// patloop
if ((!strncmp(line, "patloop0", strlen("patloop0"))) ||
(!strncmp(line, "patloop1", strlen("patloop1"))) ||
(!strncmp(line, "patloop2", strlen("patloop2")))) {
// level
int level = -1;
if (!strncmp(line, "patloop0", strlen("patloop0"))) {
level = 0;
} else if (!strncmp(line, "patloop1", strlen("patloop1"))) {
level = 1;
} else {
level = 2;
}
uint32_t startAddr = 0;
uint32_t stopAddr = 0;
// cannot scan values
if (sscanf(line, "%s 0x%x 0x%x", command, &startAddr, &stopAddr) != 3) {
sprintf(initErrorMessage, "Could not scan patloop%d arguments from default "
"pattern file. Line:[%s].\n", level, line);
break;
}
if (default_setPatternLoopAddresses(line, level, startAddr, stopAddr) == FAIL) {
break;
}
}
// patnloop
if ((!strncmp(line, "patnloop0", strlen("patnloop0"))) ||
(!strncmp(line, "patnloop1", strlen("patnloop1"))) ||
(!strncmp(line, "patnloop2", strlen("patnloop2")))) {
// level
int level = -1;
if (!strncmp(line, "patnloop0", strlen("patnloop0"))) {
level = 0;
} else if (!strncmp(line, "patnloop1", strlen("patnloop1"))) {
level = 1;
} else {
level = 2;
}
int numLoops = -1;
// cannot scan values
if (sscanf(line, "%s %d", command, &numLoops) != 2) {
sprintf(initErrorMessage, "Could not scan patnloop%d arguments from default "
"pattern file. Line:[%s].\n", level, line);
break;
}
if (default_setPatternLoopCycles(line, level, numLoops) == FAIL) {
break;
}
}
// patwait
if ((!strncmp(line, "patwait0", strlen("patwait0"))) ||
(!strncmp(line, "patwait1", strlen("patwait1"))) ||
(!strncmp(line, "patwait2", strlen("patwait2")))) {
// level
int level = -1;
if (!strncmp(line, "patwait0", strlen("patwait0"))) {
level = 0;
} else if (!strncmp(line, "patwait1", strlen("patwait1"))) {
level = 1;
} else {
level = 2;
}
uint32_t addr = 0;
// cannot scan values
if (sscanf(line, "%s 0x%x", command, &addr) != 2) {
sprintf(initErrorMessage, "Could not scan patwait%d arguments from default "
"pattern file. Line:[%s].\n", level, line);
break;
}
if (default_setPatternWaitAddresses(line, level, addr) == FAIL) {
break;
}
}
// patwaittime
if ((!strncmp(line, "patwaittime0", strlen("patwaittime0"))) ||
(!strncmp(line, "patwaittime1", strlen("patwaittime1"))) ||
(!strncmp(line, "patwaittime2", strlen("patwaittime2")))) {
// level
int level = -1;
if (!strncmp(line, "patwaittime0", strlen("patwaittime0"))) {
level = 0;
} else if (!strncmp(line, "patwaittime1", strlen("patwaittime1"))) {
level = 1;
} else {
level = 2;
}
uint64_t waittime = 0;
// cannot scan values
if (sscanf(line, "%s %lld", command, &waittime) != 2) {
sprintf(initErrorMessage, "Could not scan patwaittime%d arguments from default "
"pattern file. Line:[%s].\n", level, line);
break;
}
if (default_setPatternWaitTime(line, level, waittime) == FAIL) {
break;
}
}
memset(line, 0, LZ);
}
fclose(fd);
if (strlen(initErrorMessage)) {
initError = FAIL;
FILE_LOG(logERROR, ("%s\n\n", initErrorMessage));
} else {
FILE_LOG(logINFOBLUE, ("Successfully read default pattern file\n"));
}
return initError;
}
int default_writePatternWord(char* line, uint32_t addr, uint64_t word) {
//validations
if (addr < 0 || addr >= MAX_PATTERN_LENGTH) {
sprintf(initErrorMessage, "Cannot set pattern word from default "
"pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n",
MAX_PATTERN_LENGTH, line);
return FAIL;
}
writePatternWord(addr, word);
// cannot validate for moench, ctb ( same as executing pattern word)
return OK;
}
int default_writePatternIOControl(char* line, uint64_t arg) {
uint64_t retval = writePatternIOControl(arg);
if (retval != arg) {
sprintf(initErrorMessage, "Could not set patioctrl from default pattern "
"file. Set 0x%llx, read 0x%llx. Line:[%s]\n", arg, retval, line);
return FAIL;
}
return OK;
}
int default_writePatternClkControl(char* line, uint64_t arg) {
uint64_t retval = writePatternClkControl(arg);
if (retval != arg) {
sprintf(initErrorMessage, "Could not set patclkctrl from default pattern "
"file. Set 0x%llx, read 0x%llx. Line:[%s]\n", arg, retval, line);
return FAIL;
}
return OK;
}
int default_setPatternLoopLimits(char* line, uint32_t startAddr, uint32_t stopAddr) {
//validations
if (startAddr < 0 || startAddr >= MAX_PATTERN_LENGTH ||
stopAddr < 0 || stopAddr >= MAX_PATTERN_LENGTH) {
sprintf(initErrorMessage, "Cannot set patlimits from default "
"pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n",
MAX_PATTERN_LENGTH, line);
return FAIL;
}
int numLoops = -1;
int r_startAddr = startAddr, r_stopAddr = stopAddr;
setPatternLoop(-1, &r_startAddr, &r_stopAddr, &numLoops);
// validate
if (r_startAddr != startAddr || r_stopAddr != stopAddr) {
sprintf(initErrorMessage, "Could not set patlimits from default pattern "
"file. Read start addr:0x%x, stop addr: 0x%x. Line:[%s]\n",
r_startAddr, r_stopAddr, line);
return FAIL;
}
return OK;
}
int default_setPatternLoopAddresses(char* line, int level, uint32_t startAddr, uint32_t stopAddr) {
//validations
if (level < 0 || level > 2) {
sprintf(initErrorMessage, "Cannot set patloop from default "
"pattern file. Level must be between 0 and 2. Line:[%s]\n",
line);
return FAIL;
}
if (startAddr < 0 || startAddr >= MAX_PATTERN_LENGTH ||
stopAddr < 0 || stopAddr >= MAX_PATTERN_LENGTH) {
sprintf(initErrorMessage, "Cannot set patloop (level: %d) from default "
"pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n",
level, MAX_PATTERN_LENGTH, line);
return FAIL;
}
int numLoops = -1;
int r_startAddr = startAddr, r_stopAddr = stopAddr;
setPatternLoop(level, &r_startAddr, &r_stopAddr, &numLoops);
// validate
if (r_startAddr != startAddr || r_stopAddr != stopAddr) {
sprintf(initErrorMessage, "Could not set patloop (level: %d) from default "
"pattern file. Read start addr:0x%x, stop addr: 0x%x. Line:[%s]\n",
level, r_startAddr, r_stopAddr, line);
return FAIL;
}
return OK;
}
int default_setPatternLoopCycles(char* line, int level, int numLoops) {
//validations
if (level < 0 || level > 2) {
sprintf(initErrorMessage, "Cannot set patnloop from default "
"pattern file. Level must be between 0 and 2. Line:[%s]\n",
line);
return FAIL;
}
if (numLoops < 0) {
sprintf(initErrorMessage, "Cannot set patnloop from default "
"pattern file. Iterations must be between > 0. Line:[%s]\n",
line);
return FAIL;
}
int startAddr = -1;
int stopAddr = -1;
int r_numLoops = numLoops;
setPatternLoop(level, &startAddr, &stopAddr, &r_numLoops);
// validate
if (r_numLoops != numLoops) {
sprintf(initErrorMessage, "Could not set patnloop (level: %d) from default "
"pattern file. Read %d loops. Line:[%s]\n",
level, r_numLoops, line);
return FAIL;
}
return OK;
}
int default_setPatternWaitAddresses(char* line, int level, uint32_t addr) {
//validations
if (level < 0 || level > 2) {
sprintf(initErrorMessage, "Cannot set patwait address from default "
"pattern file. Level must be between 0 and 2. Line:[%s]\n",
line);
return FAIL;
}
if (addr < 0 || addr >= MAX_PATTERN_LENGTH) {
sprintf(initErrorMessage, "Cannot set patwait address (level: %d) from default "
"pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n",
level, MAX_PATTERN_LENGTH, line);
return FAIL;
}
int retval = setPatternWaitAddress(level, addr);
// validate
if (retval != addr) {
sprintf(initErrorMessage, "Could not set patwait address (level: %d) from default "
"pattern file. Read addr: 0x%x. Line:[%s]\n",
level, retval, line);
return FAIL;
}
return OK;
}
int default_setPatternWaitTime(char* line, int level, uint64_t waittime) {
//validations
if (level < 0 || level > 2) {
sprintf(initErrorMessage, "Cannot set patwaittime from default "
"pattern file. Level must be between 0 and 2. Line:[%s]\n",
line);
return FAIL;
}
uint64_t retval = setPatternWaitTime(level, waittime);
// validate
if (retval != waittime) {
sprintf(initErrorMessage, "Could not set patwaittime (level: %d) from default "
"pattern file. Read %lld wait time. Line:[%s]\n",
level, retval, line);
return FAIL;
}
return OK;
}

134
slsDetectorServers/slsDetectorServer/src/slsDetectorServer_funcs.c
View File

@ -2,13 +2,6 @@
#include "slsDetectorFunctionList.h"
#include "communication_funcs.h"
#include "clogger.h"
#ifndef VIRTUAL
#if defined(MYTHEN3D) || defined(GOTTHARD2D)
#include "programFpgaNios.h"
#elif defined(CHIPTESTBOARDD) || defined(JUNGFRAUD) || defined(MOENCHD)
#include "programFpgaBlackfin.h"
#endif
#endif
#include <string.h>
#include <arpa/inet.h>
@ -928,10 +921,35 @@ int set_dac(int file_des) {
case V_LIMIT:
break;
#elif MOENCHD
case VBP_COLBUF:
serverDacIndex = MO_VBP_COLBUF;
break;
case VIPRE:
serverDacIndex = MO_VIPRE;
break;
case VIN_CM:
serverDacIndex = MO_VIN_CM;
break;
case VB_SDA:
serverDacIndex = MO_VB_SDA;
break;
case VCASC_SFP:
serverDacIndex = MO_VCASC_SFP;
break;
case VOUT_CM:
serverDacIndex = MO_VOUT_CM;
break;
case VIPRE_CDS:
serverDacIndex = MO_VIPRE_CDS;
break;
case IBIAS_SFP:
serverDacIndex = MO_IBIAS_SFP;
break;
case ADC_VPP:
case HIGH_VOLTAGE:
case V_LIMIT:
break;
#elif MYTHEN3D
case HIGH_VOLTAGE:
break;
@ -1056,17 +1074,13 @@ int set_dac(int file_des) {
serverDacIndex = J_VREF_COMP;
break;
#endif
default:
#ifdef CHIPTESTBOARDD
if (ind < NDAC_ONLY) {
serverDacIndex = ind;
break;
}
#elif MOENCHD
if (ind < NDAC) {
serverDacIndex = ind;
break;
}
#endif
modeNotImplemented("Dac Index", (int)ind);
break;
@ -1656,7 +1670,7 @@ int set_settings(int file_des) {
if (receiveData(file_des, &isett, sizeof(isett), INT32) < 0)
return printSocketReadError();
#if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(MYTHEN3D)
#if defined(CHIPTESTBOARDD) || defined(MYTHEN3D)
functionNotImplemented();
#else
FILE_LOG(logDEBUG1, ("Setting settings %d\n", isett));
@ -1684,6 +1698,15 @@ int set_settings(int file_des) {
case DYNAMICGAIN:
case FIXGAIN1:
case FIXGAIN2:
#elif MOENCHD
case G1_HIGHGAIN:
case G1_LOWGAIN:
case G2_HIGHCAP_HIGHGAIN:
case G2_HIGHCAP_LOWGAIN:
case G2_LOWCAP_HIGHGAIN:
case G2_LOWCAP_LOWGAIN:
case G4_HIGHGAIN:
case G4_LOWGAIN:
#endif
break;
default:
@ -1750,18 +1773,23 @@ int start_acquisition(int file_des) {
FILE_LOG(logDEBUG1, ("Starting Acquisition\n"));
// only set
if (Server_VerifyLock() == OK) {
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
int mode = getReadoutMode();
int asamples = getNumAnalogSamples();
int dsamples = getNumDigitalSamples();
if ((mode == ANALOG_AND_DIGITAL || mode == ANALOG_ONLY) && (asamples <= 0)) {
#if defined(MOENCHD)
if (getNumAnalogSamples() <= 0) {
ret = FAIL;
sprintf(mess, "Could not start acquisition. Invalid number of analog samples: %d.\n", asamples);
sprintf(mess, "Could not start acquisition. Invalid number of analog samples: %d.\n", getNumAnalogSamples());
FILE_LOG(logERROR,(mess));
}
else if ((mode == ANALOG_AND_DIGITAL || mode == DIGITAL_ONLY) && (dsamples <= 0)) {
else
#endif
#if defined(CHIPTESTBOARDD)
if ((getReadoutMode() == ANALOG_AND_DIGITAL || mode == ANALOG_ONLY) && (getNumAnalogSamples() <= 0)) {
ret = FAIL;
sprintf(mess, "Could not start acquisition. Invalid number of digital samples: %d.\n", dsamples);
sprintf(mess, "Could not start acquisition. Invalid number of analog samples: %d.\n", getNumAnalogSamples());
FILE_LOG(logERROR,(mess));
}
else if ((getReadoutMode() == ANALOG_AND_DIGITAL || mode == DIGITAL_ONLY) && (getNumDigitalSamples() <= 0)) {
ret = FAIL;
sprintf(mess, "Could not start acquisition. Invalid number of digital samples: %d.\n", getNumDigitalSamples());
FILE_LOG(logERROR,(mess));
}
else
@ -1880,18 +1908,23 @@ int start_and_read_all(int file_des) {
FILE_LOG(logDEBUG1, ("Starting Acquisition\n"));
// only set
if (Server_VerifyLock() == OK) {
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
int mode = getReadoutMode();
int asamples = getNumAnalogSamples();
int dsamples = getNumDigitalSamples();
if ((mode == ANALOG_AND_DIGITAL || mode == ANALOG_ONLY) && (asamples <= 0)) {
#if defined(MOENCHD)
if (getNumAnalogSamples() <= 0) {
ret = FAIL;
sprintf(mess, "Could not start acquisition. Invalid number of analog samples: %d.\n", asamples);
sprintf(mess, "Could not start acquisition. Invalid number of analog samples: %d.\n", getNumAnalogSamples());
FILE_LOG(logERROR,(mess));
}
else if ((mode == ANALOG_AND_DIGITAL || mode == DIGITAL_ONLY) && (dsamples <= 0)) {
else
#endif
#if defined(CHIPTESTBOARDD)
if ((getReadoutMode() == ANALOG_AND_DIGITAL || mode == ANALOG_ONLY) && (getNumAnalogSamples() <= 0)) {
ret = FAIL;
sprintf(mess, "Could not start acquisition. Invalid number of digital samples: %d.\n", dsamples);
sprintf(mess, "Could not start acquisition. Invalid number of analog samples: %d.\n", getNumAnalogSamples());
FILE_LOG(logERROR,(mess));
}
else if ((getReadoutMode() == ANALOG_AND_DIGITAL || mode == DIGITAL_ONLY) && (getNumDigitalSamples() <= 0)) {
ret = FAIL;
sprintf(mess, "Could not start acquisition. Invalid number of digital samples: %d.\n", getNumDigitalSamples());
FILE_LOG(logERROR,(mess));
}
else
@ -2102,14 +2135,23 @@ int set_num_analog_samples(int file_des) {
#else
// only set
if (Server_VerifyLock() == OK) {
ret = setNumAnalogSamples(arg);
if (ret == FAIL) {
sprintf(mess, "Could not set number of analog samples to %d. Could not allocate RAM\n", arg);
FILE_LOG(logERROR,(mess));
} else {
int retval = getNumAnalogSamples();
FILE_LOG(logDEBUG1, ("retval num analog samples %d\n", retval));
validate(arg, retval, "set number of analog samples", DEC);
#ifdef MOENCHD
if (arg % NSAMPLES_PER_ROW != 0) {
ret = FAIL;
sprintf(mess, "Could not set number of analog samples to %d. Must be divisible by %d\n", arg, NSAMPLES_PER_ROW);
FILE_LOG(logERROR,(mess));
}
#endif
if (ret == OK) {
ret = setNumAnalogSamples(arg);
if (ret == FAIL) {
sprintf(mess, "Could not set number of analog samples to %d. Could not allocate RAM\n", arg);
FILE_LOG(logERROR,(mess));
} else {
int retval = getNumAnalogSamples();
FILE_LOG(logDEBUG1, ("retval num analog samples %d\n", retval));
validate(arg, retval, "set number of analog samples", DEC);
}
}
}
#endif
@ -2121,7 +2163,7 @@ int get_num_digital_samples(int file_des) {
memset(mess, 0, sizeof(mess));
int retval = -1;
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
#if !defined(CHIPTESTBOARDD)
functionNotImplemented();
#else
// get only
@ -2140,7 +2182,7 @@ int set_num_digital_samples(int file_des) {
return printSocketReadError();
FILE_LOG(logDEBUG1, ("Setting number of digital samples %d\n", arg));
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
#if !defined(CHIPTESTBOARDD)
functionNotImplemented();
#else
// only set
@ -2785,7 +2827,7 @@ int send_update(int file_des) {
if (n < 0) return printSocketReadError();
// settings
#if defined(EIGERD) || defined(JUNGFRAUD) || defined(GOTTHARDD)
#if defined(EIGERD) || defined(JUNGFRAUD) || defined(GOTTHARDD) || defined(GOTTHARD2D)|| defined(MOENCHD)
i32 = (int)getSettings();
n = sendData(file_des,&i32,sizeof(i32),INT32);
if (n < 0) return printSocketReadError();
@ -2856,10 +2898,16 @@ int send_update(int file_des) {
#endif
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
// analog samples
i32 = getNumAnalogSamples();
n = sendData(file_des,&i32,sizeof(i32),INT32);
if (n < 0) return printSocketReadError();
// 1g adcmask
i32 = getADCEnableMask();
n = sendData(file_des,&i32,sizeof(i32),INT32);
if (n < 0) return printSocketReadError();
// 10g adc mask
i32 = getADCEnableMask_10G();
n = sendData(file_des,&i32,sizeof(i32),INT32);
@ -4237,7 +4285,7 @@ int led(int file_des) {
return printSocketReadError();
FILE_LOG(logDEBUG1, ("Setting led enable to %d\n", arg));
#if (!defined(MOENCHD)) && (!defined(CHIPTESTBOARDD))
#if (!defined(CHIPTESTBOARDD))
functionNotImplemented();
#else
// set & get
@ -4262,7 +4310,7 @@ int digital_io_delay(int file_des) {
return printSocketReadError();
FILE_LOG(logDEBUG1, ("Digital IO Delay, pinMask: 0x%llx, delay:%d ps\n", args[0], (int)args[1]));
#if (!defined(MOENCHD)) && (!defined(CHIPTESTBOARDD))
#if (!defined(CHIPTESTBOARDD))
functionNotImplemented();
#else
// only set
@ -6169,9 +6217,11 @@ int set_pipeline(int file_des) {
case ADC_CLOCK:
c = ADC_CLK;
break;
#ifdef CHIPTESTBOARDD
case DBIT_CLOCK:
c = DBIT_CLK;
break;
#endif
default:
modeNotImplemented("clock index (pipeline set)", ind);
break;