fix for temperature workaround for fpga

This commit is contained in:
2018-02-02 15:17:40 +01:00
parent e6f475d7c4
commit 1872deb1dd
2 changed files with 3 additions and 3 deletions

View File

@ -390,9 +390,9 @@ int powerChip (int on){
}
}
return (bus_r(CHIP_POWER_REG & CHIP_POWER_ENABLE_MSK) >> CHIP_POWER_ENABLE_OFST);
return ((bus_r(CHIP_POWER_REG) & CHIP_POWER_ENABLE_MSK) >> CHIP_POWER_ENABLE_OFST);
/* temporary setup until new firmware fixes bug */
//return (bus_r(CHIP_POWER_REG & CHIP_POWER_STATUS_MSK) >> CHIP_POWER_STATUS_OFST);
//return ((bus_r(CHIP_POWER_REG) & CHIP_POWER_STATUS_MSK) >> CHIP_POWER_STATUS_OFST);
}
void cleanFifos() {

View File

@ -86,7 +86,7 @@ enum NETWORKINDEX { TXN_FRAME };
#define DEFAULT_TIMING_MODE (AUTO_TIMING)
#define DEFAULT_SETTINGS (DYNAMICGAIN)
#define DEFAULT_TX_UDP_PORT (0x7e9a)
#define DEFAULT_TMP_THRSHLD (65) //degree Celsius
#define DEFAULT_TMP_THRSHLD (65*1000) //milli degree Celsius
/* Defines in the Firmware */
#define FIX_PATT_VAL (0xACDC2014)