Modified upto DAQ reg

git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@75 951219d9-93cf-4727-9268-0efd64621fa3

slsDetectorSoftware/gotthardDetectorServer/firmware_funcs.c

@@ -111,33 +111,6 @@ int mapCSP0(void) {
 
 int setDummyRegister() {
   int result = OK;
-  /*
-  //to check if the dac really works with aldos code
-  int dacnum,dacvalue=700;
-  u_int32_t offw,codata;
-  u_int16_t valw; 
-  int iru,i,ddx,csdx,cdx;
-  offw=0x37;
-  for(dacnum=0;dacnum<8;dacnum++)
-    {
-      ddx=2; csdx=0; cdx=1;
-      codata=((((0x2)<<4)+((dacnum)&0xf))<<16)+((dacvalue<<4)&0xfff0);  
-  
-      valw=0xffff; bus_w(offw,(valw)); // start point
-      valw=((valw&(~(0x1<<csdx))));bus_w(offw,valw); //chip sel bar down
-      for (i=1;i<25;i++) {
-
-      valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn	
-      valw=((valw&(~(0x1<<ddx)))+(((codata>>(24-i))&0x1)<<ddx));bus_w(offw,valw);//write data (i)
-      //	printf("%d ", ((codata>>(24-i))&0x1));
-      valw=((valw&(~(0x1<<cdx)))+(0x1<<cdx));bus_w(offw,valw);//clkup
-      }
-      valw=((valw&(~(0x1<<csdx)))+(0x1<<csdx));bus_w(offw,valw); //csup
-      valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
-      valw=0xffff; bus_w(offw,(valw)); // stop point =start point of course 
-      printf("Writing %d in DAC(0-7) %d \n",dacvalue,dacnum);
-      }
-  */
   volatile u_int32_t val,addr;
   addr = DUMMY_REG;
   int i;
@@ -173,12 +146,57 @@ int setDummyRegister() {
     {
       printf("\n\n----------------------------------------------------------------------------------------------");
       printf("\nATTEMPT 100: FPGA DUMMY REGISTER OK!!\n");
-      printf("----------------------------------------------------------------------------------------------\n\n");
+      printf("----------------------------------------------------------------------------------------------\n");
     }
   return result;
 }
 
 
+int setDAQRegister()
+{
+  u_int32_t addr, reg, val;
+  int result=OK;
+  addr=DAQ_REG;
+  val=34+(42<<8)+(319<<16);
+  reg=bus_r(addr);
+  //write to daqreg if not valid
+  if(reg!=val){
+    bus_w(addr,val);
+    reg=bus_r(addr);
+    if(reg!=val)
+      result=FAIL;
+  }
+#ifdef VERBOSE
+  printf("DAQ reg:20916770:%d\n",reg);
+#endif
+  return result;
+}
+
+
+int setPhaseShiftOnce(){
+  u_int32_t addr, reg, val;
+  int result=OK, i,off;
+  addr=MULTI_PURPOSE_REG;
+  //off=15;
+  // mask=((0x1)<<off);
+
+  reg=bus_r(addr);
+  if(reg
+  reg|=((0x1)<<off);
+  
+  // if(reg&
+  for (i=1;i<PHASE_SHIFT;i++) {
+    bus_w(addr,0x2821);
+    bus_w(addr,0x2820);
+  }
+  reg=bus_r(addr);
+  
+  //  bus_w(addr, 1<<
+
+  return result;
+}
+
+
 //aldos function volatile (not needed) 
 u_int16_t bus_w16(u_int32_t offset, u_int16_t data) {
   u_int16_t *ptr1;

slsDetectorSoftware/gotthardDetectorServer/firmware_funcs.h

@@ -20,6 +20,9 @@
 
 int mapCSP0(void);
 int setDummyRegister();
+int setDAQRegister();
+int setPhaseShiftOnce();
+
 u_int16_t bus_w16(u_int32_t offset, u_int16_t data);//aldos function
 u_int32_t bus_w(u_int32_t offset, u_int32_t data);
 u_int32_t bus_r(u_int32_t offset);

slsDetectorSoftware/gotthardDetectorServer/mcb_funcs.c

@@ -89,6 +89,7 @@ int initDetector() {
   sDac=noneSelected;
   sAdc=noneSelected;
   
+
   /*
   setCSregister(ALLMOD); //commented out by dhanya
   setSSregister(ALLMOD);

slsDetectorSoftware/gotthardDetectorServer/mcb_funcs.h

@@ -18,7 +18,7 @@
 #define VINCM_VALS    {0,0,300,400,500,600,700}
 #define VREFCOMP_VALS {0,0,320,420,520,620,720}
 #define IBTESTC_VALS  {0,0,340,440,540,640,740}
-#define CONF_GAIN     {0,0,  0,  1,  6,  2,  1}//dynamic gain confgain yet to be figured out
+#define CONF_GAIN     {0,0,  0,  1,  6,  2,  1}//dynamic gain confgain yet to be figured out-probably 8 or 16
  
 
 #define DEFAULTGAIN {11.66,9.32,14.99}

slsDetectorSoftware/gotthardDetectorServer/registers_g.h

@@ -10,6 +10,7 @@
 /* registers defined in FPGA */
 #define GAIN_REG         0x10<<11
 #define DAQ_REG          0x1b<<11
+#define MULTI_PURPOSE_REG 0x94<<11
 
 #define DUMMY_REG        0x13<<11
 #define FIX_PATT_REG     0x45<<11

slsDetectorSoftware/gotthardDetectorServer/server_defs.h

@@ -27,6 +27,8 @@
 #define TRIM_DR (((int)pow(2,NTRIMBITS))-1)
 #define COUNT_DR (((int)pow(2,NCOUNTBITS))-1)
 
+#define PHASE_SHIFT 120
+
 
 #define ALLMOD 0xffff
 #define ALLFIFO 0xffff

slsDetectorSoftware/gotthardDetectorServer/server_funcs.c

@@ -68,8 +68,11 @@ int init_detector( int b) {
     initDetector();
     printf("\ninitdetector done! \n");
     setDummyRegister();
+    // setPhaseShiftOnce();
+    setDAQRegister();
     setSettings(GET_SETTINGS);
 
+
     //testRAM();
   }
   #endif