refactoring code and compiling binary

This commit is contained in:
maliakal_d 2025-05-19 13:19:32 +02:00
parent 9051dae787
commit 1665937540
6 changed files with 41 additions and 21 deletions

View File

@ -94,7 +94,10 @@ void basictests() {
LOG(logINFOBLUE, ("********* Chip Test Board Virtual Server *********\n"));
#else
LOG(logINFOBLUE, ("************* Chip Test Board Server *************\n"));
enableBlackfinAMCExternalAccessExtension();
initError = enableBlackfinAMCExternalAccessExtension(initErrorMessage);
if (initError == FAIL) {
return;
}
initError = defineGPIOpins(initErrorMessage);
if (initError == FAIL) {
return;
@ -440,31 +443,30 @@ uint32_t getDetectorIP() {
return res;
}
void enableBlackfinAMCExternalAccessExtension() {
int enableBlackfinAMCExternalAccessExtension(char *mess) {
unsigned int value;
const char *file_path = "/sys/kernel/debug/blackfin/ebiu_amc/EBIU_AMBCTL1";
const char *file_path = BFIN_AMC_ACCESS_EXTENSION_FNAME;
FILE *file = fopen(file_path, "r");
if (!file) {
LOG(logERROR, ("Failed to read EBIU_AMBCTL1\n"));
return;
strcpy(mess, "Failed to enable blackfin AMC access extension. Could "
"not read EBIU_AMBCTL1\n");
LOG(logERROR, (mess));
return FAIL;
}
fscanf(file, "%x", &value);
fclose(file);
// enable support for ARDY signal on interface to FPGA
// needed to properly translate avalon_mm_waitrequest in the CTB firmware
// https://www.analog.com/media/en/dsp-documentation/processor-manuals/bf537_hwr_Rev3.2.pdf
// page 274
value |= 0x3;
value |= BFIN_AMC_ACCESS_EXTENSION_ENA_VAL;
file = fopen(file_path, "w");
if (!file) {
LOG(logERROR, ("Failed to enable blackfin AMC access extension\n"));
return;
strcpy(mess, "Failed to enable blackfin AMC access extension. Could "
"not write EBIU_AMBCTL1\n");
LOG(logERROR, (mess));
return FAIL;
}
fprintf(file, "0x%x", value);
fclose(file);
return OK;
}
/* initialization */

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@ -8,10 +8,8 @@
#define REQRD_FRMWR_VRSN 0x230705
#define NUM_HARDWARE_VERSIONS (1)
#define HARDWARE_VERSION_NUMBERS \
{ 0x3f }
#define HARDWARE_VERSION_NAMES \
{ "5.1" }
#define HARDWARE_VERSION_NUMBERS {0x3f}
#define HARDWARE_VERSION_NAMES {"5.1"}
#define LINKED_SERVER_NAME "ctbDetectorServer"

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@ -5,6 +5,23 @@
#include <inttypes.h>
#include <sys/types.h>
/** enable support for ARDY signal on interface to FPGA
* needed to properly translate avalon_mm_waitrequest in the CTB firmware
* https://www.analog.com/media/en/dsp-documentation/processor-manuals/bf537_hwr_Rev3.2.pdf
* page 274
* */
#define BFIN_EBIU_AMBCTL1_B2_ARDY_ENA_OFST (0)
#define BFIN_EBIU_AMBCTL1_B2_ARDY_ENA_MSK \
(1 << BFIN_EBIU_AMBCTL1_B2_ARDY_ENA_OFST)
#define BFIN_EBIU_AMBCTL1_B2_ARDY_POL_OFST (1)
#define BFIN_EBIU_AMBCTL1_B2_ARDY_POL_MSK \
(1 << BFIN_EBIU_AMBCTL1_B2_ARDY_POL_OFST)
#define BFIN_AMC_ACCESS_EXTENSION_ENA_VAL \
(BFIN_EBIU_AMBCTL1_B2_ARDY_ENA_MSK | BFIN_EBIU_AMBCTL1_B2_ARDY_POL_MSK)
#define BFIN_AMC_ACCESS_EXTENSION_FNAME \
"/sys/kernel/debug/blackfin/ebiu_amc/EBIU_AMBCTL1"
/** I2C defines */
#define I2C_CLOCK_MHZ (131.25)

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@ -113,6 +113,10 @@ void setModuleId(int modid);
u_int64_t getDetectorMAC();
u_int32_t getDetectorIP();
#if defined(CHIPTESTBOARDD)
int enableBlackfinAMCExternalAccessExtension(char *mess);
#endif
// initialization
void initControlServer();
void initStopServer();
@ -135,7 +139,6 @@ void setupDetector();
#if defined(CHIPTESTBOARDD)
int updateDatabytesandAllocateRAM();
void updateDataBytes();
void enableBlackfinAMCExternalAccessExtension();
#endif
#if !defined(CHIPTESTBOARDD) && !defined(XILINX_CHIPTESTBOARDD)

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@ -3,10 +3,10 @@
/** API versions */
#define APILIB "developer 0x241122"
#define APIRECEIVER "developer 0x241122"
#define APICTB "developer 0x250310"
#define APIGOTTHARD2 "developer 0x250310"
#define APIMOENCH "developer 0x250310"
#define APIEIGER "developer 0x250310"
#define APIXILINXCTB "developer 0x250311"
#define APIJUNGFRAU "developer 0x250318"
#define APIMYTHEN3 "developer 0x250409"
#define APICTB "developer 0x250519"