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G2clkdiv (#547)

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* g2 changing clkdivs 2 3 4 to defaults for burst and cw mode
This commit is contained in:
Dhanya Thattil
2022-09-05 17:00:01 +02:00
committed by GitHub
parent 76c18f3303
commit 1425382dbb
9 changed files with 64 additions and 4 deletions
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BIN
slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServer_developer
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49
slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c
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@ -1750,6 +1750,52 @@ void updatingRegisters() {
LOG(logINFO, ("\tDone Updating registers\n\n"));
}
int updateClockDivs() {
char *clock_names[] = {CLK_NAMES};
switch (burstMode) {
case BURST_INTERNAL:
case BURST_EXTERNAL:
if (setClockDivider(SYSTEM_C0, DEFAULT_BURST_SYSTEM_C0) == FAIL) {
LOG(logERROR, ("Could not set clk %s speed to %d.\n",
clock_names[SYSTEM_C0], DEFAULT_BURST_SYSTEM_C0));
return FAIL;
}
if (setClockDivider(SYSTEM_C1, DEFAULT_BURST_SYSTEM_C1) == FAIL) {
LOG(logERROR, ("Could not set clk %s speed to %d.\n",
clock_names[SYSTEM_C0], DEFAULT_BURST_SYSTEM_C1));
return FAIL;
}
if (setClockDivider(SYSTEM_C2, DEFAULT_BURST_SYSTEM_C2) == FAIL) {
LOG(logERROR, ("Could not set clk %s speed to %d.\n",
clock_names[SYSTEM_C0], DEFAULT_BURST_SYSTEM_C2));
return FAIL;
}
break;
case CONTINUOUS_INTERNAL:
case CONTINUOUS_EXTERNAL:
if (setClockDivider(SYSTEM_C0, DEFAULT_CNTNS_SYSTEM_C0) == FAIL) {
LOG(logERROR, ("Could not set clk %s speed to %d.\n",
clock_names[SYSTEM_C0], DEFAULT_CNTNS_SYSTEM_C0));
return FAIL;
}
if (setClockDivider(SYSTEM_C1, DEFAULT_CNTNS_SYSTEM_C1) == FAIL) {
LOG(logERROR, ("Could not set clk %s speed to %d.\n",
clock_names[SYSTEM_C0], DEFAULT_CNTNS_SYSTEM_C1));
return FAIL;
}
if (setClockDivider(SYSTEM_C2, DEFAULT_CNTNS_SYSTEM_C2) == FAIL) {
LOG(logERROR, ("Could not set clk %s speed to %d.\n",
clock_names[SYSTEM_C0], DEFAULT_CNTNS_SYSTEM_C2));
return FAIL;
}
break;
default:
LOG(logERROR, ("Unknown burst mode. Cannot update clock divs.\n"));
return FAIL;
}
return OK;
}
void setTiming(enum timingMode arg) {
switch (arg) {
case AUTO_TIMING:
@ -2780,6 +2826,9 @@ int setBurstMode(enum burstMode burst) {
}
updatingRegisters();
updateClockDivs();
return configureASICGlobalSettings();
}

8
slsDetectorServers/gotthard2DetectorServer/slsDetectorServer_defs.h
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@ -65,6 +65,14 @@
#define DEFAULT_SYSTEM_C2 (5) //(144444448) // sync_clk, 144 MHz
#define DEFAULT_SYSTEM_C3 (5) //(144444448) // str_clk, 144 MHz
#define DEFAULT_CNTNS_SYSTEM_C0 (10) // (72222224) run_clk, 72 MHz
#define DEFAULT_CNTNS_SYSTEM_C1 (20) // (36111112) chip_clk, 36 MHz
#define DEFAULT_CNTNS_SYSTEM_C2 (10) // (72222224) sync_clk, 72 MHz
#define DEFAULT_BURST_SYSTEM_C0 (5) // (144444448) run_clk, 144 MHz
#define DEFAULT_BURST_SYSTEM_C1 (10) // (72222224) chip_clk, 72 MHz
#define DEFAULT_BURST_SYSTEM_C2 (5) // (144444448) sync_clk, 144 MHz
#define DEFAULT_READOUT_SPEED (G2_108MHZ)
#define SPEED_144_CLKDIV_0 (6)
#define SPEED_144_CLKDIV_1 (6)