mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-11 12:27:14 +02:00
WIP
This commit is contained in:
@ -165,16 +165,16 @@ void Beb_GetModuleConfiguration(int *master, int *top, int *normal) {
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LOG(logERROR, ("Module Configuration FAIL\n"));
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LOG(logERROR, ("Module Configuration FAIL\n"));
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} else {
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} else {
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// read data
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// read data
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ret = Beb_Read32(csp0base, MODULE_CONFIGURATION_MASK);
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ret = Beb_Read32(csp0base, BEB_CONFIG_RD_OFST);
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LOG(logDEBUG1, ("Module Configuration OK\n"));
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LOG(logDEBUG1, ("Module Configuration OK\n"));
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LOG(logDEBUG1, ("Beb: value =0x%x\n", ret));
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LOG(logDEBUG1, ("Beb: value =0x%x\n", ret));
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if (ret & TOP_BIT_MASK) {
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if (ret & BEB_CONFIG_TOP_RD_MSK) {
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*top = 1;
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*top = 1;
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Beb_top = 1;
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Beb_top = 1;
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}
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}
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if (ret & MASTER_BIT_MASK)
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if (ret & BEB_CONFIG_MASTER_RD_MSK)
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*master = 1;
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*master = 1;
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if (ret & NORMAL_MODULE_BIT_MASK)
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if (ret & BEB_CONFIG_NORMAL_RD_MSK)
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*normal = 1;
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*normal = 1;
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// close file pointer
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// close file pointer
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Beb_close(fd, csp0base);
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Beb_close(fd, csp0base);
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@ -298,12 +298,9 @@ int Beb_IsTransmitting(int *retval, int tengiga, int waitForDelay) {
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return OK;
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return OK;
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}
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}
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/* do not work at the moment */
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int Beb_SetTop(int val) {
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int Beb_SetMasterViaSoftware() {
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if (!Beb_activated)
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if (!Beb_activated)
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return 0;
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return 0;
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// mapping new memory
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// mapping new memory
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u_int32_t *csp0base = 0;
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u_int32_t *csp0base = 0;
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u_int32_t value = 0, ret = 1;
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u_int32_t value = 0, ret = 1;
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@ -311,16 +308,23 @@ int Beb_SetMasterViaSoftware() {
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// open file pointer
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// open file pointer
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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if (fd < 0) {
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if (fd < 0) {
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LOG(logERROR, ("Set Master FAIL\n"));
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LOG(logERROR, ("Set Top FAIL, could not open fd\n"));
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} else {
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} else {
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value = Beb_Read32(csp0base, MASTERCONFIG_OFFSET);
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value = Beb_Read32(csp0base, BEB_CONFIG_WR_OFST);
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value |= MASTER_BIT;
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value |= BEB_CONFIG_OW_TOP_MSK;
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value |= OVERWRITE_HARDWARE_BIT;
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if (val) {
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int newval = Beb_Write32(csp0base, MASTERCONFIG_OFFSET, value);
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value |= BEB_CONFIG_TOP_MSK;
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} else {
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value &= ~BEB_CONFIG_TOP_MSK;
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}
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int newval = Beb_Write32(csp0base, BEB_CONFIG_WR_OFST, value);
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if (newval != value) {
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if (newval != value) {
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LOG(logERROR, ("Could not set Master via Software\n"));
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LOG(logERROR, ("Could not overwrite Top to %d\n", val));
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} else {
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} else {
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ret = 0;
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ret = 0;
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LOG(logINFOBLUE,
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("Overwriting BEB Hardware: %s\n", (val ? "Top" : "Bottom")));
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Beb_top = val;
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}
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}
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}
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}
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@ -331,12 +335,9 @@ int Beb_SetMasterViaSoftware() {
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return ret;
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return ret;
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}
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}
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/* do not work at the moment */
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int Beb_SetMaster(int val) {
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int Beb_SetSlaveViaSoftware() {
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if (!Beb_activated)
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if (!Beb_activated)
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return 0;
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return 0;
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// mapping new memory
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// mapping new memory
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u_int32_t *csp0base = 0;
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u_int32_t *csp0base = 0;
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u_int32_t value = 0, ret = 1;
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u_int32_t value = 0, ret = 1;
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@ -344,16 +345,22 @@ int Beb_SetSlaveViaSoftware() {
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// open file pointer
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// open file pointer
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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if (fd < 0) {
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if (fd < 0) {
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LOG(logERROR, ("Set Slave FAIL\n"));
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LOG(logERROR, ("Set Master FAIL, could not open fd\n"));
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} else {
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} else {
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value = Beb_Read32(csp0base, MASTERCONFIG_OFFSET);
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value = Beb_Read32(csp0base, BEB_CONFIG_WR_OFST);
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value &= ~MASTER_BIT;
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value |= BEB_CONFIG_OW_MASTER_MSK;
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value |= OVERWRITE_HARDWARE_BIT;
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if (val) {
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int newval = Beb_Write32(csp0base, MASTERCONFIG_OFFSET, value);
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value |= BEB_CONFIG_MASTER_MSK;
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} else {
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value &= ~BEB_CONFIG_MASTER_MSK;
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}
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int newval = Beb_Write32(csp0base, BEB_CONFIG_WR_OFST, value);
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if (newval != value) {
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if (newval != value) {
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LOG(logERROR, ("Could not set Slave via Software\n"));
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LOG(logERROR, ("Could not overwrite Master to %d\n", val));
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} else {
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} else {
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ret = 0;
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ret = 0;
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LOG(logINFOBLUE,
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("Overwriting BEB Hardware: %s\n", (val ? "Master" : "Slave")));
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}
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}
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}
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}
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@ -372,38 +379,29 @@ int Beb_Activate(int enable) {
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// open file pointer
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// open file pointer
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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if (fd < 0) {
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if (fd < 0) {
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LOG(logERROR, ("Deactivate FAIL\n"));
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LOG(logERROR, ("Activate FAIL, could not open fd\n"));
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} else {
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} else {
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if (enable > -1) {
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if (enable > -1) {
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value = Beb_Read32(csp0base, MASTERCONFIG_OFFSET);
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value = Beb_Read32(csp0base, BEB_CONFIG_WR_OFST);
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LOG(logINFO, ("Deactivate register value before:%d\n", value));
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LOG(logINFO, ("Activate register value before:%d\n", value));
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if (enable)
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if (enable)
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value &= ~DEACTIVATE_BIT;
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value |= BEB_CONFIG_ACTIVATE_MSK;
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else
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else
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value |= DEACTIVATE_BIT;
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value &= ~BEB_CONFIG_ACTIVATE_MSK;
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int newval = Beb_Write32(csp0base, MASTERCONFIG_OFFSET, value);
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int newval = Beb_Write32(csp0base, BEB_CONFIG_WR_OFST, value);
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if (newval != value) {
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if (newval != value) {
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if (enable) {
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LOG(logERROR, ("Could not %s\n", (enable ? "activate" : "deactivate"));
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LOG(logERROR, ("Could not activate via Software\n"));
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} else {
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LOG(logERROR, ("Could not deactivate via Software\n"));
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}
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}
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}
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}
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}
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value = Beb_Read32(csp0base, MASTERCONFIG_OFFSET);
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value = Beb_Read32(csp0base, BEB_CONFIG_WR_OFST);
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if (value & DEACTIVATE_BIT)
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ret = (value & BEB_CONFIG_ACTIVATE_MSK) ? 1 : 0;
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ret = 0;
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else
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ret = 1;
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if (enable == -1) {
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if (enable == -1) {
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if (ret) {
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if (ret) {
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LOG(logINFOBLUE,
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LOG(logINFOBLUE, ("Detector is active\n"));
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("Detector is active. Register value:%d\n", value));
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} else {
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} else {
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LOG(logERROR,
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LOG(logINFORED, ("Detector is deactivated!\n"));
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("Detector is deactivated! Register value:%d\n", value));
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}
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}
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}
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}
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}
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}
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@ -656,35 +654,6 @@ int Beb_SetNetworkParameter(enum NETWORKINDEX mode, int val) {
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return valueread;
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return valueread;
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}
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}
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int Beb_ResetToHardwareSettings() {
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if (!Beb_activated)
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return 1;
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// mapping new memory
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u_int32_t *csp0base = 0;
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u_int32_t value = 0, ret = 1;
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// open file pointer
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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if (fd < 0) {
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LOG(logERROR, ("Reset to Hardware Settings FAIL\n"));
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} else {
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value = Beb_Write32(csp0base, MASTERCONFIG_OFFSET, 0);
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if (value) {
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LOG(logERROR, ("Could not reset to hardware settings\n"));
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} else {
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ret = 0;
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}
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}
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// close file pointer
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if (fd > 0)
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Beb_close(fd, csp0base);
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return ret;
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}
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u_int32_t Beb_GetFirmwareRevision() {
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u_int32_t Beb_GetFirmwareRevision() {
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// mapping new memory
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// mapping new memory
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u_int32_t *csp0base = 0;
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u_int32_t *csp0base = 0;
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@ -36,8 +36,8 @@ unsigned int Beb_GetBebInfoIndex(unsigned int beb_numb);
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void Beb_GetModuleConfiguration(int *master, int *top, int *normal);
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void Beb_GetModuleConfiguration(int *master, int *top, int *normal);
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int Beb_IsTransmitting(int *retval, int tengiga, int waitForDelay);
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int Beb_IsTransmitting(int *retval, int tengiga, int waitForDelay);
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int Beb_SetMasterViaSoftware();
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int Beb_SetTop(int val);
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int Beb_SetSlaveViaSoftware();
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int Beb_SetMaster(int val);
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int Beb_Activate(int enable);
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int Beb_Activate(int enable);
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int Beb_GetActivate();
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int Beb_GetActivate();
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int Beb_Set32bitOverflow(int val);
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int Beb_Set32bitOverflow(int val);
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@ -51,7 +51,6 @@ int Beb_SetTransmissionDelayLeft(int value);
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int Beb_GetTransmissionDelayRight();
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int Beb_GetTransmissionDelayRight();
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int Beb_SetTransmissionDelayRight(int value);
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int Beb_SetTransmissionDelayRight(int value);
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int Beb_ResetToHardwareSettings();
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u_int32_t Beb_GetFirmwareRevision();
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u_int32_t Beb_GetFirmwareRevision();
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u_int32_t Beb_GetFirmwareSoftwareAPIVersion();
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u_int32_t Beb_GetFirmwareSoftwareAPIVersion();
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void Beb_ResetFrameNumber();
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void Beb_ResetFrameNumber();
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@ -2459,29 +2459,87 @@ int Feb_Control_GetInterruptSubframe() {
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return value[0];
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return value[0];
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}
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}
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int Feb_Control_SetTop(int val, int left, int right) {
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uint32_t offset = DAQ_REG_HRDWRE;
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unsigned int addr[2] = {0, 0};
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if (left) {
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addr[0] = Module_GetTopLeftAddress(&modules[0]);
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}
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if (right) {
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addr[1] = Module_GetTopRightAddress(&modules[0]);
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}
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int i = 0;
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for (i = 0; i < 2; ++i) {
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if (addr[i] == 0) {
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continue;
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}
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uint32_t regVal = 0;
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if (!Feb_Interface_ReadRegister(addr[i], offset, ®Val)) {
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LOG(logERROR, ("Could not read %s DAQ_REG_HRDWRE reg\n",
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(i == 0 ? "left" : "right")));
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return 0;
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}
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regVal |= DAQ_REG_HRDWRE_OW_TOP_MSK;
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if (val) {
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regVal |= DAQ_REG_HRDWRE_TOP_MSK;
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} else {
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regVal &= ~DAQ_REG_HRDWRE_TOP_MSK;
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}
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if (!Feb_Interface_WriteRegister(addr[i], offset, regVal, 0, 0)) {
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LOG(logERROR,
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("Could not overwrite top %d to %s DAQ_REG_HRDWRE reg\n", val,
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(i == 0 ? "left" : "right")));
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return 0;
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}
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}
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if (left && right) {
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LOG(logINFOBLUE,
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("Overwriting FEB Hardware: %s\n", (val ? "Top" : "Bottom")));
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}
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return 1;
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}
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int Feb_Control_SetMaster(int val) {
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uint32_t offset = DAQ_REG_HRDWRE;
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unsigned int addr[2] = {0, 0};
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addr[0] = Module_GetTopLeftAddress(&modules[0]);
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addr[1] = Module_GetTopRightAddress(&modules[0]);
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|
int i = 0;
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for (i = 0; i < 2; ++i) {
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|
uint32_t regVal = 0;
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if (!Feb_Interface_ReadRegister(addr[i], offset, ®Val)) {
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LOG(logERROR, ("Could not read %s DAQ_REG_HRDWRE reg\n",
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(i == 0 ? "left" : "right")));
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return 0;
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}
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regVal |= DAQ_REG_HRDWRE_OW_MASTER_MSK;
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if (val) {
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regVal |= DAQ_REG_HRDWRE_MASTER_MSK;
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|
} else {
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regVal &= ~DAQ_REG_HRDWRE_MASTER_MSK;
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|
}
|
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|
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|
if (!Feb_Interface_WriteRegister(addr[i], offset, regVal, 0, 0)) {
|
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|
LOG(logERROR,
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("Could not write master %d to %s DAQ_REG_HRDWRE reg\n", val,
|
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|
(i == 0 ? "left" : "right")));
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|
return 0;
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||||||
|
}
|
||||||
|
}
|
||||||
|
Feb_control_master = 1;
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|
LOG(logINFOBLUE,
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|
("Overwriting FEB Hardware: %s\n", (val ? "Master" : "Slave")));
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|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
int Feb_Control_SetQuad(int val) {
|
int Feb_Control_SetQuad(int val) {
|
||||||
// no bottom for quad
|
// no bottom for quad
|
||||||
if (!Module_TopAddressIsValid(&modules[1])) {
|
if (!Module_TopAddressIsValid(&modules[1])) {
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
uint32_t offset = DAQ_REG_HRDWRE;
|
|
||||||
LOG(logINFO, ("Setting Quad to %d in Feb\n", val));
|
LOG(logINFO, ("Setting Quad to %d in Feb\n", val));
|
||||||
unsigned int addr = Module_GetTopRightAddress(&modules[1]);
|
return Feb_Control_SetTop(val, 0, 1);
|
||||||
uint32_t regVal = 0;
|
|
||||||
if (!Feb_Interface_ReadRegister(addr, offset, ®Val)) {
|
|
||||||
LOG(logERROR, ("Could not read top right quad reg\n"));
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
uint32_t data =
|
|
||||||
((val == 0)
|
|
||||||
? (regVal & ~DAQ_REG_HRDWRE_OW_MSK)
|
|
||||||
: ((regVal | DAQ_REG_HRDWRE_OW_MSK) & ~DAQ_REG_HRDWRE_TOP_MSK));
|
|
||||||
if (!Feb_Interface_WriteRegister(addr, offset, data, 0, 0)) {
|
|
||||||
LOG(logERROR, ("Could not write 0x%x to top right quad addr 0x%x\n",
|
|
||||||
data, offset));
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
return 1;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
int Feb_Control_SetReadNLines(int value) {
|
int Feb_Control_SetReadNLines(int value) {
|
||||||
|
@ -174,6 +174,9 @@ int64_t Feb_Control_GetSubMeasuredPeriod();
|
|||||||
int Feb_Control_SoftwareTrigger();
|
int Feb_Control_SoftwareTrigger();
|
||||||
int Feb_Control_SetInterruptSubframe(int val);
|
int Feb_Control_SetInterruptSubframe(int val);
|
||||||
int Feb_Control_GetInterruptSubframe();
|
int Feb_Control_GetInterruptSubframe();
|
||||||
|
|
||||||
|
int Feb_Control_SetTop(int val, int left, int right);
|
||||||
|
int Feb_Control_SetMaster(int val);
|
||||||
int Feb_Control_SetQuad(int val);
|
int Feb_Control_SetQuad(int val);
|
||||||
int Feb_Control_SetReadNLines(int value);
|
int Feb_Control_SetReadNLines(int value);
|
||||||
int Feb_Control_GetReadNLines();
|
int Feb_Control_GetReadNLines();
|
||||||
|
@ -16,21 +16,24 @@
|
|||||||
#define DAQ_REG_PARTIAL_READOUT 8
|
#define DAQ_REG_PARTIAL_READOUT 8
|
||||||
|
|
||||||
#define DAQ_REG_HRDWRE 12
|
#define DAQ_REG_HRDWRE 12
|
||||||
|
// clang-format off
|
||||||
#define DAQ_REG_HRDWRE_OW_OFST (0)
|
#define DAQ_REG_HRDWRE_OW_TOP_OFST (0)
|
||||||
#define DAQ_REG_HRDWRE_OW_MSK (0x00000001 << DAQ_REG_HRDWRE_OW_OFST)
|
#define DAQ_REG_HRDWRE_OW_TOP_MSK (0x00000001 << DAQ_REG_HRDWRE_OW_TOP_OFST)
|
||||||
#define DAQ_REG_HRDWRE_TOP_OFST (1)
|
#define DAQ_REG_HRDWRE_TOP_OFST (1)
|
||||||
#define DAQ_REG_HRDWRE_TOP_MSK (0x00000001 << DAQ_REG_HRDWRE_TOP_OFST)
|
#define DAQ_REG_HRDWRE_TOP_MSK (0x00000001 << DAQ_REG_HRDWRE_TOP_OFST)
|
||||||
#define DAQ_REG_HRDWRE_INTRRPT_SF_OFST (2)
|
#define DAQ_REG_HRDWRE_INTRRPT_SF_OFST (2)
|
||||||
#define DAQ_REG_HRDWRE_INTRRPT_SF_MSK \
|
#define DAQ_REG_HRDWRE_INTRRPT_SF_MSK (0x00000001 << DAQ_REG_HRDWRE_INTRRPT_SF_OFST)
|
||||||
(0x00000001 << DAQ_REG_HRDWRE_INTRRPT_SF_OFST)
|
#define DAQ_REG_HRDWRE_OW_MASTER_OFST (3)
|
||||||
|
#define DAQ_REG_HRDWRE_OW_MASTER_MSK (0x00000001 << DAQ_REG_HRDWRE_OW_MASTER_OFST)
|
||||||
|
#define DAQ_REG_HRDWRE_MASTER_OFST (4)
|
||||||
|
#define DAQ_REG_HRDWRE_MASTER_MSK (0x00000001 << DAQ_REG_HRDWRE_MASTER_OFST)
|
||||||
|
|
||||||
#define DAQ_REG_RO_OFFSET 20
|
#define DAQ_REG_RO_OFFSET 20
|
||||||
#define DAQ_REG_STATUS \
|
#define DAQ_REG_STATUS (DAQ_REG_RO_OFFSET + 0) // also pg and fifo status register
|
||||||
(DAQ_REG_RO_OFFSET + 0) // also pg and fifo status register
|
|
||||||
#define FEB_REG_STATUS (DAQ_REG_RO_OFFSET + 3)
|
#define FEB_REG_STATUS (DAQ_REG_RO_OFFSET + 3)
|
||||||
#define MEAS_SUBPERIOD_REG (DAQ_REG_RO_OFFSET + 4)
|
#define MEAS_SUBPERIOD_REG (DAQ_REG_RO_OFFSET + 4)
|
||||||
#define MEAS_PERIOD_REG (DAQ_REG_RO_OFFSET + 5)
|
#define MEAS_PERIOD_REG (DAQ_REG_RO_OFFSET + 5)
|
||||||
|
// clang-format on
|
||||||
|
|
||||||
#define DAQ_CTRL_RESET 0x80000000
|
#define DAQ_CTRL_RESET 0x80000000
|
||||||
#define DAQ_CTRL_START 0x40000000
|
#define DAQ_CTRL_START 0x40000000
|
||||||
@ -52,10 +55,11 @@
|
|||||||
#define DAQ_SERIALIN_SHIFT_IN_32 0x00000100
|
#define DAQ_SERIALIN_SHIFT_IN_32 0x00000100
|
||||||
#define DAQ_LOAD_16ROWS_OF_TRIMBITS 0x00000200
|
#define DAQ_LOAD_16ROWS_OF_TRIMBITS 0x00000200
|
||||||
|
|
||||||
#define DAQ_IGNORE_INITIAL_CRAP 0x00000400 // crap before readout
|
// crap before readout
|
||||||
|
#define DAQ_IGNORE_INITIAL_CRAP 0x00000400
|
||||||
#define DAQ_READOUT_NROWS 0x00000800
|
#define DAQ_READOUT_NROWS 0x00000800
|
||||||
#define DAQ_CLKOUT_LAST_4_BITS_AND_RETURN_TO_START \
|
// last 4 bit of data in the last frame
|
||||||
0x00001000 // last 4 bit of data in the last frame
|
#define DAQ_CLKOUT_LAST_4_BITS_AND_RETURN_TO_START 0x00001000
|
||||||
|
|
||||||
#define DAQ_RELEASE_IMAGE_STORE_AFTER_READOUT 0x00002000
|
#define DAQ_RELEASE_IMAGE_STORE_AFTER_READOUT 0x00002000
|
||||||
#define DAQ_RESET_PIXEL_COUNTERS_AFTER_READOUT 0x00004000
|
#define DAQ_RESET_PIXEL_COUNTERS_AFTER_READOUT 0x00004000
|
||||||
@ -64,23 +68,24 @@
|
|||||||
#define DAQ_CLK_MAIN_CLK_TO_SELECT_NEXT_PIXEL 0x00010000
|
#define DAQ_CLK_MAIN_CLK_TO_SELECT_NEXT_PIXEL 0x00010000
|
||||||
#define DAQ_SEND_N_TEST_PULSES 0x00020000
|
#define DAQ_SEND_N_TEST_PULSES 0x00020000
|
||||||
|
|
||||||
#define DAQ_CHIP_CONTROLLER_HALF_SPEED \
|
// everything at 100 MHz (50MHz ddr readout)
|
||||||
0x00040000 // everything at 100 MHz (50MHz ddr readout)
|
#define DAQ_CHIP_CONTROLLER_HALF_SPEED 0x00040000
|
||||||
#define DAQ_CHIP_CONTROLLER_QUARTER_SPEED \
|
// everything at 50 MHz (25MHz ddr readout)
|
||||||
0x00080000 // everything at 50 MHz (25MHz ddr readout)
|
#define DAQ_CHIP_CONTROLLER_QUARTER_SPEED 0x00080000
|
||||||
#define DAQ_CHIP_CONTROLLER_SUPER_SLOW_SPEED \
|
// everything at ~200 kHz (200 kHz MHz ddr readout)
|
||||||
0x000c0000 // everything at ~200 kHz (200 kHz MHz ddr readout)
|
#define DAQ_CHIP_CONTROLLER_SUPER_SLOW_SPEED 0x000c0000
|
||||||
|
|
||||||
//#define DAQ_FIFO_ENABLE 0x00100000 commented out as it
|
//#define DAQ_FIFO_ENABLE 0x00100000 commented out as it
|
||||||
// is not used anywhere
|
// is not used anywhere
|
||||||
#define DAQ_REG_CHIP_CMDS_INT_TRIGGER 0x00100000
|
#define DAQ_REG_CHIP_CMDS_INT_TRIGGER 0x00100000
|
||||||
|
|
||||||
// direct chip commands to the DAQ_REG_CHIP_CMDS register
|
// direct chip commands to the DAQ_REG_CHIP_CMDS register
|
||||||
#define DAQ_NEXPOSURERS_SAFEST_MODE_ROW_CLK_BEFORE_MODE \
|
// row clk is before main clk readout sequence
|
||||||
0x00200000 // row clk is before main clk readout sequence
|
#define DAQ_NEXPOSURERS_SAFEST_MODE_ROW_CLK_BEFORE_MODE 0x00200000
|
||||||
#define DAQ_NEXPOSURERS_NORMAL_NONPARALLEL_MODE \
|
// expose ->readout ->expose -> ..., with store is always closed
|
||||||
0x00400000 // expose ->readout ->expose -> ..., with store is always closed
|
#define DAQ_NEXPOSURERS_NORMAL_NONPARALLEL_MODE 0x00400000
|
||||||
#define DAQ_NEXPOSURERS_PARALLEL_MODE 0x00600000 // parallel acquire/read mode
|
// parallel acquire/read mode
|
||||||
|
#define DAQ_NEXPOSURERS_PARALLEL_MODE 0x00600000
|
||||||
|
|
||||||
// DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES is old now hard-wired in the firmware
|
// DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES is old now hard-wired in the firmware
|
||||||
// that every image comes with a header #define
|
// that every image comes with a header #define
|
||||||
@ -91,12 +96,14 @@
|
|||||||
#define DAQ_NEXPOSURERS_EXTERNAL_ENABLING_POLARITY 0x02000000
|
#define DAQ_NEXPOSURERS_EXTERNAL_ENABLING_POLARITY 0x02000000
|
||||||
#define DAQ_NEXPOSURERS_EXTERNAL_TRIGGER_POLARITY 0x04000000
|
#define DAQ_NEXPOSURERS_EXTERNAL_TRIGGER_POLARITY 0x04000000
|
||||||
|
|
||||||
#define DAQ_NEXPOSURERS_INTERNAL_ACQUISITION 0x00000000 // internally controlled
|
// internally controlled
|
||||||
#define DAQ_NEXPOSURERS_EXTERNAL_ACQUISITION_START \
|
#define DAQ_NEXPOSURERS_INTERNAL_ACQUISITION 0x00000000
|
||||||
0x08000000 // external acquisition start
|
// external acquisition start
|
||||||
#define DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START 0x10000000 // external image start
|
#define DAQ_NEXPOSURERS_EXTERNAL_ACQUISITION_START 0x08000000
|
||||||
#define DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START_AND_STOP \
|
// external image start
|
||||||
0x18000000 // externally controlly, external image start and stop
|
#define DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START 0x10000000
|
||||||
|
// externally controlly, external image start and stop
|
||||||
|
#define DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START_AND_STOP 0x18000000
|
||||||
|
|
||||||
#define DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING 0x20000000
|
#define DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING 0x20000000
|
||||||
#define DAQ_NEXPOSURERS_ACTIVATE_RATE_CORRECTION 0x40000000
|
#define DAQ_NEXPOSURERS_ACTIVATE_RATE_CORRECTION 0x40000000
|
||||||
@ -106,11 +113,12 @@
|
|||||||
|
|
||||||
// chips static bits
|
// chips static bits
|
||||||
#define DAQ_STATIC_BIT_PROGRAM 0x00000001
|
#define DAQ_STATIC_BIT_PROGRAM 0x00000001
|
||||||
#define DAQ_STATIC_BIT_M4 0x00000002 // these are the status bits, not bit mode
|
// these are the status bits, not bit mode
|
||||||
#define DAQ_STATIC_BIT_M8 0x00000004 // these are the status bits, not bit mode
|
#define DAQ_STATIC_BIT_M4 0x00000002
|
||||||
#define DAQ_STATIC_BIT_M12 \
|
#define DAQ_STATIC_BIT_M8 0x00000004
|
||||||
0x00000000 // these are the status bits, not bit mode, ie. "00" is 12 bit
|
// these are the status bits, not bit mode, ie. "00" is 12 bit mode
|
||||||
// mode
|
#define DAQ_STATIC_BIT_M12 0x00000000
|
||||||
|
|
||||||
#define DAQ_STATIC_BIT_CHIP_TEST 0x00000008
|
#define DAQ_STATIC_BIT_CHIP_TEST 0x00000008
|
||||||
#define DAQ_STATIC_BIT_ROTEST 0x00000010
|
#define DAQ_STATIC_BIT_ROTEST 0x00000010
|
||||||
#define DAQ_CS_BAR_LEFT 0x00000020
|
#define DAQ_CS_BAR_LEFT 0x00000020
|
||||||
@ -136,18 +144,28 @@
|
|||||||
#define CHIP_DATA_OUT_DELAY_REG4 4
|
#define CHIP_DATA_OUT_DELAY_REG4 4
|
||||||
#define CHIP_DATA_OUT_DELAY_SET 0x20000000
|
#define CHIP_DATA_OUT_DELAY_SET 0x20000000
|
||||||
|
|
||||||
// module configuration
|
/** BEB Registers */
|
||||||
#define TOP_BIT_MASK 0x00f
|
|
||||||
#define MASTER_BIT_MASK 0x200
|
|
||||||
#define NORMAL_MODULE_BIT_MASK 0x400
|
|
||||||
|
|
||||||
// Master Slave Top Bottom Definition
|
// module configuration - XPAR_PLB_GPIO_SYS_BASEADDR
|
||||||
#define MODULE_CONFIGURATION_MASK 0x84
|
#define BEB_CONFIG_OW_OFST (0x160) // 0x20 * 11 (P11)
|
||||||
// Software Configuration
|
#define BEB_CONFIG_MASTER_OFST (0)
|
||||||
#define MASTERCONFIG_OFFSET 0x160 // 0x20 * 11 (P11)
|
#define BEB_CONFIG_MASTER_MSK (0x00000001 << BEB_CONFIG_MASTER_OFST)
|
||||||
#define MASTER_BIT 0x1
|
#define BEB_CONFIG_OW_MASTER_OFST (1)
|
||||||
#define OVERWRITE_HARDWARE_BIT 0x2
|
#define BEB_CONFIG_OW_MASTER_MSK (0x00000001 << BEB_CONFIG_OW_MASTER_OFST)
|
||||||
#define DEACTIVATE_BIT 0x4
|
#define BEB_CONFIG_ACTIVATE_OFST (2)
|
||||||
|
#define BEB_CONFIG_ACTIVATE_MSK (0x00000001 << BEB_CONFIG_ACTIVATE_OFST)
|
||||||
|
#define BEB_CONFIG_TOP_OFST (3)
|
||||||
|
#define BEB_CONFIG_TOP_MSK (0x00000001 << BEB_CONFIG_TOP_OFST)
|
||||||
|
#define BEB_CONFIG_OW_TOP_OFST (4)
|
||||||
|
#define BEB_CONFIG_OW_TOP_MSK (0x00000001 << BEB_CONFIG_OW_TOP_OFST)
|
||||||
|
|
||||||
|
#define BEB_CONFIG_RD_OFST (0x84)
|
||||||
|
#define BEB_CONFIG_TOP_RD_OFST (0)
|
||||||
|
#define BEB_CONFIG_TOP_RD_MSK (0x00000001 << BEB_CONFIG_TOP_RD_OFST)
|
||||||
|
#define BEB_CONFIG_MASTER_RD_OFST (9)
|
||||||
|
#define BEB_CONFIG_MASTER_RD_MSK (0x00000001 << BEB_CONFIG_MASTER_RD_OFST)
|
||||||
|
#define BEB_CONFIG_NORMAL_RD_OFST (10)
|
||||||
|
#define BEB_CONFIG_NORMAL_RD_MSK (0x00000001 << BEB_CONFIG_NORMAL_RD_OFST)
|
||||||
|
|
||||||
#define FPGA_TEMP_OFFSET 0x200
|
#define FPGA_TEMP_OFFSET 0x200
|
||||||
|
|
||||||
|
2
slsDetectorServers/eigerDetectorServer/config.txt
Normal file
2
slsDetectorServers/eigerDetectorServer/config.txt
Normal file
@ -0,0 +1,2 @@
|
|||||||
|
top 0
|
||||||
|
master 0
|
@ -314,6 +314,8 @@ void initControlServer() {
|
|||||||
getModuleConfiguration();
|
getModuleConfiguration();
|
||||||
setupDetector();
|
setupDetector();
|
||||||
}
|
}
|
||||||
|
eiger_virtual_activate = 0;
|
||||||
|
LOG(logINFORED, ("Deactivated!\n"));
|
||||||
initCheckDone = 1;
|
initCheckDone = 1;
|
||||||
return;
|
return;
|
||||||
#else
|
#else
|
||||||
@ -341,14 +343,9 @@ void initControlServer() {
|
|||||||
LOG(logDEBUG1, ("Control server: BEB Initialization done\n"));
|
LOG(logDEBUG1, ("Control server: BEB Initialization done\n"));
|
||||||
|
|
||||||
setupDetector();
|
setupDetector();
|
||||||
// activate (if it gets ip) (later FW will deactivate at startup)
|
// client first connect (from shm) will activate
|
||||||
if (getDetectorIP() != 0) {
|
Beb_Activate(0);
|
||||||
Beb_Activate(1);
|
Feb_Control_activate(0);
|
||||||
Feb_Control_activate(1);
|
|
||||||
} else {
|
|
||||||
Beb_Activate(0);
|
|
||||||
Feb_Control_activate(0);
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
initCheckDone = 1;
|
initCheckDone = 1;
|
||||||
#endif
|
#endif
|
||||||
@ -361,6 +358,8 @@ void initStopServer() {
|
|||||||
if (!isControlServer) {
|
if (!isControlServer) {
|
||||||
ComVirtual_setStop(virtual_stop);
|
ComVirtual_setStop(virtual_stop);
|
||||||
}
|
}
|
||||||
|
eiger_virtual_activate = 0;
|
||||||
|
LOG(logINFORED, ("Deactivated!\n"));
|
||||||
return;
|
return;
|
||||||
#else
|
#else
|
||||||
getModuleConfiguration();
|
getModuleConfiguration();
|
||||||
@ -375,15 +374,9 @@ void initStopServer() {
|
|||||||
Feb_Control_Init(master, 1, normal, getDetectorNumber());
|
Feb_Control_Init(master, 1, normal, getDetectorNumber());
|
||||||
}
|
}
|
||||||
LOG(logDEBUG1, ("Stop server: FEB Initialization done\n"));
|
LOG(logDEBUG1, ("Stop server: FEB Initialization done\n"));
|
||||||
// activate (if it gets ip) (later FW will deactivate at startup)
|
// client first connect (from shm) will activate
|
||||||
// also needed for stop server for status
|
Beb_Activate(0);
|
||||||
if (getDetectorIP() != 0) {
|
Feb_Control_activate(0);
|
||||||
Beb_Activate(1);
|
|
||||||
Feb_Control_activate(1);
|
|
||||||
} else {
|
|
||||||
Beb_Activate(0);
|
|
||||||
Feb_Control_activate(0);
|
|
||||||
}
|
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -405,21 +398,7 @@ void getModuleConfiguration() {
|
|||||||
#else
|
#else
|
||||||
normal = 1;
|
normal = 1;
|
||||||
#endif
|
#endif
|
||||||
LOG(logINFOBLUE,
|
|
||||||
("Module: %s %s %s\n", (top ? "TOP" : "BOTTOM"),
|
|
||||||
(master ? "MASTER" : "SLAVE"), (normal ? "NORMAL" : "SPECIAL")));
|
|
||||||
return;
|
|
||||||
#else
|
#else
|
||||||
int *m = &master;
|
|
||||||
int *t = ⊤
|
|
||||||
int *n = &normal;
|
|
||||||
Beb_GetModuleConfiguration(m, t, n);
|
|
||||||
if (isControlServer) {
|
|
||||||
LOG(logINFOBLUE,
|
|
||||||
("Module: %s %s %s\n", (top ? "TOP" : "BOTTOM"),
|
|
||||||
(master ? "MASTER" : "SLAVE"), (normal ? "NORMAL" : "SPECIAL")));
|
|
||||||
}
|
|
||||||
|
|
||||||
// read detector id
|
// read detector id
|
||||||
char output[255];
|
char output[255];
|
||||||
FILE *sysFile = popen(IDFILECOMMAND, "r");
|
FILE *sysFile = popen(IDFILECOMMAND, "r");
|
||||||
@ -429,7 +408,140 @@ void getModuleConfiguration() {
|
|||||||
if (isControlServer) {
|
if (isControlServer) {
|
||||||
LOG(logINFOBLUE, ("Detector ID: %u\n\n", detid));
|
LOG(logINFOBLUE, ("Detector ID: %u\n\n", detid));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
Beb_GetModuleConfiguration(&master, &top, &normal);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
if (readConfigFile() == FAIL) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
if (isControlServer) {
|
||||||
|
LOG(logINFOBLUE,
|
||||||
|
("Module: %s %s %s\n", (top ? "TOP" : "BOTTOM"),
|
||||||
|
(master ? "MASTER" : "SLAVE"), (normal ? "NORMAL" : "SPECIAL")));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
int readConfigFile() {
|
||||||
|
|
||||||
|
if (initError == FAIL) {
|
||||||
|
return initError;
|
||||||
|
}
|
||||||
|
|
||||||
|
FILE *fd = fopen(CONFIG_FILE, "r");
|
||||||
|
if (fd == NULL) {
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
LOG(logINFO, ("Reading config file %s\n", CONFIG_FILE));
|
||||||
|
|
||||||
|
// Initialization
|
||||||
|
const size_t LZ = 256;
|
||||||
|
char line[LZ];
|
||||||
|
memset(line, 0, LZ);
|
||||||
|
char command[LZ];
|
||||||
|
|
||||||
|
// keep reading a line
|
||||||
|
while (fgets(line, LZ, fd)) {
|
||||||
|
|
||||||
|
// ignore comments
|
||||||
|
if (line[0] == '#') {
|
||||||
|
LOG(logDEBUG1, ("Ignoring Comment\n"));
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
|
// ignore empty lines
|
||||||
|
if (strlen(line) <= 1) {
|
||||||
|
LOG(logDEBUG1, ("Ignoring Empty line\n"));
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
|
// ignoring lines beginning with space or tab
|
||||||
|
if (line[0] == ' ' || line[0] == '\t') {
|
||||||
|
LOG(logDEBUG1, ("Ignoring Lines starting with space or tabs\n"));
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
|
LOG(logDEBUG1, ("Command to process: (size:%d) %.*s\n", strlen(line),
|
||||||
|
strlen(line) - 1, line));
|
||||||
|
memset(command, 0, LZ);
|
||||||
|
|
||||||
|
// top command
|
||||||
|
if (!strncmp(line, "top", strlen("top"))) {
|
||||||
|
// cannot scan values
|
||||||
|
if (sscanf(line, "%s %d", command, &top) != 2) {
|
||||||
|
sprintf(initErrorMessage,
|
||||||
|
"Could not scan top commands from on-board server "
|
||||||
|
"config file. Line:[%s].\n",
|
||||||
|
line);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
#ifndef VIRTUAL
|
||||||
|
if (Beb_SetTop(top) == FAIL) {
|
||||||
|
sprintf(
|
||||||
|
initErrorMessage,
|
||||||
|
"Could not overwrite top to %d in Beb from on-board server "
|
||||||
|
"config file. Line:[%s].\n",
|
||||||
|
top, line);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
if (Feb_Control_SetTop(top, 1, 1) == FAIL) {
|
||||||
|
sprintf(
|
||||||
|
initErrorMessage,
|
||||||
|
"Could not overwrite top to %d in Feb from on-board server "
|
||||||
|
"config file. Line:[%s].\n",
|
||||||
|
top, line);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
// master command
|
||||||
|
else if (!strncmp(line, "master", strlen("master"))) {
|
||||||
|
// cannot scan values
|
||||||
|
if (sscanf(line, "%s %d", command, &master) != 2) {
|
||||||
|
sprintf(initErrorMessage,
|
||||||
|
"Could not scan master commands from on-board server "
|
||||||
|
"config file. Line:[%s].\n",
|
||||||
|
line);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
#ifndef VIRTUAL
|
||||||
|
if (Beb_SetMaster(master) == FAIL) {
|
||||||
|
sprintf(initErrorMessage,
|
||||||
|
"Could not overwrite master to %d in Beb from on-board "
|
||||||
|
"server "
|
||||||
|
"config file. Line:[%s].\n",
|
||||||
|
master, line);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
if (Feb_Control_SetMaster(master) == FAIL) {
|
||||||
|
sprintf(initErrorMessage,
|
||||||
|
"Could not overwrite master to %d in Feb from on-board "
|
||||||
|
"server "
|
||||||
|
"config file. Line:[%s].\n",
|
||||||
|
master, line);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
// other commands
|
||||||
|
else {
|
||||||
|
sprintf(initErrorMessage,
|
||||||
|
"Could not scan command from on-board server "
|
||||||
|
"config file. Line:[%s].\n",
|
||||||
|
line);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
fclose(fd);
|
||||||
|
if (strlen(initErrorMessage)) {
|
||||||
|
initError = FAIL;
|
||||||
|
LOG(logERROR, ("%s\n\n", initErrorMessage));
|
||||||
|
} else {
|
||||||
|
LOG(logINFO, ("Successfully read config file\n"));
|
||||||
|
}
|
||||||
|
return initError;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* set up detector */
|
/* set up detector */
|
||||||
@ -1685,6 +1797,11 @@ int activate(int enable) {
|
|||||||
#ifdef VIRTUAL
|
#ifdef VIRTUAL
|
||||||
if (enable >= 0)
|
if (enable >= 0)
|
||||||
eiger_virtual_activate = enable;
|
eiger_virtual_activate = enable;
|
||||||
|
if (eiger_virtual_activate == 0) {
|
||||||
|
LOG(logINFORED, ("Deactivated!\n"));
|
||||||
|
} else {
|
||||||
|
LOG(logINFOGREEN, ("Activated!\n"));
|
||||||
|
}
|
||||||
return eiger_virtual_activate;
|
return eiger_virtual_activate;
|
||||||
#else
|
#else
|
||||||
int ret = Beb_Activate(enable);
|
int ret = Beb_Activate(enable);
|
||||||
@ -1939,8 +2056,7 @@ void *start_timer(void *arg) {
|
|||||||
memset(packetData, 0, packetsize);
|
memset(packetData, 0, packetsize);
|
||||||
sls_detector_header *header =
|
sls_detector_header *header =
|
||||||
(sls_detector_header *)(packetData);
|
(sls_detector_header *)(packetData);
|
||||||
header->detType = 3; //(uint16_t)myDetectorType; updated
|
header->detType = (uint16_t)myDetectorType;
|
||||||
// when firmware updates
|
|
||||||
header->version = SLS_DETECTOR_HEADER_VERSION - 1;
|
header->version = SLS_DETECTOR_HEADER_VERSION - 1;
|
||||||
header->frameNumber = frameNr + iframes;
|
header->frameNumber = frameNr + iframes;
|
||||||
header->packetNumber = i;
|
header->packetNumber = i;
|
||||||
@ -1950,8 +2066,7 @@ void *start_timer(void *arg) {
|
|||||||
char packetData2[packetsize];
|
char packetData2[packetsize];
|
||||||
memset(packetData2, 0, packetsize);
|
memset(packetData2, 0, packetsize);
|
||||||
header = (sls_detector_header *)(packetData2);
|
header = (sls_detector_header *)(packetData2);
|
||||||
header->detType = 3; //(uint16_t)myDetectorType; updated
|
header->detType = (uint16_t)myDetectorType;
|
||||||
// when firmware updates
|
|
||||||
header->version = SLS_DETECTOR_HEADER_VERSION - 1;
|
header->version = SLS_DETECTOR_HEADER_VERSION - 1;
|
||||||
header->frameNumber = frameNr + iframes;
|
header->frameNumber = frameNr + iframes;
|
||||||
header->packetNumber = i;
|
header->packetNumber = i;
|
||||||
@ -2091,7 +2206,7 @@ int startReadOut() {
|
|||||||
// for(i=0;i<nimages_per_request;i++)
|
// for(i=0;i<nimages_per_request;i++)
|
||||||
// if ((ret_val =
|
// if ((ret_val =
|
||||||
//(!Beb_RequestNImages(beb_num,send_to_ten_gig,on_dst,1,0))))
|
//(!Beb_RequestNImages(beb_num,send_to_ten_gig,on_dst,1,0))))
|
||||||
//break;
|
// break;
|
||||||
|
|
||||||
dst_requested[on_dst++] = 0;
|
dst_requested[on_dst++] = 0;
|
||||||
on_dst %= ndsts_in_use;
|
on_dst %= ndsts_in_use;
|
||||||
|
@ -1,8 +1,9 @@
|
|||||||
#pragma once
|
#pragma once
|
||||||
#include "sls_detector_defs.h"
|
#include "sls_detector_defs.h"
|
||||||
|
|
||||||
#define REQUIRED_FIRMWARE_VERSION (24)
|
#define REQUIRED_FIRMWARE_VERSION (26)
|
||||||
#define IDFILECOMMAND "more /home/root/executables/detid.txt"
|
#define IDFILECOMMAND "more /home/root/executables/detid.txt"
|
||||||
|
#define CONFIG_FILE ("config.txt")
|
||||||
#define FIRMWARE_VERSION_SAME_TOP_BOT_ADDR (26)
|
#define FIRMWARE_VERSION_SAME_TOP_BOT_ADDR (26)
|
||||||
|
|
||||||
#define STATUS_IDLE 0
|
#define STATUS_IDLE 0
|
||||||
|
@ -112,7 +112,7 @@ void updateDataBytes();
|
|||||||
defined(MOENCHD)
|
defined(MOENCHD)
|
||||||
int setDefaultDacs();
|
int setDefaultDacs();
|
||||||
#endif
|
#endif
|
||||||
#ifdef GOTTHARD2D
|
#if defined(GOTTHARD2D) || defined(EIGERD)
|
||||||
int readConfigFile();
|
int readConfigFile();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
@ -791,7 +791,7 @@ class Detector {
|
|||||||
Result<bool> getActive(Positions pos = {}) const;
|
Result<bool> getActive(Positions pos = {}) const;
|
||||||
|
|
||||||
/** [Eiger] */
|
/** [Eiger] */
|
||||||
void setActive(bool active, Positions pos = {});
|
void setActive(const bool active, Positions pos = {});
|
||||||
|
|
||||||
/** [Eiger] */
|
/** [Eiger] */
|
||||||
Result<bool> getRxPadDeactivatedMode(Positions pos = {}) const;
|
Result<bool> getRxPadDeactivatedMode(Positions pos = {}) const;
|
||||||
|
@ -1031,11 +1031,11 @@ Result<ns> Detector::getMeasuredSubFramePeriod(Positions pos) const {
|
|||||||
}
|
}
|
||||||
|
|
||||||
Result<bool> Detector::getActive(Positions pos) const {
|
Result<bool> Detector::getActive(Positions pos) const {
|
||||||
return pimpl->Parallel(&Module::activate, pos, -1);
|
return pimpl->Parallel(&Module::getActivate, pos);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Detector::setActive(bool active, Positions pos) {
|
void Detector::setActive(const bool active, Positions pos) {
|
||||||
pimpl->Parallel(&Module::activate, pos, static_cast<int>(active));
|
pimpl->Parallel(&Module::setActivate, pos, active);
|
||||||
}
|
}
|
||||||
|
|
||||||
Result<bool> Detector::getRxPadDeactivatedMode(Positions pos) const {
|
Result<bool> Detector::getRxPadDeactivatedMode(Positions pos) const {
|
||||||
|
@ -515,7 +515,7 @@ void DetectorImpl::readFrameFromReceiver() {
|
|||||||
nDetPixelsX = nX * nPixelsX;
|
nDetPixelsX = nX * nPixelsX;
|
||||||
nDetPixelsY = nY * nPixelsY;
|
nDetPixelsY = nY * nPixelsY;
|
||||||
// det type
|
// det type
|
||||||
eiger = (zHeader.detType == static_cast<int>(3))
|
eiger = (zHeader.detType == EIGER)
|
||||||
? true
|
? true
|
||||||
: false; // to be changed to EIGER when
|
: false; // to be changed to EIGER when
|
||||||
// firmware updates its header data
|
// firmware updates its header data
|
||||||
|
@ -346,19 +346,19 @@ void Module::setHostname(const std::string &hostname,
|
|||||||
sls::strcpy_safe(shm()->hostname, hostname.c_str());
|
sls::strcpy_safe(shm()->hostname, hostname.c_str());
|
||||||
auto client = DetectorSocket(shm()->hostname, shm()->controlPort);
|
auto client = DetectorSocket(shm()->hostname, shm()->controlPort);
|
||||||
client.close();
|
client.close();
|
||||||
|
try {
|
||||||
LOG(logINFO) << "Checking Detector Version Compatibility";
|
|
||||||
if (!initialChecks) {
|
|
||||||
try {
|
|
||||||
checkDetectorVersionCompatibility();
|
|
||||||
} catch (const DetectorError &e) {
|
|
||||||
LOG(logWARNING) << "Bypassing Initial Checks at your own risk!";
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
checkDetectorVersionCompatibility();
|
checkDetectorVersionCompatibility();
|
||||||
|
LOG(logINFO) << "Detector Version Compatibility - Success";
|
||||||
|
} catch (const DetectorError &e) {
|
||||||
|
if (!initialChecks) {
|
||||||
|
LOG(logWARNING) << "Bypassing Initial Checks at your own risk!";
|
||||||
|
} else {
|
||||||
|
throw;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if (shm()->myDetectorType == EIGER) {
|
||||||
|
setActivate(true);
|
||||||
}
|
}
|
||||||
|
|
||||||
LOG(logINFO) << "Detector connecting - updating!";
|
|
||||||
}
|
}
|
||||||
|
|
||||||
std::string Module::getHostname() const { return shm()->hostname; }
|
std::string Module::getHostname() const { return shm()->hostname; }
|
||||||
@ -2457,16 +2457,29 @@ void Module::writeAdcRegister(uint32_t addr, uint32_t val) {
|
|||||||
sendToDetector(F_WRITE_ADC_REG, args, nullptr);
|
sendToDetector(F_WRITE_ADC_REG, args, nullptr);
|
||||||
}
|
}
|
||||||
|
|
||||||
int Module::activate(int enable) {
|
bool Module::getActivate() {
|
||||||
|
int retval = -1, retval2 = -1;
|
||||||
|
int arg = -1;
|
||||||
|
sendToDetector(F_ACTIVATE, arg, retval);
|
||||||
|
sendToDetectorStop(F_ACTIVATE, arg, retval2);
|
||||||
|
if (retval != retval2) {
|
||||||
|
std::ostringstream oss;
|
||||||
|
oss << "Inconsistent activate state. Control Server: " << retval
|
||||||
|
<< ". Stop Server: " << retval2;
|
||||||
|
throw RuntimeError(oss.str());
|
||||||
|
}
|
||||||
|
return retval;
|
||||||
|
}
|
||||||
|
|
||||||
|
void Module::setActivate(const bool enable) {
|
||||||
int retval = -1;
|
int retval = -1;
|
||||||
|
int arg = static_cast<int>(enable);
|
||||||
LOG(logDEBUG1) << "Setting activate flag to " << enable;
|
LOG(logDEBUG1) << "Setting activate flag to " << enable;
|
||||||
sendToDetector(F_ACTIVATE, enable, retval);
|
sendToDetector(F_ACTIVATE, arg, retval);
|
||||||
sendToDetectorStop(F_ACTIVATE, enable, retval);
|
sendToDetectorStop(F_ACTIVATE, arg, retval);
|
||||||
LOG(logDEBUG1) << "Activate: " << retval;
|
|
||||||
if (shm()->useReceiverFlag) {
|
if (shm()->useReceiverFlag) {
|
||||||
sendToReceiver(F_RECEIVER_ACTIVATE, retval, nullptr);
|
sendToReceiver(F_RECEIVER_ACTIVATE, retval, nullptr);
|
||||||
}
|
}
|
||||||
return retval;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
bool Module::getDeactivatedRxrPaddingMode() {
|
bool Module::getDeactivatedRxrPaddingMode() {
|
||||||
|
@ -1095,12 +1095,8 @@ class Module : public virtual slsDetectorDefs {
|
|||||||
*/
|
*/
|
||||||
void writeAdcRegister(uint32_t addr, uint32_t val);
|
void writeAdcRegister(uint32_t addr, uint32_t val);
|
||||||
|
|
||||||
/**
|
bool getActivate();
|
||||||
* Activates/Deactivates the detector (Eiger only)
|
void setActivate(const bool enable);
|
||||||
* @param enable active (1) or inactive (0), -1 gets
|
|
||||||
* @returns 0 (inactive) or 1 (active)for activate mode
|
|
||||||
*/
|
|
||||||
int activate(int const enable = -1);
|
|
||||||
|
|
||||||
bool getDeactivatedRxrPaddingMode();
|
bool getDeactivatedRxrPaddingMode();
|
||||||
|
|
||||||
|
Reference in New Issue
Block a user