solved many bugs, but cannot get data in eiger

This commit is contained in:
Dhanya Maliakal
2017-06-09 16:02:58 +02:00
parent c755a8974c
commit 132a9bbfe9
15 changed files with 545 additions and 351 deletions

View File

@ -16,8 +16,8 @@
/* Enums */
enum CLK_SPEED_INDEX {FULL_SPEED, HALF_SPEED, QUARTER_SPEED};
enum DAC_INDEX {SVP,VTR,VRF,VRS,SVN,VTGSTV,VCMP_LL,VCMP_LR,CAL,VCMP_RL,RXB_RB,RXB_LB,VCMP_RR,VCP,VCN,VIS,VTHRESHOLD};
#define DEFAULT_DAC_VALS[16] { \
enum DACINDEX {SVP,VTR,VRF,VRS,SVN,VTGSTV,VCMP_LL,VCMP_LR,CAL,VCMP_RL,RXB_RB,RXB_LB,VCMP_RR,VCP,VCN,VIS,VTHRESHOLD};
#define DEFAULT_DAC_VALS { \
0, /* SvP */ \
2480, /* Vtr */ \
3300, /* Vrf */ \
@ -35,8 +35,8 @@ enum DAC_INDEX {SVP,VTR,VRF,VRS,SVN,VTGSTV,VCMP_LL,VCMP_LR,CAL,VCMP_RL,R
2000, /* Vcn */ \
1550 /* Vis */ \
};
enum ADC_INDEX {TEMP_FPGAEXT, TEMP_10GE, TEMP_DCDC, TEMP_SODL, TEMP_SODR, TEMP_FPGA, TEMP_FPGAFEBL, TEMP_FPGAFEBR};
enum NETWORK_PARA_INDEX {TXN_LEFT, TXN_RIGHT, TXN_FRAME,FLOWCTRL_10G};
enum ADCINDEX {TEMP_FPGAEXT, TEMP_10GE, TEMP_DCDC, TEMP_SODL, TEMP_SODR, TEMP_FPGA, TEMP_FPGAFEBL, TEMP_FPGAFEBR};
enum NETWORKINDEX {TXN_LEFT, TXN_RIGHT, TXN_FRAME,FLOWCTRL_10G};
/* Hardware Definitions */