detectors/slsDetectorPackage
25
0
Fork 0
mirror of https://github.com/slsdetectorgroup/slsDetectorPackage.git synced 2025-06-12 04:47:14 +02:00
Code Issues Actions Packages Releases Activity

solved many bugs, but cannot get data in eiger

Browse Source
This commit is contained in:
Dhanya Maliakal
2017-06-09 16:02:58 +02:00
parent c755a8974c
commit 132a9bbfe9
15 changed files with 545 additions and 351 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
slsDetectorSoftware/eigerDetectorServer/Beb.c
View File

@ -412,7 +412,7 @@ int Beb_Activate(int enable){
}
int Beb_SetNetworkParameter(enum detNetworkParameter mode, int val){
int Beb_SetNetworkParameter(enum NETWORKINDEX mode, int val){
if(!Beb_activated)
return val;

2
slsDetectorSoftware/eigerDetectorServer/Beb.h
View File

@ -51,7 +51,7 @@ struct BebInfo{
int Beb_SetMasterViaSoftware();
int Beb_SetSlaveViaSoftware();
int Beb_Activate(int enable);
int Beb_SetNetworkParameter(enum detNetworkParameter mode, int val);
int Beb_SetNetworkParameter(enum NETWORKINDEX mode, int val);
int Beb_ResetToHardwareSettings();
u_int32_t Beb_GetFirmwareRevision();
u_int32_t Beb_GetFirmwareSoftwareAPIVersion();

43
slsDetectorSoftware/eigerDetectorServer/slsDetectorFunctionList.c
View File

@ -293,7 +293,7 @@ void allocateDetectorStructureMemory(){
(detectorModules)->nadc=NADC;
(detectorModules)->nchip=NCHIP;
(detectorModules)->nchan=NCHIP*NCHAN;
(detectorModules)->module=imod;
(detectorModules)->module=0;
(detectorModules)->gain=0;
(detectorModules)->offset=0;
(detectorModules)->reg=0;
@ -305,11 +305,18 @@ void allocateDetectorStructureMemory(){
void setupDetector() {
allocateDetectorStructureMemory();
//Get dac values
int retval[2];
for(i=0;i<(detectorModules)->ndac;i++)
setDAC((enum DAC_INDEX)i,DEFAULT_DAC_VALS[i],(detectorModules)->module,0,retval);
//set dacs
printf("Setting Default Dac values\n");
{
int i = 0;
int retval[2]={-1,-1};
const int defaultvals[NDAC] = DEFAULT_DAC_VALS;
for(i = 0; i < NDAC; ++i) {
setDAC((enum DACINDEX)i,defaultvals[i],0,0,retval);
if (retval[0] != defaultvals[i])
cprintf(RED, "Warning: Setting dac %d failed, wrote %d, read %d\n",i ,defaultvals[i], retval[0]);
}
}
//setting default measurement parameters
setTimer(FRAME_NUMBER, DEFAULT_NUM_FRAMES);
@ -533,7 +540,7 @@ int setModule(sls_detector_module myMod, int delay){
//set dac values
for(i=0;i<myMod.ndac;i++)
setDAC((enum DAC_INDEX)i,myMod.dacs[i],myMod.module,0,retval);
setDAC((enum DACINDEX)i,myMod.dacs[i],myMod.module,0,retval);
//includ gap pixels
unsigned int tt[263680];
@ -566,7 +573,7 @@ int getModule(sls_detector_module *myMod){
//dacs
for(i=0;i<NDAC;i++)
setDAC((enum DAC_INDEX)i,-1,-1,0,retval);
setDAC((enum DACINDEX)i,-1,-1,0,retval);
//trimbits
unsigned int* tt;
@ -635,8 +642,7 @@ int setThresholdEnergy(int ev, int imod){
/* parameters - dac, adc, hv */
void setDAC(enum DAC_INDEX ind, int val, int imod, int mV, int retval[]){
void setDAC(enum DACINDEX ind, int val, int imod, int mV, int retval[]){
if(ind == VTHRESHOLD){
int ret[5];
@ -696,7 +702,7 @@ void setDAC(enum DAC_INDEX ind, int val, int imod, int mV, int retval[]){
int getADC(enum ADC_INDEX ind, int imod){
int getADC(enum ADCINDEX ind, int imod){
int retval = -1;
char tempnames[6][20]={"FPGA EXT", "10GE","DCDC", "SODL", "SODR", "FPGA"};
char cstore[255];
@ -793,8 +799,7 @@ enum externalCommunicationMode setTiming( enum externalCommunicationMode arg){
/* configure mac */
int configureMAC(int ipad, long long int macad, long long int detectormacadd, int detipad, int udpport, int udpport2, int ival){
int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t sourceip, uint32_t udpport, uint32_t udpport2, int ival) {
if (sourcemac != getDetectorMAC()){
printf("*************************************************\n");
printf("WARNING: actual detector mac address %llx does not match the one from client %llx\n",getDetectorMAC(),sourcemac);
@ -1050,7 +1055,7 @@ int activate(int enable){
return ret;
}
int setNetworkParameter(enum detNetworkParameter mode, int value){
int setNetworkParameter(enum NETWORKINDEX mode, int value){
return Beb_SetNetworkParameter(mode, value);
}
@ -1113,15 +1118,13 @@ int stopStateMachine(){
int startReadOut(){
printf("Requesting images...\n");
//RequestImages();
int ret_val = 0;
dst_requested[0] = 1;
while(dst_requested[on_dst]){
//waits on data
int beb_num = BEB_NUM;//Feb_Control_GetModuleNumber();
if ((ret_val = (!Beb_RequestNImages(beb_num,send_to_ten_gig,on_dst,nimages_per_request,0))))
break;
// for(i=0;i<nimages_per_request;i++)
@ -1274,10 +1277,10 @@ int calculateDataBytes(){
}
int getTotalNumberOfChannels(){return getNumberOfChannelsPerModule() * getTotalNumberOfModules;}
int getTotalNumberOfChips(){return getNumberOfChipsPerModule * getTotalNumberOfModules;}
int getTotalNumberOfChannels(){return ((int)getNumberOfChannelsPerModule() * (int)getTotalNumberOfModules);}
int getTotalNumberOfChips(){return ((int)getNumberOfChipsPerModule * (int)getTotalNumberOfModules);}
int getTotalNumberOfModules(){return NMOD;}
int getNumberOfChannelsPerModule(){return getNumberOfChannelsPerChip() * getTotalNumberOfChips();}
int getNumberOfChannelsPerModule(){return ((int)getNumberOfChannelsPerChip() * (int)getTotalNumberOfChips());}
int getNumberOfChipsPerModule(){return NCHIP;}
int getNumberOfDACsPerModule(){return NDAC;}
int getNumberOfADCsPerModule(){return NADC;}

8
slsDetectorSoftware/eigerDetectorServer/slsDetectorServer_defs.h
View File

@ -16,8 +16,8 @@
/* Enums */
enum CLK_SPEED_INDEX {FULL_SPEED, HALF_SPEED, QUARTER_SPEED};
enum DAC_INDEX {SVP,VTR,VRF,VRS,SVN,VTGSTV,VCMP_LL,VCMP_LR,CAL,VCMP_RL,RXB_RB,RXB_LB,VCMP_RR,VCP,VCN,VIS,VTHRESHOLD};
#define DEFAULT_DAC_VALS[16] { \
enum DACINDEX {SVP,VTR,VRF,VRS,SVN,VTGSTV,VCMP_LL,VCMP_LR,CAL,VCMP_RL,RXB_RB,RXB_LB,VCMP_RR,VCP,VCN,VIS,VTHRESHOLD};
#define DEFAULT_DAC_VALS { \
0, /* SvP */ \
2480, /* Vtr */ \
3300, /* Vrf */ \
@ -35,8 +35,8 @@ enum DAC_INDEX {SVP,VTR,VRF,VRS,SVN,VTGSTV,VCMP_LL,VCMP_LR,CAL,VCMP_RL,R
2000, /* Vcn */ \
1550 /* Vis */ \
};
enum ADC_INDEX {TEMP_FPGAEXT, TEMP_10GE, TEMP_DCDC, TEMP_SODL, TEMP_SODR, TEMP_FPGA, TEMP_FPGAFEBL, TEMP_FPGAFEBR};
enum NETWORK_PARA_INDEX {TXN_LEFT, TXN_RIGHT, TXN_FRAME,FLOWCTRL_10G};
enum ADCINDEX {TEMP_FPGAEXT, TEMP_10GE, TEMP_DCDC, TEMP_SODL, TEMP_SODR, TEMP_FPGA, TEMP_FPGAFEBL, TEMP_FPGAFEBR};
enum NETWORKINDEX {TXN_LEFT, TXN_RIGHT, TXN_FRAME,FLOWCTRL_10G};
/* Hardware Definitions */