detector servers moved out of slsdetector software, eiger server compiles with new headers

slsDetectorServers/mythen3DetectorServer/AD9257.h

@@ -0,0 +1 @@
+../slsDetectorServer/AD9257.h

slsDetectorServers/mythen3DetectorServer/Makefile

@@ -0,0 +1,33 @@
+CROSS  = bfin-uclinux-
+CC    = $(CROSS)gcc
+#CC			=	gcc
+CLAGS		+=  -Wall -DMYTHEN3D -DSLS_DETECTOR_FUNCTION_LIST -DDACS_INT -DSTOP_SERVER #-DVERBOSEI #-DVERBOSE
+LDLIBS		+= 	-lm   -lstdc++ 
+
+
+PROGS		= 	mythen3DetectorServer
+DESTDIR		?= 	bin
+INSTMODE	= 	0777
+
+SRC_CLNT	=	communication_funcs.c slsDetectorServer.c slsDetectorServer_funcs.c slsDetectorFunctionList.c 
+OBJS 		= 	$(SRC_CLNT:.c=.o) 
+
+
+
+all: clean versioning $(PROGS)
+
+boot: $(OBJS)
+
+versioning: 
+	@echo `tput setaf 6;	./updateGitVersion.sh; tput sgr0;`
+
+$(PROGS): $(OBJS)
+#	echo $(OBJS) 
+	mkdir -p $(DESTDIR) 
+	$(CC) -o $@ $^ $(CFLAGS) $(LDLIBS) 
+	mv $(PROGS) $(DESTDIR)
+	rm *.gdb
+
+clean:
+	rm -rf $(DESTDIR)/$(PROGS)  *.o
+

slsDetectorServers/mythen3DetectorServer/Makefile.virtual

@@ -0,0 +1,25 @@
+CC    		= gcc
+CFLAGS		+=  -Wall -DVIRTUAL -DMYTHEN3D -DSLS_DETECTOR_FUNCTION_LIST -DDACS_INT -DSTOP_SERVER #-DVERBOSEI #-DVERBOSE
+LDLIBS		+= 	-lm  -lstdc++ 
+
+PROGS		= 	virtualMythen3DetectorServer 
+DESTDIR		?= 	bin
+INSTMODE	= 	0777
+
+SRC_CLNT	=	communication_funcs.c slsDetectorServer.c slsDetectorServer_funcs.c  slsDetectorFunctionList.c 
+OBJS 		= 	$(SRC_CLNT:.c=.o) 
+ 
+all: clean $(PROGS)
+
+boot: $(OBJS) 
+
+$(PROGS): $(OBJS)
+	echo $(OBJS) 
+	mkdir -p $(DESTDIR) 
+	$(CC) -o $@ $^ $(CFLAGS) $(LDLIBS) 
+	mv $(PROGS) $(DESTDIR)
+	rm *.gdb
+
+clean:
+	rm -rf $(DESTDIR)/$(PROGS)  *.o
+	

slsDetectorServers/mythen3DetectorServer/RegisterDefs.h

@@ -0,0 +1,101 @@
+#ifndef REGISTERS_G_H
+#define REGISTERS_G_H
+
+/* Definitions for FPGA*/
+
+/* FPGA Version register */
+#define FPGA_VERSION_REG                (0x00 << 11)
+
+#define BOARD_REVISION_OFST             (0)
+#define BOARD_REVISION_MSK              (0x00FFFFFF << BOARD_REVISION_OFST)
+#define DETECTOR_TYPE_OFST              (24)
+#define DETECTOR_TYPE_MSK               (0x000000FF << DETECTOR_TYPE_OFST)
+
+/* Fix pattern register */
+#define FIX_PATT_REG                    (0x01 << 11)
+
+
+/* Timer 64 bit Regiser */
+#define SET_DELAY_LSB_REG               (0x60 << 11) //96<<11 //0x68<<11
+#define SET_DELAY_MSB_REG               (0x61 << 11) //97<<11 //0x69<<11
+#define SET_CYCLES_LSB_REG              (0x62 << 11) //98<<11//0x6c<<11
+#define SET_CYCLES_MSB_REG              (0x63 << 11) //99<<11//0x6d<<11
+#define SET_FRAMES_LSB_REG              (0x64 << 11) //(100<<11)/** to hex */
+#define SET_FRAMES_MSB_REG              (0x65 << 11) //101<<11//0x71<<11
+#define SET_PERIOD_LSB_REG              (0x66 << 11) //102<<11//0x74<<11
+#define SET_PERIOD_MSB_REG              (0x67 << 11) //103<<11//0x75<<11
+#define SET_GATES_LSB_REG               (0x6A << 11) /*check in firmware*///106<<11//0x7c<<11
+#define SET_GATES_MSB_REG               (0x6B << 11) //107<<11//0x7d<<11
+#define SET_EXPTIME_LSB_REG             (0x72 << 11) /** check in firmware *///114<<11//0x78<<11
+#define SET_EXPTIME_MSB_REG             (0x73 << 11) //115<<11//0x79<<11
+
+#define GET_ACTUAL_TIME_LSB_REG         (0x10 << 11) //16<<11
+#define GET_ACTUAL_TIME_MSB_REG         (0x11 << 11) //17<<11
+#define GET_DELAY_LSB_REG               (0x12 << 11) //18<<11//0x6a<<11
+#define GET_DELAY_MSB_REG               (0x13 << 11) //19<<11//0x6b<<11
+#define GET_CYCLES_LSB_REG              (0x14 << 11) //20<<11//0x6e<<11
+#define GET_CYCLES_MSB_REG              (0x15 << 11) //21<<11//0x6f<<11
+#define GET_FRAMES_LSB_REG              (0x16 << 11) //22<<11//0x72<<11
+#define GET_FRAMES_MSB_REG              (0x17 << 11) //23<<11//0x73<<11
+#define GET_PERIOD_LSB_REG              (0x18 << 11) //24<<11//0x76<<11
+#define GET_PERIOD_MSB_REG              (0x19 << 11) //25<<11//0x77<<11
+#define GET_EXPTIME_LSB_REG             (0x1A << 11) //26<<11//0x7a<<11
+#define GET_EXPTIME_MSB_REG             (0x1B << 11) //27<<11//0x7b<<11
+#define GET_GATES_LSB_REG               (0x1C << 11) //28<<11//0x7e<<11
+#define GET_GATES_MSB_REG               (0x1D << 11) //29<<11//0x7f<<11
+
+#define FRAMES_FROM_START_LSB_REG       (0x22 << 11) //34<<11
+#define FRAMES_FROM_START_MSB_REG       (0x23 << 11) //35<<11
+#define FRAMES_FROM_START_PG_LSB_REG    (0x24 << 11) //36<<11
+#define FRAMES_FROM_START_PG_MSB_REG    (0x25 << 11) //37<<11
+#define GET_MEASUREMENT_TIME_LSB_REG    (0x26 << 11) //38<<11
+#define GET_MEASUREMENT_TIME_MSB_REG    (0x27 << 11) //39<<11
+
+
+/* SPI (Serial Peripheral Interface) Register */
+#define SPI_REG                         (0x40 << 11)
+
+#define DAC_SERIAL_DIGITAL_OUT_OFST     (0)
+#define DAC_SERIAL_DIGITAL_OUT_MSK      (0x00000001 << DAC_SERIAL_DIGITAL_OUT_OFST)
+#define DAC_SERIAL_CLK_OUT_OFST         (1)
+#define DAC_SERIAL_CLK_OUT_MSK          (0x00000001 << DAC_SERIAL_CLK_OUT_OFST)
+#define DAC_SERIAL_CS_OUT_OFST          (2)
+#define DAC_SERIAL_CS_OUT_MSK           (0x00000001 << DAC_SERIAL_CS_OUT_OFST)
+#define HV_SERIAL_DIGITAL_OUT_OFST      (8)
+#define HV_SERIAL_DIGITAL_OUT_MSK       (0x00000001 << HV_SERIAL_DIGITAL_OUT_OFST)
+#define HV_SERIAL_CLK_OUT_OFST          (9)
+#define HV_SERIAL_CLK_OUT_MSK           (0x00000001 << HV_SERIAL_CLK_OUT_OFST)
+#define HV_SERIAL_CS_OUT_OFST           (10)
+#define HV_SERIAL_CS_OUT_MSK            (0x00000001 << HV_SERIAL_CS_OUT_OFST)
+
+/* Control Register */
+#define CONTROL_REG                     (0x4F << 11) //(79 << 11) /** to hex */
+
+
+/* Reconfiguratble PLL Control Regiser */
+#define PLL_CONTROL_REG                 (0x51 << 11) //(81 << 11)/** to hex */
+
+//#define PLL_CTRL_RECONFIG_RST_OFST      (0)                                         //parameter reset
+//#define PLL_CTRL_RECONFIG_RST_MSK       (0x00000001 << PLL_CTRL_RECONFIG_RST_OFST)  //parameter reset
+//#define PLL_CTRL_WR_PARAMETER_OFST      (2)
+//#define PLL_CTRL_WR_PARAMETER_MSK       (0x00000001 << PLL_CTRL_WR_PARAMETER_OFST)
+#define PLL_CTRL_RST_OFST               (3)
+#define PLL_CTRL_RST_MSK                (0x00000001 << PLL_CTRL_RST_OFST)
+//#define PLL_CTRL_ADDR_OFST              (16)
+//#define PLL_CTRL_ADDR_MSK               (0x0000003F << PLL_CTRL_ADDR_OFST)
+
+/* Samples Register */
+#define NSAMPLES_REG                    (0x5D << 11) //93<<11
+
+/* Power On Register */
+#define POWER_ON_REG                    (0x5e<<11)
+
+#define POWER_ENABLE_OFST               (16)
+
+/* Dac Registers */
+#define DAC_VAL_REG                     (0x79 << 11) //121<<11
+#define DAC_NUM_REG                     (0x80 << 11) //122<<11
+#define DAC_VAL_OUT_REG                 (0x2A << 11) //42<<11
+
+#endif
+

slsDetectorServers/mythen3DetectorServer/ansi.h

@@ -0,0 +1 @@
+../../slsReceiverSoftware/include/ansi.h

slsDetectorServers/mythen3DetectorServer/blackfin.h

@@ -0,0 +1 @@
+/afs/psi.ch/project/mythen/marie_a/MythenServer/slsDetectorPackage/slsDetectorSoftware/slsDetectorServer/blackfin.h

slsDetectorServers/mythen3DetectorServer/commonServerFunctions.h

@@ -0,0 +1 @@
+../slsDetectorServer/commonServerFunctions.h

slsDetectorServers/mythen3DetectorServer/communication_funcs.c

@@ -0,0 +1 @@
+../commonFiles/communication_funcs.c

slsDetectorServers/mythen3DetectorServer/communication_funcs.h

@@ -0,0 +1 @@
+../commonFiles/communication_funcs.h

slsDetectorServers/mythen3DetectorServer/gitInfo.txt

@@ -0,0 +1,9 @@
+Path: slsDetectorsPackage/slsDetectorSoftware/jungfrauDetectorServer 
+URL: origin git@git.psi.ch:sls_detectors_software/slsDetectorPackage.git 
+Repository Root: origin git@git.psi.ch:sls_detectors_software/slsDetectorPackage.git 
+Repsitory UUID: 2f3dc8d109de8607f3217cf429619073dc9cc60e 
+Revision: 103 
+Branch: developer 
+Last Changed Author: Dhanya_Maliakal 
+Last Changed Rev: 3397 
+Last Changed Date: 2017-12-04 18:23:05.000000002 +0100 ./RegisterDefs.h

slsDetectorServers/mythen3DetectorServer/gitInfoMythen3.h

@@ -0,0 +1,6 @@
+#define GITURL "git@git.psi.ch:sls_detectors_software/slsDetectorPackage.git"
+#define GITREPUUID "2f3dc8d109de8607f3217cf429619073dc9cc60e"
+#define GITAUTH "Dhanya_Maliakal"
+#define GITREV 0x3397
+#define GITDATE 0x20171204
+#define GITBRANCH "developer"

slsDetectorServers/mythen3DetectorServer/gitInfoMythen3Tmp.h

@@ -0,0 +1,6 @@
+#define GITURL ""
+#define GITREPUUID ""
+#define GITAUTH ""
+#define GITREV ""
+#define GITDATE ""
+#define GITBRANCH ""

slsDetectorServers/mythen3DetectorServer/programfpga.h

@@ -0,0 +1 @@
+../slsDetectorServer/programfpga.h

slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.h

@@ -0,0 +1 @@
+../slsDetectorServer/slsDetectorFunctionList.h

slsDetectorServers/mythen3DetectorServer/slsDetectorServer.c

@@ -0,0 +1 @@
+../slsDetectorServer/slsDetectorServer.c

slsDetectorServers/mythen3DetectorServer/slsDetectorServer_defs.h

@@ -0,0 +1,167 @@
+/*
+ * mythen3Server_defs.h
+ *
+ *  Created on: Jan 24, 2013
+ *      Author: l_maliakal_d, changed my Marie A.
+ */
+
+#ifndef SLSDETECTORSERVER_DEFS_H_
+#define SLSDETECTORSERVER_DEFS_H_
+
+#include "sls_detector_defs.h"
+#include <stdint.h>
+
+/** This is only an example file!!! */
+
+
+
+#define GOODBYE 			(-200)
+enum DACINDEX			    {vIpre, vIbias, Vrf, VrfSh, vIinSh, VdcSh, Vth2, VPL, Vth1, Vth3, Vtrim, casSh, cas, vIbiasSh, vIcin, VPH, NC, vIpreOut, V_D, V_CHIP, V_C, V_B, V_A, V_IO, V_LIM}; // Mythen 3.01
+enum PWRINDEX               {PWR_IO, PWR_A, PWR_B, PWR_C, PWR_D, PWR_CHIP=-1, PWR_LIMIT=-1};
+enum CLKINDEX               {RUN_CLK_C, ADC_CLK_C, SYNC_CLK_C, DBIT_CLK_C};
+
+#define DEFAULT_DAC_VALS    {   2150,	/* vIpre 	*/ \
+							    1200,	/* vIbias 	*/ \
+							    900,	/* Vrf 		*/ \
+							    1050,	/* VrfSh	*/ \
+							    1400,	/* vIinSh	*/ \
+							    655, 	/* VdcSh	*/ \
+							    850, 	/* Vth2		*/ \
+							    1400,	/* VPL		*/ \
+							    850,	/* Vth1		*/ \
+							    850,	/* Vth3		*/ \
+							    2294,	/* Vtrim	*/ \
+							    983,	/* casSh	*/ \
+                                1474,	/* cas 		*/ \
+							    1200, 	/* vIbiasSh	*/ \
+							    1600,	/* vIcin	*/ \
+							    1520,	/* VPH		*/ \
+							    0,		/* NC 		*/ \
+							    1000	/* vIpreOut	*/ \
+							    0       /* V_D      */ \
+							    0       /* V_CHIP   */ \
+							    0       /* V_C      */ \
+							    1335    /* V_B      */ \
+							    1335    /* V_A      */ \
+							    1350    /* V_IO     */ \
+						    };
+
+#define DEFAULT_DAC_NAMES  {    "vIpre",    \
+						        "vIbias",   \
+						        "Vrf",      \
+						        "VrfSh",    \
+						        "vIinSh",   \
+						        "VdcSh",    \
+						        "Vth2",     \
+						        "VPL",      \
+						        "Vth1",     \
+						        "Vth3",     \
+						        "Vtrim",    \
+						        "casSh",    \
+						        "cas",      \
+						        "vIbiasSh", \
+						        "vIcin",    \
+                                "VPH",      \
+                                "NC",       \
+						        "vIpreOut"  \
+						        "v_d"       \
+						        "v_chip"    \
+						        "v_c"       \
+						        "v_b"       \
+						        "v_a"       \
+						        "v_io"      \
+						    };
+
+/*Hardware Definitions */
+#define NMAXMOD             (1)
+#define NMOD                (1)
+#define NCHAN               (32)
+#define NCHIP               (1)
+#define NADC                (0)
+#define NDAC                (24)
+#define NDAC_PER_SET        (8)
+
+
+#define NPWR                (5)
+#define MAX_DACVOLTVAL      (2500) //mV
+#define MAX_DACVAL          (4096) // dac val
+#define MAX_VCHIPVAL        (2700) //mV /** name ???? */
+#define MIN_VCHIP_OFSTVAL   (200) //mV /** name ???? */
+#define MIN_VCHIP_VAL       (600) //mV /** name ???? */
+
+
+/** Default Parameters */
+#define DEFAULT_NUM_FRAMES          (1)
+#define DEFAULT_NUM_CYCLES          (1)
+#define DEFAULT_EXPTIME             (200*1000)       //ns
+#define DEFAULT_PERIOD              (1*1000*1000)   //ns
+#define DEFAULT_DELAY               (0)
+#define DEFAULT_HIGH_VOLTAGE        (0)
+#define DEFAULT_TIMING_MODE         (AUTO_TIMING)
+
+
+/* Defines in the Firmware */
+#define FIX_PATT_VAL        (0xACDC1980)
+
+/* LTC2620 DAC DEFINES */
+#define LTC2620_DAC_CMD_OFST        (20)
+#define LTC2620_DAC_CMD_MSK         (0x0000000F << LTC2620_DAC_CMD_OFST)
+#define LTC2620_DAC_ADDR_OFST       (16)
+#define LTC2620_DAC_ADDR_MSK        (0x0000000F << LTC2620_DAC_ADDR_OFST)
+#define LTC2620_DAC_DATA_OFST       (4)
+#define LTC2620_DAC_DATA_MSK        (0x00000FFF << LTC2620_DAC_DATA_OFST)
+
+#define LTC2620_DAC_CMD_WRITE       (0x00000000 << LTC2620_DAC_CMD_OFST)
+#define LTC2620_DAC_CMD_SET         (0x00000003 << LTC2620_DAC_CMD_OFST)
+#define LTC2620_DAC_CMD_POWER_DOWN  (0x00000004 << LTC2620_DAC_CMD_OFST)
+#define LTC2620_DAC_NUMBITS         (24)
+
+/** PLL Reconfiguration Registers */
+//https://www.altera.com/documentation/mcn1424769382940.html
+#define PLL_MODE_REG                (0x00)
+#define PLL_STATUS_REG              (0x01)
+#define PLL_START_REG               (0x02)
+#define PLL_N_COUNTER_REG           (0x03)
+#define PLL_M_COUNTER_REG           (0x04)
+#define PLL_C_COUNTER_REG           (0x05)
+#define PLL_PHASE_SHIFT_REG         (0x06)
+
+#define PLL_SHIFT_NUM_SHIFTS_OFST   (0)
+#define PLL_SHIFT_NUM_SHIFTS_MSK    (0x0000FFFF << PLL_SHIFT_NUM_SHIFTS_OFST)
+
+#define PLL_SHIFT_CNT_SELECT_OFST   (16)
+#define PLL_SHIFT_CNT_SELECT_MSK    (0x0000001F << PLL_SHIFT_CNT_SELECT_OFST)
+#define PLL_SHIFT_CNT_SLCT_C0_VAL   ((0x0 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C1_VAL   ((0x1 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C2_VAL   ((0x2 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C3_VAL   ((0x3 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C4_VAL   ((0x4 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C5_VAL   ((0x5 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C6_VAL   ((0x6 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C7_VAL   ((0x7 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C8_VAL   ((0x8 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C9_VAL   ((0x9 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C10_VAL  ((0x10 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C11_VAL  ((0x11 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C12_VAL  ((0x12 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C13_VAL  ((0x13 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C14_VAL  ((0x14 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C15_VAL  ((0x15 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C16_VAL  ((0x16 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+#define PLL_SHIFT_CNT_SLCT_C17_VAL  ((0x17 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)
+
+#define PLL_SHIFT_UP_DOWN_OFST      (21)
+#define PLL_SHIFT_UP_DOWN_MSK       (0x00000001 << PLL_SHIFT_UP_DOWN_OFST)
+#define PLL_SHIFT_UP_DOWN_NEG_VAL   ((0x0 << PLL_SHIFT_UP_DOWN_OFST) & PLL_SHIFT_UP_DOWN_MSK)
+#define PLL_SHIFT_UP_DOWN_POS_VAL   ((0x1 << PLL_SHIFT_UP_DOWN_OFST) & PLL_SHIFT_UP_DOWN_MSK)
+
+#define PLL_K_COUNTER_REG           (0x07)
+#define PLL_BANDWIDTH_REG           (0x08)
+#define PLL_CHARGEPUMP_REG          (0x09)
+#define PLL_VCO_DIV_REG             (0x1c)
+#define PLL_MIF_REG                 (0x1f)
+
+#define PLL_VCO_FREQ_MHZ 400
+
+
+#endif /* SLSDETECTORSERVER_DEFS_H_ */

slsDetectorServers/mythen3DetectorServer/slsDetectorServer_funcs.c

@@ -0,0 +1 @@
+../slsDetectorServer/slsDetectorServer_funcs.c

slsDetectorServers/mythen3DetectorServer/slsDetectorServer_funcs.h

@@ -0,0 +1 @@
+../slsDetectorServer/slsDetectorServer_funcs.h

slsDetectorServers/mythen3DetectorServer/sls_detector_defs.h

@@ -0,0 +1 @@
+../commonFiles/sls_detector_defs.h

slsDetectorServers/mythen3DetectorServer/sls_detector_funcs.h

@@ -0,0 +1 @@
+../commonFiles/sls_detector_funcs.h

slsDetectorServers/mythen3DetectorServer/sls_receiver_defs.h

@@ -0,0 +1 @@
+../../slsReceiverSoftware/include/sls_receiver_defs.h

slsDetectorServers/mythen3DetectorServer/sls_receiver_funcs.h

@@ -0,0 +1 @@
+../../slsReceiverSoftware/include/sls_receiver_funcs.h

slsDetectorServers/mythen3DetectorServer/updateGitVersion.sh

@@ -0,0 +1,31 @@
+SERVER=jungfrauDetectorServer
+MAINDIR=slsDetectorsPackage
+SPECDIR=slsDetectorSoftware/$SERVER
+TMPFILE=gitInfoJungfrauTmp.h
+INCLFILE=gitInfoJungfrau.h
+
+
+#evaluate the variables
+EVALFILE=../../evalVersionVariables.sh
+source $EVALFILE
+
+
+#get modified date
+#RDATE1='git log --pretty=format:"%ci" -1'
+RDATE1="find ../slsDetectorServer . -type f -exec stat --format '%Y :%y %n' '{}' \; | sort -nr | cut -d: -f2- | egrep -v 'gitInfo|bin|.git|updateGitVersion|.o' | head -n 1"
+RDATE=`eval $RDATE1`
+NEWDATE=$(sed "s/-//g" <<< $RDATE | awk '{print $1;}') 
+NEWDATE=${NEWDATE/#/0x}
+
+
+#get old date from INCLFILE
+OLDDATE=$(more $INCLFILE | grep '#define GITDATE' | awk '{print $3}')
+
+
+#update INCLFILE if changes
+if [ "$OLDDATE" != "$NEWDATE" ]; then
+	echo Path: ${MAINDIR}/${SPECDIR}  $'\n'URL: ${GITREPO}  $'\n'Repository Root: ${GITREPO}  $'\n'Repsitory UUID: ${REPUID}  $'\n'Revision: ${FOLDERREV}  $'\n'Branch: ${BRANCH}  $'\n'Last Changed Author: ${AUTH1}_${AUTH2}  $'\n'Last Changed Rev: ${REV}  $'\n'Last Changed Date: ${RDATE} > gitInfo.txt 
+	cd ../../
+	./genVersionHeader.sh $SPECDIR/gitInfo.txt $SPECDIR/$TMPFILE $SPECDIR/$INCLFILE 
+	cd $WD
+fi