diff --git a/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.c b/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.c index f0bee3302..5ce768dae 100755 --- a/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.c +++ b/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.c @@ -63,6 +63,7 @@ typedef struct ip_header_struct { u_int32_t CSP0BASE; int highvoltage = 0; +int dacValues[NDAC]; @@ -80,7 +81,6 @@ int nSamples=1; size_t dataBytes=NMAXMOD*NCHIP*NCHAN*2; int storeInRAM=0; int ROI_flag=0; -int adcConfigured=-1; int ram_size=0; int64_t totalTime=1; @@ -145,55 +145,54 @@ int mapCSP0(void) { } - -void defineGPIOpins(){ - //define the gpio pins - system("echo 7 > /sys/class/gpio/export"); - system("echo 9 > /sys/class/gpio/export"); - //define their direction - system("echo in > /sys/class/gpio/gpio7/direction"); - system("echo out > /sys/class/gpio/gpio9/direction"); +u_int16_t bus_w16(u_int32_t offset, u_int16_t data) { + volatile u_int16_t *ptr1; + ptr1=(u_int16_t*)(CSP0BASE+offset*2); + *ptr1=data; + return OK; } -void resetFPGA(){ - cprintf(BLUE,"\n*** Reseting FPGA ***\n"); - FPGAdontTouchFlash(); - FPGATouchFlash(); - usleep(250*1000); +u_int16_t bus_r16(u_int32_t offset){ + volatile u_int16_t *ptr1; + ptr1=(u_int16_t*)(CSP0BASE+offset*2); + return *ptr1; } -void FPGAdontTouchFlash(){ - //tell FPGA to not touch flash - system("echo 0 > /sys/class/gpio/gpio9/value"); - //usleep(100*1000); +/** ramType is DARK_IMAGE_REG or GAIN_IMAGE_REG */ +u_int16_t ram_w16(u_int32_t ramType, int adc, int adcCh, int Ch, u_int16_t data) { + unsigned int adr = (ramType | adc << 8 | adcCh << 5 | Ch ); + // printf("Writing to addr:%x\n",adr); + return bus_w16(adr,data); } -void FPGATouchFlash(){ - //tell FPGA to touch flash to program itself - system("echo 1 > /sys/class/gpio/gpio9/value"); +/** ramType is DARK_IMAGE_REG or GAIN_IMAGE_REG */ +u_int16_t ram_r16(u_int32_t ramType, int adc, int adcCh, int Ch){ + unsigned int adr = (ramType | adc << 8 | adcCh << 5 | Ch ); + // printf("Reading from addr:%x\n",adr); + return bus_r16(adr); } -int powerChip (int on){ - if(on != -1){ - if(on){ - printf("\nPowering on the chip\n"); - bus_w(POWER_ON_REG,0x1); - } - else{ - printf("\nPowering off the chip\n"); - bus_w(POWER_ON_REG,0x0); - } - } - - return bus_r(POWER_ON_REG); +u_int32_t bus_w(u_int32_t offset, u_int32_t data) { + volatile u_int32_t *ptr1; + ptr1=(u_int32_t*)(CSP0BASE+offset*2); + *ptr1=data; + return OK; } +u_int32_t bus_r(u_int32_t offset) { + volatile u_int32_t *ptr1; + ptr1=(u_int32_t*)(CSP0BASE+offset*2); + return *ptr1; +} + + + void initializeDetector(){ printf("Initializing Detector\n"); //initial test - if ( (testFpga() == FAIL) || (testBus() == FAIL) || (checkType() == FAIL)) { /*Check with Carlos if type check required */ + if ( (testFpga() == FAIL) || (testBus() == FAIL) || (checkType() == FAIL)) { cprintf(BG_RED, "Dangerous to continue. Goodbye!\n"); exit(-1); } @@ -212,62 +211,36 @@ void initializeDetector(){ initDetector(); #endif - - - - - - - - - - - /*some registers set, which is in common with jungfrau, please check */ + /*some registers set, please check */ prepareADC(); - /*some registers set, which is in common with jungfrau, please check */ - /*initDac(0); initDac(8); Carlos later need to initialize dac 0 and dac8 doesnt exist */ //initializes the two dacs + // initialize dac series + initDac(0); /* todo might work without */ + initDac(8); //only for old board compatibility //set dacs - printf("Setting Default Dac values\n"); - enum dacNames{VB_COMP,VDD_PROT,VIN_COM,VREF_PRECH,VB_PIXBUF,VB_DS,VREF_DS,VREF_COMP}; - int retval = -1; - int dacvalues[8][2]={ - {VB_COMP, 1220}, - {VDD_PROT, 3000}, - {VIN_COM, 1053}, - {VREF_PRECH,1450}, - {VB_PIXBUF, 750}, - {VB_DS, 1000}, - {VREF_DS, 480}, - {VREF_COMP, 420}, - }; - for(i=0;i<8;++i){ - retval=setDac(dacvalues[i][0], dacvalues[i][1]); - if(retval!=dacvalues[i][1]) - printf("Error: Setting dac %d failed, wrote %d, read %d\n",dacvalues[i][0],dacvalues[i][1],retval); + printf("Setting Default Dac values\n") + { + int i = 0; + int retval = -1; + const int defaultvals[NDAC] = DEFAULT_DAC_VALS; + for(i = 0; i < NDAC; ++i) { + retval = setDac(i, defaultvals[i]); + if (retval != defaultvals[i]) + cprintf(RED, "Error: Setting dac %d failed, wrote %d, read %d\n",i ,defaultvals[i], retval); + } } - - //done from config file - //printf("\nPowering on the chip\n"); - //bus_w(POWER_ON_REG,0x1); - /* Only once */ bus_w(CONFGAIN_REG,0x0); - printf("Resetting ADC\n"); - writeADC(ADCREG1,0x3); writeADC(ADCREG1,0x0); - writeADC(ADCREG2,0x40); - writeADC(ADCREG3,0xf); - writeADC(ADCREG4,0x3f); - printf("Configuring Vrefs\n"); - writeADC(ADCREG_VREFS,0x2); - printf("Setting ADC Inversion\n");// (by trial and error) - bus_w(ADC_INVERSION_REG,0x453b2a9c); + configureAdc(); + printf("Setting ADC Port Invert Reg to 0x%08x\n", ADC_PORT_INVERT_VAL); + bus_w(ADC_PORT_INVERT_REG, ADC_PORT_INVERT_VAL); + printf("Setting ADC Offset Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL); + bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL); - adcPipeline(HALFSPEED_ADC_PIPELINE); - dbitPipeline(HALFSPEED_DBIT_PIPELINE); + bus_w(DBIT_PIPELINE_REG,HALFSPEED_DBIT_PIPELINE); adcPhase(HALFSPEED_ADC_PHASE); //set adc_clock_phase in unit of 1/(52) clock period (by trial and error) printf("Reset mem machine fifos\n"); @@ -277,23 +250,20 @@ void initializeDetector(){ bus_w(MEM_MACHINE_FIFOS_REG,0x0400); bus_w(MEM_MACHINE_FIFOS_REG,0x0); initSpeedConfGain(HALFSPEED_CONF); - setSettings(DYNAMICGAIN,-1); - - + setSettings(DEFAULT_SETTINGS,-1); //Initialization of acquistion parameters - setFrames(1*1000*1000); - setTrains(-1); - setExposureTime(10*1000); - setPeriod(2*1000*1000); - setDelay(0); - setGates(0); - initHighVoltage(0); /* ask Carlos Set it to a value so server is always updated in a get*/ + setFrames(DEFAULT_NUM_FRAMES); + setTrains(DEFAULT_NUM_CYCLES); + setExposureTime(DEFAULT_EXPTIME); + setPeriod(DEFAULT_PERIOD); + setDelay(DEFAULT_DELAY); + setGates(DEFAULT_NUM_GATES); + setHighVoltage(DEFAULT_HIGH_VOLTAGE); setTiming(GET_EXTERNAL_COMMUNICATION_MODE); setMaster(GET_MASTER); setSynchronization(GET_SYNCHRONIZATION_MODE); - } int checkType() { @@ -323,49 +293,872 @@ void printVersions() { } -u_int16_t bus_r16(u_int32_t offset){ - volatile u_int16_t *ptr1; - ptr1=(u_int16_t*)(CSP0BASE+offset*2); - return *ptr1; -} -u_int16_t bus_w16(u_int32_t offset, u_int16_t data) { - volatile u_int16_t *ptr1; - ptr1=(u_int16_t*)(CSP0BASE+offset*2); - *ptr1=data; + + + +int testFifos(void) { + printf("Fifo test not implemented!\n"); return OK; } -/** ramType is DARK_IMAGE_REG or GAIN_IMAGE_REG */ -u_int16_t ram_w16(u_int32_t ramType, int adc, int adcCh, int Ch, u_int16_t data) { - unsigned int adr = (ramType | adc << 8 | adcCh << 5 | Ch ); - // printf("Writing to addr:%x\n",adr); - return bus_w16(adr,data); +u_int32_t testFpga(void) { + printf("\nTesting FPGA...\n"); + + //fixed pattern + int ret = OK; + volatile u_int32_t val = bus_r(FIX_PATT_REG); + if (val == FIX_PATT_VAL) { + printf("Fixed pattern: successful match 0x%08x\n",val); + } else { + cprintf(RED,"Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL); + ret = FAIL; + } + printf("\n"); + return ret; } -/** ramType is DARK_IMAGE_REG or GAIN_IMAGE_REG */ -u_int16_t ram_r16(u_int32_t ramType, int adc, int adcCh, int Ch){ - unsigned int adr = (ramType | adc << 8 | adcCh << 5 | Ch ); - // printf("Reading from addr:%x\n",adr); - return bus_r16(adr); +u_int32_t testRAM(void) { + int result=OK; + printf("RAM Test not implemented!\n"); + return result; } -u_int32_t bus_w(u_int32_t offset, u_int32_t data) { - volatile u_int32_t *ptr1; +int testBus() { + printf("\nTesting Bus...\n"); - ptr1=(u_int32_t*)(CSP0BASE+offset*2); - *ptr1=data; + int ret = OK; + u_int32_t addr = SET_DELAY_LSB_REG; + int times = 1000 * 1000; + int i = 0; + + for (i = 0; i < times; ++i) { + bus_w(addr, i * 100); + if (i * 100 != bus_r(SET_DELAY_LSB_REG)) { + cprintf(RED,"ERROR: Mismatch! Wrote 0x%x, read 0x%x\n", i * 100, bus_r(SET_DELAY_LSB_REG)); + ret = FAIL; + } + } + + if (ret == OK) + printf("Successfully tested bus %d times\n", times); + + printf("\n"); + return ret; +} + + + + + +u_int64_t getDetectorNumber() { + char output[255],mac[255]=""; + u_int64_t res=0; + FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + //getting rid of ":" + char * pch; + pch = strtok (output,":"); + while (pch != NULL){ + strcat(mac,pch); + pch = strtok (NULL, ":"); + } + sscanf(mac,"%llx",&res); + return res; +} + +u_int64_t getFirmwareVersion() { + return ((bus_r(FPGA_VERSION_REG) & BOARD_REVISION_MSK) >> BOARD_REVISION_OFST); +} + +int64_t getId(enum idMode arg) { + int64_t retval = -1; + + switch(arg){ + case DETECTOR_SERIAL_NUMBER: + retval = getDetectorNumber(); + break; + case DETECTOR_FIRMWARE_VERSION: + retval=getFirmwareSVNVersion(); + retval=(retval <<32) | getFirmwareVersion(); + break; + case DETECTOR_SOFTWARE_VERSION: + retval= SVNREV; + retval= (retval <<32) | SVNDATE; + break; + default: + printf("Required unknown id %d \n", arg); + break; + } + return retval; +} + + + + + +void defineGPIOpins(){ + //define the gpio pins + system("echo 7 > /sys/class/gpio/export"); + system("echo 9 > /sys/class/gpio/export"); + //define their direction + system("echo in > /sys/class/gpio/gpio7/direction"); + system("echo out > /sys/class/gpio/gpio9/direction"); +} + +void resetFPGA(){ + cprintf(BLUE,"\n*** Reseting FPGA ***\n"); + FPGAdontTouchFlash(); + FPGATouchFlash(); + usleep(250*1000); +} + +void FPGAdontTouchFlash(){ + //tell FPGA to not touch flash + system("echo 0 > /sys/class/gpio/gpio9/value"); + //usleep(100*1000); +} + +void FPGATouchFlash(){ + //tell FPGA to touch flash to program itself + system("echo 1 > /sys/class/gpio/gpio9/value"); +} + + +void eraseFlash(){ +#ifdef VERY_VERBOSE + printf("\n at eraseFlash \n"); +#endif + + char command[255]; + sprintf(command,"flash_eraseall %s",mtdvalue); + system(command); + printf("flash erased\n"); +} + + +int startWritingFPGAprogram(FILE** filefp){ +#ifdef VERY_VERBOSE + printf("\n at startWritingFPGAprogram \n"); +#endif + + //getting the drive + char output[255]; + FILE* fp = popen("awk \'$4== \"\\\"bitfile(spi)\\\"\" {print $1}\' /proc/mtd", "r"); + fgets(output, sizeof(output), fp); + pclose(fp); + strcpy(mtdvalue,"/dev/"); + char* pch = strtok(output,":"); + if(pch == NULL){ + cprintf(RED,"Could not get mtd value\n"); + return FAIL; + } + strcat(mtdvalue,pch); + printf ("\nFlash drive found: %s\n",mtdvalue); + + + FPGAdontTouchFlash(); + + //writing the program to flash + *filefp = fopen(mtdvalue, "w"); + if(*filefp == NULL){ + cprintf(RED,"Unable to open %s in write mode\n",mtdvalue); + return FAIL; + } + printf("flash ready for writing\n"); return OK; } +int stopWritingFPGAprogram(FILE* filefp){ +#ifdef VERY_VERBOSE + printf("\n at stopWritingFPGAprogram \n"); +#endif -u_int32_t bus_r(u_int32_t offset) { - volatile u_int32_t *ptr1; - ptr1=(u_int32_t*)(CSP0BASE+offset*2); - return *ptr1; + int wait = 0; + if(filefp!= NULL){ + fclose(filefp); + wait = 1; + } + + //touch and program + FPGATouchFlash(); + + if(wait){ +#ifdef VERY_VERBOSE + printf("Waiting for FPGA to program from flash\n"); +#endif + //waiting for success or done + char output[255]; + int res=0; + while(res == 0){ + FILE* sysFile = popen("cat /sys/class/gpio/gpio7/value", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + sscanf(output,"%d",&res); +#ifdef VERY_VERBOSE + printf("gpi07 returned %d\n",res); +#endif + } + } + printf("FPGA has picked up the program from flash\n\n"); + + + return OK; } +int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp){ +#ifdef VERY_VERBOSE + printf("\n at writeFPGAProgram \n"); + cprintf(BLUE,"address of fpgasrc:%p\n",(void *)fpgasrc); + cprintf(BLUE,"fsize:%d\n",fsize); + cprintf(BLUE,"pointer:%p\n",(void*)filefp); +#endif + + if(fwrite((void*)fpgasrc , sizeof(char) , fsize , filefp )!= fsize){ + cprintf(RED,"Could not write FPGA source to flash\n"); + return FAIL; + } +#ifdef VERY_VERBOSE + cprintf(BLUE,"program written to flash\n"); +#endif + return OK; +} + + + + + + + + +long int calcChecksum(int sourceip, int destip) { + + ip_header ip; + int count; + unsigned short *addr; + long int sum = 0; + long int checksum; +/**carlos ip packet size fixed in firmware? 0x2036? */ + ip.ip_ver = 0x4; + ip.ip_ihl = 0x5; + ip.ip_tos = 0x0; + ip.ip_len = 0x2052; //ipPacketSize;//fixed in firmware + ip.ip_ident = 0x0000; + ip.ip_flag = 0x2; //not nibble aligned (flag& offset + ip.ip_offset = 0x000; + ip.ip_ttl = 0x40; + ip.ip_protocol = 0x11; + ip.ip_chksum = 0x0000 ; // pseudo + ip.ip_sourceip = sourceip; + ip.ip_destip = destip; + + count = sizeof(ip); + addr =& (ip); /* warning: assignment from incompatible pointer type */ + while( count > 1 ) { + sum += *addr++; + count -= 2; + } + if (count > 0) sum += *addr; // Add left-over byte, if any + while (sum>>16) sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits + checksum = (~sum) & 0xffff; + + printf("IP checksum is 0x%lx\n",checksum); + + return checksum; +} + + + +void configureMAC(uint32_t destip,uint64_t destmac,uint64_t sourcemac,int sourceip,int ival,uint32_t destport) { + uint32_t sourceport = DEFAULT_TX_UDP_PORT; + long int checksum=calcChecksum(sourceip, destip); + + bus_w(TX_IP_REG, sourceip); + bus_w(RX_IP_REG, destip); + bus_w(RX_MAC_LSB_REG, (destmac << RX_MAC_LSB_OFST) & RX_MAC_LSB_MSK); + bus_w(RX_MAC_MSB_REG, (destmac << RX_MAC_MSB_OFST) & RX_MAC_MSB_MSK); + bus_w(TX_MAC_LSB_REG, (sourcemac << TX_MAC_LSB_OFST) & TX_MAC_LSB_MSK); + bus_w(TX_MAC_MSB_REG, (sourcemac << TX_MAC_MSB_OFST) & TX_MAC_MSB_MSK); + bus_w(UDP_PORT_REG, + ((sourceport << UDP_PORT_TX_OFST) & UDP_PORT_TX_MSK) | + ((destport << UDP_PORT_RX_OFST) & UDP_PORT_RX_MSK)); + bus_w(TX_IP_CHECKSUM_REG,(checksum << TX_IP_CHECKSUM_OFST) & TX_IP_CHECKSUM_MSK); + + printf("Reset mem machine fifos\n"); + bus_w(MEM_MACHINE_FIFOS_REG,0x4000); + bus_w(MEM_MACHINE_FIFOS_REG,0x0); + printf("Reset run control\n"); + bus_w(MEM_MACHINE_FIFOS_REG,0x0400); + bus_w(MEM_MACHINE_FIFOS_REG,0x0); + + usleep(500 * 1000); +} + + + + + + + + +// program dacq settings + +int64_t set64BitReg(int64_t value, int aLSB, int aMSB){ + int64_t v64; + u_int32_t vLSB,vMSB; + if (value!=-1) { + vLSB=value&(0xffffffff); + bus_w(aLSB,vLSB); + v64=value>> 32; + vMSB=v64&(0xffffffff); + bus_w(aMSB,vMSB); + } + return get64BitReg(aLSB, aMSB); + +} + +int64_t get64BitReg(int aLSB, int aMSB){ + int64_t v64; + u_int32_t vLSB,vMSB; + vLSB=bus_r(aLSB); + vMSB=bus_r(aMSB); + v64=vMSB; + v64=(v64<<32) | vLSB; + + printf("reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, v64); + + return v64; +} + +int64_t setFrames(int64_t value){ + if(value!=-1) + printf("\nSetting number of frames to %lld\n",(long long int)value); + + int64_t retval = set64BitReg(value, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); + printf("Getting number of frames: %lld\n",(long long int)retval); + return retval; +} + +int64_t getFrames(){ + return get64BitReg(GET_FRAMES_LSB_REG, GET_FRAMES_MSB_REG); +} + +int64_t setExposureTime(int64_t value){ + if (value!=-1){ + printf("\nSetting exptime to %lldns\n",(long long int)value); + value*=(1E-3*clockdivider_exptime); + } + int64_t retval = set64BitReg(value,SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG)/(1E-3*clockdivider_exptime);//(1E-9*CLK_FREQ); + printf("Getting exptime: %lldns\n",(long long int)retval); + return retval; +} + +int64_t getExposureTime(){ + return get64BitReg(GET_EXPTIME_LSB_REG, GET_EXPTIME_MSB_REG)/(1E-3*clockdivider_exptime);//(1E-9*CLK_FREQ); +} + +int64_t setGates(int64_t value){ + if(value!=-1) + printf("\nSetting number of gates to %lld\n",(long long int)value); + + int64_t retval = set64BitReg(value, SET_GATES_LSB_REG, SET_GATES_MSB_REG); + printf("Getting number of gates: %lld\n",(long long int)retval); + return retval; +} + +int64_t getGates(){ + return get64BitReg(GET_GATES_LSB_REG, GET_GATES_MSB_REG); +} + +int64_t setDelay(int64_t value){ + if (value!=-1){ + printf("\nSetting delay to %lldns\n",(long long int)value); + value*=(1E-3*clockdivider_fc); + } + + int64_t retval = set64BitReg(value,SET_DELAY_LSB_REG, SET_DELAY_MSB_REG)/(1E-3*clockdivider_fc);//(1E-9*CLK_FREQ); + printf("Getting delay: %lldns\n",(long long int)retval); + return retval; +} + +int64_t getDelay(){ + return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG)/(1E-3*clockdivider_fc);//(1E-9*CLK_FREQ); +} + +int64_t setPeriod(int64_t value){ + if (value!=-1){ + printf("\nSetting period to %lldns\n",(long long int)value); + value*=(1E-3*clockdivider_fc); + } + + int64_t retval = set64BitReg(value,SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/(1E-3*clockdivider_fc);//(1E-9*CLK_FREQ); + printf("Getting period: %lldns\n",(long long int)retval); + return retval; +} + +int64_t getPeriod(){ + return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG)/(1E-3*clockdivider_fc);//(1E-9*CLK_FREQ); +} + +int64_t setTrains(int64_t value){ + if(value!=-1) + printf("\nSetting number of cycles to %lld\n",(long long int)value); + + int64_t retval = set64BitReg(value, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); + printf("Getting number of cycles: %lld\n",(long long int)retval); + return retval; +} + +int64_t getTrains(){ + return get64BitReg(GET_CYCLES_LSB_REG, GET_CYCLES_MSB_REG); +} + +int64_t setProbes(int64_t value){ + return 0; +} + +int64_t getProbes(){ + return 0; +} + +int64_t setProgress() {/** carlos ? */ + return 0; +} + +int64_t getProgress() {/** carlos ? */ + //should be done in firmware!!!! + return 0; + +} + + +int64_t getActualTime(){ + return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG)/(1E-9*CLK_FREQ); +} + +int64_t getMeasurementTime(){ + int64_t v=get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG); + return v/(1E-9*CLK_FREQ); +} + +int64_t getFramesFromStart(){ + int64_t v1=get64BitReg(FRAMES_FROM_START_PG_LSB_REG, FRAMES_FROM_START_PG_MSB_REG); + printf("Frames from start run control %lld\n",v1); + return v1; +} + + + + + + +u_int32_t runBusy(void) { + u_int32_t s = ((runState() & RUN_BUSY_MSK) >> RUN_BUSY_OFST); +#ifdef VERBOSE + printf("status %04x\n",s); +#endif + return s; +} + + +u_int32_t runState(void) { + int s=bus_r(STATUS_REG); +#ifdef VERBOSE + printf("status %04x\n",s); +#endif + return s; +} + + + + + +// State Machine + +int startStateMachine(){ + //int i; + //#ifdef VERBOSE + printf("*******Starting State Machine*******\n"); + //#endif + // cleanFifo; + // fifoReset(); + //start state machine + bus_w16(CONTROL_REG, FIFO_RESET_BIT); /* Carlos Not implemented in firmware */ + bus_w16(CONTROL_REG, 0x0); + bus_w16(CONTROL_REG, START_ACQ_BIT | START_EXPOSURE_BIT); /* Carlos exposurebit Not implemented in firmware */ + bus_w16(CONTROL_REG, 0x0); + + printf("statusreg=%08x\n",bus_r(STATUS_REG)); + return OK; +} + + + + +int stopStateMachine(){ + //#ifdef VERBOSE + cprintf(BG_RED,"*******Stopping State Machine*******\n"); + //#endif + // for(i=0;i<100;i++){ + //stop state machine + bus_w16(CONTROL_REG, STOP_ACQ_BIT); + usleep(100); + bus_w16(CONTROL_REG, 0x0); + + printf("statusreg=%08x\n",bus_r(STATUS_REG)); + return OK; +} + + +int startReadOut(){ +#ifdef VERBOSE + printf("Starting State Machine Readout\n"); +#endif +#ifdef DEBUG + printf("State machine status is %08x\n",bus_r(STATUS_REG)); +#endif + bus_w16(CONTROL_REG, START_ACQ_BIT |START_READOUT_BIT); // start readout + usleep(100); + bus_w16(CONTROL_REG, 0x0); + return OK; +} + +enum runStatus getStatus() { +#ifdef VERBOSE + printf("Getting status\n"); +#endif + + enum runStatus s; + u_int32_t retval = runState(); + printf("\n\nSTATUS=%08x\n",retval); + + //running + if(((retval & RUN_BUSY_MSK) >> RUN_BUSY_OFST)) { + if ((retval & WAITING_FOR_TRIGGER_MSK) >> WAITING_FOR_TRIGGER_OFST) { + printf("-----------------------------------WAITING-----------------------------------\n"); + s=WAITING; + } + else{ + printf("-----------------------------------RUNNING-----------------------------------\n"); + s=RUNNING; + } + } + + //not running + else { + if ((retval & STOPPED_MSK) >> STOPPED_OFST) { + printf("-----------------------------------STOPPED--------------------------\n"); + s=STOPPED; + } else if ((retval & RUNMACHINE_BUSY_MSK) >> RUNMACHINE_BUSY_OFST) { + printf("-----------------------------------READ MACHINE BUSY--------------------------\n"); + s=TRANSMITTING; + } else if (!retval) { + printf("-----------------------------------IDLE--------------------------------------\n"); + s=IDLE; + } else { + printf("-----------------------------------Unknown status %08x--------------------------------------\n", retval); + s=ERROR; + } + /* Check with Carlos , I included IDLE and unknown status above + //and readbusy=0,idle + else if((!(retval&0xffff))||(retval==SOME_FIFO_FULL_BIT)){ + printf("-----------------------------------IDLE--------------------------------------\n"); + s=IDLE; + } else { + printf("-----------------------------------Unknown status %08x--------------------------------------\n", retval); + s=ERROR; + ret=FAIL; + }*/ + } + + return s; +} + + +void waitForAcquisitionEnd(){ + while(runBusy()){ + usleep(500); + } +} + + + + + + + + + +/** Carlos bit size shouldnt matter as the valw is all 16 bit and should be able to write with bus_w or bus_w16 */ +void serializeToSPI(int numbitstosend, u_int32_t val, u_int16_t csmask, int numbitstosend, u_int16_t clkmask, u_int16_t digoutmask, int digofset) { +#ifdef VERBOSE + if (numbitstosend == 16) + printf("Writing to ADC SPI Register: 0x%04x\n",val); + else + printf("Writing to SPI Register: 0x%08x\n", val); +#endif + + u_int16_t valw; + u_int32_t addr = (numbitstosend == 16) ? ADC_SPI_REG : SPI_REG; + + // start point + valw = 0xffff; /**todo testwith old board 0xff for adc_spi */ // old board compatibility (not using specific bits) + bus_w16 (addr, valw); + + // chip sel bar down + valw &= ~csmask; /* todo with test: done a bit different, not with previous value */ + bus_w16 (addr, valw); + + { + int i = 0; + for (i = 0; i < numbitstosend; ++i) { + + // clk down + valw &= ~clkmask; + bus_w16 (addr, valw); + + // write data (i) + valw = ((valw & ~digoutmask) + // unset bit + (((val >> (numbitstosend - 1 - i)) & 0x1) << digofset)); // each bit from val starting from msb + bus_w16 (addr, valw); + + // clk up + valw |= clkmask ; + bus_w16 (addr, valw); + } + } + + // chip sel bar up + valw |= csmask; /* todo with test: not done for spi */ + bus_w16 (addr, valw); + + //clk down + valw &= ~clkmask; + bus_w16 (addr, valw); + + // stop point = start point of course + valw = 0xffff; /**todo testwith old board 0xff for adc_spi */ // old board compatibility (not using specific bits) + bus_w16 (addr, valw); + + printf("\n"); +} + + + +void initDac(int dacnum) { + printf("\n Initializing dac for %d to \n",dacnum); + + u_int32_t codata; + int bitsize = 32; + int csdx = dacnum / NDAC + DAC_SERIAL_CS_OUT_OFST; // old board (16 dacs),so can be DAC_SERIAL_CS_OUT_OFST or +1 + int dacchannel = 0xf; // all channels + int dacvalue = 0x6; // can be any random value (just writing to power up) + printf("Write to Input Register\n" + "Chip select bit:%d\n" + "Dac Channel:0x%x\n3" + "Dac Value:0x%x", + csdx, dacchannel, dacvalue); + + codata = LTC2620_DAC_CMD_WRITE + // command to write to input register + ((dacchannel << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) + // all channels + ((dacvalue << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK); // any random value + serializeToSPI(bitsize, codata, (0x1 << csdx), LTC2620_DAC_NUMBITS, + DAC_SERIAL_CLK_OUT_MSK, DAC_SERIAL_DIGITAL_OUT_MSK, DAC_SERIAL_DIGITAL_OUT_OFST); +} + + +int setDac(int dacnum, int dacvalue){ + + u_int32_t codata; + int bitsize = 32; + int csdx = dacnum / NDAC + DAC_SERIAL_CS_OUT_OFST; // old board (16 dacs),so can be DAC_SERIAL_CS_OUT_OFST or +1 + int dacchannel = dacnum % NDAC; // 0-8, dac channel number (also for dacnum 9-15 in old board) + + if ( (dacvalue >= 0) || (dacvalue == -100)) { + printf("\n Setting of DAC %d with value %d\n",dacnum, dacvalue); + // command + if (dacvalue >= 0) { + printf("Write to Input Register and Update\n"); + codata = LTC2620_DAC_CMD_SET; + + } else if (dacvalue == -100) { + printf("POWER DOWN\n"); + codata = LTC2620_DAC_CMD_POWER_DOWN; + } + // address + printf("Chip select bit:%d\n" + "Dac Channel:0x%x\n3" + "Dac Value:0x%x", + csdx, dacchannel, dacvalue); + codata += ((dacchannel << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) + + ((dacvalue << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK); + // to spi + serializeToSPI(bitsize, codata, (0x1 << csdx), LTC2620_DAC_NUMBITS, + DAC_SERIAL_CLK_OUT_MSK, DAC_SERIAL_DIGITAL_OUT_MSK, DAC_SERIAL_DIGITAL_OUT_OFST); + + dacValues[dacnum] = dacvalue; + } else + printf("\nGetting DAC %d\n",dacnum); + return dacValues[dacnum]; +} + + + +int setHighVoltage(int val, int imod){ + + u_int32_t dacvalue; + int bitsize = 32; + float alpha = 0.55; + // setting hv + if (val >= 0) { + // limit values + if (val < 60) { + dacvalue = 0; + val = 60; + } else if (val >= 200) { + dacvalue = 0x1; + val = 200; + } else { + dacvalue = 1. + (200.-val) / alpha; + val=200.-(dacvalue-1)*alpha; + } + printf ("\n Setting High voltage to %d (dacval %d)\n",val, dacvalue); + dacvalue &= MAX1932_HV_DATA_MSK; + serializeToSPI(bitsize, dacvalue, HV_SERIAL_CS_OUT_MSK, MAX1932_HV_NUMBITS, + HV_SERIAL_CLK_OUT_MSK, HV_SERIAL_DIGITAL_OUT_MSK, HV_SERIAL_DIGITAL_OUT_OFST); + highvoltage = val; + } + return highvoltage; +} + + + +void setAdc(int addr, int val) { + + u_int32_t codata; + int bitsize = 16; + codata = val + (addr << 8); + printf("\n Setting Adc spi register. Addr: 0x%04x Value: 0x%04x\n", addr, val); + serializeToSPI(bitsize, codata, ADC_SERIAL_CS_OUT_MSK, AD9257_ADC_NUMBITS, + ADC_SERIAL_CLK_OUT_MSK, ADC_SERIAL_DATA_OUT_MSK, ADC_SERIAL_DATA_OUT_OFST); +} + + + +void configureAdc() { + printf("Configuring Adcs\n"); + + //power mode reset + setAdc(AD9257_POWER_MODE_REG, + (AD9257_INT_RESET_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK); + //power mode chip run + setAdc(AD9257_POWER_MODE_REG, + (AD9257_INT_CHIP_RUN_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK); + + // lvds-iee reduced , binary offset + setAdc(AD9257_OUT_MODE_REG, + (AD9257_OUT_LVDS_IEEE_VAL << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK); + + // all devices on chip to receive next command + setAdc(AD9257_DEV_IND_2_REG, + AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK | AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK); + setAdc(AD9257_DEV_IND_1_REG, + AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK | + AD9257_CLK_CH_DCO_MSK | AD9257_CLK_CH_IFCO_MSK); + + // vref 1.33 + setAdc(AD9257_VREF_REG, + (AD9257_VREF_1_33_VAL << AD9257_VREF_OFST) & AD9257_VREF_MSK) ; +} + + + +void prepareADC(){ /** Carlos combine configureAdc and prepare adc? need prepareadc? only output clock phase and no test mode */ + printf("Preparing ADC\n"); + + //power mode reset + setAdc(AD9257_POWER_MODE_REG, + (AD9257_INT_RESET_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK); + //power mode chip run + setAdc(AD9257_POWER_MODE_REG, + (AD9257_INT_CHIP_RUN_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK); + + //output clock phase + setAdc(AD9257_OUT_PHASE_REG, + (AD9257_OUT_CLK_60_VAL << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK); + + // lvds-iee reduced , binary offset + setAdc(AD9257_OUT_MODE_REG, + (AD9257_OUT_LVDS_IEEE_VAL << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK); + + // no test mode + setAdc(AD9257_TEST_MODE_REG, + (AD9257_NONE_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK); + +#ifdef TESTADC + printf("***************************************** *******\n"); + printf("******* PUTTING ADC IN TEST MODE!!!!!!!!! *******\n"); + printf("***************************************** *******\n"); + // mixed bit frequency test mode + setAdc(AD9257_TEST_MODE_REG, + (AD9257_MIXED_BIT_FREQ_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK); +#endif + + bus_w(ADC_LATCH_DISABLE_REG,0x0); // enable all ADCs + bus_w(CONFGAIN_REG,0x12); //adc pipeline=18 + bus_w(CONFGAIN_REG,0xbbbbbbbb); +} + + + + + + + + + +int setDynamicRange(int dr) { + return dynamicRange; +} + +int getDynamicRange() { + return dynamicRange; +} + +int getNModBoard() { + return 1; +} + +int setNMod(int n) { + return 1; +} + +int getNMod() { + return 1; +} + + + + + +int powerChip (int on){ + if(on != -1){ + if(on){ + printf("\nPowering on the chip\n"); + bus_w(POWER_ON_REG,0x1); + } + else{ + printf("\nPowering off the chip\n"); + bus_w(POWER_ON_REG,0x0); + } + } + + return bus_r(POWER_ON_REG); +} + + int setPhaseShiftOnce(){ u_int32_t addr, reg; @@ -394,14 +1187,35 @@ int setPhaseShiftOnce(){ } -int cleanFifo(){ - return OK; +int adcPhase(int st){ + printf("\nSetting ADC Phase to %d\n",st); + if (st>65535 || st<-65535) + return clkPhase[0]; +#ifdef NEW_PLL_RECONFIG + printf("reset pll\n"); + bus_w(PLL_CNTRL_REG,((1<>1);//fpga + } + } + + bus_w(TEMP_IN_REG,(T1_CLK_BIT)|(T1_CS_BIT)|(T2_CLK_BIT)|(T2_CS_BIT));//standby + val=((int)tempVal)/4.0; + +#ifdef VERBOSE + printf("Temperature of module:%d for the %s is %.2fC\n",imod,cTempSensor[tempSensor],val); +#endif + return val; +} + + + +int initConfGain(int isettings,int val,int imod){ + int retval; + u_int32_t addr=CONFGAIN_REG; + if(isettings!=-1){ + //#ifdef VERBOSE + printf("Setting Gain with val:0x%x\n",val); + //#endif + bus_w(addr,(val|(bus_r(addr)&~GAIN_MASK))); + } + retval=(bus_r(addr)&GAIN_MASK); + //#ifdef VERBOSE + printf("Value read from Gain reg is 0x%x\n",retval); + printf("Gain Reg Value is 0x%x\n",bus_r(addr)); + //#endif + return retval; +} + + + +int initSpeedConfGain(int val){ + int retval; + u_int32_t addr=CONFGAIN_REG; + if(val!=-1){ + //#ifdef VERBOSE + printf("\nSetting Speed of Gain reg with val:0x%x\n",val); + //#endif + bus_w(addr,((val<>SPEED_GAIN_OFFSET); + //#ifdef VERBOSE + printf("Value read from Speed of Gain reg is 0x%x\n",retval); + printf("Gain Reg Value is 0x%x\n",bus_r(addr)); + //#endif + return retval; +} + + + + + + + + +ROI *setROI(int nroi,ROI* arg,int *retvalsize, int *ret) { + cprintf(RED,"ROI Not implemented yet\n"); + return NULL; +} + + +int getChannels() { + int nch=32; + int i; + for (i=0; i-2) { + dataret=FAIL; + printf("no data and run stopped: %d frames left\n",(int)(getFrames()+2)); + } else { + dataret=FINISHED; + printf("acquisition successfully finished\n"); } } - return getClockDivider(); + + + + //double nf = (double)numberFrames; + for(i =0; i < 1280; i++){ + adc = i / 256; + adcCh = (i - adc * 256) / 32; + Ch = i - adc * 256 - adcCh * 32; + adc--; + double v2 = avg[i]; + avg[i] = avg[i]/ ((double)numberFrames/(double)frames); + unsigned short v = (unsigned short)avg[i]; + printf("setting avg for channel %i(%i,%i,%i): %i (double= %f (%f))\t", i,adc,adcCh,Ch, v,avg[i],v2); + v=i*100; + ram_w16(DARK_IMAGE_REG,adc,adcCh,Ch,v-4096); + if(ram_r16(DARK_IMAGE_REG,adc,adcCh,Ch) != v-4096){ + printf("value is wrong (%i,%i,%i): %i \n",adc,adcCh,Ch, ram_r16(DARK_IMAGE_REG,adc,adcCh,Ch)); + } + } + + + + printf("frames: %i\n",numberFrames); + printf("corrected avg by: %f\n",(double)numberFrames/(double)frames); + + printf("restoring previous condition\n"); + setFrames(framesBefore); + setPeriod(periodBefore); + + printf("---------------------------\n"); + return 0; } -int adcPhase(int st){ - printf("\nSetting ADC Phase to %d\n",st); - if (st>65535 || st<-65535) - return clkPhase[0]; -#ifdef NEW_PLL_RECONFIG - printf("reset pll\n"); - bus_w(PLL_CNTRL_REG,((1<=MAX_PATTERN_LENGTH) + return -1; + + + printf("read %x\n",addr); + cntrl= (addr&APATTERN_MASK) << PATTERN_CTRL_ADDR_OFFSET; + bus_w(PATTERN_CNTRL_REG, cntrl); + usleep(1000); + bus_w(PATTERN_CNTRL_REG, cntrl | (1<< PATTERN_CTRL_READ_BIT) ); + usleep(1000); + printf("reading\n"); + word=get64BitReg(PATTERN_OUT_LSB_REG,PATTERN_OUT_MSB_REG); + printf("read %llx\n", word); + usleep(1000); + bus_w(PATTERN_CNTRL_REG, cntrl); + printf("done\n"); + + return word; +} + +uint64_t writePatternWord(int addr, uint64_t word) { + + + int cntrl=0; + if (addr>=MAX_PATTERN_LENGTH) + return -1; + + printf("write %x %llx\n",addr, word); + if (word!=-1){ + + set64BitReg(word,PATTERN_IN_REG_LSB,PATTERN_IN_REG_MSB); + + + cntrl= (addr&APATTERN_MASK) << PATTERN_CTRL_ADDR_OFFSET; + bus_w(PATTERN_CNTRL_REG, cntrl); + usleep(1000); + bus_w(PATTERN_CNTRL_REG, cntrl | (1<< PATTERN_CTRL_WRITE_BIT) ); + usleep(1000); + bus_w(PATTERN_CNTRL_REG, cntrl); + return word; + } else + return readPatternWord(addr); +} + +uint64_t writePatternIOControl(uint64_t word) { + return FAIL; +} + +uint64_t writePatternClkControl(uint64_t word) { + return FAIL; +} + +int setPatternLoop(int level, int *start, int *stop, int *n) { + int ret=OK; + int lval=0; + + int nreg; + int areg; + + switch (level ) { + case 0: + nreg=PATTERN_N_LOOP0_REG; + areg=PATTERN_LOOP0_AREG; + break; + case 1: + nreg=PATTERN_N_LOOP1_REG; + areg=PATTERN_LOOP1_AREG; + break; + case 2: + nreg=PATTERN_N_LOOP2_REG; + areg=PATTERN_LOOP2_AREG; + break; + case -1: + nreg=-1; + areg=PATTERN_LIMITS_AREG; + break; + default: + return FAIL; + } + + printf("level %d start %x stop %x nl %d\n",level, *start, *stop, *n); + if (nreg>=0) { + if ((*n)>=0) bus_w(nreg, *n); + printf ("n %d\n",*n); + *n=bus_r(nreg); + printf ("n %d\n",*n); + + } + + printf("level %d start %x stop %x nl %d\n",level, *start, *stop, *n); + lval=bus_r(areg); + /* printf("l=%x\n",bus_r16(areg)); */ + /* printf("m=%x\n",bus_r16_m(areg)); */ + + + + + + printf("lval %x\n",lval); + if (*start==-1) *start=(lval>> ASTART_OFFSET) & APATTERN_MASK; + printf("start %x\n",*start); + + + if (*stop==-1) *stop=(lval>> ASTOP_OFFSET) & APATTERN_MASK; + printf("stop %x\n",*stop); + + lval= ((*start & APATTERN_MASK) << ASTART_OFFSET) | ((*stop & APATTERN_MASK) << ASTOP_OFFSET); + printf("lval %x\n",lval); + + bus_w(areg,lval); + printf("lval %x\n",lval); + + + return ret; } -int getPhase() { - return clkPhase[0]; +int setPatternWaitAddress(int level, int addr) { + int reg; -}; + switch (level) { + case 0: + reg=PATTERN_WAIT0_AREG; + break; + case 1: + reg=PATTERN_WAIT1_AREG; + break; + case 2: + reg=PATTERN_WAIT2_AREG; + break; + default: + return -1; + }; + // printf("BEFORE *********PATTERN IOCTRL IS %llx (%x)\n",writePatternIOControl(-1), PATTERN_IOCTRL_REG_MSB); + + // printf ("%d addr %x (%x)\n",level,addr,reg); + if (addr>=0) bus_w(reg, addr); + // printf ("%d addr %x %x (%x) \n",level,addr, bus_r(reg), reg); + + // printf("AFTER *********PATTERN IOCTRL IS %llx (%x)\n",writePatternIOControl(-1), PATTERN_IOCTRL_REG_MSB); + + return bus_r(reg); +} -u_int32_t getClockDivider(int ic) { +uint64_t setPatternWaitTime(int level, uint64_t t) { + int reglsb; + int regmsb; - enum clkspeed{FULL,HALF,QUARTER}; - switch(initSpeedConfGain(-1)){ - //case FULLSPEED_CONF: - //return FULL; - case HALFSPEED_CONF: - return HALF; - case QUARTERSPEED_CONF: - return QUARTER; + + switch (level) { + case 0: + reglsb=PATTERN_WAIT0_TIME_REG_LSB; + regmsb=PATTERN_WAIT0_TIME_REG_MSB; + break; + case 1: + reglsb=PATTERN_WAIT1_TIME_REG_LSB; + regmsb=PATTERN_WAIT1_TIME_REG_MSB; + break; + case 2: + reglsb=PATTERN_WAIT2_TIME_REG_LSB; + regmsb=PATTERN_WAIT2_TIME_REG_MSB; + break; default: return -1; } -} -u_int32_t adcPipeline(int d) { - if (d>=0){ - printf("Setting ADC Pipeline to 0x%x\n",d); - bus_w(ADC_PIPELINE_REG, d); - } - return bus_r(ADC_PIPELINE_REG); + if (t>=0) set64BitReg(t,reglsb,regmsb); + return get64BitReg(reglsb,regmsb); } -u_int32_t dbitPipeline(int d){ - if (d>=0){ - printf("Setting DBIT Pipeline to 0x%x\n",d); - bus_w(DBIT_PIPELINE_REG, d); - } - return bus_r(DBIT_PIPELINE_REG); -} - -u_int32_t setSetLength(int d) { - return 0; -} - -u_int32_t getSetLength() { - return 0; -} - -u_int32_t setOversampling(int d) { - - if (d>=0 && d<=255) - bus_w(OVERSAMPLING_REG, d); - - return bus_r(OVERSAMPLING_REG); -} -u_int32_t setWaitStates(int d1) { - return 0; -} - -u_int32_t getWaitStates() { - return 0; -} -u_int32_t setTotClockDivider(int d) { - return 0; -} - -u_int32_t getTotClockDivider() { - return 0; -} -u_int32_t setTotDutyCycle(int d) { - return 0; -} -u_int32_t getTotDutyCycle() { - return 0; -} + + + + + + + + u_int32_t setExtSignal(int d, enum externalSignalFlag mode) { @@ -782,6 +2036,20 @@ u_int32_t setExtSignal(int d, enum externalSignalFlag mode) { +int getExtSignal(int d) { + + if (d>=0 && d<4) { +#ifdef VERBOSE + printf("gettings signal variable number %d value %04x\n", d, signals[d]); +#endif + return signals[d]; + } else + return -1; +} + + + + u_int32_t setFPGASignal(int d, enum externalSignalFlag mode) { @@ -802,19 +2070,6 @@ u_int32_t setFPGASignal(int d, enum externalSignalFlag mode) { } - -int getExtSignal(int d) { - - if (d>=0 && d<4) { -#ifdef VERBOSE - printf("gettings signal variable number %d value %04x\n", d, signals[d]); -#endif - return signals[d]; - } else - return -1; -} - - int getFPGASignal(int d) { int modes[]={SIGNAL_OFF, GATE_IN_ACTIVE_HIGH, GATE_IN_ACTIVE_LOW,TRIGGER_IN_RISING_EDGE, TRIGGER_IN_FALLING_EDGE,RO_TRIGGER_IN_RISING_EDGE, RO_TRIGGER_IN_FALLING_EDGE, GATE_OUT_ACTIVE_HIGH, GATE_OUT_ACTIVE_LOW, TRIGGER_OUT_RISING_EDGE, TRIGGER_OUT_FALLING_EDGE, RO_TRIGGER_OUT_RISING_EDGE,RO_TRIGGER_OUT_FALLING_EDGE}; @@ -838,22 +2093,6 @@ int getFPGASignal(int d) { -/* -enum externalCommunicationMode{ - GET_EXTERNAL_COMMUNICATION_MODE, - AUTO, - TRIGGER_EXPOSURE_SERIES, - TRIGGER_EXPOSURE_BURST, - TRIGGER_READOUT, - TRIGGER_COINCIDENCE_WITH_INTERNAL_ENABLE, - GATE_FIX_NUMBER, - GATE_FIX_DURATION, - GATE_WITH_START_TRIGGER, - GATE_COINCIDENCE_WITH_INTERNAL_ENABLE -}; - */ - - int setTiming(int ti) { int ret=GET_EXTERNAL_COMMUNICATION_MODE; @@ -972,1132 +2211,6 @@ int setTiming(int ti) { -int setConfigurationRegister(int d) { -#ifdef VERBOSE - printf("Setting configuration register to %x",d); -#endif - if (d>=0) { - bus_w(CONFIG_REG,d); - } -#ifdef VERBOSE - printf("configuration register is %x", bus_r(CONFIG_REG)); -#endif - return bus_r(CONFIG_REG); -} - -int setToT(int d) { - //int ret=0; - int reg; -#ifdef VERBOSE - printf("Setting ToT to %d\n",d); -#endif - reg=bus_r(CONFIG_REG); -#ifdef VERBOSE - printf("Before: ToT is %x\n", reg); -#endif - if (d>0) { - bus_w(CONFIG_REG,reg|TOT_ENABLE_BIT); - } else if (d==0) { - bus_w(CONFIG_REG,reg&(~TOT_ENABLE_BIT)); - } - reg=bus_r(CONFIG_REG); -#ifdef VERBOSE - printf("ToT is %x\n", reg); -#endif - if (reg&TOT_ENABLE_BIT) - return 1; - else - return 0; -} - -int setContinousReadOut(int d) { - //int ret=0; - int reg; -#ifdef VERBOSE - printf("Setting Continous readout to %d\n",d); -#endif - reg=bus_r(CONFIG_REG); -#ifdef VERBOSE - printf("Before: Continous readout is %x\n", reg); -#endif - if (d>0) { - bus_w(CONFIG_REG,reg|CONT_RO_ENABLE_BIT); - } else if (d==0) { - bus_w(CONFIG_REG,reg&(~CONT_RO_ENABLE_BIT)); - } - reg=bus_r(CONFIG_REG); -#ifdef VERBOSE - printf("Continous readout is %x\n", reg); -#endif - if (reg&CONT_RO_ENABLE_BIT) - return 1; - else - return 0; -} - - - - - -u_int64_t getDetectorNumber() { - char output[255],mac[255]=""; - u_int64_t res=0; - FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); - //getting rid of ":" - char * pch; - pch = strtok (output,":"); - while (pch != NULL){ - strcat(mac,pch); - pch = strtok (NULL, ":"); - } - sscanf(mac,"%llx",&res); - return res; -} - -u_int64_t getFirmwareVersion() { - return ((bus_r(FPGA_VERSION_REG) & BOARD_REVISION_MSK) >> BOARD_REVISION_OFST); -} - -int64_t getId(enum idMode arg) { - int64_t retval = -1; - - switch(arg){ - case DETECTOR_SERIAL_NUMBER: - retval = getDetectorNumber(); - break; - case DETECTOR_FIRMWARE_VERSION: - retval=getFirmwareSVNVersion(); - retval=(retval <<32) | getFirmwareVersion(); - break; - case DETECTOR_SOFTWARE_VERSION: - retval= SVNREV; - retval= (retval <<32) | SVNDATE; - break; - default: - printf("Required unknown id %d \n", arg); - break; - } - return retval; -} - - - - - -int testFifos(void) { - printf("Fifo test not implemented!\n"); - /*bus_w16(CONTROL_REG, START_FIFOTEST_BIT); check with Carlos - bus_w16(CONTROL_REG, 0x0);*/ - return OK; -} - -u_int32_t testFpga(void) { - printf("\nTesting FPGA...\n"); - - //fixed pattern - int ret = OK; - volatile u_int32_t val = bus_r(FIX_PATT_REG); - if (val == FIX_PATT_VAL) { - printf("Fixed pattern: successful match 0x%08x\n",val); - } else { - cprintf(RED,"Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL); - ret = FAIL; - } - printf("\n"); - return ret; -} - -u_int32_t testRAM(void) { - int result=OK; - printf("RAM Test not implemented!\n"); - return result; -} - -int testBus() { - printf("\nTesting Bus...\n"); - - int ret = OK; - u_int32_t addr = SET_DELAY_LSB_REG; - int times = 1000 * 1000; - int i = 0; - - for (i = 0; i < times; ++i) { - bus_w(addr, i * 100); - if (i * 100 != bus_r(SET_DELAY_LSB_REG)) { - cprintf(RED,"ERROR: Mismatch! Wrote 0x%x, read 0x%x\n", i * 100, bus_r(SET_DELAY_LSB_REG)); - ret = FAIL; - } - } - - if (ret == OK) - printf("Successfully tested bus %d times\n", times); - - printf("\n"); - return ret; -} - - -int getNModBoard() { - return 1; -} - -int setNMod(int n) { - return 1; -} - -int getNMod() { - return 1; -} - - - -// program dacq settings - -int64_t set64BitReg(int64_t value, int aLSB, int aMSB){ - int64_t v64; - u_int32_t vLSB,vMSB; - if (value!=-1) { - vLSB=value&(0xffffffff); - bus_w(aLSB,vLSB); - v64=value>> 32; - vMSB=v64&(0xffffffff); - bus_w(aMSB,vMSB); - } - return get64BitReg(aLSB, aMSB); - -} - -int64_t get64BitReg(int aLSB, int aMSB){ - int64_t v64; - u_int32_t vLSB,vMSB; - vLSB=bus_r(aLSB); - vMSB=bus_r(aMSB); - v64=vMSB; - v64=(v64<<32) | vLSB; - - printf("reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, v64); - - return v64; -} - -int64_t setFrames(int64_t value){ - if(value!=-1) - printf("\nSetting number of frames to %lld\n",(long long int)value); - - int64_t retval = set64BitReg(value, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); - printf("Getting number of frames: %lld\n",(long long int)retval); - return retval; -} - -int64_t getFrames(){ - return get64BitReg(GET_FRAMES_LSB_REG, GET_FRAMES_MSB_REG); -} - -int64_t setExposureTime(int64_t value){ - if (value!=-1){ - printf("\nSetting exptime to %lldns\n",(long long int)value); - value*=(1E-3*clockdivider_exptime); - } - int64_t retval = set64BitReg(value,SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG)/(1E-3*clockdivider_exptime);//(1E-9*CLK_FREQ); - printf("Getting exptime: %lldns\n",(long long int)retval); - return retval; -} - -int64_t getExposureTime(){ - return get64BitReg(GET_EXPTIME_LSB_REG, GET_EXPTIME_MSB_REG)/(1E-3*clockdivider_exptime);//(1E-9*CLK_FREQ); -} - -int64_t setGates(int64_t value){ - if(value!=-1) - printf("\nSetting number of gates to %lld\n",(long long int)value); - - int64_t retval = set64BitReg(value, SET_GATES_LSB_REG, SET_GATES_MSB_REG); - printf("Getting number of gates: %lld\n",(long long int)retval); - return retval; -} - -int64_t getGates(){ - return get64BitReg(GET_GATES_LSB_REG, GET_GATES_MSB_REG); -} - -int64_t setPeriod(int64_t value){ - if (value!=-1){ - printf("\nSetting period to %lldns\n",(long long int)value); - value*=(1E-3*clockdivider_fc); - } - - int64_t retval = set64BitReg(value,SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/(1E-3*clockdivider_fc);//(1E-9*CLK_FREQ); - printf("Getting period: %lldns\n",(long long int)retval); - return retval; -} - -int64_t getPeriod(){ - return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG)/(1E-3*clockdivider_fc);//(1E-9*CLK_FREQ); -} - -int64_t setDelay(int64_t value){ - if (value!=-1){ - printf("\nSetting delay to %lldns\n",(long long int)value); - value*=(1E-3*clockdivider_fc); - } - - int64_t retval = set64BitReg(value,SET_DELAY_LSB_REG, SET_DELAY_MSB_REG)/(1E-3*clockdivider_fc);//(1E-9*CLK_FREQ); - printf("Getting delay: %lldns\n",(long long int)retval); - return retval; -} - -int64_t getDelay(){ - return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG)/(1E-3*clockdivider_fc);//(1E-9*CLK_FREQ); -} - -int64_t setTrains(int64_t value){ - if(value!=-1) - printf("\nSetting number of cycles to %lld\n",(long long int)value); - - int64_t retval = set64BitReg(value, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); - printf("Getting number of cycles: %lld\n",(long long int)retval); - return retval; -} - -int64_t getTrains(){ - return get64BitReg(GET_CYCLES_LSB_REG, GET_CYCLES_MSB_REG); -} - - - -int64_t setProbes(int64_t value){ - return 0; -} - - -int64_t setProgress() { - return 0; - -} - - -int64_t getProgress() { - - - //should be done in firmware!!!! - - return 0; - -} - -int64_t getActualTime(){ - return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG)/(1E-9*CLK_FREQ); -} - -int64_t getMeasurementTime(){ - int64_t v=get64BitReg(MEASUREMENT_START_TIME_LSB_REG, MEASUREMENT_START_TIME_MSB_REG); - return v/(1E-9*CLK_FREQ); -} - -int64_t getFramesFromStart(){ /** ask Carlos.. sending back v, but not used in firmware? */ - int64_t v=get64BitReg(FRAMES_FROM_START_LSB_REG, FRAMES_FROM_START_MSB_REG); - int64_t v1=get64BitReg(FRAMES_FROM_START_PG_LSB_REG, FRAMES_FROM_START_PG_MSB_REG); - - printf("Frames from start data streaming %lld\n",v); - printf("Frames from start run control %lld\n",v1); - - return v; -} - - -ROI *setROI(int nroi,ROI* arg,int *retvalsize, int *ret) { - cprintf(RED,"ROI Not implemented yet\n"); - return NULL; -} - - -int loadImage(int index, short int ImageVals[]){ - printf("loadImage Not implemented yet\n"); - return OK; -} - - - -int64_t getProbes(){ - return 0; -} - - -int setDACRegister(int idac, int val, int imod) { - u_int32_t addr, reg, mask; - int off; -#ifdef VERBOSE - if(val==-1) - printf("Getting dac register%d module %d\n",idac,imod); - else - printf("Setting dac register %d module %d to %d\n",idac,imod,val); -#endif - - switch(idac){ - case 0: - case 1: - case 2: - addr=MOD_DACS1_REG; - break; - case 3: - case 4: - case 5: - addr=MOD_DACS2_REG; - break; - case 6: - case 7: - addr=MOD_DACS3_REG; - break; - default: - printf("weird idac value %d\n",idac); - return -1; - break; - } - //saving only the msb - val=val>>2; - - off=(idac%3)*10; - mask=~((0x3ff)<=0 && val>off)&0x3ff; - //since we saved only the msb - val=val<<2; - - //val=(bus_r(addr)>>off)&0x3ff; - - -#ifdef VERBOSE - printf("Dac %d module %d register is %d\n\n",idac,imod,val); -#endif - return val; -} - - -int getTemperature(int tempSensor, int imod){ - int val; - imod=0;//ignoring more than 1 mod for now - int i,j,repeats=6; - u_int32_t tempVal=0; -#ifdef VERBOSE - char cTempSensor[2][100]={"ADCs/ASICs","VRs/FPGAs"}; - printf("Getting Temperature of module:%d for the %s for tempsensor:%d\n",imod,cTempSensor[tempSensor],tempSensor); -#endif - bus_w(TEMP_IN_REG,(T1_CLK_BIT)|(T1_CS_BIT)|(T2_CLK_BIT)|(T2_CS_BIT));//standby - bus_w(TEMP_IN_REG,((T1_CLK_BIT)&~(T1_CS_BIT))|(T2_CLK_BIT));//high clk low cs - - for(i=0;i<20;i++) { - //repeats is number of register writes for delay - for(j=0;j>1);//fpga - } - } - - bus_w(TEMP_IN_REG,(T1_CLK_BIT)|(T1_CS_BIT)|(T2_CLK_BIT)|(T2_CS_BIT));//standby - val=((int)tempVal)/4.0; - -#ifdef VERBOSE - printf("Temperature of module:%d for the %s is %.2fC\n",imod,cTempSensor[tempSensor],val); -#endif - return val; -} - - - -int initHighVoltage(int val, int imod){ - - u_int32_t addr = SPI_REG; - float alpha=0.55; - u_int16_t valw, dacvalue; - u_int32_t codata; - - int numbits = 8; - int valuemask = 0xff; - - // setting hv - if (val >= 0) { - - // limit values - if (val < 60) { - dacvalue = 0; - val = 60; - } else if (val >= 200) { - dacvalue = 0x1; - val = 200; - } else { - dacvalue = 1. + (200.-val) / alpha; - val=200.-(dacvalue-1)*alpha; - } - printf ("\n Setting High voltage to %d (dacval %d)\n",val, dacvalue); - codata = dacvalue & valuemask; - - // start point 0xffff - valw = 0xffff; //To make it compatible with old board - //valw = DAC_SERIAL_DIGITAL_OUT_MSK & DAC_SERIAL_CLK_OUT_MSK & DAC_SERIAL_CS_OUT_MSK & - //HV_SERIAL_DIGITAL_OUT_MSK & HV_SERIAL_CLK_OUT_MSK & HV_SERIAL_CS_OUT_MSK; - bus_w (addr, valw); - - // chip sel bar down - valw &= ~HV_SERIAL_CS_OUT_MSK; - bus_w (addr, valw); - - { - int i = 0; - for (i = 0; i < numbits; i++) { - - // clk down - valw &= ~HV_SERIAL_CLK_OUT_MSK; - bus_w (addr, valw); - - // write data (i) (each bit from codata starting from msb) - valw = ((valw & ~HV_SERIAL_DIGITAL_OUT_MSK) + - (((codata >> (7-i)) & 0x1) << HV_SERIAL_DIGITAL_OUT_OFST)); - bus_w (addr, valw); - - // clk up - valw |= HV_SERIAL_CLK_OUT_MSK ; - bus_w (addr, valw); - } - } - - // chip sel bar up - valw |= HV_SERIAL_CS_OUT_MSK; - bus_w (addr, valw); - - //clk down - valw &= ~HV_SERIAL_CLK_OUT_MSK; - bus_w (addr, valw); - - // stop point = start point of course 0xffff - valw = 0xffff; //To make it compatible with old board - //valw = DAC_SERIAL_DIGITAL_OUT_MSK & DAC_SERIAL_CLK_OUT_MSK & DAC_SERIAL_CS_OUT_MSK & - //HV_SERIAL_DIGITAL_OUT_MSK & HV_SERIAL_CLK_OUT_MSK & HV_SERIAL_CS_OUT_MSK; - bus_w (addr, valw); - - printf(" High voltage set to %d (dacval %d)\n", val, dacvalue); - highvoltage = val; - } - - return highvoltage; -} - - - -int initConfGain(int isettings,int val,int imod){ - int retval; - u_int32_t addr=CONFGAIN_REG; - if(isettings!=-1){ - //#ifdef VERBOSE - printf("Setting Gain with val:0x%x\n",val); - //#endif - bus_w(addr,(val|(bus_r(addr)&~GAIN_MASK))); - } - retval=(bus_r(addr)&GAIN_MASK); - //#ifdef VERBOSE - printf("Value read from Gain reg is 0x%x\n",retval); - printf("Gain Reg Value is 0x%x\n",bus_r(addr)); - //#endif - return retval; -} - - - -int initSpeedConfGain(int val){ - int retval; - u_int32_t addr=CONFGAIN_REG; - if(val!=-1){ - //#ifdef VERBOSE - printf("\nSetting Speed of Gain reg with val:0x%x\n",val); - //#endif - bus_w(addr,((val<>SPEED_GAIN_OFFSET); - //#ifdef VERBOSE - printf("Value read from Speed of Gain reg is 0x%x\n",retval); - printf("Gain Reg Value is 0x%x\n",bus_r(addr)); - //#endif - return retval; -} - - -int setADC(int adc){ - int reg,nchips,mask,nchans; - - if(adc==-1) ROI_flag=0; - else ROI_flag=1; - - // setDAQRegister();//token timing - cleanFifo();//adc sync - - //with moench module all adc - //set packet size - ipPacketSize= DEFAULT_IP_PACKETSIZE; - udpPacketSize=DEFAULT_UDP_PACKETSIZE; - //set channel mask - nchips = NCHIP; - nchans = NCHANS; - mask = ACTIVE_ADC_MASK; - - //set channel mask - reg = (nchans*nchips)< 1 ) { - sum += *addr++; - count -= 2; - } - if( count > 0 ) sum += *addr; // Add left-over byte, if any - while (sum>>16) sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits - checksum = (~sum)&0xffff; - - printf("IP checksum is 0x%lx\n",checksum); - - return checksum; -} - - - -#ifdef NEW_GBE_INTERFACE -int writeGbeReg(int ivar, uint32_t val, int addr, int interface) { - /* #define GBE_CTRL_WSTROBE 0 */ - /* #define GBE_CTRL_VAR_OFFSET 16 */ - /* #define GBE_CTRL_VAR_MASK 0XF */ - /* #define GBE_CTRL_RAMADDR_OFFSET 24 */ - /* #define GBE_CTRL_RAMADDR_MASK 0X3F */ - /* #define GBE_CTRL_INTERFACE 23 */ - uint32_t ctrl=((ivar&GBE_CTRL_VAR_MASK)<>32)&0xFFFFFFFF; - vals[IPCHECKSUM_ADDR]=checksum; - vals[GBE_DELAY_ADDR]=0; - vals[GBE_RESERVED1_ADDR]=sourceport; - vals[GBE_RESERVED2_ADDR]=interface; - vals[DETECTOR_MAC_L_ADDR]=(sourcemac)&0xFFFFFFFF; - vals[DETECTOR_MAC_H_ADDR]=(sourcemac>>32)&0xFFFFFFFF; - vals[DETECTOR_IP_ADDR]=sourceip; - - for (ivar=0; ivar>32)&0xFFFFFFFF);//rx_udpmacH_AReg_c - bus_w(RX_UDPMACL_AREG,(destmac)&0xFFFFFFFF);//rx_udpmacL_AReg_c - bus_w(DETECTORMACH_AREG,(sourcemac>>32)&0xFFFFFFFF);//detectormacH_AReg_c - bus_w(DETECTORMACL_AREG,(sourcemac)&0xFFFFFFFF);//detectormacL_AReg_c - bus_w(UDPPORTS_AREG,((sourceport&0xFFFF)<<16)+(destport&0xFFFF));//udpports_AReg_c - bus_w(IPCHKSUM_AREG,(checksum&0xFFFF));//ipchksum_AReg_c - - -#endif - - /*bus_w(CONTROL_REG,0); Carlos modification*/ - /*printf("System status register is %08x\n",bus_r(SYSTEM_STATUS_REG)); Carlos modification */ - - printf("Reset mem machine fifos\n"); - bus_w(MEM_MACHINE_FIFOS_REG,0x4000); - bus_w(MEM_MACHINE_FIFOS_REG,0x0); - printf("Reset run control\n"); - bus_w(MEM_MACHINE_FIFOS_REG,0x0400); - bus_w(MEM_MACHINE_FIFOS_REG,0x0); - - usleep(500 * 1000); - - return 0; //any value doesnt matter - dhanya - -} - - - - - - - - - - - -int configureMAC(uint32_t destip,uint64_t destmac,uint64_t sourcemac,int sourceip,int ival,uint32_t destport) { - //int configureMAC(int ipad,long long int macad,long long int detectormacad, int detipad, int ival, int udpport){ - - - - - - /*volatile u_int32_t conf= bus_r(CONFIG_REG);*/ - uint32_t sourceport = 0x7e9a; // 0xE185; - int interface=0; - int ngb; - -#ifdef NEW_GBE_INTERFACE - ngb=2; - printf("--------- New XGB interface\n"); -#else - ngb=1; - printf("********* Old XGB interface\n"); -#endif - - for (interface=0; interface > RUN_BUSY_OFST); -#ifdef VERBOSE - printf("status %04x\n",s); -#endif - return s; -} - - -u_int32_t runState(void) { - int s=bus_r(STATUS_REG); -#ifdef VERBOSE - printf("status %04x\n",s); -#endif - return s; -} - - -// State Machine - -int startStateMachine(){ - //int i; - //#ifdef VERBOSE - printf("*******Starting State Machine*******\n"); - //#endif - // cleanFifo(); - // fifoReset(); - //start state machine - bus_w16(CONTROL_REG, FIFO_RESET_BIT); - bus_w16(CONTROL_REG, 0x0); - bus_w16(CONTROL_REG, START_ACQ_BIT | START_EXPOSURE_BIT); - bus_w16(CONTROL_REG, 0x0); - - printf("statusreg=%08x\n",bus_r(STATUS_REG)); - return OK; -} - - - - -int stopStateMachine(){ - //#ifdef VERBOSE - cprintf(BG_RED,"*******Stopping State Machine*******\n"); - //#endif - // for(i=0;i<100;i++){ - //stop state machine - bus_w16(CONTROL_REG, STOP_ACQ_BIT); - usleep(100); - bus_w16(CONTROL_REG, 0x0); - - printf("statusreg=%08x\n",bus_r(STATUS_REG)); - return OK; -} - - -int startReadOut(){ -#ifdef VERBOSE - printf("Starting State Machine Readout\n"); -#endif -#ifdef DEBUG - printf("State machine status is %08x\n",bus_r(STATUS_REG)); -#endif - bus_w16(CONTROL_REG, START_ACQ_BIT |START_READOUT_BIT); // start readout - usleep(100); - bus_w16(CONTROL_REG, 0x0); - return OK; -} - -enum runStatus getStatus() { -#ifdef VERBOSE - printf("Getting status\n"); -#endif - - enum runStatus s; - u_int32_t retval = runState(); - printf("\n\nSTATUS=%08x\n",retval); - - //running - if(((retval & RUN_BUSY_MSK) >> RUN_BUSY_OFST)) { - if ((retval & WAITING_FOR_TRIGGER_MSK) >> WAITING_FOR_TRIGGER_OFST) { - printf("-----------------------------------WAITING-----------------------------------\n"); - s=WAITING; - } - else{ - printf("-----------------------------------RUNNING-----------------------------------\n"); - s=RUNNING; - } - } - - //not running - else { - if ((retval & STOPPED_MSK) >> STOPPED_OFST) { - printf("-----------------------------------STOPPED--------------------------\n"); - s=STOPPED; - } else if ((retval & RUNMACHINE_BUSY_MSK) >> RUNMACHINE_BUSY_OFST) { - printf("-----------------------------------READ MACHINE BUSY--------------------------\n"); - s=TRANSMITTING; - } else if (!retval) { - printf("-----------------------------------IDLE--------------------------------------\n"); - s=IDLE; - } else { - printf("-----------------------------------Unknown status %08x--------------------------------------\n", retval); - s=ERROR; - } - /* Check with Carlos , I included IDLE and unknown status above - //and readbusy=0,idle - else if((!(retval&0xffff))||(retval==SOME_FIFO_FULL_BIT)){ - printf("-----------------------------------IDLE--------------------------------------\n"); - s=IDLE; - } else { - printf("-----------------------------------Unknown status %08x--------------------------------------\n", retval); - s=ERROR; - ret=FAIL; - }*/ - } - - return s; -} - - -// fifo routines - -u_int32_t fifoReset(void) { - return -1; -} - - -u_int32_t setNBits(u_int32_t n) { - return -1; -} - -u_int32_t getNBits(){ - return -1; -} - - -u_int32_t fifoReadCounter(int fifonum){ - return -1; -} - -u_int32_t fifoReadStatus(){ - return bus_r(STATUS_REG)&(SOME_FIFO_FULL_BIT | ALL_FIFO_EMPTY_BIT); -} - - -u_int32_t fifo_full(void){ - return bus_r(STATUS_REG)&SOME_FIFO_FULL_BIT; -} - - - -void waitForAcquisitionEnd(){ - while(runBusy()){ - usleep(500); - } -} - - - - - - - - - - -u_int32_t* decode_data(int *datain) -{ - u_int32_t *dataout; - // const char one=1; - const int bytesize=8; - char *ptr=(char*)datain; - //int nbits=dynamicRange; - int ipos=0, ichan=0;; - //int nch, boff=0; - int ibyte;//, ibit; - char iptr; - -#ifdef VERBOSE - printf("Decoding data for DR %d\n",dynamicRange); -#endif - dataout=malloc(NCHAN*NCHIP*nModX*4); - ichan=0; - switch (dynamicRange) { - case 1: - for (ibyte=0; ibyte>(ipos))&0x1; - ichan++; - } - } - break; - case 4: - for (ibyte=0; ibyte>(ipos*4))&0xf; - ichan++; - } - } - break; - case 8: - for (ichan=0; ichan0) - storeInRAM=1; - else - storeInRAM=0; - return OK; -} - -int getChannels() { - int nch=32; - int i; - for (i=0; i>(23-i))&0x1)<-2) { - dataret=FAIL; - printf("no data and run stopped: %d frames left\n",(int)(getFrames()+2)); - } else { - dataret=FINISHED; - printf("acquisition successfully finished\n"); - } - } - - - - //double nf = (double)numberFrames; - for(i =0; i < 1280; i++){ - adc = i / 256; - adcCh = (i - adc * 256) / 32; - Ch = i - adc * 256 - adcCh * 32; - adc--; - double v2 = avg[i]; - avg[i] = avg[i]/ ((double)numberFrames/(double)frames); - unsigned short v = (unsigned short)avg[i]; - printf("setting avg for channel %i(%i,%i,%i): %i (double= %f (%f))\t", i,adc,adcCh,Ch, v,avg[i],v2); - v=i*100; - ram_w16(DARK_IMAGE_REG,adc,adcCh,Ch,v-4096); - if(ram_r16(DARK_IMAGE_REG,adc,adcCh,Ch) != v-4096){ - printf("value is wrong (%i,%i,%i): %i \n",adc,adcCh,Ch, ram_r16(DARK_IMAGE_REG,adc,adcCh,Ch)); - } - } - - - - printf("frames: %i\n",numberFrames); - printf("corrected avg by: %f\n",(double)numberFrames/(double)frames); - - printf("restoring previous condition\n"); - setFrames(framesBefore); - setPeriod(periodBefore); - - printf("---------------------------\n"); - return 0; -} - - - - -uint64_t readPatternWord(int addr) { - uint64_t word=0; - int cntrl=0; - - if (addr>=MAX_PATTERN_LENGTH) - return -1; - - - printf("read %x\n",addr); - cntrl= (addr&APATTERN_MASK) << PATTERN_CTRL_ADDR_OFFSET; - bus_w(PATTERN_CNTRL_REG, cntrl); - usleep(1000); - bus_w(PATTERN_CNTRL_REG, cntrl | (1<< PATTERN_CTRL_READ_BIT) ); - usleep(1000); - printf("reading\n"); - word=get64BitReg(PATTERN_OUT_LSB_REG,PATTERN_OUT_MSB_REG); - printf("read %llx\n", word); - usleep(1000); - bus_w(PATTERN_CNTRL_REG, cntrl); - printf("done\n"); - - return word; -} - -uint64_t writePatternWord(int addr, uint64_t word) { - - - int cntrl=0; - if (addr>=MAX_PATTERN_LENGTH) - return -1; - - printf("write %x %llx\n",addr, word); - if (word!=-1){ - - set64BitReg(word,PATTERN_IN_REG_LSB,PATTERN_IN_REG_MSB); - - - cntrl= (addr&APATTERN_MASK) << PATTERN_CTRL_ADDR_OFFSET; - bus_w(PATTERN_CNTRL_REG, cntrl); - usleep(1000); - bus_w(PATTERN_CNTRL_REG, cntrl | (1<< PATTERN_CTRL_WRITE_BIT) ); - usleep(1000); - bus_w(PATTERN_CNTRL_REG, cntrl); - return word; - } else - return readPatternWord(addr); -} - -uint64_t writePatternIOControl(uint64_t word) { - return FAIL; -} - -uint64_t writePatternClkControl(uint64_t word) { - return FAIL; -} - -int setPatternLoop(int level, int *start, int *stop, int *n) { - int ret=OK; - int lval=0; - - int nreg; - int areg; - - switch (level ) { - case 0: - nreg=PATTERN_N_LOOP0_REG; - areg=PATTERN_LOOP0_AREG; - break; - case 1: - nreg=PATTERN_N_LOOP1_REG; - areg=PATTERN_LOOP1_AREG; - break; - case 2: - nreg=PATTERN_N_LOOP2_REG; - areg=PATTERN_LOOP2_AREG; - break; - case -1: - nreg=-1; - areg=PATTERN_LIMITS_AREG; - break; - default: - return FAIL; - } - - printf("level %d start %x stop %x nl %d\n",level, *start, *stop, *n); - if (nreg>=0) { - if ((*n)>=0) bus_w(nreg, *n); - printf ("n %d\n",*n); - *n=bus_r(nreg); - printf ("n %d\n",*n); - - } - - printf("level %d start %x stop %x nl %d\n",level, *start, *stop, *n); - lval=bus_r(areg); - /* printf("l=%x\n",bus_r16(areg)); */ - /* printf("m=%x\n",bus_r16_m(areg)); */ - - - - - - printf("lval %x\n",lval); - if (*start==-1) *start=(lval>> ASTART_OFFSET) & APATTERN_MASK; - printf("start %x\n",*start); - - - if (*stop==-1) *stop=(lval>> ASTOP_OFFSET) & APATTERN_MASK; - printf("stop %x\n",*stop); - - lval= ((*start & APATTERN_MASK) << ASTART_OFFSET) | ((*stop & APATTERN_MASK) << ASTOP_OFFSET); - printf("lval %x\n",lval); - - bus_w(areg,lval); - printf("lval %x\n",lval); - - - return ret; -} - - -int setPatternWaitAddress(int level, int addr) { - int reg; - - switch (level) { - case 0: - reg=PATTERN_WAIT0_AREG; - break; - case 1: - reg=PATTERN_WAIT1_AREG; - break; - case 2: - reg=PATTERN_WAIT2_AREG; - break; - default: - return -1; - }; - // printf("BEFORE *********PATTERN IOCTRL IS %llx (%x)\n",writePatternIOControl(-1), PATTERN_IOCTRL_REG_MSB); - - // printf ("%d addr %x (%x)\n",level,addr,reg); - if (addr>=0) bus_w(reg, addr); - // printf ("%d addr %x %x (%x) \n",level,addr, bus_r(reg), reg); - - // printf("AFTER *********PATTERN IOCTRL IS %llx (%x)\n",writePatternIOControl(-1), PATTERN_IOCTRL_REG_MSB); - - return bus_r(reg); -} - - -uint64_t setPatternWaitTime(int level, uint64_t t) { - int reglsb; - int regmsb; - - - switch (level) { - case 0: - reglsb=PATTERN_WAIT0_TIME_REG_LSB; - regmsb=PATTERN_WAIT0_TIME_REG_MSB; - break; - case 1: - reglsb=PATTERN_WAIT1_TIME_REG_LSB; - regmsb=PATTERN_WAIT1_TIME_REG_MSB; - break; - case 2: - reglsb=PATTERN_WAIT2_TIME_REG_LSB; - regmsb=PATTERN_WAIT2_TIME_REG_MSB; - break; - default: - return -1; - } - - - if (t>=0) set64BitReg(t,reglsb,regmsb); - return get64BitReg(reglsb,regmsb); - -} - - -/** Carlos later, used only for 0 and 8 */ -void initDac(int dacnum) { - printf("\nInitializing dac for %d\n",dacnum); - - u_int32_t addr = SPI_REG; - u_int16_t valw; - u_int32_t codata; - - int csdx = dacnum / 8 + 2; // To make it compatible with old board (16 dacs), otherwise only DAC_SERIAL_CS_OUT_OFST - printf("Chip select bit:%d\n" - "Dac Channel Nr:%d\n", - csdx, 0xf); - - int numbits = 25; - codata = ( - ((0x6 << 4) + /* 110 for initdac, 011 for specific dac ?? */ - (0xf << 16)) + /* dac channel number (can be 0 - 8), f means all in initdac ??*/ - ((0x0 << 4) & 0xfff0) /* value from bit 12 to 4?? */ - ); - - // start point - valw = 0xffff; //To make it compatible with old board - //valw = DAC_SERIAL_DIGITAL_OUT_MSK & DAC_SERIAL_CLK_OUT_MSK & DAC_SERIAL_CS_OUT_MSK & - //HV_SERIAL_DIGITAL_OUT_MSK & HV_SERIAL_CLK_OUT_MSK & HV_SERIAL_CS_OUT_MSK; - bus_w (addr, valw); - - // chip sel bar down - valw &= ~(0x1 << csdx); - bus_w (addr, valw); - - { - int i = 0; - for (i = 0; i < numbits; i++) { - - // clk down - valw &= ~DAC_SERIAL_CLK_OUT_MSK; - bus_w (addr, valw); - - // write data (i) (each bit from codata starting from msb) - valw = ((valw & ~DAC_SERIAL_DIGITAL_OUT_MSK) + - (((codata >> (numbits - 1 - i)) & 0x1) << DAC_SERIAL_DIGITAL_OUT_OFST)); - bus_w (addr, valw); - - // clk up - valw |= DAC_SERIAL_CLK_OUT_MSK ; - bus_w (addr, valw); - } - } - - // chip sel bar up - valw |= (0x1 << csdx); - bus_w (addr, valw); - - //clk down - valw &= ~DAC_SERIAL_CLK_OUT_MSK; - bus_w (addr, valw); - - // stop point = start point of course - valw = 0xffff; //To make it compatible with old board - //valw = DAC_SERIAL_DIGITAL_OUT_MSK & DAC_SERIAL_CLK_OUT_MSK & DAC_SERIAL_CS_OUT_MSK & - //HV_SERIAL_DIGITAL_OUT_MSK & HV_SERIAL_CLK_OUT_MSK & HV_SERIAL_CS_OUT_MSK; - bus_w (addr, valw); - -} - -int setDacRegister(int dacnum,int dacvalue) { - int val; - if (dacvalue==-100) - dacvalue=0xffff; - - - if (dacnum%2) { - val=((dacvalue & 0xffff)<<16) | getDacRegister(dacnum-1); - } else { - val=(getDacRegister(dacnum+1)<<16) | (dacvalue & 0xffff); - - } - - printf("Dac register %x wrote %08x\n",(DAC_REG_OFF+dacnum/2)<<11,val); - bus_w((DAC_REG_OFF+dacnum/2)<<11, val); - - return getDacRegister(dacnum); - - -} -int getDacRegister(int dacnum) { - - int retval; - - retval=bus_r((DAC_REG_OFF+dacnum/2)<<11); - printf("Dac register %x read %08x\n",(DAC_REG_OFF+dacnum/2)<<11,retval); - if (dacnum%2) - return (retval>>16)&0xffff; - else - return retval&0xffff; - -} - - -int setDac(int dacnum, int dacvalue){ - printf("\nSetting of DAC %d with value %d\n",dacnum, dacvalue); - - u_int32_t addr = SPI_REG; - u_int16_t valw; - u_int32_t codata; - - - int csdx = dacnum / 8 + 2; // Chip select can be DAC_SERIAL_CS_OUT_OFST(2) or 3 (compatibility with old board 16 dacs) - int dacch = dacnum % 8; // 0-8, dac channel number (also for dacnum 9-15 in old board) - int numbits = 25; - printf("Chip select bit:%d\n" - "Dac Channel Nr:%d\n", - csdx, dacch); - - - // setting dac - if (dacvalue >= 0) { - //modified to power down single channels codata=((((0x2)<<4)+((dacch)&0xf))<<16)+((dacvalue<<4)&0xfff0); - - codata = ( - ((0x3 << 4) + /** 110 for initdac, 011 for specific dac?? */ - ((dacch)&0xf)) /** dac ch number (can be 0 - 8). f means all in initdac ?? */ - << 16) + /** Carlos later, why change in bracket position */ - ((dacvalue<<4)&0xfff0); /* value from bit 12 to 4?? */ - - - - - codata=(((0x6<<4)+(0xf<<16))+((0x0<<4)&0xfff0)); - codata=(((0x3<<4)+((dacch)&0xf))<<16)+((dacvalue<<4)&0xfff0); - - - - // start point - valw = 0xffff; //To make it compatible with old board - //valw = DAC_SERIAL_DIGITAL_OUT_MSK & DAC_SERIAL_CLK_OUT_MSK & DAC_SERIAL_CS_OUT_MSK & - //HV_SERIAL_DIGITAL_OUT_MSK & HV_SERIAL_CLK_OUT_MSK & HV_SERIAL_CS_OUT_MSK; - bus_w (addr, valw); - - // chip sel bar down - valw &= ~(0x1 << csdx); - bus_w (addr, valw); - - { - int i = 0; - for (i = 0; i < numbits; i++) { - - // clk down - valw &= ~DAC_SERIAL_CLK_OUT_MSK; - bus_w (addr, valw); - - // write data (i) (each bit from codata starting from msb) - valw = ((valw & ~DAC_SERIAL_DIGITAL_OUT_MSK) + - (((codata >> (numbits - 1 - i)) & 0x1) << DAC_SERIAL_DIGITAL_OUT_OFST)); - bus_w (addr, valw); - - // clk up - valw |= DAC_SERIAL_CLK_OUT_MSK ; - bus_w (addr, valw); - } - } - - // chip sel bar up - valw |= (0x1 << csdx); - bus_w (addr, valw); - - //clk down - valw &= ~DAC_SERIAL_CLK_OUT_MSK; - bus_w (addr, valw); - - // stop point = start point of course - valw = 0xffff; //To make it compatible with old board - //valw = DAC_SERIAL_DIGITAL_OUT_MSK & DAC_SERIAL_CLK_OUT_MSK & DAC_SERIAL_CS_OUT_MSK & - //HV_SERIAL_DIGITAL_OUT_MSK & HV_SERIAL_CLK_OUT_MSK & HV_SERIAL_CS_OUT_MSK; - bus_w (addr, valw); - - printf("Writing %d in DAC %d \n",dacvalue,dacnum); - setDacRegister(dacnum,dacvalue); - } else if (dacvalue==-100) { - - printf("switching off dac %d\n", dacnum); - csdx=dacnum/8+2; - dacch=dacnum%8; - ddx=0; cdx=1; - codata=((((0x4)<<4)+((dacch)&0xf))<<16)+((dacvalue<<4)&0xfff0); - valw=0xffff; bus_w(offw,(valw)); // start point - valw=((valw&(~(0x1<>(24-i))&0x1)<>(24-i))&0x1)); - valw=((valw&(~(0x1< #include #include @@ -20,87 +17,38 @@ #include #include - int mapCSP0(void); -void defineGPIOpins(); -void resetFPGA(); -void FPGAdontTouchFlash(); -void FPGATouchFlash(); -int powerChip (int on); -void initializeDetector(); -int checkType(); -void printVersions(); - - +u_int16_t bus_w16(u_int32_t offset, u_int16_t data); u_int16_t bus_r16(u_int32_t offset); -u_int16_t bus_w16(u_int32_t offset, u_int16_t data);//aldos function +u_int16_t ram_w16(u_int32_t ramType, int adc, int adcCh, int Ch, u_int16_t data); +u_int16_t ram_r16(u_int32_t ramType, int adc, int adcCh, int Ch); u_int32_t bus_w(u_int32_t offset, u_int32_t data); u_int32_t bus_r(u_int32_t offset); -int setPhaseShiftOnce(); -int adcPhase(int st); -int getPhase(); -int cleanFifo(); -int setDAQRegister(); - -u_int32_t putout(char *s, int modnum); -u_int32_t readin(int modnum); -u_int32_t setClockDivider(int d); -u_int32_t getClockDivider(); - -void resetPLL(); -u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig); -u_int32_t getPllReconfigReg(u_int32_t reg, int trig); - -u_int32_t setSetLength(int d); -u_int32_t getSetLength(); -u_int32_t setWaitStates(int d); -u_int32_t getWaitStates(); -u_int32_t setTotClockDivider(int d); -u_int32_t getTotClockDivider(); -u_int32_t setTotDutyCycle(int d); -u_int32_t getTotDutyCycle(); -u_int32_t setOversampling(int d); -u_int32_t adcPipeline(int d); -u_int32_t dbitPipeline(int d); - -u_int32_t setExtSignal(int d, enum externalSignalFlag mode); -int getExtSignal(int d); - -u_int32_t setFPGASignal(int d, enum externalSignalFlag mode); -int getFPGASignal(int d); - -int setTiming(int t); - - -int setConfigurationRegister(int d); -int setToT(int d); -int setContinousReadOut(int d); - -int setDACRegister(int idac, int val, int imod); -int getDacRegister(int dacnum); - - -int getTemperature(int tempSensor,int imod); -int initHighVoltage(int val,int imod); -int initConfGain(int isettings,int val,int imod); -int initSpeedConfGain(int val); - -int setADC(int adc); -//int configureMAC(int ipad, long long int macad, long long int detectormacadd, int detipad, int ival, int udpport); -int configureMAC(uint32_t destip,uint64_t destmac,uint64_t sourcemac,int detipad,int ival,uint32_t destport); -int getAdcConfigured(); - - -u_int64_t getDetectorNumber(); -u_int64_t getFirmwareVersion(); -int64_t getId(enum idMode arg); +void initializeDetector(); +int checkType(); +void printVersions(); int testFifos(void); u_int32_t testFpga(void); u_int32_t testRAM(void); int testBus(void); -int setDigitalTestBit(int ival); + +u_int64_t getDetectorNumber(); +u_int64_t getFirmwareVersion(); +int64_t getId(enum idMode arg); + +void defineGPIOpins(); +void resetFPGA(); +void FPGAdontTouchFlash(); +void FPGATouchFlash(); +void eraseFlash(); +int startWritingFPGAprogram(FILE** filefp); +int stopWritingFPGAprogram(FILE* filefp); +int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp); + +long int calcChecksum(int sourceip, int destip); +void configureMAC(uint32_t destip,uint64_t destmac,uint64_t sourcemac,int detipad,int ival,uint32_t destport); int64_t set64BitReg(int64_t value, int aLSB, int aMSB); int64_t get64BitReg(int aLSB, int aMSB); @@ -123,7 +71,6 @@ int64_t getPeriod(); int64_t setTrains(int64_t value); int64_t getTrains(); - int64_t setProbes(int64_t value); int64_t getProbes(); @@ -134,51 +81,56 @@ int64_t getActualTime(); int64_t getMeasurementTime(); int64_t getFramesFromStart(); -u_int32_t runBusy(void); -u_int32_t runState(void); - - -int startStateMachine(); -int stopStateMachine(); -int startReadOut(); -enum runStatus getStatus(); -u_int32_t fifoReset(void); -u_int32_t fifoReadCounter(int fifonum); -u_int32_t fifoReadStatus(); - - -u_int32_t fifo_full(void); - - -void waitForAcquisitionEnd(); -u_int32_t* decode_data(int* datain); -//u_int32_t move_data(u_int64_t* datain, u_int64_t* dataout); int setDynamicRange(int dr); int getDynamicRange(); int getNModBoard(); int setNMod(int n); int getNMod(); -int setStoreInRAM(int b); -int allocateRAM(); +u_int32_t runBusy(void); +u_int32_t runState(void); +int startStateMachine(); +int stopStateMachine(); +int startReadOut(); +enum runStatus getStatus(); +void waitForAcquisitionEnd(); -int writeADC(int addr, int val); -int prepareADC(); +void serializeToSPI(int bitsize, u_int32_t val, u_int16_t csmask, int numbitstosend, u_int16_t clkmask, u_int16_t digoutmask, int digofset); +void initDac(int dacnum); +int setDac(int dacnum, int dacvalue); +int setHighVoltage(int val, int imod); +void setAdc(int addr, int val); +void configureAdc(); +void prepareADC(); +int powerChip (int on); +int setPhaseShiftOnce(); +int adcPhase(int st); +int getPhase(); -int clearRAM(); +u_int32_t putout(char *s, int modnum); +u_int32_t readin(int modnum); +u_int32_t setClockDivider(int d); +u_int32_t getClockDivider(); +void resetPLL(); +u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig); +u_int32_t getPllReconfigReg(u_int32_t reg, int trig); +void configurePll(int i); -int setMaster(int f); -int setSynchronization(int s); +int getTemperature(int tempSensor,int imod); +int initConfGain(int isettings,int val,int imod); +int initSpeedConfGain(int val); + +ROI *setROI(int nroi,ROI* arg,int *retvalsize, int *ret); +int getChannels(); int loadImage(int index, short int ImageVals[]); int readCounterBlock(int startACQ, short int CounterVals[]); int resetCounterBlock(int startACQ); - int calibratePedestal(int frames); - +uint64_t readPatternWord(int addr); uint64_t writePatternWord(int addr, uint64_t word); uint64_t writePatternIOControl(uint64_t word); uint64_t writePatternClkControl(uint64_t word); @@ -186,41 +138,12 @@ int setPatternLoop(int level, int *start, int *stop, int *n); int setPatternWaitAddress(int level, int addr); uint64_t setPatternWaitTime(int level, uint64_t t); - -void initDac(int dacnum); -int setDac(int dacnum,int dacvalue); - -ROI *setROI(int nroi,ROI* arg,int *retvalsize, int *ret); -int getChannels(); - -void eraseFlash(); -int startWritingFPGAprogram(FILE** filefp); -int stopWritingFPGAprogram(FILE* filefp); -int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp); - -/* - -u_int32_t setNBits(u_int32_t); -u_int32_t getNBits(); -*/ - -/* -//move to mcb_funcs? - -int readOutChan(int *val); -u_int32_t getModuleNumber(int modnum); -int testShiftIn(int imod); -int testShiftOut(int imod); -int testShiftStSel(int imod); -int testDataInOut(int num, int imod); -int testExtPulse(int imod); -int testExtPulseMux(int imod, int ow); -int testDataInOutMux(int imod, int ow, int num); -int testOutMux(int imod); -int testFpgaMux(int imod); -int calibration_sensor(int num, int *values, int *dacs) ; -int calibration_chip(int num, int *values, int *dacs); -*/ - +u_int32_t setExtSignal(int d, enum externalSignalFlag mode); +int getExtSignal(int d); +u_int32_t setFPGASignal(int d, enum externalSignalFlag mode); +int getFPGASignal(int d); +int setTiming(int t); +int setMaster(int f); +int setSynchronization(int s); #endif diff --git a/slsDetectorSoftware/jungfrauDetectorServer/mcb_funcs.c b/slsDetectorSoftware/jungfrauDetectorServer/mcb_funcs.c index ac7c05385..3716aaeea 100755 --- a/slsDetectorSoftware/jungfrauDetectorServer/mcb_funcs.c +++ b/slsDetectorSoftware/jungfrauDetectorServer/mcb_funcs.c @@ -18,7 +18,7 @@ /* global variables */ #undef DEBUG -#undef DEBUGOUT + extern enum detectorType myDetectorType; extern int nModX; @@ -799,13 +799,8 @@ int initChip(int obe, int ow,int imod){ int chipmi, chipma, modmi, modma; -#ifdef DEBUGOUT - printf("Initializing chip\n"); -#endif putout("0000000000000000",imod); -#ifdef DEBUGOUT - printf("Output mode= %d\n", ow); -#endif + /* clearing shift in register */ for (i=0; i<10; i++) @@ -842,9 +837,7 @@ int initChip(int obe, int ow,int imod){ putout("0000000000000000",imod); } } -#ifdef DEBUGOUT - printf("Output buffer enable= %d\n", obe); -#endif + if (obe) { putout("0100000000000000",imod); putout("0110000000000000",imod); @@ -1025,16 +1018,12 @@ int initMCBregisters(int cm, int imod){ if (cm) { putout("0000000001000001",imod); -#ifdef DEBUGOUT - printf("enabling cal through sensor\n"); -#endif + } else { putout("0000000001000001",imod); putout("0000000001000000",imod); putout("0000000001000001",imod); -#ifdef DEBUGOUT - printf("disabling cal through sensor\n"); -#endif + } putout("0000000001000000",imod); @@ -1542,9 +1531,7 @@ int testOutMux(int imod) { //dist=2*ibit; if (dist==0) dist=1; -#ifdef DEBUGOUT - printf("Distance is %d\n",dist); -#endif + @@ -1557,9 +1544,7 @@ int testOutMux(int imod) { //for (k=0; k +/* Hardware Definitions */ +#define NMAXMODY 1 +#define NMAXMODX 1 +#define NMAXMOD (NMAXMODX*NMAXMODY) +#define NCHAN (256*256) +#define NCHIP 8 +#define NADC 0 +#define NDAC 8 +#define NCHANS (NCHAN*NCHIP*NMAXMOD) +#define NDACS (NDAC*NMAXMOD) -// Hardware definitions -#define NMAXMODY 1 -#define NMAXMODX 1 -#define NMAXMOD (NMAXMODX*NMAXMODY) -#define NCHAN (256*256) -#define NCHIP 8 -#define NADC 0 -#define NDAC 16 -#define NCHANS (NCHAN*NCHIP*NMAXMOD) -#define NDACS (NDAC*NMAXMOD) - - -/**when moench readout tested with gotthard module*/ -#define GOTTHARDNCHAN 128 -#define GOTTHARDNCHIP 10 - - -#define NTRIMBITS 6 -#define NCOUNTBITS 24 - -#define NCHIPS_PER_ADC 2 - -//#define TRIM_DR ((2**NTRIMBITS)-1) -//#define COUNT_DR ((2**NCOUNTBITS)-1) -#define TRIM_DR (((int)pow(2,NTRIMBITS))-1) -#define COUNT_DR (((int)pow(2,NCOUNTBITS))-1) - - -#define ALLMOD 0xffff -#define ALLFIFO 0xffff - -#define GOTTHARD_ADCSYNC_VAL 0x32214 -#define ADCSYNC_VAL 0x02111 -#define TOKEN_RESTART_DELAY 0x88000000 -#define TOKEN_RESTART_DELAY_ROI 0x1b000000 -#define TOKEN_TIMING_REV1 0x1f16 -#define TOKEN_TIMING_REV2 0x1f0f - -#define DEFAULT_PHASE_SHIFT 0 // 120 +#define DEFAULT_PHASE_SHIFT 0 // 120 #define DEFAULT_IP_PACKETSIZE 0x0522 #define DEFAULT_UDP_PACKETSIZE 0x050E #define ADC1_IP_PACKETSIZE 256*2+14+20 #define ADC1_UDP_PACKETSIZE 256*2+4+8+2 - -#ifdef VIRTUAL -#define DEBUGOUT -#endif - #define CLK_FREQ 156.25E+6 #define ADC_CLK_FREQ 32E+6 +/** DEFAULT */ +enum DACNAMES { VB_COMP, VDD_PROT, VIN_COM, VREF_PRECH, VB_PIXBUF, VB_DS, VREF_DS, VREF_COMP }; +#define DEFAULT_DAC_VALS { 1220, 3000, 1053, 1450, 750, 1000, 480, 420 }; +#define DEFAULT_NUM_FRAMES (1*1000*1000) +#define DEFAULT_NUM_CYCLES (0) +#define DEFAULT_EXPTIME (10*1000) +#define DEFAULT_PERIOD (2*1000*1000) +#define DEFAULT_DELAY (0) +#define DEFAULT_NUM_GATES (0) +#define DEFAULT_HIGH_VOLTAGE (0) +#define DEFAULT_SETTINGS (DYNAMICGAIN) +#define DEFAULT_TX_UDP_PORT (0x7e9a) + +/* Defines in the Firmware */ +#define FIX_PATT_VAL (0xACDC2014) +#define ADC_PORT_INVERT_VAL (0x453b2a9c) +#define ADC_OFST_HALF_SPEED_VAL (0x20) +#define ADC_OFST_QUARTER_SPEED_VAL (0x10) + +/* Maybe not required for jungfrau */ +#define NTRIMBITS 6 +#define NCOUNTBITS 24 +#define NCHIPS_PER_ADC 2 +#define TRIM_DR (((int)pow(2,NTRIMBITS))-1) +#define COUNT_DR (((int)pow(2,NCOUNTBITS))-1) +#define ALLMOD 0xffff +#define ALLFIFO 0xffff + +/* LTC2620 DAC DEFINES */ +#define LTC2620_DAC_CMD_OFST (20) +#define LTC2620_DAC_CMD_MSK (0x0000000F << LTC2620_DAC_CMD_OFST) +#define LTC2620_DAC_ADDR_OFST (16) +#define LTC2620_DAC_ADDR_MSK (0x0000000F << LTC2620_DAC_ADDR_OFST) +#define LTC2620_DAC_DATA_OFST (4) +#define LTC2620_DAC_DATA_MSK (0x00000FFF << LTC2620_DAC_DATA_OFST) + +#define LTC2620_DAC_CMD_WRITE (0x00000000 << LTC2620_DAC_CMD_OFST) +#define LTC2620_DAC_CMD_SET (0x00000003 << LTC2620_DAC_CMD_OFST) +#define LTC2620_DAC_CMD_POWER_DOWN (0x00000004 << LTC2620_DAC_CMD_OFST) +#define LTC2620_DAC_NUMBITS (24) + + +/* MAX1932 HV DEFINES */ +#define MAX1932_HV_NUMBITS (8) +#define MAX1932_HV_DATA_OFST (0) +#define MAX1932_HV_DATA_MSK (0x000000FF << MAX1932_HV_DATA_OFST) + +/* AD9257 ADC DEFINES */ +#define AD9257_ADC_NUMBITS (24) + +#define AD9257_DEV_IND_2_REG (0x04) +#define AD9257_CHAN_H_OFST (0) +#define AD9257_CHAN_H_MSK (0x00000001 << AD9257_CHAN_H_OFST) +#define AD9257_CHAN_G_OFST (1) +#define AD9257_CHAN_G_MSK (0x00000001 << AD9257_CHAN_G_OFST) +#define AD9257_CHAN_F_OFST (2) +#define AD9257_CHAN_F_MSK (0x00000001 << AD9257_CHAN_F_OFST) +#define AD9257_CHAN_E_OFST (3) +#define AD9257_CHAN_E_MSK (0x00000001 << AD9257_CHAN_E_OFST) + +#define AD9257_DEV_IND_1_REG (0x05) +#define AD9257_CHAN_D_OFST (0) +#define AD9257_CHAN_D_MSK (0x00000001 << AD9257_CHAN_D_OFST) +#define AD9257_CHAN_C_OFST (1) +#define AD9257_CHAN_C_MSK (0x00000001 << AD9257_CHAN_C_OFST) +#define AD9257_CHAN_B_OFST (2) +#define AD9257_CHAN_B_MSK (0x00000001 << AD9257_CHAN_B_OFST) +#define AD9257_CHAN_A_OFST (3) +#define AD9257_CHAN_A_MSK (0x00000001 << AD9257_CHAN_A_OFST) +#define AD9257_CLK_CH_DCO_OFST (4) +#define AD9257_CLK_CH_DCO_MSK (0x00000001 << AD9257_CLK_CH_DCO_OFST) +#define AD9257_CLK_CH_IFCO_OFST (5) +#define AD9257_CLK_CH_IFCO_MSK (0x00000001 << AD9257_CLK_CH_IFCO_OFST) + +#define AD9257_POWER_MODE_REG (0x08) +#define AD9257_POWER_INTERNAL_OFST (0) +#define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST) +#define AD9257_INT_RESET_VAL (0x3) +#define AD9257_INT_CHIP_RUN_VAL (0x0) +#define AD9257_POWER_EXTERNAL_OFST (5) +#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST) +#define AD9257_EXT_FULL_POWER_VAL (0x0) +#define AD9257_EXT_STANDBY_VAL (0x1) + +#define AD9257_OUT_MODE_REG (0x14) +#define AD9257_OUT_FORMAT_OFST (0) +#define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST) +#define AD9257_OUT_BINARY_OFST_VAL (0) +#define AD9257_OUT_TWOS_COMPL_VAL (1) +#define AD9257_OUT_LVDS_OPT_OFST (6) +#define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST) +#define AD9257_OUT_LVDS_ANSI_VAL (0) +#define AD9257_OUT_LVDS_IEEE_VAL (1) + +#define AD9257_OUT_PHASE_REG (0x16) +#define AD9257_OUT_CLK_OFST (0) +#define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST) +#define AD9257_OUT_CLK_60_VAL (0x1) +#define AD9257_IN_CLK_OFST (4) +#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST) +#define AD9257_IN_CLK_0_VAL (0x0) + +#define AD9257_VREF_REG (0x18) +#define AD9257_VREF_OFST (0) +#define AD9257_VREF_MSK (0x00000003 << AD9257_VREF_OFST) +#define AD9257_VREF_1_33_VAL (0x2) + +#define AD9257_TEST_MODE_REG (0x0D) +#define AD9257_OUT_TEST_OFST (0) +#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST) +#define AD9257_NONE_VAL (0x0) +#define AD9257_MIXED_BIT_FREQ_VAL (0xC) +#define AD9257_TEST_RESET_SHORT_GEN (4) +#define AD9257_TEST_RESET_LONG_GEN (5) +#define AD9257_USER_IN_MODE_OFST (6) +#define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST) + + + + + #endif diff --git a/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.c b/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.c index fb7e867a7..398a7611b 100755 --- a/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.c +++ b/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.c @@ -910,13 +910,13 @@ int set_dac(int file_des) { if (val>4 || val<0) printf("Cannot set ADC VPP to %d\n",val); else { - writeADC(0x18,val); + setAdc(0x18,val); adcvpp=val; } retval=adcvpp;; } else if (ind==HV_NEW ) - retval=initHighVoltage(val,0); + retval=setHighVoltage(val,0); else printf("**********No dac with index %d\n",ind); } @@ -2411,13 +2411,12 @@ int configure_mac(int file_des) { if(ret==OK) configureMAC(ipad,imacadd,idetectormacadd,detipad,digitalTestBit,udpport); - retval=getAdcConfigured(); } #endif if (ret==FAIL) printf("configuring MAC of mod %d failed\n", imod); else - printf("Configuremac successful of mod %d and adc %d\n",imod,retval); + printf("Configuremac successful of mod %d\n",imod); if (differentClients) ret=FORCE_UPDATE; @@ -2960,7 +2959,7 @@ int write_adc_register(int file_des) { if(ret!=FAIL){ - ret=writeADC(addr,val); + ret=setAdc(addr,val); if (ret==OK) retval=val; }