remove hardcoded MH02 startup

2026-01-20 14:48:54 +01:00 · 2026-01-13 11:05:37 +01:00
parent 045d9440de
commit 0ba1139741
2 changed files with 2 additions and 62 deletions
--- a/slsDetectorServers/xilinx_ctbDetectorServer/chip_config_xilinx.txt
+++ b/slsDetectorServers/xilinx_ctbDetectorServer/chip_config_xilinx.txt
@@ -1,24 +1 @@
-# Prepare MH02 configuration
-reg 0xC00C 0x00040041
-reg 0xC010 0x01200004
-
-# configure Matterhorn SPI
-setbit 0xC014 0
-
-# wait till config is done
-pollbit 0xC014 3 0
-
-# reset transceiver
-reg 0xC120 0x0
-reg 0xC120 0x1
-reg 0xC120 0x0
-
-# set MSB LSB inversions and polarity for transceiver
-reg 0xC120 0x1e0
-
-# Enable MH02 PLL clock
-pattern enable_clock_pattern.pyat
-# start the flow
-setbit 0xB030 0
-clearbit 0xB030 0
-sleep 1
+# nothing
--- a/slsDetectorServers/xilinx_ctbDetectorServer/reset_chip_xilinx.txt
+++ b/slsDetectorServers/xilinx_ctbDetectorServer/reset_chip_xilinx.txt
@@ -1,39 +1,2 @@

-# turn off clock
-clearbit 0xB018 15 
-setbit 0xB010 15
-sleep 1
-
-# reset Matterhorn periphery
-setbit 0xC014 1
-sleep 1
-
-# turn on clock
-clearbit 0xB010 15
-sleep 1
-
-# reset rx transceiver datapath
-setbit 0xC120 4
-sleep 1
-
-# reset 8b10b counters
-setbit 0xC120 9
-setbit 0xC120 10
-setbit 0xC120 11
-setbit 0xC120 12
-sleep 1
-clearbit 0xC120 9
-clearbit 0xC120 10
-
-# reset buffer fifos
-reg 0x9024 0xFFFFFFFF
-reg 0x9028 0xFFFFFFFF
-reg 0x902C 0xFFFFFFFF
-reg 0x9024 0x0
-reg 0x9028 0x0
-reg 0x902C 0x0
-setbit 0xA000 18
-
-# load default pattern
-pattern readout_pattern.pyat
-
+# nothing