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Read and write SPI for Xilinx CTB (#1381)
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Build on RHEL9 / build (push) Successful in 3m25s
Build on RHEL8 / build (push) Successful in 4m37s
Run Simulator Tests on local RHEL9 / build (push) Successful in 14m42s
Build on local RHEL9 / build (push) Successful in 1m26s
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-readSpi and writeSpi in C++ and Python API
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@@ -2954,4 +2954,19 @@ std::vector<uint16_t> Detector::getValidPortNumbers(uint16_t start_port) {
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return res;
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}
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Result<std::vector<uint8_t>> Detector::readSpi(int chip_id, int register_id,
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int n_bytes,
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Positions pos) const {
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return pimpl->Parallel(&Module::readSpi, pos, chip_id, register_id,
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n_bytes);
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}
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void Detector::writeSpi(int chip_id, int register_id,
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const std::vector<uint8_t> &data, Positions pos){
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pimpl->Parallel(&Module::writeSpi, pos, chip_id, register_id, data);
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}
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} // namespace sls
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