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https://github.com/slsdetectorgroup/slsDetectorPackage.git
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ctb server:
- allowed flags resetfpga and programfpga for moench and ctb - set a minimum voltage for vio as it powers the fpga (1200mV) - changed the min and max for vchip and power regulators due to tolerance - fixed pattern read function - fixed minor bugs with input of ctb patterns(waittime) and mode other than 1 - fixed calibration current register for i2c for tolerance (/1.2268) - fixed current readout of i2c - added digital, analog and normal readouts for flags
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@ -74,6 +74,7 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7, D8, D9,
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#define POWER_RGLTR_MIN (636)
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#define POWER_RGLTR_MAX (2638) // min dac val (not vchip-max) because of dac conversions
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#define VCHIP_POWER_INCRMNT (200)
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#define VIO_MIN_MV (1200) // for fpga to function
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/* Defines in the Firmware */
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#define WAIT_TME_US_FR_LK_AT_ME_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo
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