mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-04-26 08:10:02 +02:00
mythen3: connected busy signal insttead of timer
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parent
af9b25fd67
commit
086cbacd84
@ -96,15 +96,13 @@
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#define CONFIG_DYNAMIC_RANGE_16_VAL ((0x2 << CONFIG_DYNAMIC_RANGE_OFST) & CONFIG_DYNAMIC_RANGE_MSK)
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#define CONFIG_DYNAMIC_RANGE_16_VAL ((0x2 << CONFIG_DYNAMIC_RANGE_OFST) & CONFIG_DYNAMIC_RANGE_MSK)
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#define CONFIG_DYNAMIC_RANGE_24_VAL ((0x3 << CONFIG_DYNAMIC_RANGE_OFST) & CONFIG_DYNAMIC_RANGE_MSK)
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#define CONFIG_DYNAMIC_RANGE_24_VAL ((0x3 << CONFIG_DYNAMIC_RANGE_OFST) & CONFIG_DYNAMIC_RANGE_MSK)
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/* Control RW register */ // assumed for MY3
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/* Control RW register */
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#define CONTROL_REG (0x21 * REG_OFFSET + BASE_CONTROL)
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#define CONTROL_REG (0x21 * REG_OFFSET + BASE_CONTROL)
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#define CONTROL_STRT_ACQSTN_OFST (0)
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#define CONTROL_STRT_ACQSTN_OFST (0)
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#define CONTROL_STRT_ACQSTN_MSK (0x00000001 << CONTROL_STRT_ACQSTN_OFST)
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#define CONTROL_STRT_ACQSTN_MSK (0x00000001 << CONTROL_STRT_ACQSTN_OFST)
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#define CONTROL_STP_ACQSTN_OFST (1)
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#define CONTROL_STP_ACQSTN_OFST (1)
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#define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST)
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#define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST)
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//#define CONTROL_RN_BSY_OFST (2) // assumed for MY3 TODO
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//#define CONTROL_RN_BSY_MSK (0x00000001 << CONTROL_RN_BSY_OFST)
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#define CONTROL_CRE_RST_OFST (10)
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#define CONTROL_CRE_RST_OFST (10)
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#define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST)
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#define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST)
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#define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10?
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#define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10?
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@ -125,6 +123,18 @@
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/* Pattern status Register*/
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/* Pattern status Register*/
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#define PAT_STATUS_REG (0x00 * REG_OFFSET + BASE_PATTERN_CONTROL)
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#define PAT_STATUS_REG (0x00 * REG_OFFSET + BASE_PATTERN_CONTROL)
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#define PAT_STATUS_RUN_BUSY_OFST (0)
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#define PAT_STATUS_RUN_BUSY_MSK (0x00000001 << PAT_STATUS_RUN_BUSY_OFST)
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#define PAT_STATUS_WAIT_FOR_TRGGR_OFST (0)
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#define PAT_STATUS_WAIT_FOR_TRGGR_MSK (0x00000001 << PAT_STATUS_WAIT_FOR_TRGGR_OFST)
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#define PAT_STATUS_DLY_BFRE_TRGGR_OFST (0)
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#define PAT_STATUS_DLY_BFRE_TRGGR_MSK (0x00000001 << PAT_STATUS_DLY_BFRE_TRGGR_OFST)
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#define PAT_STATUS_FIFO_FULL_OFST (0)
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#define PAT_STATUS_FIFO_FULL_MSK (0x00000001 << PAT_STATUS_FIFO_FULL_OFST)
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#define PAT_STATUS_DLY_AFTR_TRGGR_OFST (0)
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#define PAT_STATUS_DLY_AFTR_TRGGR_MSK (0x00000001 << PAT_STATUS_DLY_AFTR_TRGGR_OFST)
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#define PAT_STATUS_CSM_BUSY_OFST (0)
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#define PAT_STATUS_CSM_BUSY_MSK (0x00000001 << PAT_STATUS_CSM_BUSY_OFST)
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/* Delay left 64bit Register */
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/* Delay left 64bit Register */
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#define GET_DELAY_LSB_REG (0x02 * REG_OFFSET + BASE_PATTERN_CONTROL)
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#define GET_DELAY_LSB_REG (0x02 * REG_OFFSET + BASE_PATTERN_CONTROL)
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Binary file not shown.
@ -17,10 +17,6 @@
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#include <pthread.h>
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#include <pthread.h>
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#include <time.h>
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#include <time.h>
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#endif
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#endif
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// ------------------------------------------
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#include <time.h>
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// ------------------------------------------
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// Global variable from slsDetectorServer_funcs
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// Global variable from slsDetectorServer_funcs
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extern int debugflag;
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extern int debugflag;
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@ -35,9 +31,6 @@ pthread_t pthread_virtual_tid;
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int virtual_status = 0;
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int virtual_status = 0;
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int virtual_stop = 0;
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int virtual_stop = 0;
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#endif
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#endif
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// ------------------------------------------
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int temp_status = 0;
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// ------------------------------------------
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int32_t clkPhase[NUM_CLOCKS] = {0, 0, 0, 0, 0};
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int32_t clkPhase[NUM_CLOCKS] = {0, 0, 0, 0, 0};
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uint32_t clkFrequency[NUM_CLOCKS] = {0, 0, 0, 0, 0};
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uint32_t clkFrequency[NUM_CLOCKS] = {0, 0, 0, 0, 0};
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@ -69,7 +62,7 @@ void basictests() {
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}
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}
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return;
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return;
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#else
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#else
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FILE_LOG(logINFOBLUE, ("******** Mythen3 Server: do the checks *****************\n"));
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FILE_LOG(logINFOBLUE, ("************ Mythen3 Server *********************\n"));
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if (mapCSP0() == FAIL) {
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if (mapCSP0() == FAIL) {
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strcpy(initErrorMessage,
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strcpy(initErrorMessage,
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"Could not map to memory. Dangerous to continue.\n");
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"Could not map to memory. Dangerous to continue.\n");
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@ -97,7 +90,7 @@ void basictests() {
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if (fwversion >= MIN_REQRD_VRSN_T_RD_API)
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if (fwversion >= MIN_REQRD_VRSN_T_RD_API)
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sw_fw_apiversion = getFirmwareAPIVersion();
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sw_fw_apiversion = getFirmwareAPIVersion();
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FILE_LOG(logINFOBLUE, ("************ Mythen3 Server *********************\n"
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FILE_LOG(logINFOBLUE, ("*************************************************\n"
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"Hardware Version:\t\t 0x%x\n"
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"Hardware Version:\t\t 0x%x\n"
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"Detector IP Addr:\t\t 0x%x\n"
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"Detector IP Addr:\t\t 0x%x\n"
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@ -1230,9 +1223,6 @@ int startStateMachine(){
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FILE_LOG(logINFOBLUE, ("Starting State Machine\n"));
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FILE_LOG(logINFOBLUE, ("Starting State Machine\n"));
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cleanFifos();
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cleanFifos();
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// ------------------------------------------
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temp_status = 1;
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// ------------------------------------------
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//start state machine
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//start state machine
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bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_ACQSTN_MSK);
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bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_ACQSTN_MSK);
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@ -1311,45 +1301,53 @@ enum runStatus getRunStatus(){
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}
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}
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#endif
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#endif
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FILE_LOG(logDEBUG1, ("Getting status\n"));
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FILE_LOG(logDEBUG1, ("Getting status\n"));
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uint32_t retval = bus_r(PAT_STATUS_REG);
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FILE_LOG(logINFO, ("Status Register: %08x\n",retval));
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// ------------------------------------------
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enum runStatus s;
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//uint32_t retval = bus_r(STATUS_REG);
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//FILE_LOG(logINFO, ("Status Register: %08x\n",retval));
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// running
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if (temp_status) {
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//if(retval & CONTROL_RN_BSY_MSK) {
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// ------------------------------------------
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FILE_LOG(logINFOBLUE, ("Status: Running\n"));
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return RUNNING;
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//running
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if (retval & PAT_STATUS_RUN_BUSY_MSK) {
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if (retval & PAT_STATUS_WAIT_FOR_TRGGR_MSK) {
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FILE_LOG(logINFOBLUE, ("Status: WAITING\n"));
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s = WAITING;
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} else {
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if (retval & PAT_STATUS_DLY_BFRE_TRGGR_MSK) {
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FILE_LOG(logINFO, ("Status: Delay before Trigger\n"));
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} else if (retval & PAT_STATUS_DLY_AFTR_TRGGR_MSK) {
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FILE_LOG(logINFO, ("Status: Delay after Trigger\n"));
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}
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FILE_LOG(logINFOBLUE, ("Status: RUNNING\n"));
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s = RUNNING;
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}
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}
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}
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return IDLE;
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//not running
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else {
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// stopped or error
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if (retval & PAT_STATUS_FIFO_FULL_MSK) {
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FILE_LOG(logINFOBLUE, ("Status: STOPPED\n")); //FIFO FULL??
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s = STOPPED;
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} else if (retval & PAT_STATUS_CSM_BUSY_MSK) {
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FILE_LOG(logINFOBLUE, ("Status: READ MACHINE BUSY\n"));
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s = TRANSMITTING;
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} else if (!retval) {
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FILE_LOG(logINFOBLUE, ("Status: IDLE\n"));
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s = IDLE;
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} else {
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FILE_LOG(logERROR, ("Status: Unknown status %08x\n", retval));
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s = ERROR;
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}
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}
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return s;
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}
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}
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void readFrame(int *ret, char *mess){
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void readFrame(int *ret, char *mess){
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// wait for status to be done
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// wait for status to be done
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while(runBusy()){
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// ------------------------------------------
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usleep(500);
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//while(runBusy()){
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}
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// usleep(500);
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//}
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int64_t periodns = getPeriod();
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int numFrames = getNumFrames();
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int frameNr = 0;
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// loop over number of frames
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for(frameNr=0; frameNr!= numFrames; ++frameNr ) {
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// sleep for exposure time
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struct timespec begin, end;
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clock_gettime(CLOCK_REALTIME, &begin);
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usleep(periodns / 1000);
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clock_gettime(CLOCK_REALTIME, &end);
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}
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usleep(1 * 1000 * 1000);
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temp_status = 0;
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// ------------------------------------------
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#ifdef VIRTUAL
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#ifdef VIRTUAL
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FILE_LOG(logINFOGREEN, ("acquisition successfully finished\n"));
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FILE_LOG(logINFOGREEN, ("acquisition successfully finished\n"));
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@ -1372,13 +1370,9 @@ u_int32_t runBusy() {
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#ifdef VIRTUAL
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#ifdef VIRTUAL
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return virtual_status;
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return virtual_status;
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#endif
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#endif
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u_int32_t s = (bus_r(PAT_STATUS_REG) & PAT_STATUS_RUN_BUSY_MSK);
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// ------------------------------------------
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FILE_LOG(logDEBUG1, ("Status Register: %08x\n", s));
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return temp_status;
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return s;
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//u_int32_t s = (bus_r(CONTROL_REG) & CONTROL_RN_BSY_OFST);
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//FILE_LOG(logDEBUG1, ("Status Register: %08x\n", s));
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//return s;
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// ------------------------------------------
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}
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}
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/* common */
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/* common */
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@ -5,8 +5,8 @@
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#define APIGUI 0x190723
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#define APIGUI 0x190723
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#define APIMOENCH 0x190820
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#define APIMOENCH 0x190820
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#define APIGOTTHARD2 0x191127
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#define APIGOTTHARD2 0x191127
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#define APIMYTHEN3 0x191127
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#define APIGOTTHARD 0x191127
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#define APIGOTTHARD 0x191127
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#define APIJUNGFRAU 0x191127
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#define APIJUNGFRAU 0x191127
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#define APICTB 0x191210
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#define APICTB 0x191210
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#define APIEIGER 0x191210
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#define APIEIGER 0x191210
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#define APIMYTHEN3 0x191210
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