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ctb server: server starts up good. Need to debug each function in detail

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maliakal_d
2019-02-06 15:50:44 +01:00
parent bb37915419
commit 076faa62e0
17 changed files with 124 additions and 112 deletions
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2
slsDetectorServers/ctbDetectorServer/Makefile
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@ -1,6 +1,6 @@
CROSS = bfin-uclinux- CROSS = bfin-uclinux-
CC = $(CROSS)gcc CC = $(CROSS)gcc
CFLAGS += -Wall -DCHIPTESTBOARDD -DSTOP_SERVER #-DJCTB -DVERBOSEI #-DVERBOSE CFLAGS += -Wall -DCHIPTESTBOARDD -DSTOP_SERVER -DDEBUG1 #-DJCTB -DVERBOSEI #-DVERBOSE
LDLIBS += -lm -lstdc++ LDLIBS += -lm -lstdc++
PROGS = ctbDetectorServer PROGS = ctbDetectorServer

2
slsDetectorServers/ctbDetectorServer/RegisterDefs.h
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@ -15,7 +15,7 @@
/* Fix pattern RO register */ /* Fix pattern RO register */
#define FIX_PATT_REG (0x01 << MEM_MAP_SHIFT) #define FIX_PATT_REG (0x01 << MEM_MAP_SHIFT)
#define FIX_PATT_VAL (0xACDC2014) #define FIX_PATT_VAL (0xACDC2016)
/* Status RO register */ /* Status RO register */
#define STATUS_REG (0x02 << MEM_MAP_SHIFT) #define STATUS_REG (0x02 << MEM_MAP_SHIFT)

8
slsDetectorServers/ctbDetectorServer/gitInfo.txt
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@ -1,9 +1,9 @@
Path: slsDetectorPackage/slsDetectorServers/ctbDetectorServer Path: slsDetectorPackage/slsDetectorServers/ctbDetectorServer
URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repsitory UUID: 9d9251293d1a0b5300b8d7191949cf01de1c7b81 Repsitory UUID: bb37915419c92539129343611cfd9bf3cdfc0bda
Revision: 11 Revision: 12
Branch: refactor Branch: refactor
Last Changed Author: Dhanya_Thattil Last Changed Author: Dhanya_Thattil
Last Changed Rev: 4255 Last Changed Rev: 4297
Last Changed Date: 2019-01-15 19:51:41.000000002 +0100 ./RegisterDefs.h Last Changed Date: 2019-02-06 08:43:16.000000002 +0100 ./RegisterDefs.h

6
slsDetectorServers/ctbDetectorServer/gitInfoCtb.h
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@ -1,6 +1,6 @@
#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git" #define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
#define GITREPUUID "9d9251293d1a0b5300b8d7191949cf01de1c7b81" #define GITREPUUID "bb37915419c92539129343611cfd9bf3cdfc0bda"
#define GITAUTH "Dhanya_Thattil" #define GITAUTH "Dhanya_Thattil"
#define GITREV 0x4255 #define GITREV 0x4297
#define GITDATE 0x20190115 #define GITDATE 0x20190206
#define GITBRANCH "refactor" #define GITBRANCH "refactor"

103
slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c
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@ -97,7 +97,7 @@ void basictests() {
FILE_LOG(logERROR, ("%s\n\n", firmware_message)); FILE_LOG(logERROR, ("%s\n\n", firmware_message));
firmware_compatibility = FAIL; firmware_compatibility = FAIL;
firmware_check_done = 1; firmware_check_done = 1;
return; cprintf(RED,"exiting for now!\n");exit(-1); return;
} }
uint16_t hversion = getHardwareVersionNumber(); uint16_t hversion = getHardwareVersionNumber();
@ -178,7 +178,7 @@ void basictests() {
firmware_check_done = 1; firmware_check_done = 1;
return; return;
} }
FILE_LOG(logINFO, ("Compatibility - success\n")); FILE_LOG(logINFO, ("\tCompatibility - success\n"));
firmware_check_done = 1; firmware_check_done = 1;
#endif #endif
} }
@ -188,11 +188,10 @@ int checkType() {
return OK; return OK;
#endif #endif
uint32_t type = ((bus_r(FPGA_VERSION_REG) & FPGA_VERSION_DTCTR_TYP_MSK) >> FPGA_VERSION_DTCTR_TYP_OFST); uint32_t type = ((bus_r(FPGA_VERSION_REG) & FPGA_VERSION_DTCTR_TYP_MSK) >> FPGA_VERSION_DTCTR_TYP_OFST);
uint32_t expectedType = (((FPGA_VERSION_DTCTR_TYP_CTB_VAL) & FPGA_VERSION_DTCTR_TYP_MSK) >> FPGA_VERSION_DTCTR_TYP_OFST);
uint32_t expectedType = FPGA_VERSION_DTCTR_TYP_CTB_VAL;
if (type != expectedType) { if (type != expectedType) {
FILE_LOG(logERROR, ("This is not a Chip Test Board Server (read %d, expected %d)\n", FILE_LOG(logERROR, ("(Type Fail) - This is not a Chip Test Board Server (read %d, expected %d)\n",
type, expectedType)); type, expectedType));
return FAIL; return FAIL;
} }
@ -209,7 +208,7 @@ uint32_t testFpga(void) {
int ret = OK; int ret = OK;
uint32_t val = bus_r(FIX_PATT_REG); uint32_t val = bus_r(FIX_PATT_REG);
if (val == FIX_PATT_VAL) { if (val == FIX_PATT_VAL) {
FILE_LOG(logINFO, ("Fixed pattern: successful match (0x%08x)\n",val)); FILE_LOG(logINFO, ("\tFixed pattern: successful match (0x%08x)\n",val));
} else { } else {
FILE_LOG(logERROR, ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL)); FILE_LOG(logERROR, ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL));
ret = FAIL; ret = FAIL;
@ -267,7 +266,7 @@ uint32_t testFpga(void) {
// write back previous value // write back previous value
bus_w(addr, previousValue); bus_w(addr, previousValue);
if (ret == OK) { if (ret == OK) {
FILE_LOG(logINFO, ("Successfully tested FPGA Delay LSB Register %d times\n", times)); FILE_LOG(logINFO, ("\tSuccessfully tested FPGA Delay LSB Register %d times\n", times));
} }
} }
@ -305,7 +304,7 @@ int testBus() {
bus_w(addr, previousValue); bus_w(addr, previousValue);
if (ret == OK) { if (ret == OK) {
FILE_LOG(logINFO, ("Successfully tested bus %d times\n", times)); FILE_LOG(logINFO, ("\tSuccessfully tested bus %d times\n", times));
} }
return ret; return ret;
} }
@ -448,7 +447,7 @@ void initStopServer() {
/* set up detector */ /* set up detector */
void setupDetector() { void setupDetector() {
FILE_LOG(logINFO, ("This Server is for 1 Jungfrau module (500k)\n")); FILE_LOG(logINFO, ("This Server is for 1 Chip Test Board module\n"));
// default variables // default variables
dataBytes = 0; dataBytes = 0;
@ -460,8 +459,11 @@ void setupDetector() {
int i = 0; int i = 0;
for (i = 0; i < NUM_CLOCKS; ++i) { for (i = 0; i < NUM_CLOCKS; ++i) {
clkPhase[i] = 0; clkPhase[i] = 0;
clkDivider[i] = 0;
} }
clkDivider[RUN_CLK] = DEFAULT_RUN_CLK;
clkDivider[ADC_CLK] = DEFAULT_ADC_CLK;
clkDivider[SYNC_CLK] = DEFAULT_SYNC_CLK;
clkDivider[DBIT_CLK] = DEFAULT_DBIT_CLK;
for (i = 0; i < NDAC; ++i) for (i = 0; i < NDAC; ++i)
dacValues[i] = -1; dacValues[i] = -1;
} }
@ -480,6 +482,9 @@ void setupDetector() {
resetPeripheral(); resetPeripheral();
cleanFifos(); cleanFifos();
// dac defines here as it is used earlier
LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK, SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_OFST, NDAC, DAC_MIN_MV, DAC_MAX_MV);
// hv // hv
MAX1932_SetDefines(SPI_REG, SPI_HV_SRL_CS_OTPT_MSK, SPI_HV_SRL_CLK_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_OFST, HIGHVOLTAGE_MIN, HIGHVOLTAGE_MAX); MAX1932_SetDefines(SPI_REG, SPI_HV_SRL_CS_OTPT_MSK, SPI_HV_SRL_CLK_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_OFST, HIGHVOLTAGE_MIN, HIGHVOLTAGE_MAX);
MAX1932_Disable(); MAX1932_Disable();
@ -493,8 +498,7 @@ void setupDetector() {
INA226_CalibrateCurrentRegister(I2C_POWER_VB_DEVICE_ID); INA226_CalibrateCurrentRegister(I2C_POWER_VB_DEVICE_ID);
INA226_CalibrateCurrentRegister(I2C_POWER_VC_DEVICE_ID); INA226_CalibrateCurrentRegister(I2C_POWER_VC_DEVICE_ID);
INA226_CalibrateCurrentRegister(I2C_POWER_VD_DEVICE_ID); INA226_CalibrateCurrentRegister(I2C_POWER_VD_DEVICE_ID);
// switch off powerOff();
powerChip(0);
setVchip(VCHIP_MIN_MV); setVchip(VCHIP_MIN_MV);
// adcs // adcs
@ -508,11 +512,12 @@ void setupDetector() {
AD7689_Configure(); AD7689_Configure();
// dacs // dacs
LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK, SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_OFST, NDAC, DAC_MIN_MV, DAC_MAX_MV); // defined earlier as power regulators (above) require them
LTC2620_Disable(); LTC2620_Disable();
LTC2620_Configure(); LTC2620_Configure();
//FIXME: //FIXME:
// switch off dacs (power regulators most likely only sets to minimum (if power enable on)) // switch off dacs (power regulators most likely only sets to minimum (if power enable on))
FILE_LOG(logINFOBLUE, ("Powering down all dacs\n"));
{ {
int idac = 0; int idac = 0;
for (idac = 0; idac < NDAC; ++idac) { for (idac = 0; idac < NDAC; ++idac) {
@ -573,7 +578,7 @@ int allocateRAM() {
"Probably cause: Memory Leak.\n")); "Probably cause: Memory Leak.\n"));
return FAIL; return FAIL;
} }
FILE_LOG(logINFO, ("RAM allocated to %d bytes\n", dataBytes)); FILE_LOG(logINFO, ("\tRAM allocated to %d bytes\n", dataBytes));
return OK; return OK;
} }
@ -581,7 +586,7 @@ void updateDataBytes() {
int oldDataBytes = dataBytes; int oldDataBytes = dataBytes;
dataBytes = NCHIP * getChannels() * NUM_BYTES_PER_PIXEL * nSamples; dataBytes = NCHIP * getChannels() * NUM_BYTES_PER_PIXEL * nSamples;
if (dataBytes != oldDataBytes) { if (dataBytes != oldDataBytes) {
FILE_LOG(logINFO, ("Updating Databytes: %d\n", dataBytes)); FILE_LOG(logINFO, ("\tUpdating Databytes: %d\n", dataBytes));
} }
} }
@ -671,7 +676,7 @@ ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret) {
if (ich >= 0 && ich < NCHAN_ANALOG) if (ich >= 0 && ich < NCHAN_ANALOG)
adcDisableMask &= ~(1 << ich); adcDisableMask &= ~(1 << ich);
FILE_LOG(logDEBUG1, ("\t%d: ich:%d adcDisableMask:0x%08x\n", FILE_LOG(logDEBUG1, ("%d: ich:%d adcDisableMask:0x%08x\n",
iroi, ich, adcDisableMask)); iroi, ich, adcDisableMask));
} }
} }
@ -682,7 +687,7 @@ ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret) {
// get roi // get roi
adcDisableMask = bus_r(addr); adcDisableMask = bus_r(addr);
FILE_LOG(logDEBUG1, ("\tGetting adcDisableMask: 0x%08x\n", adcDisableMask)); FILE_LOG(logDEBUG1, ("Getting adcDisableMask: 0x%08x\n", adcDisableMask));
nROI = 0; nROI = 0;
if (adcDisableMask) { if (adcDisableMask) {
@ -854,13 +859,13 @@ enum readOutFlags setReadOutFlags(enum readOutFlags val) {
digitalEnable = ((regval & CONFIG_ENBLE_DGTL_OTPT_MSK) >> CONFIG_ENBLE_DGTL_OTPT_OFST); digitalEnable = ((regval & CONFIG_ENBLE_DGTL_OTPT_MSK) >> CONFIG_ENBLE_DGTL_OTPT_OFST);
if (analogEnable && digitalEnable) { if (analogEnable && digitalEnable) {
FILE_LOG(logDEBUG1, ("\tGetting readout: Analog & Digital\n")); FILE_LOG(logDEBUG1, ("Getting readout: Analog & Digital\n"));
retval = ANALOG_AND_DIGITAL; retval = ANALOG_AND_DIGITAL;
} else if (analogEnable && !digitalEnable) { } else if (analogEnable && !digitalEnable) {
FILE_LOG(logDEBUG1, ("\tGetting readout: Normal\n")); FILE_LOG(logDEBUG1, ("Getting readout: Normal\n"));
retval = NORMAL_READOUT; retval = NORMAL_READOUT;
} else if (!analogEnable && digitalEnable) { } else if (!analogEnable && digitalEnable) {
FILE_LOG(logDEBUG1, ("\tGetting readout: Digital Only\n")); FILE_LOG(logDEBUG1, ("Getting readout: Digital Only\n"));
retval = DIGITAL_ONLY; retval = DIGITAL_ONLY;
} else { } else {
FILE_LOG(logERROR, ("Read unknown readout (Both digital and analog are disabled). " FILE_LOG(logERROR, ("Read unknown readout (Both digital and analog are disabled). "
@ -889,7 +894,7 @@ int64_t setTimer(enum timerIndex ind, int64_t val) {
FILE_LOG(logINFO, ("Setting #frames: %lld\n",(long long int)val)); FILE_LOG(logINFO, ("Setting #frames: %lld\n",(long long int)val));
} }
retval = set64BitReg(val, FRAMES_LSB_REG, FRAMES_MSB_REG); retval = set64BitReg(val, FRAMES_LSB_REG, FRAMES_MSB_REG);
FILE_LOG(logDEBUG1, ("Getting #frames: %lld\n", (long long int)retval)); FILE_LOG(logINFO, ("\tGetting #frames: %lld\n", (long long int)retval));
break; break;
case FRAME_PERIOD: case FRAME_PERIOD:
@ -907,7 +912,7 @@ int64_t setTimer(enum timerIndex ind, int64_t val) {
}*/ }*/
} }
retval = set64BitReg(val, PERIOD_LSB_REG, PERIOD_MSB_REG )/ (1E-3 * clkDivider[ADC_CLK]); retval = set64BitReg(val, PERIOD_LSB_REG, PERIOD_MSB_REG )/ (1E-3 * clkDivider[ADC_CLK]);
FILE_LOG(logDEBUG1, ("Getting period: %lldns\n", (long long int)retval)); FILE_LOG(logINFO, ("\tGetting period: %lldns\n", (long long int)retval));
break; break;
case DELAY_AFTER_TRIGGER: case DELAY_AFTER_TRIGGER:
@ -916,7 +921,7 @@ int64_t setTimer(enum timerIndex ind, int64_t val) {
val *= (1E-3 * clkDivider[ADC_CLK]); val *= (1E-3 * clkDivider[ADC_CLK]);
} }
retval = set64BitReg(val, DELAY_LSB_REG, DELAY_MSB_REG) / (1E-3 * clkDivider[ADC_CLK]); retval = set64BitReg(val, DELAY_LSB_REG, DELAY_MSB_REG) / (1E-3 * clkDivider[ADC_CLK]);
FILE_LOG(logDEBUG1, ("Getting delay: %lldns\n", (long long int)retval)); FILE_LOG(logINFO, ("\tGetting delay: %lldns\n", (long long int)retval));
break; break;
case CYCLES_NUMBER: case CYCLES_NUMBER:
@ -924,7 +929,7 @@ int64_t setTimer(enum timerIndex ind, int64_t val) {
FILE_LOG(logINFO, ("Setting #cycles: %lld\n", (long long int)val)); FILE_LOG(logINFO, ("Setting #cycles: %lld\n", (long long int)val));
} }
retval = set64BitReg(val, CYCLES_LSB_REG, CYCLES_MSB_REG); retval = set64BitReg(val, CYCLES_LSB_REG, CYCLES_MSB_REG);
FILE_LOG(logDEBUG1, ("Getting #cycles: %lld\n", (long long int)retval)); FILE_LOG(logINFO, ("\tGetting #cycles: %lld\n", (long long int)retval));
break; break;
case SAMPLES: case SAMPLES:
@ -937,7 +942,7 @@ int64_t setTimer(enum timerIndex ind, int64_t val) {
} }
} }
retval = nSamples; retval = nSamples;
FILE_LOG(logDEBUG1, ("Getting #samples: %lld\n", (long long int)retval)); FILE_LOG(logINFO, ("\tGetting #samples: %lld\n", (long long int)retval));
break; break;
@ -1027,7 +1032,7 @@ enum detectorSettings getSettings() {
void setDAC(enum DACINDEX ind, int val, int mV) { void setDAC(enum DACINDEX ind, int val, int mV) {
if (val < 0) if (val < 0 && val != LTC2620_PWR_DOWN_VAL)
return; return;
FILE_LOG(logDEBUG1, ("Setting dac[%d]: %d %s \n", (int)ind, val, (mV ? "mV" : "dac units"))); FILE_LOG(logDEBUG1, ("Setting dac[%d]: %d %s \n", (int)ind, val, (mV ? "mV" : "dac units")));
@ -1115,7 +1120,7 @@ int getVchip() {
void setVchip(int val) { void setVchip(int val) {
// set vchip // set vchip
if (val != -1) { if (val != -1) {
FILE_LOG(logINFO, ("Setting Vchip to %d mV\n", val)); FILE_LOG(logINFOBLUE, ("Setting Vchip to %d mV\n", val));
int dacval = LTC2620_PWR_DOWN_VAL; int dacval = LTC2620_PWR_DOWN_VAL;
@ -1316,6 +1321,14 @@ void setPower(enum DACINDEX ind, int val) {
} }
} }
void powerOff() {
uint32_t addr = POWER_REG;
FILE_LOG(logINFO, ("Powering off all voltage regulators\n"));
bus_w(addr, bus_r(addr) & (~POWER_ENBL_VLTG_RGLTR_MSK));
FILE_LOG(logDEBUG1, ("Power Register: 0x%08x\n", bus_r(addr)));
}
int getADC(enum ADCINDEX ind){ int getADC(enum ADCINDEX ind){
#ifdef VIRTUAL #ifdef VIRTUAL
return 0; return 0;
@ -1362,7 +1375,7 @@ int setHighVoltage(int val){
// setting hv // setting hv
if (val >= 0) { if (val >= 0) {
FILE_LOG(logINFO, ("Setting High voltage: %d V", val)); FILE_LOG(logINFO, ("Setting High voltage: %d V\n", val));
uint32_t addr = POWER_REG; uint32_t addr = POWER_REG;
// switch off high voltage // switch off high voltage
@ -1525,27 +1538,7 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
/* jungfrau specific - pll, flashing fpga */ /* ctb specific - pll, flashing fpga */
// only for moench
int powerChip(int on) {
uint32_t addr = POWER_REG;
if (on >= 0) {
FILE_LOG(logINFO, ("Powering %s\n", (on > 0 ? "on" : "off")));
if (on)
bus_w(addr, bus_r(addr) | POWER_ENBL_VLTG_RGLTR_MSK);
else
bus_w(addr, bus_r(addr) & (~POWER_ENBL_VLTG_RGLTR_MSK));
}
uint32_t regval = bus_r(addr);
FILE_LOG(logDEBUG1, ("\tPower Register: 0x%08x\n", regval));
if (regval & POWER_ENBL_VLTG_RGLTR_MSK)
return 1;
return 0;
}
int sendUDP(int enable) { int sendUDP(int enable) {
FILE_LOG(logINFO, ("Sending via %s\n", (enable ? "Receiver" : "CPU"))); FILE_LOG(logINFO, ("Sending via %s\n", (enable ? "Receiver" : "CPU")));
@ -1673,7 +1666,7 @@ void setAdcOffsetRegister(int adc, int val) {
bus_w(addr, bus_r(addr) & ~ mask); bus_w(addr, bus_r(addr) & ~ mask);
// set value // set value
bus_w(addr, bus_r(addr) | ((val << offset) & mask)); bus_w(addr, bus_r(addr) | ((val << offset) & mask));
FILE_LOG(logDEBUG1, ("\t %s Offset: 0x%8x\n", (adc ? "ADC" : "Dbit"), bus_r(addr))); FILE_LOG(logDEBUG1, (" %s Offset: 0x%8x\n", (adc ? "ADC" : "Dbit"), bus_r(addr)));
} }
int getAdcOffsetRegister(int adc) { int getAdcOffsetRegister(int adc) {
@ -1688,7 +1681,7 @@ uint64_t writePatternIOControl(uint64_t word) {
set64BitReg(word, PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG); set64BitReg(word, PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG);
} }
uint64_t retval = get64BitReg(PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG); uint64_t retval = get64BitReg(PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG);
FILE_LOG(logDEBUG1, ("\tI/O Control: 0x%llx\n", (long long int) retval)); FILE_LOG(logDEBUG1, ("I/O Control: 0x%llx\n", (long long int) retval));
return retval; return retval;
} }
@ -1698,7 +1691,7 @@ uint64_t writePatternClkControl(uint64_t word) {
set64BitReg(word, PATTERN_IO_CLK_CNTRL_LSB_REG, PATTERN_IO_CLK_CNTRL_MSB_REG); set64BitReg(word, PATTERN_IO_CLK_CNTRL_LSB_REG, PATTERN_IO_CLK_CNTRL_MSB_REG);
} }
uint64_t retval = get64BitReg(PATTERN_IO_CLK_CNTRL_LSB_REG, PATTERN_IO_CLK_CNTRL_MSB_REG); uint64_t retval = get64BitReg(PATTERN_IO_CLK_CNTRL_LSB_REG, PATTERN_IO_CLK_CNTRL_MSB_REG);
FILE_LOG(logDEBUG1, ("\tClock Control: 0x%llx\n", (long long int) retval)); FILE_LOG(logDEBUG1, ("Clock Control: 0x%llx\n", (long long int) retval));
return retval; return retval;
} }
@ -1721,7 +1714,7 @@ uint64_t readPatternWord(int addr) {
// read value // read value
uint64_t retval = get64BitReg(PATTERN_OUT_LSB_REG, PATTERN_OUT_MSB_REG); uint64_t retval = get64BitReg(PATTERN_OUT_LSB_REG, PATTERN_OUT_MSB_REG);
FILE_LOG(logDEBUG1, ("\tWord(addr:%d): 0x%llx\n", addr, (long long int) retval)); FILE_LOG(logDEBUG1, ("Word(addr:%d): 0x%llx\n", addr, (long long int) retval));
// unset read strobe // unset read strobe
bus_w(reg, bus_r(reg) & (~PATTERN_CNTRL_RD_MSK)); bus_w(reg, bus_r(reg) & (~PATTERN_CNTRL_RD_MSK));
@ -1802,7 +1795,7 @@ int setPatternWaitAddress(int level, int addr) {
// get // get
uint32_t regval = bus_r((reg & mask) >> offset); uint32_t regval = bus_r((reg & mask) >> offset);
FILE_LOG(logDEBUG1, ("\tWait Address (level:%d, addr:%d)\n", level, regval)); FILE_LOG(logDEBUG1, ("Wait Address (level:%d, addr:%d)\n", level, regval));
return regval; return regval;
} }
@ -1837,7 +1830,7 @@ uint64_t setPatternWaitTime(int level, uint64_t t) {
// get // get
uint32_t regval = get64BitReg(regl, regm); uint32_t regval = get64BitReg(regl, regm);
FILE_LOG(logDEBUG1, ("\tWait Time (level:%d, t:%lld)\n", level, (long long int)regval)); FILE_LOG(logDEBUG1, ("Wait Time (level:%d, t:%lld)\n", level, (long long int)regval));
return regval; return regval;
} }

10
slsDetectorServers/ctbDetectorServer/slsDetectorServer_defs.h
View File

@ -4,11 +4,11 @@
#define GOODBYE (-200) #define GOODBYE (-200)
#define MIN_REQRD_VRSN_T_RD_API 0x180314 #define MIN_REQRD_VRSN_T_RD_API 0x181130
#define REQRD_FRMWR_VRSN 0x180314 #define REQRD_FRMWR_VRSN 0x181130
#define PROGRAMMING_MODE (0x2) #define PROGRAMMING_MODE (0x2)
#define CTRL_SRVR_INIT_TIME_US (300 * 1000) #define CTRL_SRVR_INIT_TIME_US (1000 * 1000)
/* Struct Definitions */ /* Struct Definitions */
typedef struct ip_header_struct { typedef struct ip_header_struct {
@ -60,6 +60,10 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7, D8, D9,
#define DEFAULT_VLIMIT (-100) #define DEFAULT_VLIMIT (-100)
#define DEFAULT_TIMING_MODE (AUTO_TIMING) #define DEFAULT_TIMING_MODE (AUTO_TIMING)
#define DEFAULT_TX_UDP_PORT (0x7e9a) #define DEFAULT_TX_UDP_PORT (0x7e9a)
#define DEFAULT_RUN_CLK (40)
#define DEFAULT_ADC_CLK (20)
#define DEFAULT_SYNC_CLK (20)
#define DEFAULT_DBIT_CLK (200)
#define HIGHVOLTAGE_MIN (60) #define HIGHVOLTAGE_MIN (60)
#define HIGHVOLTAGE_MAX (200) #define HIGHVOLTAGE_MAX (200)

1
slsDetectorServers/slsDetectorServer/AD7689.h
View File

@ -210,6 +210,7 @@ void AD7689_Configure(){
FILE_LOG(logINFOBLUE, ("Configuring AD7689 (Slow ADCs): \n")); FILE_LOG(logINFOBLUE, ("Configuring AD7689 (Slow ADCs): \n"));
// from power up, 3 invalid conversions // from power up, 3 invalid conversions
FILE_LOG(logINFO, ("3 times due to invalid conversions from power up\n"));
int i = 0; int i = 0;
for (i = 0; i < AD7689_NUM_INVALID_CONVERSIONS; ++i) { for (i = 0; i < AD7689_NUM_INVALID_CONVERSIONS; ++i) {
AD7689_Set( AD7689_Set(

36
slsDetectorServers/slsDetectorServer/I2C.h
View File

@ -19,12 +19,6 @@
#define I2C_DATA_RATE_KBPS (200) #define I2C_DATA_RATE_KBPS (200)
#define I2C_SCL_PERIOD_NS ((1000 * 1000) / I2C_DATA_RATE_KBPS)
#define I2C_SCL_LOW_PERIOD_NS (I2C_SCL_PERIOD_NS / 2)
#define I2C_SCL_HIGH_PERIOD_NS (I2C_SCL_PERIOD_NS / 2)
#define I2C_SDA_DATA_HOLD_TIME_NS (I2C_SCL_HIGH_PERIOD_NS / 2)
#define I2C_SCL_LOW_COUNT ((I2C_SCL_LOW_PERIOD_NS / 1000) * I2C_CLOCK_MHZ) // convert to us, then to clock (defined in blackfin.h)
#define I2C_SDA_DATA_HOLD_COUNT ((I2C_SDA_DATA_HOLD_TIME_NS / 1000) * I2C_CLOCK_MHZ) // convert to us, then to clock (defined in blackfin.h)
/** Control Register */ /** Control Register */
#define I2C_CTRL_ENBLE_CORE_OFST (0) #define I2C_CTRL_ENBLE_CORE_OFST (0)
@ -83,7 +77,7 @@ uint32_t I2C_Transfer_Command_Fifo_Reg = 0x0;
* @param treg transfer command fifo register (defined in RegisterDefs.h) * @param treg transfer command fifo register (defined in RegisterDefs.h)
*/ */
void I2C_ConfigureI2CCore(uint32_t creg, uint32_t rreg, uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) { void I2C_ConfigureI2CCore(uint32_t creg, uint32_t rreg, uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) {
FILE_LOG(logINFOBLUE, ("\tConfiguring I2C Core for %d kbps:\n", I2C_DATA_RATE_KBPS)); FILE_LOG(logINFO, ("\tConfiguring I2C Core for %d kbps:\n", I2C_DATA_RATE_KBPS));
I2C_Control_Reg = creg; I2C_Control_Reg = creg;
I2C_Rx_Data_Fifo_Level_Reg = rreg; I2C_Rx_Data_Fifo_Level_Reg = rreg;
@ -92,16 +86,28 @@ void I2C_ConfigureI2CCore(uint32_t creg, uint32_t rreg, uint32_t slreg, uint32_t
I2C_Sda_Hold_Reg = sdreg; I2C_Sda_Hold_Reg = sdreg;
I2C_Transfer_Command_Fifo_Reg = treg; I2C_Transfer_Command_Fifo_Reg = treg;
FILE_LOG(logINFOBLUE, ("\tSetting SCL Low Period: %d ns (0x%x clocks)\n", I2C_SCL_LOW_PERIOD_NS, I2C_SCL_LOW_COUNT)); // calculate scl low and high period count
bus_w(I2C_Scl_Low_Count_Reg, (uint32_t)I2C_SCL_LOW_COUNT); uint32_t sclPeriodNs = ((1000.00 * 1000.00) / (double)I2C_DATA_RATE_KBPS);
// scl low period same as high period
uint32_t sclLowPeriodNs = sclPeriodNs / 2;
// convert to us, then to clock (defined in blackfin.h)
uint32_t sclLowPeriodCount = (sclLowPeriodNs / 1000.00) * I2C_CLOCK_MHZ;
FILE_LOG(logINFOBLUE, ("\tSetting SCL High Period: %d ns (0x%x clocks)\n", I2C_SCL_HIGH_PERIOD_NS, I2C_SCL_LOW_COUNT)); // calculate sda hold data count
bus_w(I2C_Scl_High_Count_Reg, (uint32_t)I2C_SCL_LOW_COUNT); uint32_t sdaDataHoldTimeNs = (sclLowPeriodNs / 2); // scl low period same as high period
// convert to us, then to clock (defined in blackfin.h)
uint32_t sdaDataHoldCount = ((sdaDataHoldTimeNs / 1000.00) * I2C_CLOCK_MHZ);
FILE_LOG(logINFOBLUE, ("\tSetting SDA Hold Time: %d ns (0x%x clocks)\n", I2C_SDA_DATA_HOLD_TIME_NS, I2C_SDA_DATA_HOLD_COUNT)); FILE_LOG(logINFO, ("\tSetting SCL Low Period: %d ns (%d clocks)\n", sclLowPeriodNs, sclLowPeriodCount));
bus_w(I2C_Sda_Hold_Reg, (uint32_t)I2C_SDA_DATA_HOLD_COUNT); bus_w(I2C_Scl_Low_Count_Reg, sclLowPeriodCount);
FILE_LOG(logINFOBLUE, ("\tEnabling core\n")); FILE_LOG(logINFO, ("\tSetting SCL High Period: %d ns (%d clocks)\n", sclLowPeriodNs, sclLowPeriodCount));
bus_w(I2C_Scl_High_Count_Reg, sclLowPeriodCount);
FILE_LOG(logINFO, ("\tSetting SDA Hold Time: %d ns (%d clocks)\n", sdaDataHoldTimeNs, sdaDataHoldCount));
bus_w(I2C_Sda_Hold_Reg, (uint32_t)sdaDataHoldCount);
FILE_LOG(logINFO, ("\tEnabling core\n"));
bus_w(I2C_Control_Reg, I2C_CTRL_ENBLE_CORE_MSK | I2C_CTRL_BUS_SPEED_FAST_400_VAL);// fixme: (works?) bus_w(I2C_Control_Reg, I2C_CTRL_ENBLE_CORE_MSK | I2C_CTRL_BUS_SPEED_FAST_400_VAL);// fixme: (works?)
} }
@ -142,7 +148,7 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr) {
* @param data data to be written (16 bit) * @param data data to be written (16 bit)
*/ */
void I2C_Write(uint32_t devId, uint32_t addr, uint16_t data) { void I2C_Write(uint32_t devId, uint32_t addr, uint16_t data) {
FILE_LOG(logDEBUG1, ("\tWriting data %d to I2C device 0x%x and reg 0x%x\n", data, devId, addr)); FILE_LOG(logDEBUG1, ("Writing to I2C (Device:0x%x, reg:0x%x, data:%d)\n", devId, addr, data));
// device Id mask // device Id mask
uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK); uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);

4
slsDetectorServers/slsDetectorServer/INA226.h
View File

@ -57,7 +57,7 @@ double INA226_Shunt_Resistor_Ohm = 0.0;
* @param treg transfer command fifo register (defined in RegisterDefs.h) * @param treg transfer command fifo register (defined in RegisterDefs.h)
*/ */
void INA226_ConfigureI2CCore(double rOhm, uint32_t creg, uint32_t rreg, uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) { void INA226_ConfigureI2CCore(double rOhm, uint32_t creg, uint32_t rreg, uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) {
FILE_LOG(logINFO, ("Configuring INA226\n")); FILE_LOG(logINFOBLUE, ("Configuring INA226\n"));
INA226_Shunt_Resistor_Ohm = rOhm; INA226_Shunt_Resistor_Ohm = rOhm;
@ -69,7 +69,7 @@ void INA226_ConfigureI2CCore(double rOhm, uint32_t creg, uint32_t rreg, uint32_t
* @param deviceId device Id (defined in slsDetectorServer_defs.h) * @param deviceId device Id (defined in slsDetectorServer_defs.h)
*/ */
void INA226_CalibrateCurrentRegister(uint32_t deviceId) { void INA226_CalibrateCurrentRegister(uint32_t deviceId) {
FILE_LOG(logINFO, ("Calibrating Current Register for Device ID: 0x%x\n", deviceId));
// get calibration value based on shunt resistor // get calibration value based on shunt resistor
uint16_t calVal = ((uint16_t)INA226_getCalibrationValue(INA226_Shunt_Resistor_Ohm)) & INA226_CALIBRATION_MSK; uint16_t calVal = ((uint16_t)INA226_getCalibrationValue(INA226_Shunt_Resistor_Ohm)) & INA226_CALIBRATION_MSK;
FILE_LOG(logINFO, ("\tWriting to Calibration reg: 0x%0x\n", calVal)); FILE_LOG(logINFO, ("\tWriting to Calibration reg: 0x%0x\n", calVal));

32
slsDetectorServers/slsDetectorServer/LTC2620.h
View File

@ -106,7 +106,7 @@ int LTC2620_DacToVoltage(int dacval, int* voltage) {
* @param dacaddr dac channel number in chip * @param dacaddr dac channel number in chip
*/ */
void LTC2620_SetSingle(int cmd, int data, int dacaddr) { void LTC2620_SetSingle(int cmd, int data, int dacaddr) {
FILE_LOG(logDEBUG1, ("\tdac addr:%d, dac value:%d, cmd:%d\n", dacaddr, data, cmd)); FILE_LOG(logDEBUG1, ("dac addr:%d, dac value:%d, cmd:%d\n", dacaddr, data, cmd));
uint32_t codata = (((data << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK) | uint32_t codata = (((data << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK) |
((dacaddr << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) | ((dacaddr << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) |
@ -142,7 +142,7 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) {
uint32_t valw = 0; uint32_t valw = 0;
int ichip = 0; int ichip = 0;
FILE_LOG(logDEBUG1, ("\tdesired chip index:%d, nchip:%d, dac channel:%d, dac value:%d, cmd:%d \n", FILE_LOG(logDEBUG1, ("desired chip index:%d, nchip:%d, dac ch:%d, val:%d, cmd:0x%x \n",
chipIndex, nchip, dacaddr, data, cmd)); chipIndex, nchip, dacaddr, data, cmd));
// data to be bit banged // data to be bit banged
@ -151,14 +151,14 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) {
cmd); cmd);
// select all chips (ctb daisy chain; others 1 chip) // select all chips (ctb daisy chain; others 1 chip)
FILE_LOG(logDEBUG1, ("\tSelecting LTC2620\n")); FILE_LOG(logDEBUG1, ("Selecting LTC2620\n"));
SPIChipSelect (&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask, LTC2620_DigMask); SPIChipSelect (&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask, LTC2620_DigMask);
// send same data to all // send same data to all
if (chipIndex < 0) { if (chipIndex < 0) {
FILE_LOG(logDEBUG1, ("\tSend same data to all\n")); FILE_LOG(logDEBUG1, ("Send same data to all\n"));
for (ichip = 0; ichip < nchip; ++ichip) { for (ichip = 0; ichip < nchip; ++ichip) {
FILE_LOG(logDEBUG1, ("\tSend to ichip %d\n", ichip)); FILE_LOG(logDEBUG1, ("Send data (0x%x) to ichip %d\n", codata, ichip));
LTC2620_SendDaisyData(&valw, codata); LTC2620_SendDaisyData(&valw, codata);
} }
} }
@ -167,24 +167,24 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) {
else { else {
// send nothing to preceding ichips (daisy chain) (if any chips in front of desired chip) // send nothing to preceding ichips (daisy chain) (if any chips in front of desired chip)
for (ichip = 0; ichip < chipIndex; ++ichip) { for (ichip = 0; ichip < chipIndex; ++ichip) {
FILE_LOG(logDEBUG1, ("\tSend nothing to ichip %d\n", ichip)); FILE_LOG(logDEBUG1, ("Send nothing to ichip %d\n", ichip));
LTC2620_SendDaisyData(&valw, LTC2620_DAC_CMD_NO_OPRTN_VAL); LTC2620_SendDaisyData(&valw, LTC2620_DAC_CMD_NO_OPRTN_VAL);
} }
// send data to desired chip // send data to desired chip
FILE_LOG(logDEBUG1, ("\tSend data to ichip %d\n", chipIndex)); FILE_LOG(logDEBUG1, ("Send data (0x%x) to ichip %d\n", codata, chipIndex));
LTC2620_SendDaisyData(&valw, codata); LTC2620_SendDaisyData(&valw, codata);
// send nothing to subsequent ichips (daisy chain) (if any chips after desired chip) // send nothing to subsequent ichips (daisy chain) (if any chips after desired chip)
int ichip = 0; int ichip = 0;
for (ichip = chipIndex + 1; ichip < nchip; ++ichip) { for (ichip = chipIndex + 1; ichip < nchip; ++ichip) {
FILE_LOG(logDEBUG1, ("\tSend nothing to ichip %d\n", ichip)); FILE_LOG(logDEBUG1, ("Send nothing to ichip %d\n", ichip));
LTC2620_SendDaisyData(&valw, LTC2620_DAC_CMD_NO_OPRTN_VAL); LTC2620_SendDaisyData(&valw, LTC2620_DAC_CMD_NO_OPRTN_VAL);
} }
} }
// deselect all chips (ctb daisy chain; others 1 chip) // deselect all chips (ctb daisy chain; others 1 chip)
FILE_LOG(logDEBUG1, ("\tDeselecting LTC2620\n")); FILE_LOG(logDEBUG1, ("Deselecting LTC2620\n"));
SPIChipDeselect(&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask); SPIChipDeselect(&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask);
} }
@ -198,7 +198,7 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) {
* @param chipIndex the chip to be set * @param chipIndex the chip to be set
*/ */
void LTC2620_Set(int cmd, int data, int dacaddr, int chipIndex) { void LTC2620_Set(int cmd, int data, int dacaddr, int chipIndex) {
FILE_LOG(logDEBUG1, ("\tcmd:%d data:%d dacaddr:%d chipIndex:%d\n", cmd, data, dacaddr, chipIndex)); FILE_LOG(logDEBUG1, ("cmd:0x%x, data:%d, dacaddr:%d, chipIndex:%d\n", cmd, data, dacaddr, chipIndex));
// ctb // ctb
if (LTC2620_Ndac > LTC2620_NUMCHANNELS) if (LTC2620_Ndac > LTC2620_NUMCHANNELS)
LTC2620_SetDaisy(cmd, data, dacaddr, chipIndex); LTC2620_SetDaisy(cmd, data, dacaddr, chipIndex);
@ -215,7 +215,7 @@ void LTC2620_Configure(){
FILE_LOG(logINFOBLUE, ("Configuring LTC2620\n")); FILE_LOG(logINFOBLUE, ("Configuring LTC2620\n"));
// dac channel - all channels // dac channel - all channels
int addr = LTC2620_DAC_ADDR_MSK; int addr = (LTC2620_DAC_ADDR_MSK >> LTC2620_DAC_ADDR_OFST);
// data (any random low value, just writing to power up) // data (any random low value, just writing to power up)
int data = 0x6; int data = 0x6;
@ -224,7 +224,7 @@ void LTC2620_Configure(){
int cmd = LTC2620_DAC_CMD_WR_IN_VAL; //FIXME: should be command update and not write(does not power up) int cmd = LTC2620_DAC_CMD_WR_IN_VAL; //FIXME: should be command update and not write(does not power up)
// also why do we need to power up (for jctb, we power down next) // also why do we need to power up (for jctb, we power down next)
LTC2620_Set(data, addr, cmd, -1); LTC2620_Set(cmd, data, addr, -1);
} }
@ -234,7 +234,7 @@ void LTC2620_Configure(){
* @param data dac value to set * @param data dac value to set
*/ */
void LTC2620_SetDAC (int dacnum, int data) { void LTC2620_SetDAC (int dacnum, int data) {
FILE_LOG(logDEBUG1, ("\tSetting dac %d to %d\n", dacnum, data)); FILE_LOG(logDEBUG1, ("Setting dac %d to %d\n", dacnum, data));
// LTC2620 index // LTC2620 index
int ichip = dacnum / LTC2620_NUMCHANNELS; int ichip = dacnum / LTC2620_NUMCHANNELS;
@ -247,9 +247,9 @@ void LTC2620_SetDAC (int dacnum, int data) {
// power down mode, value is ignored // power down mode, value is ignored
if (data == LTC2620_PWR_DOWN_VAL) { if (data == LTC2620_PWR_DOWN_VAL) {
cmd = LTC2620_DAC_CMD_PWR_DWN_VAL; cmd = LTC2620_DAC_CMD_PWR_DWN_VAL;
FILE_LOG(logDEBUG1, ("\tPOWER DOWN\n")); FILE_LOG(logDEBUG1, ("POWER DOWN\n"));
} else { } else {
FILE_LOG(logDEBUG1,("\tWrite to Input Register and Update\n")); FILE_LOG(logDEBUG1,("Write to Input Register and Update\n"));
} }
LTC2620_Set(cmd, data, addr, ichip); LTC2620_Set(cmd, data, addr, ichip);
@ -264,7 +264,7 @@ void LTC2620_SetDAC (int dacnum, int data) {
* @returns OK or FAIL for success of operation * @returns OK or FAIL for success of operation
*/ */
int LTC2620_SetDACValue (int dacnum, int val, int mV, int* dacval) { int LTC2620_SetDACValue (int dacnum, int val, int mV, int* dacval) {
FILE_LOG(logDEBUG1, ("\tdacnum:%d, val:%d, mV:%d\n", dacnum, val, mV)); FILE_LOG(logDEBUG1, ("dacnum:%d, val:%d, mV:%d\n", dacnum, val, mV));
// validate index // validate index
if (dacnum < 0 || dacnum >= LTC2620_Ndac) { if (dacnum < 0 || dacnum >= LTC2620_Ndac) {
FILE_LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum, LTC2620_Ndac - 1)); FILE_LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum, LTC2620_Ndac - 1));

3
slsDetectorServers/slsDetectorServer/MAX1932.h
View File

@ -33,6 +33,7 @@ int MAX1932_MaxVoltage = 0;
*/ */
void MAX1932_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst, void MAX1932_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst,
int minMV, int maxMV) { int minMV, int maxMV) {
FILE_LOG(logINFOBLUE, ("Configuring High Voltage\n"));
MAX1932_Reg = reg; MAX1932_Reg = reg;
MAX1932_CsMask = cmsk; MAX1932_CsMask = cmsk;
MAX1932_ClkMask = clkmsk; MAX1932_ClkMask = clkmsk;
@ -60,7 +61,7 @@ void MAX1932_Disable() {
* @return OK or FAIL * @return OK or FAIL
*/ */
int MAX1932_Set (int val) { int MAX1932_Set (int val) {
FILE_LOG(logDEBUG1, ("\tSetting high voltage to %d\n", val)); FILE_LOG(logDEBUG1, ("Setting high voltage to %d\n", val));
if (val < 0) if (val < 0)
return FAIL; return FAIL;

2
slsDetectorServers/slsDetectorServer/blackfin.h
View File

@ -72,7 +72,7 @@ int64_t get64BitReg(int aLSB, int aMSB){
vMSB=bus_r(aMSB); vMSB=bus_r(aMSB);
v64=vMSB; v64=vMSB;
v64=(v64<<32) | vLSB; v64=(v64<<32) | vLSB;
FILE_LOG(logDEBUG1, (" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, (long long unsigned int)v64)); FILE_LOG(logDEBUG5, (" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, (long long unsigned int)v64));
return v64; return v64;
} }

5
slsDetectorServers/slsDetectorServer/common.h
View File

@ -12,7 +12,8 @@
*/ */
int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin, int outputMax, int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin, int outputMax,
int inputValue, int* outputValue) { int inputValue, int* outputValue) {
FILE_LOG(logDEBUG1, ("\tInput Value: %d\n", inputValue)); FILE_LOG(logDEBUG1, ("Input Value: %d (Input:(%d - %d), Output:(%d - %d))\n",
inputValue, inputMin, inputMax, outputMin, outputMax));
// validate within bounds // validate within bounds
// eg. MAX1932 range is v(60 - 200) to dac(255 - 1), here inputMin > inputMax (when dac to voltage) // eg. MAX1932 range is v(60 - 200) to dac(255 - 1), here inputMin > inputMax (when dac to voltage)
@ -37,7 +38,7 @@ int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin, int outpu
} }
*outputValue = value; *outputValue = value;
FILE_LOG(logDEBUG1, ("\tConverted Ouput Value: %d\n", *outputValue)); FILE_LOG(logDEBUG1, ("Converted Ouput Value: %d\n", *outputValue));
return OK; return OK;
} }

2
slsDetectorServers/slsDetectorServer/logger.h
View File

@ -13,6 +13,8 @@
#define FILELOG_MAX_LEVEL logDEBUG4 #define FILELOG_MAX_LEVEL logDEBUG4
#elif VERBOSE #elif VERBOSE
#define FILELOG_MAX_LEVEL logDEBUG #define FILELOG_MAX_LEVEL logDEBUG
#elif DEBUG1
#define FILELOG_MAX_LEVEL logDEBUG1
#endif #endif
#ifndef FILELOG_MAX_LEVEL #ifndef FILELOG_MAX_LEVEL

10
slsDetectorServers/slsDetectorServer/slsDetectorFunctionList.h
View File

@ -181,6 +181,7 @@ int getADCIndexFromDACIndex(enum DACINDEX ind);
int isPowerValid(int val); int isPowerValid(int val);
int getPower(); int getPower();
void setPower(enum DACINDEX ind, int val); void setPower(enum DACINDEX ind, int val);
void powerOff();
#endif #endif
/*#ifdef GOTTHARDD /*#ifdef GOTTHARDD
void initDAC(int dac_addr, int value); void initDAC(int dac_addr, int value);
@ -223,10 +224,13 @@ int setDetectorPosition(int pos[]);
// very detector specific // very detector specific
// moench specific - powerchip
// chip test board specific - powerchip, sendudp, pll, flashing firmware #ifdef MOENCHD
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
int powerChip (int on); int powerChip (int on);
#endif
// chip test board specific - sendudp, pll, flashing firmware
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
int sendUDP(int enable); int sendUDP(int enable);
void configurePhase(enum CLKINDEX ind, int val); void configurePhase(enum CLKINDEX ind, int val);
int getPhase(enum CLKINDEX ind); int getPhase(enum CLKINDEX ind);

2
slsDetectorServers/slsDetectorServer/slsDetectorServer_funcs.c
View File

@ -3113,7 +3113,7 @@ int power_chip(int file_des) {
return printSocketReadError(); return printSocketReadError();
FILE_LOG(logDEBUG1, ("Powering chip to %d\n", arg)); FILE_LOG(logDEBUG1, ("Powering chip to %d\n", arg));
#ifndef JUNGFRAUD #if (!defined(JUNGFRAUD)) && (!defined(MOENCHD))
functionNotImplemented(); functionNotImplemented();
#else #else
// set & get // set & get

2
slsSupportLib/include/versionAPI.h
View File

@ -3,6 +3,6 @@
#define APIEIGER 0x181031 #define APIEIGER 0x181031
#define APIJUNGFRAU 0x190111 #define APIJUNGFRAU 0x190111
#define APIGOTTHARD 0x190108 #define APIGOTTHARD 0x190108
#define APICTB 0x180101 #define APICTB 0x190206
#define APIMOENCH 0x181108 #define APIMOENCH 0x181108